From 981c442b7e917b7b0417d4231fbad2c6ac03b17c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 26 Dec 2025 03:45:54 +0000
Subject: [PATCH 001/214] Changed exponent from u32 to u64.  Exponents over
 2^32-1 don't work yet -- debugging is needed.

---
 src/Args.cpp      |  8 ++--
 src/Args.h        |  6 +--
 src/FFTConfig.cpp | 10 ++---
 src/FFTConfig.h   |  6 +--
 src/Gpu.cpp       | 93 ++++++++++++++++++++++++-----------------------
 src/Gpu.h         | 18 ++++-----
 src/PRPState.cpp  |  3 +-
 src/PRPState.h    | 10 ++---
 src/Primes.cpp    | 16 ++++----
 src/Primes.h      | 12 +++---
 src/Proof.cpp     | 60 ++++++++++++++++--------------
 src/Proof.h       | 46 +++++++++++------------
 src/Saver.cpp     | 45 ++++++++++++-----------
 src/Saver.h       | 14 +++----
 src/Task.cpp      | 12 +++---
 src/Task.h        |  2 +-
 src/TuneEntry.cpp | 13 ++++---
 src/Worktodo.cpp  |  4 +-
 src/common.h      |  6 +--
 src/shared.h      |  4 +-
 src/state.cpp     |  4 +-
 src/state.h       | 12 +++---
 src/tune.cpp      | 56 ++++++++++++++--------------
 23 files changed, 236 insertions(+), 224 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 041202ad..5556e6a5 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -86,7 +86,7 @@ void Args::readConfig(const fs::path& path) {
   }
 }
 
-u32 Args::getProofPow(u32 exponent) const {
+u32 Args::getProofPow(u64 exponent) const {
   if (proofPow == -1) { return ProofSet::bestPower(exponent); }
   assert(proofPow >= 1);
   return proofPow;
@@ -310,9 +310,9 @@ void Args::parse(const string& line) {
     } else if (key == "-tune") {
       doTune = true;
       if (!s.empty()) { tune = s; }
-    } else if (key == "-ctune") {
-      doCtune = true;
-      if (!s.empty()) { ctune.push_back(s); }
+//    } else if (key == "-ctune") {
+//      doCtune = true;
+//      if (!s.empty()) { ctune.push_back(s); }
     } else if (key == "-ztune") {
       doZtune = true;
     } else if (key == "-carryTune") {
diff --git a/src/Args.h b/src/Args.h
index 795cd99c..d7273afe 100644
--- a/src/Args.h
+++ b/src/Args.h
@@ -30,7 +30,7 @@ class Args {
   bool uses(const std::string& key) const { return flags.find(key) != flags.end(); }
   int value(const std::string& key, int valNotFound = -1) const;
   void readConfig(const fs::path& path);
-  u32 getProofPow(u32 exponent) const;
+  u32 getProofPow(u64 exponent) const;
   string tailDir() const;
 
   bool hasFlag(const string& key) const;
@@ -78,8 +78,8 @@ class Args {
   u32 logStep = 20000;
   string fftSpec;
 
-  u32 prpExp = 0;
-  u32 llExp = 0;
+  u64 prpExp = 0;
+  u64 llExp = 0;
   
   size_t maxAlloc = 0;
 
diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index 2308a037..c21607e1 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -182,7 +182,7 @@ if (18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())) > 19.0) return 19.0;
   return 18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size()));
 }
 
-bool FFTShape::needsLargeCarry(u32 E) const {
+bool FFTShape::needsLargeCarry(u64 E) const {
   return E / double(size()) > carry32BPW();
 }
 
@@ -271,12 +271,12 @@ float FFTConfig::maxBpw() const {
   return (carry == CARRY_32 && (shape.fft_type == FFT64 || shape.fft_type == FFT3231)) ? std::min(shape.carry32BPW(), b) : b;
 }
 
-FFTConfig FFTConfig::bestFit(const Args& args, u32 E, const string& spec) {
+FFTConfig FFTConfig::bestFit(const Args& args, u64 E, const string& spec) {
   // A FFT-spec was given, simply take the first FFT from the spec that can handle E
   if (!spec.empty()) {
     FFTConfig fft{spec};
     if (fft.maxExp() * args.fftOverdrive < E) {
-      log("Warning: %s (max %" PRIu64 ") may be too small for %u\n", fft.spec().c_str(), fft.maxExp(), E);
+      log("Warning: %s (max %" PRIu64 ") may be too small for %" PRIu64 "\n", fft.spec().c_str(), fft.maxExp(), E);
     }
     return fft;
   }
@@ -288,7 +288,7 @@ FFTConfig FFTConfig::bestFit(const Args& args, u32 E, const string& spec) {
     if (E <= e.fft.maxExp() * args.fftOverdrive) { return e.fft; }
   }
 
-  log("No FFTs found in tune.txt that can handle %u. Consider tuning with -tune\n", E);
+  log("No FFTs found in tune.txt that can handle %" PRIu64 ". Consider tuning with -tune\n", E);
 
   // Take the first FFT that can handle E
   for (const FFTShape& shape : FFTShape::allShapes()) {
@@ -297,7 +297,7 @@ FFTConfig FFTConfig::bestFit(const Args& args, u32 E, const string& spec) {
     }
   }
 
-  log("No FFT found for %u\n", E);
+  log("No FFT found for %" PRIu64 "\n", E);
   throw "No FFT";
 }
 
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index c873eb8c..a9ad052c 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -27,7 +27,7 @@ class FFTShape {
 public:
   static std::vector<FFTShape> allShapes(u32 from=0, u32 to = -1);
 
-  static tuple<u32, u32, bool> getChainLengths(u32 fftSize, u32 exponent, u32 middle);
+  static tuple<u32, u32, bool> getChainLengths(u32 fftSize, u64 exponent, u32 middle);
 
   static vector<FFTShape> multiSpec(const string& spec);
 
@@ -51,7 +51,7 @@ class FFTShape {
   std::string spec() const { return (fft_type ? to_string(fft_type) + ':' : "") + numberK(width) + ':' + numberK(middle) + ':' + numberK(height); }
 
   float carry32BPW() const;
-  bool needsLargeCarry(u32 E) const;
+  bool needsLargeCarry(u64 E) const;
   bool isFavoredShape() const;
 };
 
@@ -73,7 +73,7 @@ enum CARRY_KIND {CARRY_32=0, CARRY_64=1, CARRY_AUTO=2};
 
 struct FFTConfig {
 public:
-  static FFTConfig bestFit(const Args& args, u32 E, const std::string& spec);
+  static FFTConfig bestFit(const Args& args, u64 E, const std::string& spec);
 
   // Which FP and NTT primes are involved in the FFT
   bool FFT_FP64;
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 44656fa1..433ce0a7 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -43,43 +43,43 @@ namespace {
 
 u32 kAt(u32 H, u32 line, u32 col) { return (line + col * H) * 2; }
 
-double weight(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+double weight(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2l((long double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
-double invWeight(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+double invWeight(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2l(-(long double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
-double weightM1(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+double weightM1(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2l((long double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
 }
 
-double invWeightM1(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+double invWeightM1(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2l(- (long double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
 }
 
 double boundUnderOne(double x) { return std::min(x, nexttoward(1, 0)); }
 
-float weight32(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+float weight32(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2((double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
-float invWeight32(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+float invWeight32(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2(-(double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
-float weightM132(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+float weightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2((double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
 }
 
-float invWeightM132(u32 N, u32 E, u32 H, u32 line, u32 col, u32 rep) {
+float invWeightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2(- (double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
 }
 
 float boundUnderOne(float x) { return std::min(x, nexttowardf(1, 0)); }
 
-Weights genWeights(FFTConfig fft, u32 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
+Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
   u32 N = 2u * W * H;
   u32 groupWidth = W / nW;
 
@@ -227,7 +227,7 @@ constexpr bool isInList(const string& s, initializer_list<string> list) {
   return false;
 }
 
-string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u32 E, bool doLog,
+string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u64 E, bool doLog,
                  bool &tail_single_wide, bool &tail_single_kernel, u32 &in_place, u32 &pad_size) {
   map<string, string> config;
 
@@ -457,15 +457,15 @@ RoeInfo roeStat(const vector<float>& roe) {
 
 class IterationTimer {
   Timer timer;
-  u32 kStart;
+  u64 kStart;
 
 public:
-  explicit IterationTimer(u32 kStart) : kStart(kStart) { }
+  explicit IterationTimer(u64 kStart) : kStart(kStart) { }
 
-  float reset(u32 k) {
+  float reset(u64 k) {
     float secs = timer.reset();
 
-    u32 its = max(1u, k - kStart);
+    u64 its = max(u64(1), k - kStart);
     kStart = k;
     return secs / its;
   }
@@ -506,7 +506,7 @@ string toHex(const vector<u32>& v) {
 
 // --------
 
-unique_ptr<Gpu> Gpu::make(Queue* q, u32 E, GpuCommon shared, FFTConfig fftConfig, const vector<KeyVal>& extraConf, bool logFftSize) {
+unique_ptr<Gpu> Gpu::make(Queue* q, u64 E, GpuCommon shared, FFTConfig fftConfig, const vector<KeyVal>& extraConf, bool logFftSize) {
   return make_unique<Gpu>(q, shared, fftConfig, E, extraConf, logFftSize);
 }
 
@@ -518,7 +518,7 @@ Gpu::~Gpu() {
 #define ROE_SIZE 100000
 #define CARRY_SIZE 100000
 
-Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u32 E, const vector<KeyVal>& extraConf, bool logFftSize) :
+Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
   queue(q),
   background{shared.background},
   args{*shared.args},
@@ -649,7 +649,7 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u32 E, const vector<KeyVal>&
     // Sometimes we do want to run a FFT beyond a reasonable BPW (e.g. during -ztune), and these situations
     // coincide with logFftSize == false
     if (fft.maxExp() < E) {
-      log("Warning: %s (max %" PRIu64 ") may be too small for %u\n", fft.spec().c_str(), fft.maxExp(), E);
+      log("Warning: %s (max %" PRIu64 ") may be too small for %" PRIu64 "\n", fft.spec().c_str(), fft.maxExp(), E);
     }
   }
 
@@ -992,7 +992,7 @@ void Gpu::modMul(Buffer<Word>& ioA, Buffer<Word>& inB, enum LEAD_TYPE leadInB, b
   mul(ioA, buf1, buf2, buf3, mul3);
 };
 
-void Gpu::writeState(u32 k, const vector<u32>& check, u32 blockSize) {
+void Gpu::writeState(u64 k, const vector<u32>& check, u32 blockSize) {
   assert(blockSize > 0);
   writeIn(bufCheck, check);
 
@@ -1022,7 +1022,7 @@ void Gpu::writeState(u32 k, const vector<u32>& check, u32 blockSize) {
   }
   modMul(bufData, bufAux, true);
 }
-  
+
 bool Gpu::doCheck(u32 blockSize) {
   squareLoop(bufAux, bufCheck, 0, blockSize, true);
   modMul(bufCheck, bufData);
@@ -1278,10 +1278,10 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
   }
 }
 
-u32 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u32 from, u32 to, bool doTailMul3) {
+u32 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3) {
   assert(from < to);
   enum LEAD_TYPE leadIn = LEAD_NONE;
-  for (u32 k = from; k < to; ++k) {
+  for (u64 k = from; k < to; ++k) {
     enum LEAD_TYPE leadOut = useLongCarry || (k == to - 1) ? LEAD_NONE : LEAD_WIDTH;
     square(out, (k==from) ? in : out, leadIn, leadOut, doTailMul3 && (k == to - 1));
     leadIn = leadOut;
@@ -1350,16 +1350,16 @@ string RoeInfo::toString() const {
   return buf;
 }
 
-static string makeLogStr(const string& status, u32 k, u64 res, float secsPerIt, u32 nIters) {
+static string makeLogStr(const string& status, u64 k, u64 res, float secsPerIt, u64 nIters) {
   char buf[256];
   
-  snprintf(buf, sizeof(buf), "%2s %9u %016" PRIx64 " %4.0f ETA %s; ",
+  snprintf(buf, sizeof(buf), "%2s %9" PRIu64 " %016" PRIx64 " %4.0f ETA %s; ",
            status.c_str(), k, res, /* k / float(nIters) * 100, */
            secsPerIt * 1'000'000, getETA(k, nIters, secsPerIt).c_str());
   return buf;
 }
 
-void Gpu::doBigLog(u32 k, u64 res, bool checkOK, float secsPerIt, u32 nIters, u32 nErrors) {
+void Gpu::doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors) {
   auto [roeSq, roeMul] = readROE();
   double z = roeSq.z();
   zAvg.update(z, roeSq.N);
@@ -1480,7 +1480,7 @@ static u32 mod3(const std::vector<u32> &words) {
   return r % 3;
 }
 
-static void doDiv3(u32 E, Words& words) {
+static void doDiv3(u64 E, Words& words) {
   u32 r = (3 - mod3(words)) % 3;
   assert(r < 3);
   int topBits = E % 32;
@@ -1497,7 +1497,7 @@ static void doDiv3(u32 E, Words& words) {
   }
 }
 
-void Gpu::doDiv9(u32 E, Words& words) {
+void Gpu::doDiv9(u64 E, Words& words) {
   doDiv3(E, words);
   doDiv3(E, words);
 }
@@ -1532,12 +1532,12 @@ PRPState Gpu::loadPRP(Saver<PRPState>& saver) {
     u64 res = dataResidue();
 
     if (res == state.res64) {
-      log("OK %9u on-load: blockSize %d, %016" PRIx64 "\n", state.k, state.blockSize, res);
+      log("OK %9" PRIu64 " on-load: blockSize %d, %016" PRIx64 "\n", state.k, state.blockSize, res);
       return state;
       // return {loaded.k, loaded.blockSize, loaded.nErrors};
     }
 
-    log("EE %9u on-load: %016" PRIx64 " vs. %016" PRIx64 "\n", state.k, res, state.res64);
+    log("EE %9" PRIu64 " on-load: %016" PRIx64 " vs. %016" PRIx64 "\n", state.k, res, state.res64);
 
     if (!state.k) { break; }  // We failed on PRP start
   }
@@ -1545,7 +1545,7 @@ PRPState Gpu::loadPRP(Saver<PRPState>& saver) {
   throw "Error on load";
 }
 
-u32 Gpu::getProofPower(u32 k) {
+u32 Gpu::getProofPower(u64 k) {
   u32 power = ProofSet::effectivePower(E, args.getProofPow(E), k);
 
   if (power != args.getProofPow(E)) {
@@ -1785,7 +1785,8 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
  reload:
   elapsedTimer.reset();
-  u32 blockSize{}, k{};
+  u32 blockSize{};
+  u64 k{};
   double elapsedBefore = 0;
 
   {
@@ -1814,28 +1815,28 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
   // For M=2^E-1, residue "type-3" == 3^(M+1), and residue "type-1" == type-3 / 9,
   // See http://www.mersenneforum.org/showpost.php?p=468378&postcount=209
   // For both type-1 and type-3 we need to do E squarings (as M+1==2^E).
-  const u32 kEnd = E;
+  const u64 kEnd = E;
   assert(k < kEnd);
 
   // We continue beyound kEnd: to the next multiple of blockSize, to do a check there
-  u32 kEndEnd = roundUp(kEnd, blockSize);
+  u64 kEndEnd = roundUp(kEnd, blockSize);
 
   bool skipNextCheckUpdate = false;
 
-  u32 persistK = proofSet.next(k);
+  u64 persistK = proofSet.next(k);
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
   assert(k % blockSize == 0);
   assert(checkStep % blockSize == 0);
 
-  const u32 startK = k;
+  const u64 startK = k;
   IterationTimer iterationTimer{k};
 
   wantROE = 0; // skip the initial iterations
 
   while (true) {
     assert(k < kEndEnd);
-    
+
     if (!wantROE && k - startK > 30) { wantROE = args.logROE ? ROE_SIZE : 2'000; }
 
     if (skipNextCheckUpdate) {
@@ -1876,7 +1877,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
       res2048.clear();
       assert(words.size() >= 64);
       res2048.insert(res2048.end(), words.begin(), std::next(words.begin(), 64));
-      log("%s %8d / %d, %s\n", isPrime ? "PP" : "CC", kEnd, E, hex(finalRes64).c_str());
+      log("%s %8" PRIu64 " / %" PRIu64 ", %s\n", isPrime ? "PP" : "CC", kEnd, E, hex(finalRes64).c_str());
     }
 
     if (!doCheck && !doLog) continue;
@@ -1888,7 +1889,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
     vector<Word> rawCheck = readChecked(bufCheck);
     if (rawCheck.empty()) {
       ++nErrors;
-      log("%9u %016" PRIx64 " read NULL check\n", k, res);
+      log("%9" PRIu64 " %016" PRIx64 " read NULL check\n", k, res);
       if (++nSeqErrors > 2) { throw "sequential errors"; }
       goto reload;
     }
@@ -1899,7 +1900,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
                                     elapsedBefore + elapsedTimer.at()});
       });
 
-      log("   %9u %016" PRIx64 " %4.0f\n", k, res, /*k / float(kEndEnd) * 100*,*/ secsPerIt * 1'000'000);
+      log("   %9" PRIu64 " %016" PRIx64 " %4.0f\n", k, res, /*k / float(kEndEnd) * 100*,*/ secsPerIt * 1'000'000);
       RoeInfo carryStats = readCarryStats();
       if (carryStats.N) {
         u32 m = ldexp(carryStats.max, 32);
@@ -1965,7 +1966,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
   reload:
   elapsedTimer.reset();
 
-  u32 startK = 0;
+  u64 startK = 0;
   double elapsedBefore = 0;
   {
     LLState state = saver.load();
@@ -1977,13 +1978,13 @@ LLResult Gpu::isPrimeLL(const Task& task) {
     u64 res = dataResidue();
     if (res != expectedRes) { throw "Invalid savefile (res64)"; }
     assert(res == expectedRes);
-    log("LL loaded @ %u : %016" PRIx64 "\n", startK, res);
+    log("LL loaded @ %" PRIu64 " : %016" PRIx64 "\n", startK, res);
   }
 
   IterationTimer iterationTimer{startK};
 
-  u32 k = startK;
-  u32 kEnd = E - 2;
+  u64 k = startK;
+  u64 kEnd = E - 2;
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
   while (true) {
@@ -2009,7 +2010,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     if (isAllZero) {
       if (k < kEnd) {
-        log("Error: early ZERO @ %u\n", k);
+        log("Error: early ZERO @ %" PRIu64 "\n", k);
         if (doStop) {
           throw "stop requested";
         } else {
@@ -2025,7 +2026,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     float secsPerIt = iterationTimer.reset(k);
     queue->setSquareTime((int) (secsPerIt * 1'000'000));
-    log("%9u %016" PRIx64 " %4.0f\n", k, res64, secsPerIt * 1'000'000);
+    log("%9" PRIu64 " %016" PRIx64 " %4.0f\n", k, res64, secsPerIt * 1'000'000);
 
     if (k >= kEnd) { return {isAllZero, res64}; }
 
@@ -2039,13 +2040,13 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
   // Get CERT start value
   char fname[32];
-  sprintf(fname, "M%u.cert", E);
+  sprintf(fname, "M%" PRIu64 ".cert", E);
 
 // Autoprimenet.py does not add the cert entry to worktodo.txt until it has successfully downloaded the .cert file.
 
   { // Enclosing this code in braces ensures the file will be closed by the File destructor.  The later file deletion requires the file be closed in Windows.
     File fi = File::openReadThrow(fname);
-    u32 nBytes = (E - 1) / 8 + 1;
+    u32 nBytes = u32((E - 1) / 8 + 1);
     Words B = fi.readBytesLE(nBytes);
     writeIn(bufData, std::move(B));
   }
diff --git a/src/Gpu.h b/src/Gpu.h
index fc5166f3..ad859eac 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -93,7 +93,7 @@ class Gpu {
 private:
   std::unique_ptr<Saver<PRPState>> saver;
 
-  u32 E;
+  u64 E;
   u32 N;
 
   FFTConfig fft;
@@ -250,8 +250,8 @@ class Gpu {
   void squareCERT(Buffer<Word>& io, enum LEAD_TYPE leadIn, enum LEAD_TYPE leadOut) { square(io, io, leadIn, leadOut, false, false); }
   void squareLL(Buffer<Word>& io, enum LEAD_TYPE leadIn, enum LEAD_TYPE leadOut) { square(io, io, leadIn, leadOut, false, true); }
 
-  u32 squareLoop(Buffer<Word>& out, Buffer<Word>& in, u32 from, u32 to, bool doTailMul3);
-  u32 squareLoop(Buffer<Word>& io, u32 from, u32 to) { return squareLoop(io, io, from, to, false); }
+  u32 squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3);
+  u32 squareLoop(Buffer<Word>& io, u64 from, u64 to) { return squareLoop(io, io, from, to, false); }
 
   bool isEqual(Buffer<Word>& bufCheck, Buffer<Word>& bufAux);
   u64 bufResidue(Buffer<Word>& buf);
@@ -260,7 +260,7 @@ class Gpu {
   
   void exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Buffer<double>& buf2, Buffer<double>& buf3);
 
-  void writeState(u32 k, const vector<u32>& check, u32 blockSize);
+  void writeState(u64 k, const vector<u32>& check, u32 blockSize);
 
   // does either carrryFused() or the expanded version depending on useLongCarry
   void doCarry(Buffer<double>& out, Buffer<double>& in, Buffer<Word>& tmp);
@@ -283,13 +283,13 @@ class Gpu {
 
   // void measureTransferSpeed();
 
-  static void doDiv9(u32 E, Words& words);
+  static void doDiv9(u64 E, Words& words);
   static bool equals9(const Words& words);
   void selftestTrig();
 
 public:
-  Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u32 E, const vector<KeyVal>& extraConf, bool logFftSize);
-  static unique_ptr<Gpu> make(Queue* q, u32 E, GpuCommon shared, FFTConfig fft,
+  Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize);
+  static unique_ptr<Gpu> make(Queue* q, u64 E, GpuCommon shared, FFTConfig fft,
                               const vector<KeyVal>& extraConf = {}, bool logFftSize = true);
 
   ~Gpu();
@@ -337,8 +337,8 @@ class Gpu {
   void clear(bool isPRP);
 
 private:
-  u32 getProofPower(u32 k);
-  void doBigLog(u32 k, u64 res, bool checkOK, float secsPerIt, u32 nIters, u32 nErrors);
+  u32 getProofPower(u64 k);
+  void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
 };
 
 // Compute the size of an FFT/NTT data buffer depending on the FFT/NTT float/prime.  Size is returned in units of sizeof(double).
diff --git a/src/PRPState.cpp b/src/PRPState.cpp
index bdc2c9c8..02b9ae68 100644
--- a/src/PRPState.cpp
+++ b/src/PRPState.cpp
@@ -8,7 +8,8 @@ PRPState::PRPState(File&& fi) {
 
   string header = fi.readLine();
 
-  u32 fileE, fileK, blockSize, nErrors, crc;
+  u64 fileE, fileK;
+  u32 blockSize, nErrors, crc;
   u64 res64;
   vector<u32> check;
   u32 b1, nBits, start, nextK;
diff --git a/src/PRPState.h b/src/PRPState.h
index edf0ccf9..1eab5085 100644
--- a/src/PRPState.h
+++ b/src/PRPState.h
@@ -10,23 +10,23 @@ class File;
 
 class PRPState {
   // E, k, block-size, res64, nErrors
-  static constexpr const char *PRP_v10 = "OWL PRP 10 %u %u %u %016" SCNx64 " %u\n";
+  static constexpr const char *PRP_v10 = "OWL PRP 10 %" PRIu64 " %" PRIu64 " %u %016" SCNx64 " %u\n";
 
   // Exponent, iteration, block-size, res64, nErrors
   // B1, nBits, start, nextK, crc
-  static constexpr const char *PRP_v11 = "OWL PRP 11 %u %u %u %016" SCNx64 " %u %u %u %u %u %u\n";
+  static constexpr const char *PRP_v11 = "OWL PRP 11 %" PRIu64 " %" PRIu64 " %u %016" SCNx64 " %u %u %u %u %u %u\n";
 
   // E, k, block-size, res64, nErrors, CRC
-  static constexpr const char *PRP_v12 = "OWL PRP 12 %u %u %u %016" SCNx64 " %u %u\n";
+  static constexpr const char *PRP_v12 = "OWL PRP 12 %" PRIu64 " %" PRIu64 " %u %016" SCNx64 " %u %u\n";
 
 public:
-  u32 k{};
+  u64 k{};
   u32 blockSize{};
   u64 res64{};
   vector<u32> check;
   u32 nErrors{};
 
-  // PRPState(u32 k, u32 blockSize, u64 res64, vector<)
+  // PRPState(u64 k, u32 blockSize, u64 res64, vector<)
   PRPState(File&& f);
   void saveTo(const File& f);
 };
diff --git a/src/Primes.cpp b/src/Primes.cpp
index 865cfaec..6e3ceb36 100644
--- a/src/Primes.cpp
+++ b/src/Primes.cpp
@@ -15,14 +15,14 @@ Primes::Primes() {
   }
 }
 
-bool Primes::isPrimeOdd(u32 n) const {
+bool Primes::isPrimeOdd(u64 n) const {
   assert(n % 2); // must be odd to call here
 
   if (n < 3) { return false; }
   for (u32 k = 0; k < sieve.size(); ++k) {
     if (sieve[k]) {
       u32 p = k * 2 + 3;
-      if (p * p > n) { return true; }
+      if (u64(p) * u64(p) > n) { return true; }
       if (n % p == 0) { return false; }
     }
   }
@@ -30,11 +30,11 @@ bool Primes::isPrimeOdd(u32 n) const {
   return false;
 }
 
-bool Primes::isPrime(u32 n) const {
+bool Primes::isPrime(u64 n) const {
   return (n%2 && isPrimeOdd(n)) || (n == 2);
 }
 
-u32 Primes::prevPrime(u32 n) const {
+u64 Primes::prevPrime(u64 n) const {
   --n;
   if (n % 2 == 0) { --n; }
 
@@ -43,7 +43,7 @@ u32 Primes::prevPrime(u32 n) const {
   return 0;
 }
 
-u32 Primes::nextPrime(u32 n) const {
+u64 Primes::nextPrime(u64 n) const {
   ++n;
   if (n % 2 == 0) { ++n; }
   for (; ; n += 2) { if (isPrimeOdd(n)) { return n; }}
@@ -51,10 +51,10 @@ u32 Primes::nextPrime(u32 n) const {
   return 0;
 }
 
-u32 Primes::nearestPrime(u32 n) const {
+u64 Primes::nearestPrime(u64 n) const {
   if (isPrime(n)) { return n; }
-  u32 a = prevPrime(n);
-  u32 b = nextPrime(n);
+  u64 a = prevPrime(n);
+  u64 b = nextPrime(n);
   assert(a < n && n < b);
   return n-a < b-n ? a : b;
 }
diff --git a/src/Primes.h b/src/Primes.h
index b951c02d..7f1f16fb 100644
--- a/src/Primes.h
+++ b/src/Primes.h
@@ -6,14 +6,14 @@
 #include "common.h"
 
 class Primes {
-  std::bitset<50000> sieve;
-  bool isPrimeOdd(u32 n) const;
+  std::bitset<50000> sieve;           // Allows for testing prims up to 10 billion
+  bool isPrimeOdd(u64 n) const;
 
 public:
   Primes();
 
-  bool isPrime(u32 n) const;
-  u32 prevPrime(u32 n) const;
-  u32 nextPrime(u32 n) const;
-  u32 nearestPrime(u32 n) const;
+  bool isPrime(u64 n) const;
+  u64 prevPrime(u64 n) const;
+  u64 nextPrime(u64 n) const;
+  u64 nearestPrime(u64 n) const;
 };
diff --git a/src/Proof.cpp b/src/Proof.cpp
index 31c488f8..bd8d4be6 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -19,11 +19,11 @@
 
 namespace proof {
 
-array<u64, 4> hashWords(u32 E, const Words& words) {
+array<u64, 4> hashWords(u64 E, const Words& words) {
   return std::move(SHA3{}.update(words.data(), (E-1)/8+1)).finish();
 }
 
-array<u64, 4> hashWords(u32 E, array<u64, 4> prefix, const Words& words) {
+array<u64, 4> hashWords(u64 E, array<u64, 4> prefix, const Words& words) {
   return std::move(SHA3{}.update(prefix).update(words.data(), (E-1)/8+1)).finish();
 }
 
@@ -39,7 +39,8 @@ string fileHash(const fs::path& filePath) {
 ProofInfo getInfo(const fs::path& proofFile) {
   string hash = proof::fileHash(proofFile);
   File fi = File::openReadThrow(proofFile);
-  u32 E = 0, power = 0;
+  u64 E = 0;
+  u32 power = 0;
   char c = 0;
   if (fi.scanf(Proof::HEADER_v2, &power, &E, &c) != 3 || c != '\n') {
     log("Proof file '%s' has invalid header\n", proofFile.string().c_str());
@@ -68,7 +69,8 @@ void Proof::save(const fs::path& proofFile) const {
 
 Proof Proof::load(const fs::path& path) {
   File fi = File::openReadThrow(path);
-  u32 E = 0, power = 0;
+  u64 E = 0;
+  u32 power = 0;
   char c = 0;
   if (fi.scanf(HEADER_v2, &power, &E, &c) != 3 || c != '\n') {
     log("Proof file '%s' has invalid header\n", path.string().c_str());
@@ -84,7 +86,7 @@ Proof Proof::load(const fs::path& path) {
 bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   // log("B         %016" PRIx64 "\n", res64(B));
   // for (u32 i = 0; i < middles.size(); ++i) { log("Middle[%u] %016" PRIx64 "\n", i, res64(middles[i])); }
-  
+
   u32 power = middles.size();
   assert(power > 0);
 
@@ -92,10 +94,10 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
 
   Words A{makeWords(E, 3)};
   Words B{this->B};
-  
+
   auto hash = proof::hashWords(E, B);
 
-  u32 span = E;
+  u64 span = E;
   for (u32 i = 0; i < power; ++i, span = (span + 1) / 2) {
     const Words& M = middles[i];
     hash = proof::hashWords(E, hash, M);
@@ -113,12 +115,12 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
     if (gpu->args.verbose) { log("proof [%u] : A %016" PRIx64 ", B %016" PRIx64 ", h %016" PRIx64 "\n", i, res64(A), res64(B), h); }
   }
     
-  log("proof verification: doing %d iterations\n", span);
+  log("proof verification: doing %" PRIu64 " iterations\n", span);
   A = gpu->expExp2(A, span);
 
   bool ok = (A == B);
   if (ok) {
-    log("proof: %u proved %s\n", E, isPrime ? "probable prime" : "composite");
+    log("proof: %" PRIu64 " proved %s\n", E, isPrime ? "probable prime" : "composite");
   } else {
     log("proof: invalid (%016" PRIx64 " expected %016" PRIx64 ")\n", res64(A), res64(B));
   }
@@ -127,9 +129,9 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
 
 // ---- ProofSet ----
 
-ProofSet::ProofSet(u32 E, u32 power)
+ProofSet::ProofSet(u64 E, u32 power)
   : E{E}, power{power} {
-  
+
   assert(E & 1); // E is supposed to be prime
   if (power <= 0 || power > 12) {
     log("Invalid proof power: %u\n", power);
@@ -138,11 +140,13 @@ ProofSet::ProofSet(u32 E, u32 power)
 
   fs::create_directories(proofPath(E));
 
-  vector<u32> spans;
-  for (u32 span = (E + 1) / 2; spans.size() < power; span = (span + 1) / 2) { spans.push_back(span); }
+  vector<u64> spans;
+  for (u64 span = (E + 1) / 2; spans.size() < power; span = (span + 1) / 2) { spans.push_back(span); }
 
   points.push_back(0);
-  for (u32 p = 0, span = (E + 1) / 2; p < power; ++p, span = (span + 1) / 2) {
+  u32 p;
+  u64 span;
+  for (p = 0, span = (E + 1) / 2; p < power; ++p, span = (span + 1) / 2) {
     for (u32 i = 0, end = points.size(); i < end; ++i) {
       points.push_back(points[i] + span);
     }
@@ -160,15 +164,17 @@ ProofSet::ProofSet(u32 E, u32 power)
   points.push_back(u32(-1)); // guard element
   cacheIt = points.begin();
 
-  for ([[maybe_unused]] u32 p : points) {
+  for ([[maybe_unused]] u64 p : points) {
     assert(p > E || isInPoints(E, power, p));
   }
 }
 
-bool ProofSet::isInPoints(u32 E, u32 power, u32 k) {
+bool ProofSet::isInPoints(u64 E, u32 power, u64 k) {
   if (k == E) { return true; } // special-case E
-  u32 start = 0;
-  for (u32 p = 0, span = (E + 1) / 2; p < power; ++p, span = (span + 1) / 2) {
+  u64 start = 0;
+  u32 p;
+  u64 span;
+  for (p = 0, span = (E + 1) / 2; p < power; ++p, span = (span + 1) / 2) {
     assert(k >= start);
     if (k > start + span) {
       start += span;
@@ -179,12 +185,12 @@ bool ProofSet::isInPoints(u32 E, u32 power, u32 k) {
   return false;
 }
 
-bool ProofSet::canDo(u32 E, u32 power, u32 currentK) {
+bool ProofSet::canDo(u64 E, u32 power, u64 currentK) {
   assert(power > 0 && power <= 12);
   return ProofSet{E, power}.isValidTo(currentK);
 }
 
-u32 ProofSet::bestPower(u32 E) {
+u32 ProofSet::bestPower(u64 E) {
   // Best proof powers assuming no disk space concern.
   // We increment power by 1 for each fourfold increase of the exponent.
   // The values below produce power=10 at wavefront, and power=11 at 100Mdigits:
@@ -197,7 +203,7 @@ u32 ProofSet::bestPower(u32 E) {
   return power;
 }
 
-double ProofSet::diskUsageGB(u32 E, u32 power) {
+double ProofSet::diskUsageGB(u64 E, u32 power) {
   //  -3 because convert exponent bits to bytes
   // -30 because convert bytes to GB
   // +power because needs 2^power residues for proof generation
@@ -205,7 +211,7 @@ double ProofSet::diskUsageGB(u32 E, u32 power) {
   return power ? ldexp(E, -33 + int(power)) * 1.05 : 0.0;
 }
 
-u32 ProofSet::effectivePower(u32 E, u32 power, u32 currentK) {
+u32 ProofSet::effectivePower(u64 E, u32 power, u64 currentK) {
   for (u32 p = power; p > 0; --p) {
     // log("validating proof residues for power %u\n", p);
     if (canDo(E, p, currentK)) { return p; }
@@ -213,11 +219,11 @@ u32 ProofSet::effectivePower(u32 E, u32 power, u32 currentK) {
   return 0;
 }
     
-bool ProofSet::fileExists(u32 k) const {
+bool ProofSet::fileExists(u64 k) const {
   return File::size(proofPath(E) / to_string(k)) == i64(E / 32 + 2) * 4;
 }
 
-bool ProofSet::isValidTo(u32 limitK) const {
+bool ProofSet::isValidTo(u64 limitK) const {
   auto it = upper_bound(points.begin(), points.end(), limitK);
 
   if (it == points.begin()) {
@@ -238,14 +244,14 @@ bool ProofSet::isValidTo(u32 limitK) const {
   return true;
 }
 
-u32 ProofSet::next(u32 k) const {
+u64 ProofSet::next(u64 k) const {
   if (*cacheIt <= k || (cacheIt > points.begin() && *prev(cacheIt) > k)) {
     cacheIt = upper_bound(points.begin(), points.end(), k);
   }
   return *cacheIt;
 }
 
-void ProofSet::save(u32 E, u32 power, u32 k, const Words& words) {
+void ProofSet::save(u64 E, u32 power, u64 k, const Words& words) {
   assert(k && k <= E);
   assert(isInPoints(E, power, k));
 
@@ -253,7 +259,7 @@ void ProofSet::save(u32 E, u32 power, u32 k, const Words& words) {
   assert(load(E, power, k) == words);
 }
 
-Words ProofSet::load(u32 E, u32 power, u32 k) {
+Words ProofSet::load(u64 E, u32 power, u64 k) {
   assert(k && k <= E);
   assert(isInPoints(E, power, k));
   return File::openReadThrow(proofPath(E) / to_string(k)).readChecked<u32>(E/32 + 1);
diff --git a/src/Proof.h b/src/Proof.h
index 97e9056d..c83d8ace 100644
--- a/src/Proof.h
+++ b/src/Proof.h
@@ -4,6 +4,7 @@
 
 #include "File.h"
 #include "common.h"
+#include <cinttypes>
 
 namespace fs = std::filesystem;
 
@@ -11,15 +12,15 @@ class Gpu;
 
 struct ProofInfo {
   u32 power;
-  u32 exp;
+  u64 exp;
   string md5;
 };
 
 namespace proof {
 
-array<u64, 4> hashWords(u32 E, const Words& words);
+array<u64, 4> hashWords(u64 E, const Words& words);
 
-array<u64, 4> hashWords(u32 E, array<u64, 4> prefix, const Words& words);
+array<u64, 4> hashWords(u64 E, array<u64, 4> prefix, const Words& words);
 
 string fileHash(const fs::path& filePath);
 
@@ -29,7 +30,7 @@ ProofInfo getInfo(const fs::path& proofFile);
 
 class Proof {  
 public:
-  const u32 E;
+  const u64 E;
   const Words B;
   const vector<Words> middles;
 
@@ -40,7 +41,7 @@ class Proof {
     POWER=8\n
     NUMBER=M216091\n
   */
-  static const constexpr char* HEADER_v2 = "PRP PROOF\nVERSION=2\nHASHSIZE=64\nPOWER=%u\nNUMBER=M%u%c";
+  static const constexpr char* HEADER_v2 = "PRP PROOF\nVERSION=2\nHASHSIZE=64\nPOWER=%u\nNUMBER=M%" PRIu64 "%c";
 
   static Proof load(const fs::path& path);
 
@@ -53,38 +54,37 @@ class Proof {
 
 class ProofSet {
 public:
-  const u32 E;
+  const u64 E;
   const u32 power;
   
 private:  
-  vector<u32> points;  
+  vector<u64> points;  
   
-  bool isValidTo(u32 limitK) const;
+  bool isValidTo(u64 limitK) const;
 
-  static bool canDo(u32 E, u32 power, u32 currentK);
+  static bool canDo(u64 E, u32 power, u64 currentK);
 
   mutable decltype(points)::const_iterator cacheIt{};
 
-  bool fileExists(u32 k) const;
+  bool fileExists(u64 k) const;
 
-  static fs::path proofPath(u32 E) { return fs::path(to_string(E)) / "proof"; }
+  static fs::path proofPath(u64 E) { return fs::path(to_string(E)) / "proof"; }
 public:
   
-  static u32 bestPower(u32 E);
-  static u32 effectivePower(u32 E, u32 power, u32 currentK);
-  static double diskUsageGB(u32 E, u32 power);
-  static bool isInPoints(u32 E, u32 power, u32 k);
+  static u32 bestPower(u64 E);
+  static u32 effectivePower(u64 E, u32 power, u64 currentK);
+  static double diskUsageGB(u64 E, u32 power);
+  static bool isInPoints(u64 E, u32 power, u64 k);
   
-  ProofSet(u32 E, u32 power);
-    
-  u32 next(u32 k) const;
+  ProofSet(u64 E, u32 power);
 
-  static void save(u32 E, u32 power, u32 k, const Words& words);
-  static Words load(u32 E, u32 power, u32 k);
-        
-  void save(u32 k, const Words& words) const { return save(E, power, k, words); }
-  Words load(u32 k) const { return load(E, power, k); }
+  u64 next(u64 k) const;
 
+  static void save(u64 E, u32 power, u64 k, const Words& words);
+  static Words load(u64 E, u32 power, u64 k);
+
+  void save(u64 k, const Words& words) const { return save(E, power, k, words); }
+  Words load(u64 k) const { return load(E, power, k); }
 
   std::pair<Proof, vector<u64>> computeProof(Gpu *gpu) const;
 };
diff --git a/src/Saver.cpp b/src/Saver.cpp
index 118d1eae..68caba41 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -15,19 +15,19 @@
 namespace {
 
 // E, k, block-size, res64, nErrors, CRC
-static constexpr const char *PRP_v12 = "OWL PRP 12 %u %u %u %016" SCNx64 " %u %u\n";
+static constexpr const char *PRP_v12 = "OWL PRP 12 %" PRIu64 " %" PRIu64 " %u %016" SCNx64 " %u %u\n";
 
 // Anticipated next version of the header.
 // Has general number form N=k*b^E+c, and labels for values.
-static constexpr const char *PRP_v13 = "OWL PRP 13 N=1*2^%u-1 k=%u block=%u res64=%016" SCNx64 " err=%u time=%lf\n";
+static constexpr const char *PRP_v13 = "OWL PRP 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64 " block=%u res64=%016" SCNx64 " err=%u time=%lf\n";
 // static constexpr const char *PRP_v13_PRI = "OWL PRP 13 N=1*2^%u-1 k=%u block=%u res64=%016" PRIx64 " err=%u time=%.0lf\n";
 
 // E, k, CRC
-static constexpr const char *LL_v1 = "OWL LL 1 E=%u k=%u CRC=%u\n";
+static constexpr const char *LL_v1 = "OWL LL 1 E=%" PRIu64 " k=%" PRIu64 " CRC=%u\n";
 
 // Anticipated next version.
 // Push version number to sync it with PRP.
-static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%u-1 k=%u time=%lf\n";
+static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64 " time=%lf\n";
 
 struct BadHeaderError { string name; };
 
@@ -35,8 +35,8 @@ bool startsWith(const string& s, const string& prefix) {
   return s.rfind(prefix, 0) == 0;
 }
 
-vector<u32> savefiles(fs::path dir, const string& prefix, const string& kind) {
-  vector<u32> v;
+vector<u64> savefiles(fs::path dir, const string& prefix, const string& kind) {
+  vector<u64> v;
   for (const auto& entry: fs::directory_iterator(dir)) {
     if (entry.is_regular_file()) {
       string filename = entry.path().filename().string();
@@ -45,7 +45,7 @@ vector<u32> savefiles(fs::path dir, const string& prefix, const string& kind) {
         assert(dot > prefix.size());
         string id = filename.substr(prefix.size(), dot - prefix.size());
         if (id == "unverified") { continue; }
-        u32 k = 0;
+        u64 k = 0;
         const char* first = id.data();
         const char* end   = first + id.size();
         auto res = from_chars(first, end, k);
@@ -61,13 +61,13 @@ vector<u32> savefiles(fs::path dir, const string& prefix, const string& kind) {
   return v;
 }
 
-string str9(u32 k) {
+string str9(u64 k) {
   char buf[32];
-  snprintf(buf, sizeof(buf), "%09u", k);
+  snprintf(buf, sizeof(buf), "%09" PRIu64, k);
   return buf;
 }
 
-fs::path pathFor(fs::path base, const string& prefix, const string& kind, u32 k) {
+fs::path pathFor(fs::path base, const string& prefix, const string& kind, u64 k) {
   return base / (prefix + str9(k) + '.' + kind);
 }
 
@@ -79,16 +79,17 @@ fs::path pathUnverified(fs::path base, const string& prefix) {
 // <prefix><id>.<kind>
 // e.g.: 125784077-010000000.prp
 fs::path findLast(fs::path dir, const string& prefix, const string& kind) {
-  vector<u32> v = savefiles(dir, prefix, kind);
+  vector<u64> v = savefiles(dir, prefix, kind);
   if (v.empty()) { return {}; }
-  u32 lastK = v.back();
+  u64 lastK = v.back();
   fs::path path = pathFor(dir, prefix, kind, lastK);
   assert(is_regular_file(path));
   return path;
 }
 
 PRPState readState(const PRPState& dummy, File fi) {
-  u32 exponent{}, k{}, blockSize{}, nErrors{};
+  u64 exponent{}, k{};
+  u32 blockSize{}, nErrors{};
   u64 res64{};
   double elapsed{};
 
@@ -108,7 +109,7 @@ PRPState readState(const PRPState& dummy, File fi) {
 }
 
 LLState readState(const LLState& dummy, File fi) {
-  u32 exponent{}, k{};
+  u64 exponent{}, k{};
   double elapsed{};
 
   string header = fi.readLine();
@@ -142,7 +143,7 @@ void writeState(const File& fo, const LLState& state) {
   fo.writeChecked(state.data);
 }
 
-double roundNumberScore(u32 x) {
+double roundNumberScore(u64 x) {
   if (x == 0) { return 1; }
 
   double score = 0;
@@ -169,7 +170,7 @@ template<> LLState Saver<LLState>::initState() {
 // ---- Saver ----
 
 template<typename State>
-Saver<State>::Saver(u32 exponent, u32 blockSize, u32 nSavefiles) :
+Saver<State>::Saver(u64 exponent, u32 blockSize, u32 nSavefiles) :
   exponent{exponent},
   blockSize{blockSize},
   prefix{to_string(exponent) + '-'},
@@ -188,7 +189,7 @@ template<typename State>
 Saver<State>::~Saver() = default;
 
 template<typename State>
-void Saver<State>::clear(u32 exponent) {
+void Saver<State>::clear(u64 exponent) {
   error_code dummy;
   fs::path base = std::is_same_v<State, PRPState> ?
         fs::current_path() / to_string(exponent)
@@ -244,16 +245,16 @@ State Saver<State>::load() {
 
 template<typename State>
 void Saver<State>::trimFiles() {
-  vector<u32> v = savefiles(base, prefix, State::KIND);
+  vector<u64> v = savefiles(base, prefix, State::KIND);
 
   assert(nSavefiles > 0);
   while (v.size() > nSavefiles) {
     int bestIdx = -1;
     double bestSpan = 1e20;
-    u32 prevK = 0;
+    u64 prevK = 0;
 
     for (u32 i = 0; i < v.size() - 1; ++i) {
-      u32 k = v[i];
+      u64 k = v[i];
       double niceBias = std::min(1.0, roundNumberScore(k) - 4);
       double span = (v[i + 1] - prevK) * niceBias;
       prevK = k;
@@ -263,8 +264,8 @@ void Saver<State>::trimFiles() {
       }
     }
     assert(bestIdx >= 0);
-    u32 k = v[bestIdx];
-    // log("Deleting savefile %u\n", k);
+    u64 k = v[bestIdx];
+    // log("Deleting savefile %" PRIu64 "\n", k);
     fs::path path = pathFor(base, prefix, State::KIND, k);
     fs::remove(path);
     v.erase(v.begin() + bestIdx);
diff --git a/src/Saver.h b/src/Saver.h
index 3bf8e6e7..5a3a7ba6 100644
--- a/src/Saver.h
+++ b/src/Saver.h
@@ -13,8 +13,8 @@ class SaveMan;
 struct PRPState {
   static const constexpr char* KIND = "prp";
 
-  u32 exponent;
-  u32 k;
+  u64 exponent;
+  u64 k;
   u32 blockSize;
   u64 res64;
   vector<u32> check;
@@ -25,15 +25,15 @@ struct PRPState {
 struct LLState {
   static const constexpr char* KIND = "ll";
 
-  u32 exponent;
-  u32 k;
+  u64 exponent;
+  u64 k;
   vector<u32> data;
   double elapsed{};
 };
 
 template<typename State>
 class Saver {
-  u32 exponent;
+  u64 exponent;
   u32 blockSize;
   fs::path base;
   string prefix;
@@ -45,7 +45,7 @@ class Saver {
   fs::path mostRecentSavefile();
 
 public:
-  Saver(u32 exponent, u32 blockSize, u32 nSavefiles);
+  Saver(u64 exponent, u32 blockSize, u32 nSavefiles);
   ~Saver();
 
   State load();
@@ -53,7 +53,7 @@ class Saver {
 
   void dropMostRecent();
 
-  static void clear(u32 exponent);
+  static void clear(u64 exponent);
 
   // For PRP, we can save a verified save (see save() above) or an unverified save.
   void saveUnverified(const PRPState& s) const;
diff --git a/src/Task.cpp b/src/Task.cpp
index d72f4db2..9a49654f 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -103,7 +103,9 @@ string json(const vector<string>& v) {
 }
 
 string json(const string& s) { return '"' + s + '"'; }
+string json(int x) { return to_string(x); }
 string json(u32 x) { return to_string(x); }
+string json(u64 x) { return to_string(x); }
 
 template<typename T> string json(const string& key, const T& value) { return json(key) + ':' + json(value); }
 
@@ -112,7 +114,7 @@ string maybe(const string& key, const string& value) { return value.empty() ? ""
 template<typename T> void operator+=(vector<T>& a, const vector<T>& b) { a.insert(a.end(), b.begin(), b.end()); }
 
 
-vector<string> commonFields(u32 E, const char *worktype, const string &status) {
+vector<string> commonFields(u64 E, const char *worktype, const string &status) {
   return {
     json("status", status),
     json("exponent", E),
@@ -140,7 +142,7 @@ vector<string> tailFields(const std::string &AID, const Args &args) {
   };
 }
 
-void writeResult(u32 instance, u32 E, const char *workType, const string &status, const std::string &AID, const Args &args,
+void writeResult(u32 instance, u64 E, const char *workType, const string &status, const std::string &AID, const Args &args,
                  const vector<string>& extras) {
   fs::path resultsFile = "results-" + to_string(instance) + ".txt";
   vector<string> fields = commonFields(E, workType, status);
@@ -220,8 +222,8 @@ void Task::execute(GpuCommon shared, Queue *q, u32 instance) {
   {
     Primes primes;
     if (!primes.isPrime(exponent)) {
-      u32 new_exponent = primes.prevPrime(exponent);
-      log("Warning: Exponent %u is not prime.  Using exponent %u instead.\n", exponent, new_exponent);
+      u64 new_exponent = primes.prevPrime(exponent);
+      log("Warning: Exponent %" PRIu64 " is not prime.  Using exponent %" PRIu64 " instead.\n", exponent, new_exponent);
       exponent = new_exponent;
     }
   }
@@ -253,7 +255,7 @@ void Task::execute(GpuCommon shared, Queue *q, u32 instance) {
     Worktodo::deleteTask(*this, instance);
 
     if (isPrime) {
-      log("%u is PRIME!\n", exponent);
+      log("%" PRIu64 " is PRIME!\n", exponent);
     } else if (shared.args->clean) {
       gpu->clear(kind == PRP);
     }
diff --git a/src/Task.h b/src/Task.h
index 95f08024..4c130446 100644
--- a/src/Task.h
+++ b/src/Task.h
@@ -20,7 +20,7 @@ class Task {
   enum Kind {PRP, VERIFY, LL, CERT};
 
   Kind kind;
-  u32 exponent;
+  u64 exponent;
   string AID;  // Assignment ID
   string line; // the verbatim worktodo line, used in deleteTask().
   u32 squarings;  // For CERTs
diff --git a/src/TuneEntry.cpp b/src/TuneEntry.cpp
index c3288d24..68b6915d 100644
--- a/src/TuneEntry.cpp
+++ b/src/TuneEntry.cpp
@@ -3,10 +3,11 @@
 #include "CycleFile.h"
 
 #include <cassert>
+#include <cinttypes>
 
 // Returns whether *results* was updated.
 bool TuneEntry::update(vector<TuneEntry>& results) const {
-  u32 maxExp = fft.maxExp();
+  u64 maxExp = fft.maxExp();
   [[maybe_unused]] bool didErase = false;
 
   int i{};
@@ -28,7 +29,7 @@ bool TuneEntry::update(vector<TuneEntry>& results) const {
 
 // Returns whether entry *e* represents an improvement over *results* (i.e. would update the results).
 bool TuneEntry::willUpdate(const vector<TuneEntry>& results) const {
-  u32 maxExp = fft.maxExp();
+  u64 maxExp = fft.maxExp();
   for (const auto& r : results) {
     if (r.cost > cost) {
       break;
@@ -51,7 +52,7 @@ vector<TuneEntry> TuneEntry::readTuneFile(const Args& args) {
   File fi = File::openRead(tuneFile);
   if (!fi) { return {}; }
 
-  [[maybe_unused]] u32 prevMaxExp{};
+  [[maybe_unused]] u64 prevMaxExp{};
   [[maybe_unused]] double prevCost{};
 
   for (const string& line : fi) {
@@ -71,14 +72,14 @@ vector<TuneEntry> TuneEntry::readTuneFile(const Args& args) {
 }
 
 void TuneEntry::writeTuneFile(const vector<TuneEntry>& results) {
-  [[maybe_unused]] u32 prevMaxExp{};
+  [[maybe_unused]] u64 prevMaxExp{};
   [[maybe_unused]] double prevCost{};
   CycleFile tune{"tune.txt"};
   for (const TuneEntry& r : results) {
-    u32 maxExp = r.fft.maxExp();
+    u64 maxExp = r.fft.maxExp();
     assert(r.cost >= prevCost && maxExp > prevMaxExp);
     prevCost = r.cost;
     prevMaxExp = maxExp;
-    tune->printf("%6.1f %14s # %u\n", r.cost, r.fft.spec().c_str(), maxExp);
+    tune->printf("%6.1f %14s # %" PRIu64 "\n", r.cost, r.fft.spec().c_str(), maxExp);
   }
 }
diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 0a981a39..80afdc51 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -167,11 +167,11 @@ optional<Task> getWork(Args& args, i32 instance) {
 std::optional<Task> Worktodo::getTask(Args &args, i32 instance) {
   if (instance == 0) {
     if (args.prpExp) {
-      u32 exp = args.prpExp;
+      u64 exp = args.prpExp;
       args.prpExp = 0;
       return Task{Task::PRP, exp};
     } else if (args.llExp) {
-      u32 exp = args.llExp;
+      u64 exp = args.llExp;
       args.llExp = 0;
       return Task{Task::LL, exp};
     } else if (!args.verifyPath.empty()) {
diff --git a/src/common.h b/src/common.h
index 516b099d..530795bb 100644
--- a/src/common.h
+++ b/src/common.h
@@ -46,15 +46,15 @@ using Words = vector<u32>;
 
 inline u64 res64(const Words& words) { return words.empty() ? 0 : ((u64(words[1]) << 32) | words[0]); }
 
-inline u32 nWords(u32 E) { return (E - 1) / 32 + 1; }
+inline u32 nWords(u64 E) { return u32((E - 1) / 32 + 1); }
 
-inline Words makeWords(u32 E, u32 value) {
+inline Words makeWords(u64 E, u32 value) {
   Words ret(nWords(E));
   ret[0] = value;
   return ret;
 }
 
-inline u32 roundUp(u32 x, u32 multiple) { return ((x - 1) / multiple + 1) * multiple; }
+inline u64 roundUp(u64 x, u32 multiple) { return ((x - 1) / multiple + 1) * multiple; }
 
 u32 crc32(const void* data, size_t size);
 
diff --git a/src/shared.h b/src/shared.h
index c2d90dbc..6405d9c1 100644
--- a/src/shared.h
+++ b/src/shared.h
@@ -1,4 +1,4 @@
 // included from both C++ and OpenCL.
 
-u32 bitposToWord(u32 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
-u32 wordToBitpos(u32 E, u32 N, u32 word) { return (word * ((u64) E) + (N - 1)) / N; }
+u32 bitposToWord(u64 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
+u32 wordToBitpos(u64 E, u32 N, u32 word) { return (word * ((u64) E) + (N - 1)) / N; }
diff --git a/src/state.cpp b/src/state.cpp
index 4ac159d8..77ebff8f 100644
--- a/src/state.cpp
+++ b/src/state.cpp
@@ -10,7 +10,7 @@
 
 static i64 lowBits(i64 u, int bits) { return (u << (64 - bits)) >> (64 - bits); }
 
-std::vector<u32> compactBits(const vector<Word> &dataVect, u32 E) {
+std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
   if (dataVect.empty()) { return {}; } // Indicating all zero
 
   u32 N = dataVect.size();
@@ -87,7 +87,7 @@ struct BitBucket {
   }
 };
 
-vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u32 E) {
+vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u64 E) {
   assert(E % 32 != 0);
 
   std::vector<Word> out(N);
diff --git a/src/state.h b/src/state.h
index 9b37c0fd..02fab3fb 100644
--- a/src/state.h
+++ b/src/state.h
@@ -8,10 +8,10 @@
 #include <cassert>
 #include <cfenv>
 
-vector<u32> compactBits(const vector<Word> &dataVect, u32 E);
-vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u32 E);
+vector<u32> compactBits(const vector<Word> &dataVect, u64 E);
+vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u64 E);
 
-constexpr u32 step(u32 N, u32 E) { return N - (E % N); }
-constexpr u32 extra(u32 N, u32 E, u32 k) { return u64(step(N, E)) * k % N; }
-constexpr bool isBigWord(u32 N, u32 E, u32 k) { return extra(N, E, k) + step(N, E) < N; }
-constexpr u32 bitlen(u32 N, u32 E, u32 k) { return E / N + isBigWord(N, E, k); }
+constexpr u32 step(u32 N, u64 E) { return N - (E % N); }
+constexpr u32 extra(u32 N, u64 E, u32 k) { return u64(step(N, E)) * k % N; }
+constexpr bool isBigWord(u32 N, u64 E, u32 k) { return extra(N, E, k) + step(N, E) < N; }
+constexpr u32 bitlen(u32 N, u64 E, u32 k) { return E / N + isBigWord(N, E, k); }
diff --git a/src/tune.cpp b/src/tune.cpp
index 3b773437..a3a12321 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -173,7 +173,7 @@ printf ("Reguess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bp
 }
 
 float Tune::zForBpw(float bpw, FFTConfig fft, u32 count) {
-  u32 exponent = (count == 1) ? primes.prevPrime(fft.size() * bpw) : primes.nextPrime(fft.size() * bpw);
+  u64 exponent = (count == 1) ? primes.prevPrime(fft.size() * bpw) : primes.nextPrime(fft.size() * bpw);
   float total_z = 0.0;
   for (u32 i = 0; i < count; i++, exponent = primes.nextPrime (exponent + 1)) {
     auto [ok, res, roeSq, roeMul] = Gpu::make(q, exponent, shared, fft, {}, false)->measureROE(true);
@@ -249,7 +249,7 @@ void Tune::carryTune() {
     double m = 0;
     const float mid = fft.shape.carry32BPW();
     for (float bpw : {mid - 0.05, mid + 0.05}) {
-      u32 exponent = primes.nearestPrime(fft.size() * bpw);
+      u64 exponent = primes.nearestPrime(fft.size() * bpw);
       auto [ok, carry] = Gpu::make(q, exponent, shared, fft, {}, false)->measureCarry();
       m = carry.max;
       if (!ok) { log("Error %s at %f\n", fft.spec().c_str(), bpw); }
@@ -257,7 +257,7 @@ void Tune::carryTune() {
     }
 
     float avg = (zv[0] + zv[1]) / 2;
-    u32 exponent = fft.shape.carry32BPW() * fft.size();
+    u64 exponent = fft.shape.carry32BPW() * fft.size();
     double pErr100 = -expm1(-exp(-avg) * exponent * 100);
     log("%14s %.3f : %.3f (%.3f %.3f) %f %.0f%%\n", fft.spec().c_str(), mid, avg, zv[0], zv[1], m, pErr100 * 100);
     fo.printf("%f %f\n", log2(fft.size()), avg);
@@ -292,8 +292,8 @@ void Tune::ctune() {
 
   for (FFTShape shape : shapes) {
     FFTConfig fft{shape, 101, CARRY_32};
-    u32 exponent = primes.prevPrime(fft.maxExp());
-    // log("tuning %10s with exponent %u\n", fft.shape.spec().c_str(), exponent);
+    u64 exponent = primes.prevPrime(fft.maxExp());
+    // log("tuning %10s with exponent %" PRIu64 "\n", fft.shape.spec().c_str(), exponent);
 
     vector<int> bestPos(configsVect.size());
     Entry best{{1, 1, 1}, {}, 1e9};
@@ -448,7 +448,7 @@ void Tune::tune() {
     // Find best IN_WG,IN_SIZEX,OUT_WG,OUT_SIZEX settings
     if (1/*option to time IN/OUT settings*/) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_in_wg = 0;
       u32 best_in_sizex = 0;
       u32 current_in_wg = args->value("IN_WG", 128);
@@ -497,7 +497,7 @@ void Tune::tune() {
     // Find best PAD setting.  Default is 256 bytes for AMD, 0 for all others.
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_pad = 0;
       u32 current_pad = args->value("PAD", AMDGPU ? 256 : 0);
       double best_cost = -1.0;
@@ -517,7 +517,7 @@ void Tune::tune() {
     // Find best MIDDLE_IN_LDS_TRANSPOSE setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_in_lds_transpose = 0;
       u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
       double best_cost = -1.0;
@@ -537,7 +537,7 @@ void Tune::tune() {
     // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_out_lds_transpose = 0;
       u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
       double best_cost = -1.0;
@@ -557,7 +557,7 @@ void Tune::tune() {
     // Find best INPLACE setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_inplace = 0;
       double best_cost = -1.0;
       double current_cost = -1.0;
@@ -576,7 +576,7 @@ void Tune::tune() {
     // Find best NONTEMPORAL setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_nontemporal = 0;
       u32 current_nontemporal = args->value("NONTEMPORAL", 0);
       double best_cost = -1.0;
@@ -596,7 +596,7 @@ void Tune::tune() {
     // Find best FAST_BARRIER setting
     if (AMDGPU) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_fast_barrier = 0;
       u32 current_fast_barrier = args->value("FAST_BARRIER", 0);
       double best_cost = -1.0;
@@ -616,7 +616,7 @@ void Tune::tune() {
     // Find best TAIL_KERNELS setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_kernels = 0;
       u32 current_tail_kernels = args->value("TAIL_KERNELS", 2);
       double best_cost = -1.0;
@@ -639,7 +639,7 @@ void Tune::tune() {
     // Find best TAIL_TRIGS setting
     if (time_FFTs) {
       FFTConfig fft{defaultFFTShape, 101, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
       u32 current_tail_trigs = args->value("TAIL_TRIGS", 2);
       double best_cost = -1.0;
@@ -660,7 +660,7 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
       u32 current_tail_trigs = args->value("TAIL_TRIGS31", 0);
       double best_cost = -1.0;
@@ -681,7 +681,7 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tail_trigs = 0;
       u32 current_tail_trigs = args->value("TAIL_TRIGS32", 2);
       double best_cost = -1.0;
@@ -702,7 +702,7 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF61) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
       u32 current_tail_trigs = args->value("TAIL_TRIGS61", 0);
       double best_cost = -1.0;
@@ -722,7 +722,7 @@ void Tune::tune() {
     // Find best TABMUL_CHAIN setting
     if (time_FFTs) {
       FFTConfig fft{defaultFFTShape, 101, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
       u32 current_tabmul_chain = args->value("TABMUL_CHAIN", 0);
       double best_cost = -1.0;
@@ -743,7 +743,7 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
       u32 current_tabmul_chain = args->value("TABMUL_CHAIN31", 0);
       double best_cost = -1.0;
@@ -764,7 +764,7 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tabmul_chain = 0;
       u32 current_tabmul_chain = args->value("TABMUL_CHAIN32", 0);
       double best_cost = -1.0;
@@ -785,7 +785,7 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF61) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
       u32 current_tabmul_chain = args->value("TABMUL_CHAIN61", 0);
       double best_cost = -1.0;
@@ -806,7 +806,7 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_modm31 = 0;
       u32 current_modm31 = args->value("MODM31", 0);
       double best_cost = -1.0;
@@ -826,7 +826,7 @@ void Tune::tune() {
     // Find best UNROLL_W setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_unroll_w = 0;
       u32 current_unroll_w = args->value("UNROLL_W", AMDGPU ? 0 : 1);
       double best_cost = -1.0;
@@ -846,7 +846,7 @@ void Tune::tune() {
     // Find best UNROLL_H setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_unroll_h = 0;
       u32 current_unroll_h = args->value("UNROLL_H", AMDGPU && defaultShape->height >= 1024 ? 0 : 1);
       double best_cost = -1.0;
@@ -866,7 +866,7 @@ void Tune::tune() {
     // Find best ZEROHACK_W setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_zerohack_w = 0;
       u32 current_zerohack_w = args->value("ZEROHACK_W", 1);
       double best_cost = -1.0;
@@ -886,7 +886,7 @@ void Tune::tune() {
     // Find best ZEROHACK_H setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_zerohack_h = 0;
       u32 current_zerohack_h = args->value("ZEROHACK_H", 1);
       double best_cost = -1.0;
@@ -906,7 +906,7 @@ void Tune::tune() {
     // Find best BIGLIT setting
     if (time_FFTs) {
       FFTConfig fft{*defaultShape, 101, CARRY_AUTO};
-      u32 exponent = primes.prevPrime(fft.maxExp());
+      u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_biglit = 0;
       u32 current_biglit = args->value("BIGLIT", 1);
       double best_cost = -1.0;
@@ -987,7 +987,7 @@ skip_1K_256 = 0;
     if ((shape.fft_type == FFT3261 || shape.fft_type == FFT323161 || shape.fft_type == FFT3231 || shape.fft_type == FFT32) && !time_FP32) continue;
 
     // Time an exponent that's good for all variants and carry-config.
-    u32 exponent = primes.prevPrime(FFTConfig{shape, shape.width <= 1024 ? 0u : 100u, CARRY_32}.maxExp());
+    u64 exponent = primes.prevPrime(FFTConfig{shape, shape.width <= 1024 ? 0u : 100u, CARRY_32}.maxExp());
     u32 adjusted_quick = (exponent < 50000000) ? quick - 1 : (exponent < 170000000) ? quick : (exponent < 350000000) ? quick + 1 : quick + 2;
     if (adjusted_quick < 1) adjusted_quick = 1;
     if (adjusted_quick > 10) adjusted_quick = 10;

From 205754df4610dfccef54f314dee11fe1fde413e5 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 26 Dec 2025 03:58:25 +0000
Subject: [PATCH 002/214] Merged in previous inplace changes to tune.cpp

---
 src/tune.cpp | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index a3a12321..4d613d0f 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -348,6 +348,7 @@ void Tune::tune() {
   bool time_FFTs = 0;
   bool time_NTTs = 0;
   bool time_FP32 = 1;
+  bool time_inplace_only = 0;
   int quick = 7;                        // Run config from slowest (quick=1) to fastest (quick=10)
   u64 min_exponent = 75000000;
   u64 max_exponent = 350000000;
@@ -360,6 +361,7 @@ void Tune::tune() {
     if (s == "fp64") time_FFTs = 1;
     if (s == "ntt") time_NTTs = 1;
     if (s == "nofp32") time_FP32 = 0;
+    if (s == "inplace") time_inplace_only = 1;
     auto keyVal = split(s, '=');
     if (keyVal.size() == 2) {
       if (keyVal.front() == "quick") quick = stod(keyVal.back());
@@ -446,7 +448,7 @@ void Tune::tune() {
     args->flags["INPLACE"] = to_string(0);
 
     // Find best IN_WG,IN_SIZEX,OUT_WG,OUT_SIZEX settings
-    if (1/*option to time IN/OUT settings*/) {
+    if (!time_inplace_only) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_in_wg = 0;
@@ -495,7 +497,7 @@ void Tune::tune() {
     }
 
     // Find best PAD setting.  Default is 256 bytes for AMD, 0 for all others.
-    if (1) {
+    if (!time_inplace_only) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_pad = 0;
@@ -515,7 +517,7 @@ void Tune::tune() {
     }
 
     // Find best MIDDLE_IN_LDS_TRANSPOSE setting
-    if (1) {
+    if (!time_inplace_only) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_in_lds_transpose = 0;
@@ -535,7 +537,7 @@ void Tune::tune() {
     }
 
     // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
-    if (1) {
+    if (!time_inplace_only) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_out_lds_transpose = 0;
@@ -554,8 +556,13 @@ void Tune::tune() {
       args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(best_middle_out_lds_transpose);
     }
 
+    // If only timing INPLACE=1 options, then set INPLACE
+    if (time_inplace_only) {
+      args->flags["INPLACE"] = to_string(1);
+      newConfigKeyVals.push_back({"INPLACE", 1});
+    }
     // Find best INPLACE setting
-    if (1) {
+    else {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_inplace = 0;
@@ -905,7 +912,7 @@ void Tune::tune() {
 
     // Find best BIGLIT setting
     if (time_FFTs) {
-      FFTConfig fft{*defaultShape, 101, CARRY_AUTO};
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_biglit = 0;
       u32 current_biglit = args->value("BIGLIT", 1);

From a3719b01449edf18a961cc5b44acbced44deca15 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 26 Dec 2025 04:10:47 +0000
Subject: [PATCH 003/214] Fixed carry propagtion bug when BPW was very low
 (lower than one would see in normal usage).  The optimization that generated
 32-bit FFT data words requiring long carries was modified.

---
 src/cl/carryutil.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 6cdff372..4e04812b 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -681,7 +681,7 @@ Word OVERLOAD carryStepSignedSloppy(i96 x, i64 *outCarry, bool isBigWord) {
 //  i64 xhi = i96_hi64(x) + xmid_topbit;
 //  *outCarry = xhi >> (nBits - 32);
 //  return as_long((int2)(i96_lo32(x), whi));
-#elif EXP / NWORDS == 31 || SLOPPY_MAXBPW >= 3200       // nBits = 31 or 32, bigwordBits = 32 (or allowed to create 32-bit word for better performance)
+#elif EXP / NWORDS == 31 || (SLOPPY_MAXBPW >= 3200 && EXP / NWORDS >= 22) // nBits = 31 or 32, bigwordBits = 32 (or allowed to create 32-bit word for better performance)
   i32 w = i96_lo32(x);                                  // lowBits(x, bigwordBits = 32);
   *outCarry = (i96_hi64(x) + (w < 0)) << (32 - nBits);
   return w;

From eceaad6173232be7af9980f8cd961ad9792ea9ac Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 30 Dec 2025 01:34:09 +0000
Subject: [PATCH 004/214] Output num squarings a cert will perform as well as
 an ETA.

---
 src/Gpu.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 433ce0a7..e9d20522 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2086,7 +2086,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
     float secsPerIt = iterationTimer.reset(k);
     queue->setSquareTime((int) (secsPerIt * 1'000'000));
-    log("%9u %016" PRIx64 " %4.0f\n", k, res64, secsPerIt * 1'000'000);
+    log("%7u / %7u %016" PRIx64 " %4.0f ETA %s\n", k, kEnd, res64, secsPerIt * 1'000'000, getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) {
       fs::remove (fname);

From 5cfbe0b3d0adb42ede81fdea15a3d17a3c59fceb Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 30 Dec 2025 01:43:17 +0000
Subject: [PATCH 005/214] Output error message when worktodo-N.txt is empty. 
 Helpful for novice users.

---
 src/Worktodo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 80afdc51..1628a391 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -114,7 +114,7 @@ optional<Task> getWork(Args& args, i32 instance) {
   // Try to get a task from the local worktodo-<N> file.
   if (optional<Task> task = bestTask(localWork, args.smallest)) { return task; }
 
-  if (args.masterDir.empty()) { return {}; }
+  if (args.masterDir.empty()) { log("No work to do found.  Add work to %s.\n", localWork.c_str()); return {}; }
 
   fs::path worktodo = args.masterDir / "worktodo.txt";
 

From 3a7a76ddb33a3c69999065b2274fe2d0e4e7788b Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Sun, 14 Dec 2025 03:29:45 -0800
Subject: [PATCH 006/214] Fixed GitHub Actions CI and replaced macOS 13.

---
 .github/workflows/ci.yml | 47 +++++++++++++++++++++++++---------------
 Makefile                 |  8 +++----
 genbundle.sh             | 17 ++++++++-------
 src/Args.cpp             |  2 +-
 src/common.h             |  2 +-
 src/tune.cpp             |  2 +-
 6 files changed, 45 insertions(+), 33 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 3947c982..6d43b725 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -13,13 +13,16 @@ jobs:
     runs-on: ${{ matrix.os }}
     strategy:
       matrix:
-        os: [ubuntu-22.04, ubuntu-24.04]
+        os: [ubuntu-22.04, ubuntu-24.04, ubuntu-22.04-arm, ubuntu-24.04-arm]
         cxx: [g++, clang++]
+        exclude:
+        - os: ubuntu-22.04-arm
+          cxx: clang++
       fail-fast: false
     env:
       CXX: ${{ matrix.cxx }}
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
     - name: Install
       run: |
         sudo apt-get update -y
@@ -27,14 +30,14 @@ jobs:
         $CXX --version
     - name: Script
       run: |
-        make prpll -O -j "$(nproc)"
+        make -O -j "$(nproc)"
         cd build-release
         rm -f -- *.o
         ./prpll -h
-    - uses: actions/upload-artifact@v4
+    - uses: actions/upload-artifact@v7
       if: always()
       with:
-        name: ${{ matrix.os }}_${{ matrix.cxx }}_prpll
+        name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
         path: ${{ github.workspace }}
     - name: Cppcheck
       run: cppcheck --enable=all --force .
@@ -49,15 +52,17 @@ jobs:
   Windows:
     name: Windows
 
-    runs-on: windows-latest
+    runs-on: ${{ matrix.os }}
     strategy:
       matrix:
+        os: [windows-latest] # windows-11-arm
         cxx: [g++, clang++]
       fail-fast: false
     env:
       CXX: ${{ matrix.cxx }}
+      PACKAGE_PREFIX: mingw-w64-${{ endsWith(matrix.os, '-arm') && 'clang-aarch64' || 'x86_64' }}-
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
     - name: Before Install
       run: |
         echo "C:\msys64\mingw64\bin" | Out-File -FilePath $env:GITHUB_PATH -Encoding utf8 -Append
@@ -66,7 +71,7 @@ jobs:
         echo "LIBPATH=-LC:\msys64\mingw64\lib" | Out-File -FilePath $env:GITHUB_ENV -Encoding utf8 -Append
     - name: Install
       run: |
-        pacman -S --noconfirm mingw-w64-x86_64-gmp mingw-w64-x86_64-opencl-icd
+        pacman -S --noconfirm "${env:PACKAGE_PREFIX}opencl-icd"
         & $env:CXX --version
     - name: Install Clang
       if: ${{ matrix.cxx == 'clang++' }}
@@ -74,34 +79,40 @@ jobs:
         pacman -S --noconfirm mingw-w64-x86_64-clang
         & $env:CXX --version
     - name: Script
-      run: | # Cannot use `make exe`, as the OpenCL ICD Loader does not support static linking
-        make prpll -O -j $env:NUMBER_OF_PROCESSORS
+      run: |
+        make -O -j $env:NUMBER_OF_PROCESSORS
         cd build-release
         rm *.o
         .\prpll.exe -h
-    - uses: actions/upload-artifact@v4
+    - uses: actions/upload-artifact@v7
       if: always()
       with:
-        name: win_${{ matrix.cxx }}_prpll
+        name: win_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
         path: ${{ github.workspace }}
 
   macOS:
     name: macOS
 
-    runs-on: macos-13
+    runs-on: ${{ matrix.os }}
+    strategy:
+      matrix:
+        os: [macos-15-intel, macos-latest]
+      fail-fast: false
+    env:
+      CXX: g++-15
     steps:
-    - uses: actions/checkout@v4
+    - uses: actions/checkout@v6
     - name: Install
       run: |
-        brew install gcc@14
+        $CXX --version
     - name: Script
       run: |
-        make prpll -j "$(sysctl -n hw.ncpu)"
+        make -j "$(sysctl -n hw.ncpu)"
         cd build-release
         rm -f -- *.o
         ./prpll -h
-    - uses: actions/upload-artifact@v4
+    - uses: actions/upload-artifact@v7
       if: always()
       with:
-        name: macos_prpll
+        name: macos_${{ endsWith(matrix.os, '-intel') && 'x86' || 'arm' }}_prpll
         path: ${{ github.workspace }}
diff --git a/Makefile b/Makefile
index 26bffeda..b1c021e0 100644
--- a/Makefile
+++ b/Makefile
@@ -14,9 +14,9 @@ HOST_OS = $(shell uname -s)
 
 ifeq ($(HOST_OS), Darwin)
 # Real GCC (not clang), needed for 128-bit floats and std::filesystem::path
-CXX = g++-14
+CXX ?= g++-15
 else
-CXX = g++
+CXX ?= g++
 endif
 
 ifneq ($(findstring MINGW, $(HOST_OS)), MINGW)
@@ -45,7 +45,7 @@ else
 
 BIN=build-release
 
-CXXFLAGS = -O2 -DNDEBUG $(COMMON_FLAGS)
+CXXFLAGS = -O3 -DNDEBUG $(COMMON_FLAGS)
 STRIP=-s
 
 endif
@@ -90,7 +90,7 @@ $(BIN)/%.o : src/%.cpp $(DEPDIR)/%.d
 # src/bundle.cpp is just a wrapping of the OpenCL sources (*.cl) as a C string.
 
 src/bundle.cpp: genbundle.sh src/cl/*.cl
-	./genbundle.sh $^ > src/bundle.cpp
+	bash genbundle.sh $^ > src/bundle.cpp
 
 $(DEPDIR)/%.d: ;
 .PRECIOUS: $(DEPDIR)/%.d
diff --git a/genbundle.sh b/genbundle.sh
index ec042bb2..9d176062 100755
--- a/genbundle.sh
+++ b/genbundle.sh
@@ -1,3 +1,4 @@
+#!/bin/bash
 cat <<EOM
 // Copyright (C) Mihai Preda
 // Generated file, do not edit. See genbundle.sh and src/cl/*.cl
@@ -9,24 +10,24 @@ EOM
 
 names=
 
-for xx in $*
+for xx in "$@"
 do
-    x=`basename $xx`
+    x=$(basename "$xx")
     
     if [ "$x" = "genbundle.sh" ] ; then continue ; fi
     
     names=${names}\"${x}\",
 
-    echo // $xx
+    echo "// $xx"
     #echo const char ${x}_cl[] = R\"cltag\(
-    echo R\"cltag\(
-    cat $xx
-    echo \)cltag\"\,
+    echo 'R"cltag('
+    cat "$xx"
+    echo ')cltag",'
     echo
 done
-echo \}\;
+echo '};'
 
-echo static const std::vector\<const char*\> CL_FILE_NAMES\{${names}\}\;
+echo "static const std::vector<const char*> CL_FILE_NAMES{${names}};"
 
 cat <<EOM
 const std::vector<const char*>& getClFileNames() { return CL_FILE_NAMES; }
diff --git a/src/Args.cpp b/src/Args.cpp
index 041202ad..b18a95ba 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -118,7 +118,7 @@ and should be able to run.
 PRPLL keeps the active tasks in per-worker files worktodo-0.txt, worktodo-1.txt etc in the local directory.
 These per-worker files are supplied from the global worktodo.txt file if -pool is used.
 In turn the global worktodo.txt can be supplied through the primenet.py script,
-either the one located at gpuowl/tools/primenet.py or https://download.mersenne.ca/primenet.py
+either the one located at gpuowl/tools/primenet.py or https://download.mersenne.ca/AutoPrimeNet
 
 It is also possible to manually add exponents by adding lines of the form "PRP=118063003" to worktodo-<N>.txt
 
diff --git a/src/common.h b/src/common.h
index 516b099d..6303e539 100644
--- a/src/common.h
+++ b/src/common.h
@@ -13,7 +13,7 @@ using i64 = int64_t;
 using u64 = uint64_t;
 using i128 = __int128;
 using u128 = unsigned __int128;
-using f128 = __float128;
+// using f128 = __float128;
 
 static_assert(sizeof(u8)  == 1, "size u8");
 static_assert(sizeof(u32) == 4, "size u32");
diff --git a/src/tune.cpp b/src/tune.cpp
index 3b773437..b9cf1f71 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -947,7 +947,7 @@ void Tune::tune() {
       config.write("\n  -log 1000000\n");
     }
     if (args->workers < 2) {
-      config.write("\n# Running two workers sometimes gives better throughput.  Autoprimenet will need to create up a second worktodo file.");
+      config.write("\n# Running two workers sometimes gives better throughput.  AutoPrimeNet will need to create up a second worktodo file (use --num-workers 2).");
       config.write("\n#  -workers 2\n");
       config.write("\n# Changing TAIL_KERNELS to 3 when running two workers may be better.");
       config.write("\n#  -use TAIL_KERNELS=3\n");

From 89be60a188253b74593e4f36cb14b189d08a7c3c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 4 Mar 2026 19:09:21 +0000
Subject: [PATCH 007/214] Changed type 3 4M FFT max bpw.  LL test of 100028317
 failed under old limit.

---
 src/fftbpw.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/fftbpw.h b/src/fftbpw.h
index c62db530..f3af7da7 100644
--- a/src/fftbpw.h
+++ b/src/fftbpw.h
@@ -138,9 +138,9 @@
 {"3:256:16:256", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
 { "3:512:8:256", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
 { "3:512:4:512", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
-{  "3:1K:8:256", {23.94, 23.94, 23.94, 23.94, 23.94, 23.94}},
-{"3:512:16:256", {23.94, 23.94, 23.94, 23.94, 23.94, 23.94}},
-{ "3:512:8:512", {23.94, 23.94, 23.94, 23.94, 23.94, 23.94}},
+{  "3:1K:8:256", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}}, // LL of 100028317 failed (ROEmax=0.294, ROEavg=0.247).  Lowering bpw from 23.94 to 23.84.
+{"3:512:16:256", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}},
+{ "3:512:8:512", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}},
 { "3:1K:16:256", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},
 {  "3:1K:8:512", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},
 {"3:512:16:512", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},

From 6b39a5f660ba21f103a0dc3f4bb36867f6301af8 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 11 Mar 2026 22:42:11 +0000
Subject: [PATCH 008/214] CarryFused can now process multiple lines at the same
 time -- 1% performance increase on TitanV. Standardized LDS memory layout and
 bar() strategy. Made a cleaner, common shufl routine to handle multiple lines
 using new constants SHUFL_BYTES_W and SHUFL_BYTES_H. Reverse line routines
 overhauled to use LDS memory layout and bar() strategy. Added L2STORE and
 LULOAD routines for nVidia.  Need to study which GPUs might benefit.
 Deprecated BIGLIT=0.

---
 src/Gpu.cpp          |   52 +-
 src/Gpu.h            |    2 +-
 src/cl/base.cl       |   63 +-
 src/cl/carryfused.cl | 1349 +++++++++++++++++++++---------------------
 src/cl/fftbase.cl    |  412 +++++--------
 src/cl/fftheight.cl  |  214 ++-----
 src/cl/ffthin.cl     |   25 +-
 src/cl/fftp.cl       |   90 +--
 src/cl/fftw.cl       |   28 +-
 src/cl/fftwidth.cl   |  171 +++---
 src/cl/math.cl       |    6 +-
 src/cl/middle.cl     |   62 +-
 src/cl/tailmul.cl    |  104 ++--
 src/cl/tailsquare.cl |  222 +++----
 src/cl/tailutil.cl   |  639 ++++++++------------
 src/tune.cpp         |    4 +-
 16 files changed, 1513 insertions(+), 1930 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index e9d20522..84cc4434 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -85,7 +85,6 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
 
   vector<double> weightsConstIF;
   vector<double> weightsIF;
-  vector<u32> bits;
 
   if (fft.FFT_FP64) {
     // Inverse + Forward
@@ -141,24 +140,7 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
     memcpy((double *) weightsIF.data(), weightsIF32.data(), weightsIF32.size() * sizeof(float));
   }
 
-  if (fft.FFT_FP64 || fft.FFT_FP32) {
-    for (u32 line = 0; line < H; ++line) {
-      for (u32 thread = 0; thread < groupWidth; ) {
-        std::bitset<32> b;
-        for (u32 bitoffset = 0; bitoffset < 32; bitoffset += nW*2, ++thread) {
-          for (u32 block = 0; block < nW; ++block) {
-            for (u32 rep = 0; rep < 2; ++rep) {
-              if (isBigWord(N, E, kAt(H, line, block * groupWidth + thread) + rep)) { b.set(bitoffset + block * 2 + rep); }
-            }        
-          }
-        }
-        bits.push_back(b.to_ulong());
-      }
-    }
-    assert(bits.size() == N / 32);
-  }
-
-  return Weights{weightsConstIF, weightsIF, bits};
+  return Weights{weightsConstIF, weightsIF};
 }
 
 string toLiteral(i32 value) { return to_string(value); }
@@ -228,7 +210,7 @@ constexpr bool isInList(const string& s, initializer_list<string> list) {
 }
 
 string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u64 E, bool doLog,
-                 bool &tail_single_wide, bool &tail_single_kernel, u32 &in_place, u32 &pad_size) {
+                 bool &tail_single_wide, bool &tail_single_kernel, u32 &in_place, u32 &pad_size, u32 &wmul) {
   map<string, string> config;
 
   // Highest priority is the requested "extra" conf
@@ -246,6 +228,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   // Default value for -use options that must also be parsed in C++ code
   tail_single_wide = 0, tail_single_kernel = 1;         // Default tailSquare is double-wide in one kernel
   in_place = 0;                                         // Default is not in-place
+  wmul = 1;						// Default is carryFused processes one workgroup at a time
   pad_size = isAmdGpu(id) ? 256 : 0;                    // Default is 256 bytes for AMD, 0 for others
 
   // Validate -use options
@@ -264,7 +247,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "NO_ASM",
                               "DEBUG",
                               "CARRY64",
-                              "BIGLIT",
+                              "BIGLIT",                 // Deprecated
                               "NONTEMPORAL",
                               "INPLACE",
                               "PAD",
@@ -279,7 +262,8 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "TABMUL_CHAIN31",
                               "TABMUL_CHAIN32",
                               "TABMUL_CHAIN61",
-                              "MODM31"
+                              "MODM31",
+                              "WMUL"
                             });
     if (!isValid) {
       log("Warning: unrecognized -use key '%s'\n", k.c_str());
@@ -293,6 +277,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
       if (atoi(v.c_str()) == 3) tail_single_wide = 0, tail_single_kernel = 0;
     }
     if (k == "INPLACE") in_place = atoi(v.c_str());
+    if (k == "WMUL") wmul = atoi(v.c_str());
     if (k == "PAD") pad_size = atoi(v.c_str());
   }
 
@@ -532,7 +517,7 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   nW(fft.shape.nW()),
   nH(fft.shape.nH()),
   useLongCarry{args.carry == Args::CARRY_LONG},
-  compiler{args, queue->context, clDefines(args, queue->context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size)},
+  compiler{args, queue->context, clDefines(args, queue->context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), queue, __VA_ARGS__)
 
@@ -581,11 +566,11 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1"),
   K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1 -DROE=1"),
   K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, "-DLL=1"),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + 1) / nW),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + 1) / nW, "-DROE=1"),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + 1) / nW, "-DMUL3=1"),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + 1) / nW, "-DMUL3=1 -DROE=1"),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + 1) / nW, "-DLL=1"),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DROE=1"),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DMUL3=1"),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DMUL3=1 -DROE=1"),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DLL=1"),
 
   K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN),
 
@@ -615,7 +600,6 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   weights{genWeights(fft, E, WIDTH, BIG_H, nW, isAmdGpu(q->context->deviceId()))},
   bufConstWeights{q->context, std::move(weights.weightsConstIF)},
   bufWeights{q->context,      std::move(weights.weightsIF)},
-  bufBits{q->context,         std::move(weights.bitsCF)},
 
 #define BUF(name, ...) name{profile.make(#name), queue, __VA_ARGS__}
 
@@ -695,16 +679,16 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
     kfftWGF61.setFixedArgs(2, bufTrigW);
   }
 
-  if (fft.FFT_FP64 || fft.FFT_FP32) {                         // The FP versions take bufWeight arguments  (and bufBits which may be deleted)
+  if (fft.FFT_FP64 || fft.FFT_FP32) {                         // The FP versions take bufWeight arguments
     kfftP.setFixedArgs(2, bufTrigW, bufWeights);
     for (Kernel* k : {&kCarryA, &kCarryAROE, &kCarryM, &kCarryMROE, &kCarryLL}) { k->setFixedArgs(3, bufCarry, bufWeights); }
     for (Kernel* k : {&kCarryA, &kCarryM, &kCarryLL}) { k->setFixedArgs(5, bufStatsCarry); }
     for (Kernel* k : {&kCarryAROE, &kCarryMROE})      { k->setFixedArgs(5, bufROE); }
     for (Kernel* k : {&kCarryFused, &kCarryFusedROE, &kCarryFusedMul, &kCarryFusedMulROE, &kCarryFusedLL}) {
-      k->setFixedArgs(3, bufCarry, bufReady, bufTrigW, bufBits, bufConstWeights, bufWeights);
+      k->setFixedArgs(3, bufCarry, bufReady, bufTrigW, bufConstWeights, bufWeights);
     }
-    for (Kernel* k : {&kCarryFusedROE, &kCarryFusedMulROE})           { k->setFixedArgs(9, bufROE); }
-    for (Kernel* k : {&kCarryFused, &kCarryFusedMul, &kCarryFusedLL}) { k->setFixedArgs(9, bufStatsCarry); }
+    for (Kernel* k : {&kCarryFusedROE, &kCarryFusedMulROE})           { k->setFixedArgs(8, bufROE); }
+    for (Kernel* k : {&kCarryFused, &kCarryFusedMul, &kCarryFusedLL}) { k->setFixedArgs(8, bufStatsCarry); }
   } else {
     kfftP.setFixedArgs(2, bufTrigW);
     for (Kernel* k : {&kCarryA, &kCarryAROE, &kCarryM, &kCarryMROE, &kCarryLL}) { k->setFixedArgs(3, bufCarry); }
@@ -2042,7 +2026,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
   char fname[32];
   sprintf(fname, "M%" PRIu64 ".cert", E);
 
-// Autoprimenet.py does not add the cert entry to worktodo.txt until it has successfully downloaded the .cert file.
+// AutoPrimenet.py does not add the cert entry to worktodo.txt until it has successfully downloaded the .cert file.
 
   { // Enclosing this code in braces ensures the file will be closed by the File destructor.  The later file deletion requires the file be closed in Windows.
     File fi = File::openReadThrow(fname);
diff --git a/src/Gpu.h b/src/Gpu.h
index ad859eac..b184c4d6 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -172,6 +172,7 @@ class Gpu {
   bool tail_single_wide;                // TailSquare processes one line at a time
   bool tail_single_kernel;              // TailSquare does not use a separate kernel for line zero
   u32 in_place;                         // Should GPU perform transform in-place. 1 = nVidia friendly memory layout, 2 = AMD friendly.
+  u32 wmul;                             // Number of workgroups carryFused kernel should process ("width multiplier").
   u32 pad_size;                         // Pad size in bytes as specified on the command line or config.txt.  Maximum value is 512.
 
   // Twiddles: trigonometry constant buffers, used in FFTs.
@@ -185,7 +186,6 @@ class Gpu {
   Weights weights;
   Buffer<double> bufConstWeights;
   Buffer<double> bufWeights;
-  Buffer<u32> bufBits;  // bigWord bits aligned for CarryFused/fftP
 
   // "integer word" buffers. These are "small buffers": N x int.
   Buffer<Word> bufData;   // Main int buffer with the words.
diff --git a/src/cl/base.cl b/src/cl/base.cl
index df1ef02b..f252cfe1 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -58,6 +58,13 @@ G_H        "group height" == SMALL_HEIGHT / NH
 //__builtin_assume(condition)
 #endif // DEBUG
 
+#ifndef AMDGPU
+#define AMDGPU 0
+#endif
+#ifndef NVIDIAGPU
+#define NVIDIAGPU 0
+#endif
+
 #if NO_ASM
 #define HAS_ASM 0
 #define HAS_PTX 0
@@ -128,8 +135,14 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #endif
 #endif
 
-#if !defined(BIGLIT)
-#define BIGLIT 1
+// Shufl width in bytes (can be 4, 8, or 16).  See fftbase.cl.  Allow different shufl widths for fft_width and fft_height.
+// Default is 8 bytes (one double).  Historically best for Radeon VII and TitanV.  This setting will affect how much LDS
+// memory is needed which in turn may affect occupancy and thus performance.
+#if !defined(SHUFL_BYTES_W)
+#define SHUFL_BYTES_W 8
+#endif
+#if !defined(SHUFL_BYTES_H)
+#define SHUFL_BYTES_H 8
 #endif
 
 #if !defined(TABMUL_CHAIN)
@@ -259,6 +272,42 @@ ulong2 OVERLOAD U2(ulong a, ulong b) { return (ulong2) (a, b); }
 #define NTSTORE(mem,val)   (mem) = val
 #endif
 
+// Routines for storing to L2 cache bypassing L1 cache.
+void OVERLOAD L2STORE(i64 *mem, i64 val) {
+#if ENABLE_L2STORE && HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
+  __asm("st.global.cg.b64  [%0], %1;" : : "l"(mem), "l"(val));
+#else
+  *mem = val;
+#endif
+}
+void OVERLOAD L2STORE(i32 *mem, i32 val) {
+#if ENABLE_L2STORE && HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
+  __asm("st.global.cg.b32  [%0], %1;" : : "l"(mem), "r"(val));
+#else
+  *mem = val;
+#endif
+}
+
+// Routines for loading a value and marking it for "last use".
+i64 OVERLOAD LULOAD(i64 *mem) {
+#if ENABLE_LULOAD && HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+  i64 retval;
+  __asm("ld.global.lu.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
+  return retval;
+#else
+  return *mem;
+#endif
+}
+i32 OVERLOAD LULOAD(i32 *mem) {
+#if ENABLE_LULOAD && HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+  i32 retval;
+  __asm("ld.global.lu.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
+  return retval;
+#else
+  return *mem;
+#endif
+}
+
 // Prefetch macros.  Unused at present, I tried using them in fftMiddleInGF61 on a 5080 with no benefit.
 void PREFETCHL1(const __global void *addr) {
 #if HAS_PTX >= 200         // Prefetch instruction requires sm_20 support or higher
@@ -371,7 +420,15 @@ void OVERLOAD bar(void) {
 #endif
 }
 
-void OVERLOAD bar(u32 WG) { if (WG > WAVEFRONT) { bar(); } }
+void OVERLOAD bar(const u32 WG) {
+  if (WG > WAVEFRONT) {
+#if ENABLE_BARSYNC && HAS_PTX >= 200         // bar.sync with thread count requires sm_20 support or higher.  Slower on TitanV, need to try on later nVidia GPUs.
+    __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
+#else
+    bar();
+#endif
+  }
+}
 
 // A half-barrier is only needed when half-a-workgroup needs a barrier.
 // This is used e.g. by the double-wide tailSquare, where LDS is split between the halves.
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 05e4ca4c..ba48c8bb 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -16,18 +16,101 @@ void spin() {
 #endif
 }
 
+// Increasing WMUL to 2 will reduce carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
+#ifndef WMUL
+#define WMUL 1
+#endif
+
+#if AMDGPU
+#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
+//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
+#else
+#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
+#endif
+
+// The last WMUL workgroup's carries have been written to global memory.  Now we shuffle WMUL-1 workgroups carries up using local memory.
+void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe) {
+  // If WMUL is one, there is no shuffling of carries
+  if (WMUL == 1) return;
+
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
+  const u32 lds_i64s = lds_bytes / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL workgroup
+  local i64 *lds = (local i64 *) lds2;
+
+  // Handle nasty case where we are writing 8-byte quantities but SHUFL_BYTES_W is only 4 bytes
+  if (SHUFL_BYTES_W == 4) {
+    if (WMUL == 2) {
+      // Full barrier needed as we are using the entire LDS buffer.
+      bar();
+      // Write the carries.  This will use the entire LDS buffer.
+      if (me < G_W) for (i32 i = 0; i < NW; ++i) lds[i * G_W + lowMe] = carry[i];
+      // Read carries from previous WMUL workgroup
+      bar();
+      if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W + lowMe];
+      // Full barrier needed as one workgroup just read data from two workgroups LDS buffer.  Not compatible with shufl().
+      bar();
+    }
+
+    // The really nasty case where all the carries will not fit in LDS memory
+    else {
+      lds += (me / G_W) * lds_i64s + lowMe;                         // This WMUL workgroup's LDS area
+      // Write half the carries to next WMUL's workgroup LDS area
+      bar();
+      if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW/2; ++i) lds[lds_i64s + i * G_W] = carry[i];
+      // Read carries from our WMUL workgroup LDS area
+      bar();
+      if (me >= G_W) for (i32 i = 0; i < NW/2; ++i) carry[i] = lds[i * G_W];
+      // Write the other half of the carries
+      bar();
+      if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW/2; ++i) lds[lds_i64s + i * G_W] = carry[i + NW/2];
+      // Read carries from our WMUL workgroup LDS area.  Compatible with shufl, no trailing bar() needed.
+      bar();
+      if (me >= G_W) for (i32 i = 0; i < NW/2; ++i) carry[i + NW/2] = lds[i * G_W];
+    }
+  }
+
+  // Easy case.  Write carries to local memory (except last WMUL workgroup which was written to global memory).
+  else {
+    lds += (me / G_W) * lds_i64s + lowMe;                         // This WMUL workgroup's LDS area
+    // Full barrier needed as we are moving data to next WMUL workgroup's LDS area
+    bar();
+    if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW; ++i) lds[lds_i64s + i * G_W] = carry[i];
+    // Full barrier needed as we just moved data from one WMUL workgroup LDS area to the another WMUL workgroup's LDS area
+    bar();
+    // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
+    if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
+  }
+}
+
+// The last WMUL workgroup's carries have been written to global memory.  Now we shuffle WMUL-1 workgroup carries up using local memory.
+void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe) {
+  // If WMUL is one, there is no shuffling of carries
+  if (WMUL == 1) return;
+
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
+  const u32 lds_i32s = lds_bytes / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL workgroup
+  local i32 *lds = (local i32 *) lds2;
+  lds += (me / G_W) * lds_i32s + lowMe;                         // This WMUL workgroup's LDS area
+
+  // Write carries to local memory (except last WMUL workgroup which was written to global memory)
+  // Full barrier needed as we are moving data to next WMUL workgroup's LDS area
+  bar();
+  if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW; ++i) lds[lds_i32s + i * G_W] = carry[i];
+  // Full barrier needed as we just moved data from one WMUL workgroup LDS area to the another WMUL workgroup's LDS area
+  bar();
+  // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
+  if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
+}
+
+
 #if FFT_TYPE == FFT64
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
-                       CP(u32) bits, ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local T2 lds[WIDTH / 4];
-#else
-  local T2 lds[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+                              ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
 
   T2 u[NW];
 
@@ -35,36 +118,31 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
 #if HAS_ASM
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line);
-
-// Split 32 bits into NW groups of 2 bits.  See later for different way to do this.
-#if !BIGLIT
-#define GPW (16 / NW)
-  u32 b = NTLOAD(bits[(G_W * line + me) / GPW]) >> (me % GPW * (2 * NW));
-#undef GPW
-#endif
+  readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack);
-#else
-  new_fft_WIDTH1(lds, u, smallTrig);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  T2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  T2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
 
 #if MUL3
@@ -75,24 +153,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   CFcarry carry[NW+1];
 #endif
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
-  // On Titan V it is faster to derive the big vs. little flags from the fractional number of bits in each FFT word rather than read the flags from memory.
-  // On Radeon VII this code is about the same speed.  Not sure which is better on other GPUs.
-#if BIGLIT
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
   u32 frac_bits = word_index * FRAC_BPW_HI + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
   const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
-#endif
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
@@ -103,13 +170,8 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     T invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
 
     // Generate big-word/little-word flags
-#if BIGLIT
     bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
     bool biglit1 = frac_bits + i * frac_bits_bigstep >= -FRAC_BPW_HI;   // Same as frac_bits + i * frac_bits_bigstep + FRAC_BPW_HI <= FRAC_BPW_HI;
-#else
-    bool biglit0 = test(b, 2 * i);
-    bool biglit1 = test(b, 2 * i + 1);
-#endif
 
     // Apply the inverse weights, optionally compute roundoff error, and convert to integer.  Also apply MUL3 here.
     // Then propagate carries through two words (the first carry does not have to be accurately calculated because it will
@@ -126,28 +188,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) {
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -163,68 +225,66 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     u[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(lds, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
   // Apply each 32 or 64 bit carry to the 2 words
   for (i32 i = 0; i < NW; ++i) {
-#if BIGLIT
     bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
-#else
-    bool biglit0 = test(b, 2 * i);
-#endif
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
     u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
   }
 
-  bar();
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
 
-//  fft_WIDTH(lds, u, smallTrig);
-  new_fft_WIDTH2(lds, u, smallTrig);
-
-  writeCarryFusedLine(u, out, line);
+  writeCarryFusedLine(u, out, line, lowMe);
 }
 
 
@@ -236,14 +296,10 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
-                       CP(u32) bits, ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local F2 lds[WIDTH / 4];
-#else
-  local F2 lds[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
+                              ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local F2 lds[WMUL * lds_bytes / sizeof(F2)];
 
   F2 u[NW];
 
@@ -251,46 +307,41 @@ KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
 #if HAS_ASM
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line);
+  readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack);
-#else
-  new_fft_WIDTH1(lds, u, smallTrig);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
 
   P(CFcarry) carryShuttlePtr = (P(CFcarry)) carryShuttle;
   CFcarry carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
   u32 frac_bits = word_index * FRAC_BPW_HI + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
   const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
 
@@ -321,28 +372,28 @@ KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -358,48 +409,53 @@ KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(
     u[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(lds, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -410,12 +466,9 @@ KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(
     u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
   }
 
-  bar();
-
-//  fft_WIDTH(lds, u, smallTrig);
-  new_fft_WIDTH2(lds, u, smallTrig);
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
 
-  writeCarryFusedLine(u, out, line);
+  writeCarryFusedLine(u, out, line, lowMe);
 }
 
 
@@ -427,13 +480,9 @@ KERNEL(G_W) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local GF31 lds[WIDTH / 4];
-#else
-  local GF31 lds[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local GF31 lds[WMUL * lds_bytes / sizeof(GF31)];
 
   GF31 u[NW];
 
@@ -441,40 +490,35 @@ KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
 #if HAS_ASM
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line);
+  readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack);
-#else
-  new_fft_WIDTH1(lds, u, smallTrig);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 
   P(CFcarry) carryShuttlePtr = (P(CFcarry)) carryShuttle;
   CFcarry carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   u32 roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Weights can be applied with shifts because 2 is the 60th root GF31.
@@ -537,28 +581,28 @@ KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -566,48 +610,52 @@ KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle
   __asm("s_setprio 0");
 #endif
 
+  // Shuffle carries up
+  shufl_carries_up(lds, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -627,11 +675,9 @@ KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  bar();
-
-  new_fft_WIDTH2(lds, u, smallTrig);
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
 
-  writeCarryFusedLine(u, out, line);
+  writeCarryFusedLine(u, out, line, lowMe);
 }
 
 
@@ -643,13 +689,9 @@ KERNEL(G_W) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local GF61 lds[WIDTH / 4];
-#else
-  local GF61 lds[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local GF61 lds[WMUL * lds_bytes / sizeof(GF61)];
 
   GF61 u[NW];
 
@@ -657,23 +699,25 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
 #if HAS_ASM
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line);
+  readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack);
-#else
-  new_fft_WIDTH1(lds, u, smallTrig);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 
@@ -685,17 +729,10 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
   CFcarry carry[NW+1];
 #endif
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   u32 roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Weights can be applied with shifts because 2 is the 60th root GF61.
@@ -758,28 +795,28 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -787,48 +824,53 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
   __asm("s_setprio 0");
 #endif
 
+  // Shuffle carries up
+  shufl_carries_up(lds, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -848,11 +890,9 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  bar();
-
-  new_fft_WIDTH2(lds, u, smallTrig);
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
 
-  writeCarryFusedLine(u, out, line);
+  writeCarryFusedLine(u, out, line, lowMe);
 }
 
 
@@ -864,10 +904,10 @@ KERNEL(G_W) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
-                       CP(u32) bits, ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-
-  local T2 lds[WIDTH / 2];
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+                              ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
 
   T2 u[NW];
@@ -877,7 +917,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -887,43 +933,30 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line);
-  readCarryFusedLine(in31, u31, line);
+  readCarryFusedLine(in, u, line, lowMe);
+  readCarryFusedLine(in31, u31, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack);
-  bar();
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack);
-#else
-  new_fft_WIDTH1(lds, u, smallTrig);
-  bar();
-  new_fft_WIDTH1(lds31, u31, smallTrig31);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  T2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  T2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
+
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
   i64 carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 31.
@@ -987,28 +1020,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+  // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -1024,48 +1057,53 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     u[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(lds, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -1087,15 +1125,11 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  bar();
-
-  new_fft_WIDTH2(lds, u, smallTrig);
-  writeCarryFusedLine(u, out, line);
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u, out, line, lowMe);
 
-  bar();
-
-  new_fft_WIDTH2(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, line);
+  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u31, out31, line, lowMe);
 }
 
 
@@ -1107,10 +1141,10 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
-                       CP(u32) bits, ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-
-  local F2 ldsF2[WIDTH / 2];
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+                              ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local F2 ldsF2[WMUL * lds_bytes / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
 
   F2 uF2[NW];
@@ -1120,7 +1154,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -1133,43 +1173,30 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line);
-  readCarryFusedLine(in31, u31, line);
+  readCarryFusedLine(inF2, uF2, line, lowMe);
+  readCarryFusedLine(in31, u31, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack);
-  bar();
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack);
-#else
-  new_fft_WIDTH1(ldsF2, uF2, smallTrigF2);
-  bar();
-  new_fft_WIDTH1(lds31, u31, smallTrig31);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
+
   P(i32) carryShuttlePtr = (P(i32)) carryShuttle;
   i32 carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 31.
@@ -1233,28 +1260,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -1270,48 +1297,53 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     uF2[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(ldsF2, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -1333,15 +1365,11 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  bar();
-
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, line);
+  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(uF2, outF2, line, lowMe);
 
-  bar();
-
-  new_fft_WIDTH2(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, line);
+  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u31, out31, line, lowMe);
 }
 
 
@@ -1353,10 +1381,10 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
-                       CP(u32) bits, ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-
-  local GF61 lds61[WIDTH / 2];
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+                              ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
 
   F2 uF2[NW];
@@ -1366,7 +1394,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -1379,43 +1413,30 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line);
-  readCarryFusedLine(in61, u61, line);
+  readCarryFusedLine(inF2, uF2, line, lowMe);
+  readCarryFusedLine(in61, u61, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack);
-  bar();
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack);
-#else
-  new_fft_WIDTH1(ldsF2, uF2, smallTrigF2);
-  bar();
-  new_fft_WIDTH1(lds61, u61, smallTrig61);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
+
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
   i64 carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 61.
@@ -1479,28 +1500,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -1516,48 +1537,53 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     uF2[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(lds61, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -1579,15 +1605,11 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  bar();
+  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(uF2, outF2, line, lowMe);
 
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, line);
-
-  bar();
-
-  new_fft_WIDTH2(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, line);
+  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
 
@@ -1599,13 +1621,9 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local GF61 lds61[WIDTH / 4];
-#else
-  local GF61 lds61[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
 
   GF31 u31[NW];
@@ -1615,7 +1633,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -1628,38 +1652,25 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in31, u31, line);
-  readCarryFusedLine(in61, u61, line);
+  readCarryFusedLine(in31, u31, line, lowMe);
+  readCarryFusedLine(in61, u61, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack);
-  bar();
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack);
-#else
-  new_fft_WIDTH1(lds31, u31, smallTrig31);
-  bar();
-  new_fft_WIDTH1(lds61, u61, smallTrig61);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
+
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
   i64 carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   u32 roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 31.
@@ -1738,28 +1749,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) {
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -1767,48 +1778,53 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 0");
 #endif
 
+  // Shuffle carries up
+  shufl_carries_up(lds61, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -1836,15 +1852,11 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  bar();
-
-  new_fft_WIDTH2(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, line);
-
-  bar();
+  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u31, out31, line, lowMe);
 
-  new_fft_WIDTH2(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, line);
+  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
 
@@ -1856,14 +1868,10 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
-                       CP(u32) bits, ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-
-#if 0   // fft_WIDTH uses shufl_int instead of shufl
-  local GF61 lds61[WIDTH / 4];
-#else
-  local GF61 lds61[WIDTH / 2];
-#endif
+KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+                              ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
+  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
+  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
 
@@ -1875,7 +1883,13 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   u32 me = get_local_id(0);
 
   u32 H = BIG_HEIGHT;
+#if WMUL == 1
+  u32 lowMe = me;
   u32 line = gr % H;
+#else
+  u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
+  u32 line = (gr * WMUL + me / G_W) % H;
+#endif
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -1891,48 +1905,32 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line);
-  readCarryFusedLine(in31, u31, line);
-  readCarryFusedLine(in61, u61, line);
+  readCarryFusedLine(inF2, uF2, line, lowMe);
+  readCarryFusedLine(in31, u31, line, lowMe);
+  readCarryFusedLine(in61, u61, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
-#if ZEROHACK_W
-  u32 zerohack = get_group_id(0) / 131072;
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack);
-  bar();
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack);
-  bar();
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack);
-#else
-  new_fft_WIDTH1(ldsF2, uF2, smallTrigF2);
-  bar();
-  new_fft_WIDTH1(lds31, u31, smallTrig31);
-  bar();
-  new_fft_WIDTH1(lds61, u61, smallTrig61);
-#endif
+  u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
 #if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);
+  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[me], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
 #endif
+
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
   i64 carry[NW+1];
 
-#if AMDGPU
-#define CarryShuttleAccess(me,i)        ((me) * NW + (i))                       // Generates denser global_load_dwordx4 instructions
-//#define CarryShuttleAccess(me,i)      ((me) * 4 + (i)%4 + (i)/4 * 4*G_W)      // Also generates global_load_dwordx4 instructions and unit stride when NW=8
-#else
-#define CarryShuttleAccess(me,i)        ((me) + (i) * G_W)                      // nVidia likes this unit stride better
-#endif
-
   float roundMax = 0;
   float carryMax = 0;
 
-  u32 word_index = (me * H + line) * 2;
+  u32 word_index = (lowMe * H + line) * 2;
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 31.
@@ -2013,28 +2011,28 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
   updateStats(bufROE, posROE, carryMax);
 #endif
 
-  // Write out our carries. Only groups 0 to H-1 need to write carries out.
-  // Group H is a duplicate of group 0 (producing the same results) so we don't care about group H writing out,
+  // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
+  // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
-  if (gr < H) { for (i32 i = 0; i < NW; ++i) { carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(me, i)] = carry[i]; } }
+  if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next line that its carries are ready
-  if (gr < H) {
+    // Tell next group that its carries are ready
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar();
-    if (me == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    bar(G_W);
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (me % WAVEFRONT == 0) { 
-      u32 pos = gr * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (lowMe % WAVEFRONT == 0) { 
+      u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
 
-  // Line zero will be redone when gr == H
+  // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
   // Do some work while our carries may not be ready
@@ -2050,48 +2048,53 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     uF2[i] = U2(weight1, weight2);
   }
 
+  // Shuffle carries up
+  shufl_carries_up(lds61, carry, me, lowMe);
+
   // Wait until our carries are ready
+  if (me < G_W) {
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-  bar();
-  read_mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me == 0) ready[gr - 1] = 0;
+    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+    bar();
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me == 0) ready[gr - 1] = 0;
 #else
-  u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
-  if (me % WAVEFRONT == 0) {
-    do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
-  }
-  mem_fence(CLK_GLOBAL_MEM_FENCE);
-  // Clear carry ready flag for next iteration
-  if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
+    if (me % WAVEFRONT == 0) {
+      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+    }
+    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    // Clear carry ready flag for next iteration
+    if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
 #endif
 #if HAS_ASM
-  __asm("s_setprio 1");
+    __asm("s_setprio 1");
 #endif
 
-  // Read from the carryShuttle carries produced by the previous WIDTH row.  Rotate carries from the last WIDTH row.
-  // The new carry layout lets the compiler generate global_load_dwordx4 instructions.
-  if (gr < H) {
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)];
-    }
-  } else {
+    // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
+    // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
+    if (gr < H / WMUL) {
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+      }
+    } else {
 
 #if !OLD_FENCE
-    // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-    bar();
+      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
+      bar();
 #endif
 
-    for (i32 i = 0; i < NW; ++i) {
-      carry[i] = carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/];
-    }
+      for (i32 i = 0; i < NW; ++i) {
+        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+      }
 
-    if (me == 0) {
-      carry[NW] = carry[NW-1];
-      for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
-      carry[0] = carry[NW];
+      if (me == 0) {
+        carry[NW] = carry[NW-1];
+        for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
+        carry[0] = carry[NW];
+      }
     }
   }
 
@@ -2120,20 +2123,14 @@ KERNEL(G_W) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  bar();
-
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, line);
+  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(uF2, outF2, line, lowMe);
 
-  bar();
-
-  new_fft_WIDTH2(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, line);
-
-  bar();
+  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u31, out31, line, lowMe);
 
-  new_fft_WIDTH2(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, line);
+  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
 
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index c955e803..9d2fde10 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -5,6 +5,119 @@
 #include "trig.cl"
 // #include "math.cl"
 
+
+#if FFT_FP64 | NTT_GF61
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values.  Each WG uses WG * sb bytes of LDS memory.
+// Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
+// even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
+// WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
+// n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
+// sb = The number of bytes to write to LDS memory at a time.  SHUFL_BYTES_W or SHUFL_BYTES_H
+// numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
+// lowMe = me % WG
+// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
+// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
+// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
+// minor optimization would be to spedial case the first shufl call.
+void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  if (sb == 16) {
+    local T2* lds = ((local T2*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(T2);
+
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  else if (sb == 8) {
+    // Accessing lds memory as doubles is faster than T2 accesses on Radeon VII (halving LDS memory requirements)
+    local T* lds = ((local T*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(T);
+
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+
+  else if (sb == 4) {
+    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
+    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
+    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
+    local int* lds = (local int*) lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(int);
+
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).x; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).y; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).z; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).w; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+  }
+}
+
+#endif
+
+
+#if FFT_FP32 | NTT_GF31
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats.
+void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  //GW - would a 16 byte implementation be useful?
+
+  if (sb >= 8) {
+    local F2* lds = ((local F2*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(F2);
+
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  else if (sb == 4) {
+    // Accessing lds memory as ints might be faster than F2 accesses (halving LDS memory requirements)
+    local F* lds = ((local F*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(F);
+
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+}
+
+#endif
+
+
 #if FFT_FP64
 
 void OVERLOAD chainMul4(T2 *u, T2 w) {
@@ -45,7 +158,7 @@ void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
   u[3] = cmulFancy(u[3], w3);
 
   w3.x += 1;
-  T2 base = cmulFancy (w3, w);
+  T2 base = cmulFancy(w3, w);
   for (int i = 4; i < 8; ++i) {
     u[i] = cmul(u[i], base);
     base = cmulFancy(base, w);
@@ -106,83 +219,8 @@ T2 bcast(T2 src, u32 span) {
 
 #endif
 
-void OVERLOAD shuflBigLDS(u32 WG, local T2 *lds, T2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + me]; }
-}
-
-void OVERLOAD shufl(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  local T* lds = (local T*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }
-}
-
-// Same as shufl but use ints instead of doubles to reduce LDS memory requirements.
-// Lower LDS requirements should let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
-// Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
-// code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-void OVERLOAD shufl_int(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  local int* lds = (local int*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + me]; u[i] = as_double2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + me]; u[i] = as_double2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).z; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + me]; u[i] = as_double2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).w; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + me]; u[i] = as_double2(tmp); }
-  bar();   // I'm not sure why this barrier call is needed
-}
-
-// Shufl two simultaneous FFT_HEIGHTs.  Needed for tailSquared where u and v are computed simultaneously in different threads.
-// NOTE:  It is very important for this routine to use lds memory in coordination with reverseLine2 and unreverseLine2.
-// Failure to do so would result in the need for more bar() calls.  Specifically, the u values are stored in the upper half
-// of lds memory (first SMALL_HEIGHT T2 values).  The v values are stored in the lower half of lds memory (next SMALL_HEIGHT T2 values).
-void OVERLOAD shufl2(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-
-  // Partition lds memory into upper and lower halves
-  assert(WG == G_H);
-
-  // Accessing lds memory as doubles is faster than T2 accesses
-  local T* lds = ((local T*) lds2) + (me / WG) * SMALL_HEIGHT;
-
-  me = me % WG;
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }  
+void OVERLOAD shufl(u32 WG, local T2 *lds, T2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+  shufl64(WG, lds, u, n, f, numWG, sb, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
@@ -209,7 +247,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
 
   if (TABMUL_CHAIN) {
     T2 w = trig[p];
-    chainMul (n, u, w, 0);
+    chainMul(n, u, w, 0);
     return;
   }
 
@@ -226,8 +264,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
     }
 
     for (u32 i = 2; i < n; ++i) {
-      T2 base = trig[(i-1)*WG + p];
-      u[i] = cmul(u[i], base);
+      u[i] = cmul(u[i], trig[(i-1)*WG + p]);
     }
     return;
   }
@@ -250,7 +287,7 @@ T2 partial_cmul(T2 u, T sine_over_cosine) {
 #define X2_via_FMA(a, c, b) { T2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 me) {
+void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   // Read 3 lines of sine/cosine values for the first fft4.  Read two of the lines as a pair as AMD likes T2 global memory reads
@@ -263,19 +300,20 @@ void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 me) {
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 me) {
+void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
   local T *lds1 = (local T *) lds;
   TrigSingle trig1 = (TrigSingle) trig;
   trig1 += 4*WG;                // Skip past sine_over_cosine values
 
   // Use LDS memory to distribute preloaded trig values.
   if (f > 1) {
+    bar(WG);
     lds1[me] = preloads[4];     // Preloaded sine/cosine values
     lds1[WG+me] = preloads[5];  // Preloaded cosine values
-    bar(WG);
   }
 
   // Apply sine/cosines
+  bar(WG);
   for (u32 i = 1; i < 4; ++i) {
     T sine_over_cosine;
     if (f == 1) sine_over_cosine = preloads[i-1];
@@ -299,13 +337,11 @@ void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
     preloads[2] = lds1[WG + ((me/f) & 3) * WG/4 + (2 * WG + me)/(4*f) * f/4];
     preloads[3] = lds1[WG + ((me/f) & 3) * WG/4 + (3 * WG + me)/(4*f) * f/4];
     preloads[1] = lds1[WG + ((me/f) & 3) * WG/4 + (1 * WG + me)/(4*f) * f/4];
-    bar(WG);
   }
 }
 
 // Finish off a partial tabMul while doing next fft4 making more use of FMA.
-void finish_tabMul4_fft4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 me, u32 save_one_more_mul) {
-  local T *lds1 = (local T *) lds;
+void finish_tabMul4_fft4(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   //
@@ -338,7 +374,7 @@ void finish_tabMul4_fft4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u
 //************************************************************************************
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 me) {
+void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   // Read 7 lines of sine/cosine values for the first fft8.  Read six of the lines as pairs as AMD likes T2 global memory reads
@@ -353,19 +389,20 @@ void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 me) {
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 me) {
+void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
   local T *lds1 = (local T *) lds;
   TrigSingle trig1 = (TrigSingle) trig;
   trig1 += 8*WG;                // Skip past sine_over_cosine values
 
   // Use LDS memory to distribute preloaded trig values.
   if (f > 1) {
+    bar(WG);
     lds1[me] = preloads[8];     // Preloaded sine/cosine values
     lds1[WG+me] = preloads[9];  // Preloaded cosine values
-    bar(WG);
   }
 
   // Apply sine/cosines
+  bar(WG);
   for (u32 i = 1; i < 8; ++i) {
     T sine_over_cosine;
     if (f == 1) sine_over_cosine = preloads[i-1];
@@ -394,13 +431,11 @@ void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
     preloads[7] = lds1[WG + ((me/f) & 7) * WG/8 + (7 * WG + me)/(8*f) * f/8];
     preloads[2] = lds1[WG + ((me/f) & 7) * WG/8 + (2 * WG + me)/(8*f) * f/8];
     preloads[3] = lds1[WG + ((me/f) & 7) * WG/8 + (3 * WG + me)/(8*f) * f/8];
-    bar(WG);
   }
 }
 
 // Finish off a partial tabMul while doing next fft8 making more use of FMA.
-void finish_tabMul8_fft8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 me, u32 save_one_more_mul) {
-  local T *lds1 = (local T *) lds;
+void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   //
@@ -503,7 +538,7 @@ void OVERLOAD chainMul8(F2 *u, F2 w, u32 tailSquareBcast) {
   u[3] = cmulFancy(u[3], w3);
 
   w3.x += 1;
-  F2 base = cmulFancy (w3, w);
+  F2 base = cmulFancy(w3, w);
   for (int i = 4; i < 8; ++i) {
     u[i] = cmul(u[i], base);
     base = cmulFancy(base, w);
@@ -517,55 +552,8 @@ void OVERLOAD chainMul(u32 len, F2 *u, F2 w, u32 tailSquareBcast) {
   if (len == 8) chainMul8(u, w, tailSquareBcast);
 }
 
-void OVERLOAD shuflBigLDS(u32 WG, local F2 *lds, F2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + me]; }
-}
-
-void OVERLOAD shufl(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f) {				//GWBUG - is shufl of int2 faster (BigLDS)?
-  u32 me = get_local_id(0);
-  local F* lds = (local F*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }
-}
-
-// Shufl two simultaneous FFT_HEIGHTs.  Needed for tailSquared where u and v are computed simultaneously in different threads.
-// NOTE:  It is very important for this routine to use lds memory in coordination with reverseLine2 and unreverseLine2.
-// Failure to do so would result in the need for more bar() calls.  Specifically, the u values are stored in the upper half
-// of lds memory (first SMALL_HEIGHT GF31 values).  The v values are stored in the lower half of lds memory (next SMALL_HEIGHT GF31 values).
-void OVERLOAD shufl2(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-
-  // Partition lds memory into upper and lower halves
-  assert(WG == G_H);
-
-  // Accessing lds memory as F is faster than F2 accesses					//GWBUG???
-  local F* lds = ((local F*) lds2) + (me / WG) * SMALL_HEIGHT;
-
-  me = me % WG;
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }  
+void OVERLOAD shufl(u32 WG, local F2 *lds, F2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+  shufl32(WG, lds, u, n, f, numWG, sb, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
@@ -574,7 +562,7 @@ void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN32) {
-    chainMul (n, u, trig[p], 0);
+    chainMul(n, u, trig[p], 0);
     return;
   }
 
@@ -632,55 +620,8 @@ void OVERLOAD chainMul(u32 len, GF31 *u, GF31 w) {
   if (len == 8) chainMul8(u, w);
 }
 
-void OVERLOAD shuflBigLDS(u32 WG, local GF31 *lds, GF31 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + me]; }
-}
-
-void OVERLOAD shufl(u32 WG, local GF31 *lds2, GF31 *u, u32 n, u32 f) {				//GWBUG - is shufl of int2 faster (BigLDS)?
-  u32 me = get_local_id(0);
-  local Z31* lds = (local Z31*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }
-}
-
-// Shufl two simultaneous FFT_HEIGHTs.  Needed for tailSquared where u and v are computed simultaneously in different threads.
-// NOTE:  It is very important for this routine to use lds memory in coordination with reverseLine2 and unreverseLine2.
-// Failure to do so would result in the need for more bar() calls.  Specifically, the u values are stored in the upper half
-// of lds memory (first SMALL_HEIGHT GF31 values).  The v values are stored in the lower half of lds memory (next SMALL_HEIGHT GF31 values).
-void OVERLOAD shufl2(u32 WG, local GF31 *lds2, GF31 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-
-  // Partition lds memory into upper and lower halves
-  assert(WG == G_H);
-
-  // Accessing lds memory as Z31s is faster than GF31 accesses					//GWBUG???
-  local Z31* lds = ((local Z31*) lds2) + (me / WG) * SMALL_HEIGHT;
-
-  me = me % WG;
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }  
+void OVERLOAD shufl(u32 WG, local GF31 *lds, GF31 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+  shufl32(WG, (local F2 *) lds, (local F2 *) u, n, f, numWG, sb, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
@@ -689,7 +630,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN31) {
-    chainMul (n, u, trig[p]);
+    chainMul(n, u, trig[p]);
     return;
   }
 
@@ -728,7 +669,7 @@ void OVERLOAD chainMul8(GF61 *u, GF61 w, u32 tailSquareBcast) {
   GF61 w2 = csq(w);
   u[2] = cmul(u[2], w2);
 
-  GF61 base = cmul (w2, w);		//GWBUG - see FP64 version for many possible optimizations
+  GF61 base = cmul(w2, w);		//GWBUG - see FP64 version for many possible optimizations
   for (int i = 3; i < 8; ++i) {
     u[i] = cmul(u[i], base);
     base = cmul(base, w);
@@ -742,83 +683,8 @@ void OVERLOAD chainMul(u32 len, GF61 *u, GF61 w, u32 tailSquareBcast) {
   if (len == 8) chainMul8(u, w, tailSquareBcast);
 }
 
-void OVERLOAD shuflBigLDS(u32 WG, local GF61 *lds, GF61 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + me]; }
-}
-
-void OVERLOAD shufl(u32 WG, local GF61 *lds2, GF61 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  local Z61* lds = (local Z61*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }
-}
-
-// Same as shufl but use ints instead of Z61s to reduce LDS memory requirements.
-// Lower LDS requirements should let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
-// Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
-// code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-void OVERLOAD shufl_int(u32 WG, local GF61 *lds2, GF61 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-  local int* lds = (local int*) lds2;
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).x; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + me]; u[i] = as_ulong2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).y; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + me]; u[i] = as_ulong2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).z; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + me]; u[i] = as_ulong2(tmp); }
-  bar();
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = as_int4(u[i]).w; }
-  bar();
-  for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + me]; u[i] = as_ulong2(tmp); }
-  bar();   // I'm not sure why this barrier call is needed
-}
-
-// Shufl two simultaneous FFT_HEIGHTs.  Needed for tailSquared where u and v are computed simultaneously in different threads.
-// NOTE:  It is very important for this routine to use lds memory in coordination with reverseLine2 and unreverseLine2.
-// Failure to do so would result in the need for more bar() calls.  Specifically, the u values are stored in the upper half
-// of lds memory (first SMALL_HEIGHT GF61 values).  The v values are stored in the lower half of lds memory (next SMALL_HEIGHT GF61 values).
-void OVERLOAD shufl2(u32 WG, local GF61 *lds2, GF61 *u, u32 n, u32 f) {
-  u32 me = get_local_id(0);
-
-  // Partition lds memory into upper and lower halves
-  assert(WG == G_H);
-
-  // Accessing lds memory as Z61s is faster than GF61 accesses
-  local Z61* lds = ((local Z61*) lds2) + (me / WG) * SMALL_HEIGHT;
-
-  me = me % WG;
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].x; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + me]; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { lds[i * f + (me & ~mask) * n + (me & mask)] = u[i].y; }
-  bar(WG);
-  for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + me]; }  
+void OVERLOAD shufl(u32 WG, local GF61 *lds, GF61 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+  shufl64(WG, (local T2 *) lds, (T2 *) u, n, f, numWG, sb, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
@@ -827,7 +693,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN61) {
-    chainMul (n, u, trig[p], 0);
+    chainMul(n, u, trig[p], 0);
     return;
   }
 
diff --git a/src/cl/fftheight.cl b/src/cl/fftheight.cl
index 69fa75b8..49323782 100644
--- a/src/cl/fftheight.cl
+++ b/src/cl/fftheight.cl
@@ -35,76 +35,43 @@ void OVERLOAD fft_NH(T2 *u) {
 #error FFT_VARIANT_H == 0 only supported by AMD GPUs
 #endif
 
-void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w) {
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(); }
-    fft_NH(u);
-    w = bcast(w, s);
-
-    chainMul(NH, u, w, 1);
-
-    shufl(SMALL_HEIGHT / NH, lds,  u, NH, s);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w) {
+void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe) {
   u32 WG = SMALL_HEIGHT / NH;
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(WG); }
+  for (u32 s = 1; s < WG; s *= NH) {
     fft_NH(u);
     w = bcast(w, s);
 
     chainMul(NH, u, w, 1);
 
-    shufl2(SMALL_HEIGHT / NH, lds,  u, NH, s);
+    shufl(WG, lds,  u, NH, s, numWG, sb, lowMe);
   }
   fft_NH(u);
 }
 
 #else
 
-void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w) {
-  u32 me = get_local_id(0);
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(); }
-    fft_NH(u);
-    tabMul(SMALL_HEIGHT / NH, trig, u, NH, s, me);
-    shufl(SMALL_HEIGHT / NH, lds,  u, NH, s);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe) {
   u32 WG = SMALL_HEIGHT / NH;
 
 #if !UNROLL_H
   __attribute__((opencl_unroll_hint(1)))
 #endif
-
   for (u32 s = 1; s < WG; s *= NH) {
-    if (s > 1) { bar(WG); }
     fft_NH(u);
-    tabMul(WG, trig, u, NH, s, me % WG);
-    shufl2(WG, lds,  u, NH, s);
+    tabMul(WG, trig, u, NH, s, lowMe);
+    shufl(WG, lds,  u, NH, s, numWG, sb, lowMe);
   }
   fft_NH(u);
 }
 
 #endif
 
-void OVERLOAD new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, int callnum) {
+void OVERLOAD new_fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
   u32 WG = SMALL_HEIGHT / NH;
-  u32 me = get_local_id(0);
-  // This line mimics shufl2 -- partition lds into halves
-  local T2* partitioned_lds = lds + (me / WG) * SMALL_HEIGHT / 2;
-  me = me % WG;
+
+  // This line mimics shufl -- partition lds
+  local T2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * SMALL_HEIGHT * sb / sizeof(T2);
 
 // Custom code for various SMALL_HEIGHT values
 
@@ -116,27 +83,25 @@ void OVERLOAD new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, int callnum
   trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, me);
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft4, partial tabMul, and shufl.
   fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, me);
-  shufl2(WG, lds, u, NH, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 1, me, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 4);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
 
   // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 4, me, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 16);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
 
   // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 16, me, 1);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
 
 #elif SMALL_HEIGHT == 512 && NH == 8 && FFT_VARIANT_H == 2
 
@@ -146,21 +111,20 @@ void OVERLOAD new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, int callnum
   trig += WG*8 + 2*WG*8;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, me);
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft8, partial tabMul, and shufl.
   fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, me);
-  shufl2(WG, lds, u, NH, 1);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, partitioned_lds, trig, preloads, u, 1, me, 1);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 8);
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NH, 8, numWG, sb, lowMe);
 
   // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, partitioned_lds, trig, preloads, u, 8, me, 1);
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 1);
 
 #elif SMALL_HEIGHT == 1024 && NH == 4 && FFT_VARIANT_H == 2
 
@@ -170,44 +134,41 @@ void OVERLOAD new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, int callnum
   trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, me);
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft4, partial tabMul, and shufl.
   fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, me);
-  shufl2(WG, lds, u, NH, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 1, me, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 4);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
 
   // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 4, me, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 16);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
 
   // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 16, me, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, me);
-  bar(WG);
-  shufl2(WG, lds, u, NH, 64);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NH, 64, numWG, sb, lowMe);
 
   // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, partitioned_lds, trig, preloads, u, 64, me, 1);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
 
 #else
 
   // Old version
-  fft_HEIGHT2(lds, u, trig, w);
+  fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe);
 
 #endif
 }
 
-void new_fft_HEIGHT2_1(local T2 *lds, T2 *u, Trig trig, T2 w)  { new_fft_HEIGHT2(lds, u, trig, w, 1); }
-void new_fft_HEIGHT2_2(local T2 *lds, T2 *u, Trig trig, T2 w)  { new_fft_HEIGHT2(lds, u, trig, w, 2); }
+void new_fft_HEIGHT1(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe, 1); }
+void new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe, 2); }
 
 #endif
 
@@ -228,41 +189,22 @@ void OVERLOAD fft_NH(F2 *u) {
 #endif
 }
 
-void OVERLOAD fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig) {
-  u32 me = get_local_id(0);
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(); }
-    fft_NH(u);
-    tabMul(SMALL_HEIGHT / NH, trig, u, NH, s, me);
-    shufl(SMALL_HEIGHT / NH, lds,  u, NH, s);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) {
   u32 WG = SMALL_HEIGHT / NH;
 
 #if !UNROLL_H
   __attribute__((opencl_unroll_hint(1)))
 #endif
-
   for (u32 s = 1; s < WG; s *= NH) {
-    if (s > 1) { bar(WG); }
     fft_NH(u);
-    tabMul(WG, trig, u, NH, s, me % WG);
-    shufl2(WG, lds,  u, NH, s);
+    tabMul(WG, trig, u, NH, s, lowMe);
+    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
   }
   fft_NH(u);
 }
 
-void new_fft_HEIGHT2_1(local F2 *lds, F2 *u, TrigFP32 trig)  { fft_HEIGHT2(lds, u, trig); }
-void new_fft_HEIGHT2_2(local F2 *lds, F2 *u, TrigFP32 trig)  { fft_HEIGHT2(lds, u, trig); }
+void new_fft_HEIGHT1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+void new_fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
 
@@ -283,41 +225,22 @@ void OVERLOAD fft_NH(GF31 *u) {
 #endif
 }
 
-void OVERLOAD fft_HEIGHT(local GF31 *lds, GF31 *u, TrigGF31 trig) {
-  u32 me = get_local_id(0);
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(); }
-    fft_NH(u);
-    tabMul(SMALL_HEIGHT / NH, trig, u, NH, s, me);
-    shufl(SMALL_HEIGHT / NH, lds,  u, NH, s);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD fft_HEIGHT2(local GF31 *lds, GF31 *u, TrigGF31 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_HEIGHT(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) {
   u32 WG = SMALL_HEIGHT / NH;
 
 #if !UNROLL_H
   __attribute__((opencl_unroll_hint(1)))
 #endif
-
   for (u32 s = 1; s < WG; s *= NH) {
-    if (s > 1) { bar(WG); }
     fft_NH(u);
-    tabMul(WG, trig, u, NH, s, me % WG);
-    shufl2(WG, lds,  u, NH, s);
+    tabMul(WG, trig, u, NH, s, lowMe);
+    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
   }
   fft_NH(u);
 }
 
-void OVERLOAD new_fft_HEIGHT2_1(local GF31 *lds, GF31 *u, TrigGF31 trig)  { fft_HEIGHT2(lds, u, trig); }
-void OVERLOAD new_fft_HEIGHT2_2(local GF31 *lds, GF31 *u, TrigGF31 trig)  { fft_HEIGHT2(lds, u, trig); }
+void OVERLOAD new_fft_HEIGHT1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_HEIGHT2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
 
@@ -338,40 +261,21 @@ void OVERLOAD fft_NH(GF61 *u) {
 #endif
 }
 
-void OVERLOAD fft_HEIGHT(local GF61 *lds, GF61 *u, TrigGF61 trig) {
-  u32 me = get_local_id(0);
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-
-  for (u32 s = 1; s < SMALL_HEIGHT / NH; s *= NH) {
-    if (s > 1) { bar(); }
-    fft_NH(u);
-    tabMul(SMALL_HEIGHT / NH, trig, u, NH, s, me);
-    shufl(SMALL_HEIGHT / NH, lds,  u, NH, s);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD fft_HEIGHT2(local GF61 *lds, GF61 *u, TrigGF61 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_HEIGHT(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) {
   u32 WG = SMALL_HEIGHT / NH;
 
 #if !UNROLL_H
   __attribute__((opencl_unroll_hint(1)))
 #endif
-
   for (u32 s = 1; s < WG; s *= NH) {
-    if (s > 1) { bar(WG); }
     fft_NH(u);
-    tabMul(WG, trig, u, NH, s, me % WG);
-    shufl2(WG, lds,  u, NH, s);
+    tabMul(WG, trig, u, NH, s, lowMe);
+    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
   }
   fft_NH(u);
 }
 
-void OVERLOAD new_fft_HEIGHT2_1(local GF61 *lds, GF61 *u, TrigGF61 trig)  { fft_HEIGHT2(lds, u, trig); }
-void OVERLOAD new_fft_HEIGHT2_2(local GF61 *lds, GF61 *u, TrigGF61 trig)  { fft_HEIGHT2(lds, u, trig); }
+void OVERLOAD new_fft_HEIGHT1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_HEIGHT2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index ae14ec53..82b3377d 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -8,11 +8,11 @@
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[SMALL_HEIGHT / 2];
-  
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local T2 lds[lds_bytes / sizeof(T2)];
+
   T2 u[NH];
   u32 g = get_group_id(0);
-
   u32 me = get_local_id(0);
 
   readTailFusedLine(in, u, g, me);
@@ -23,7 +23,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
   T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig, w);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
 
   write(G_H, NH, u, out, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -39,7 +39,8 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local F2 lds[lds_bytes / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -57,7 +58,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
   F2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
 #endif
 
-  fft_HEIGHT(lds, u, smallTrigF2);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
 
   write(G_H, NH, u, outF2, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -73,7 +74,8 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF31 lds[lds_bytes / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -81,12 +83,11 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF31 u[NH];
   u32 g = get_group_id(0);
-
   u32 me = get_local_id(0);
 
   readTailFusedLine(in31, u, g, me);
 
-  fft_HEIGHT(lds, u, smallTrig31);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
 
   write(G_H, NH, u, out31, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -102,7 +103,8 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF61 lds[lds_bytes / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -110,12 +112,11 @@ KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF61 u[NH];
   u32 g = get_group_id(0);
-
   u32 me = get_local_id(0);
 
   readTailFusedLine(in61, u, g, me);
 
-  fft_HEIGHT(lds, u, smallTrig61);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
 
   write(G_H, NH, u, out61, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index 2fe0d7d4..21cacf77 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -10,7 +10,7 @@
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[WIDTH / 2];
+  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
   T2 u[NW];
 
   u32 g = get_group_id(0);
@@ -27,9 +27,9 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
     u[i] = U2(in[p].x * w1, in[p].y * w2);
   }
 
-  fft_WIDTH(lds, u, smallTrig);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
 
-  writeCarryFusedLine(u, out, g);
+  writeCarryFusedLine(u, out, g, me);
 }
 
 
@@ -41,7 +41,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 lds[WIDTH / 2];
+  local F2 lds[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
   F2 u[NW];
 
   u32 g = get_group_id(0);
@@ -58,9 +58,9 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
     u[i] = U2(in[p].x * w1, in[p].y * w2);
   }
 
-  fft_WIDTH(lds, u, smallTrig);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
 
-  writeCarryFusedLine(u, out, g);
+  writeCarryFusedLine(u, out, g, me);
 }
 
 
@@ -72,7 +72,7 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
-  local GF31 lds[WIDTH / 2];
+  local GF31 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF31)];
   GF31 u[NW];
 
   u32 g = get_group_id(0);
@@ -113,9 +113,9 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(lds, u, smallTrig);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
 
-  writeCarryFusedLine(u, out, g);
+  writeCarryFusedLine(u, out, g, me);
 }
 
 
@@ -127,7 +127,7 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
-  local GF61 lds[WIDTH / 2];
+  local GF61 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
   GF61 u[NW];
 
   u32 g = get_group_id(0);
@@ -170,9 +170,9 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  fft_WIDTH(lds, u, smallTrig);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
 
-  writeCarryFusedLine(u, out, g);
+  writeCarryFusedLine(u, out, g, me);
 }
 
 
@@ -184,7 +184,7 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[WIDTH / 2];
+  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
   T2 u[NW];
   GF31 u31[NW];
@@ -236,11 +236,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(lds, u, smallTrig);
-  writeCarryFusedLine(u, out, g);
-  bar();
-  fft_WIDTH(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, g);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u, out, g, me);
+
+  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u31, out31, g, me);
 }
 
 
@@ -252,7 +252,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 ldsF2[WIDTH / 2];
+  local F2 ldsF2[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
   F2 uF2[NW];
   GF31 u31[NW];
@@ -306,11 +306,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, g);
-  bar();
-  fft_WIDTH(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, g);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(uF2, outF2, g, me);
+
+  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u31, out31, g, me);
 }
 
 
@@ -322,7 +322,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[WIDTH / 2];
+  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   F2 uF2[NW];
   GF61 u61[NW];
@@ -376,11 +376,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, g);
-  bar();
-  fft_WIDTH(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, g);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(uF2, outF2, g, me);
+
+  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u61, out61, g, me);
 }
 
 
@@ -392,7 +392,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
-  local GF61 lds61[WIDTH / 2];
+  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
   GF31 u31[NW];
   GF61 u61[NW];
@@ -459,11 +459,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  fft_WIDTH(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, g);
-  bar();
-  fft_WIDTH(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, g);
+  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u31, out31, g, me);
+
+  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u61, out61, g, me);
 }
 
 
@@ -475,7 +475,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[WIDTH / 2];
+  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
   F2 uF2[NW];
@@ -551,14 +551,14 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2);
-  writeCarryFusedLine(uF2, outF2, g);
-  bar();
-  fft_WIDTH(lds31, u31, smallTrig31);
-  writeCarryFusedLine(u31, out31, g);
-  bar();
-  fft_WIDTH(lds61, u61, smallTrig61);
-  writeCarryFusedLine(u61, out61, g);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(uF2, outF2, g, me);
+
+  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u31, out31, g, me);
+
+  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  writeCarryFusedLine(u61, out61, g, me);
 }
 
 
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index a19b26d0..89277649 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -9,13 +9,14 @@
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[WIDTH / 2];
+  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
 
   T2 u[NW];
   u32 g = get_group_id(0);
+  u32 me = get_local_id(0);
 
-  readCarryFusedLine(in, u, g);
-  fft_WIDTH(lds, u, smallTrig);  
+  readCarryFusedLine(in, u, g, me);
+  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
   out += WIDTH * g;
   write(G_W, NW, u, out, 0);
 }
@@ -31,7 +32,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[WIDTH / 2];
+  local F2 lds[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -39,9 +40,10 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 u[NW];
   u32 g = get_group_id(0);
+  u32 me = get_local_id(0);
 
-  readCarryFusedLine(inF2, u, g);
-  fft_WIDTH(lds, u, smallTrigF2);  
+  readCarryFusedLine(inF2, u, g, me);
+  fft_WIDTH(lds, u, smallTrigF2, 1, SHUFL_BYTES_W, me);
   outF2 += WIDTH * g;
   write(G_W, NW, u, outF2, 0);
 }
@@ -56,7 +58,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF31
 
 KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[WIDTH / 2];
+  local GF31 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -64,9 +66,10 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF31 u[NW];
   u32 g = get_group_id(0);
+  u32 me = get_local_id(0);
 
-  readCarryFusedLine(in31, u, g);
-  fft_WIDTH(lds, u, smallTrig31);
+  readCarryFusedLine(in31, u, g, me);
+  fft_WIDTH(lds, u, smallTrig31, 1, SHUFL_BYTES_W, me);
   out31 += WIDTH * g;
   write(G_W, NW, u, out31, 0);
 }
@@ -81,7 +84,7 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF61
 
 KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[WIDTH / 2];
+  local GF61 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -89,9 +92,10 @@ KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF61 u[NW];
   u32 g = get_group_id(0);
+  u32 me = get_local_id(0);
 
-  readCarryFusedLine(in61, u, g);
-  fft_WIDTH(lds, u, smallTrig61);  
+  readCarryFusedLine(in61, u, g, me);
+  fft_WIDTH(lds, u, smallTrig61, 1, SHUFL_BYTES_W, me);
   out61 += WIDTH * g;
   write(G_W, NW, u, out61, 0);
 }
diff --git a/src/cl/fftwidth.cl b/src/cl/fftwidth.cl
index d0589ab0..03935149 100644
--- a/src/cl/fftwidth.cl
+++ b/src/cl/fftwidth.cl
@@ -29,39 +29,38 @@ void OVERLOAD fft_NW(T2 *u) {
 #error FFT_VARIANT_W == 0 only supported by AMD GPUs
 #endif
 
-void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) {
+  u32 WG = WIDTH / NW;
+
 #if NW == 8
-  T2 w = fancyTrig_N(ND / WIDTH * me);
+  T2 w = fancyTrig_N(ND / WIDTH * lowMe);
 #else
-  T2 w = slowTrig_N(ND / WIDTH * me, ND / NW);
+  T2 w = slowTrig_N(ND / WIDTH * lowMe, ND / NW);
 #endif
 
-  for (u32 s = 1; s < WIDTH / NW; s *= NW) {
-    if (s > 1) { bar(); }
+  for (u32 s = 1; s < WG; s *= NW) {
     fft_NW(u);
     w = bcast(w, s);
 
     chainMul(NW, u, w, 0);
 
-    shufl( WIDTH / NW, lds,  u, NW, s);
+    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
   }
   fft_NW(u);
 }
 
 #else
 
-void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) {
+  u32 WG = WIDTH / NW;
 
 #if !UNROLL_W
   __attribute__((opencl_unroll_hint(1)))
 #endif
-  for (u32 s = 1; s < WIDTH / NW; s *= NW) {
-    if (s > 1) { bar(); }
+  for (u32 s = 1; s < WG; s *= NW) {
     fft_NW(u);
-    tabMul(WIDTH / NW, trig, u, NW, s, me);
-    shufl(WIDTH / NW, lds,  u, NW, s);
+    tabMul(WG, trig, u, NW, s, lowMe);
+    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
   }
   fft_NW(u);
 }
@@ -74,9 +73,12 @@ void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig) {
 // To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
 // The downside is sine/cosine cannot be computed with chained multiplies.
 
-void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, int callnum) {
+void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowMe, const u32 sb, int callnum) {
   u32 WG = WIDTH / NW;
-  u32 me = get_local_id(0);
+
+  // This line mimics shufl -- partition lds
+  local T2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * WIDTH * sb / sizeof(T2);
 
 // Custom code for various WIDTH values
 
@@ -88,27 +90,25 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, int callnum) {
   trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, me);
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft4, partial tabMul, and shufl.
   fft4(u);
-  partial_tabMul4(WG, lds, trig, preloads, u, 1, me);
-  shufl(WG, lds, u, NW, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 1, me, 1);
-  partial_tabMul4(WG, lds, trig, preloads, u, 4, me);
-  bar(WG);
-  shufl(WG, lds, u, NW, 4);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
 
   // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 4, me, 1);
-  partial_tabMul4(WG, lds, trig, preloads, u, 16, me);
-  bar(WG);
-  shufl(WG, lds, u, NW, 16);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
 
   // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 16, me, 1);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
 
 #elif WIDTH == 512 && NW == 8 && FFT_VARIANT_W == 2
 
@@ -118,21 +118,20 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, int callnum) {
   trig += WG*8;               // Skip past old FFT_width trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, me);
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft8, partial tabMul, and shufl.
   fft8(u);
-  partial_tabMul8(WG, lds, trig, preloads, u, 1, me);
-  shufl(WG, lds, u, NW, 1);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, lds, trig, preloads, u, 1, me, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, lds, trig, preloads, u, 8, me);
-  bar();
-  shufl(WG, lds, u, NW, 8);
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
 
   // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, lds, trig, preloads, u, 8, me, 0);  // We'd rather set save_one_more_mul to 1
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
 
 #elif WIDTH == 1024 && NW == 4 && FFT_VARIANT_W == 2
 
@@ -142,33 +141,30 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, int callnum) {
   trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, me);
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft4, partial tabMul, and shufl.
   fft4(u);
-  partial_tabMul4(WG, lds, trig, preloads, u, 1, me);
-  shufl(WG, lds, u, NW, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 1, me, 1);
-  partial_tabMul4(WG, lds, trig, preloads, u, 4, me);
-  bar(WG);
-  shufl(WG, lds, u, NW, 4);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
 
   // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 4, me, 1);
-  partial_tabMul4(WG, lds, trig, preloads, u, 16, me);
-  bar(WG);
-  shufl(WG, lds, u, NW, 16);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
 
   // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 16, me, 1);
-  partial_tabMul4(WG, lds, trig, preloads, u, 64, me);
-  bar(WG);
-  shufl(WG, lds, u, NW, 64);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
 
   // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, lds, trig, preloads, u, 64, me, 1);
+  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
 
 #elif WIDTH == 4096 && NW == 8 && FFT_VARIANT_W == 2
 
@@ -178,39 +174,37 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, int callnum) {
   trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
 
   // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, me);
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
 
   // Do first fft8, partial tabMul, and shufl.
   fft8(u);
-  partial_tabMul8(WG, lds, trig, preloads, u, 1, me);
-  shufl(WG, lds, u, NW, 1);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
 
   // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, lds, trig, preloads, u, 1, me, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, lds, trig, preloads, u, 8, me);
-  bar();
-  shufl(WG, lds, u, NW, 8);
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
 
   // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, lds, trig, preloads, u, 8, me, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, lds, trig, preloads, u, 64, me);
-  bar();
-  shufl(WG, lds, u, NW, 64);
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
 
   // Finish third tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, lds, trig, preloads, u, 64, me, 0);  // We'd rather set save_one_more_mul to 1
+  finish_tabMul8_fft8(WG, trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
 
 #else
 
   // Old version
-  fft_WIDTH(lds, u, trig);
+  fft_WIDTH(lds, u, trig, numWG, sb, lowMe);
 
 #endif
 }
 
 // There are two version of new_fft_WIDTH in case we want to try saving some trig values from new_fft_WIDTH1 in LDS memory for later use in new_fft_WIDTH2.
-void OVERLOAD new_fft_WIDTH1(local T2 *lds, T2 *u, Trig trig) { new_fft_WIDTH(lds, u, trig, 1); }
-void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig) { new_fft_WIDTH(lds, u, trig, 2); }
+void OVERLOAD new_fft_WIDTH1(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, lowMe, sb, 1); }
+void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, lowMe, sb, 2); }
 
 #endif
 
@@ -231,23 +225,22 @@ void OVERLOAD fft_NW(F2 *u) {
 #endif
 }
 
-void OVERLOAD fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) {
+  u32 WG = WIDTH / NW;
 
 #if !UNROLL_W
   __attribute__((opencl_unroll_hint(1)))
 #endif
-  for (u32 s = 1; s < WIDTH / NW; s *= NW) {
-    if (s > 1) { bar(); }
+  for (u32 s = 1; s < WG; s *= NW) {
     fft_NW(u);
-    tabMul(WIDTH / NW, trig, u, NW, s, me);
-    shufl(WIDTH / NW, lds,  u, NW, s);
+    tabMul(WG, trig, u, NW, s, lowMe);
+    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
   }
   fft_NW(u);
 }
 
-void OVERLOAD new_fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig) { fft_WIDTH(lds, u, trig); }
-void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig) { fft_WIDTH(lds, u, trig); }
+void OVERLOAD new_fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
 
@@ -268,23 +261,22 @@ void OVERLOAD fft_NW(GF31 *u) {
 #endif
 }
 
-void OVERLOAD fft_WIDTH(local GF31 *lds, GF31 *u, TrigGF31 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_WIDTH(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) {
+  u32 WG = WIDTH / NW;
 
 #if !UNROLL_W
   __attribute__((opencl_unroll_hint(1)))
 #endif
-  for (u32 s = 1; s < WIDTH / NW; s *= NW) {
-    if (s > 1) { bar(); }
+  for (u32 s = 1; s < WG; s *= NW) {
     fft_NW(u);
-    tabMul(WIDTH / NW, trig, u, NW, s, me);
-    shufl(WIDTH / NW, lds,  u, NW, s);
+    tabMul(WG, trig, u, NW, s, lowMe);
+    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
   }
   fft_NW(u);
 }
 
-void OVERLOAD new_fft_WIDTH1(local GF31 *lds, GF31 *u, TrigGF31 trig) { fft_WIDTH(lds, u, trig); }
-void OVERLOAD new_fft_WIDTH2(local GF31 *lds, GF31 *u, TrigGF31 trig) { fft_WIDTH(lds, u, trig); }
+void OVERLOAD new_fft_WIDTH1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_WIDTH2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
 
@@ -305,22 +297,21 @@ void OVERLOAD fft_NW(GF61 *u) {
 #endif
 }
 
-void OVERLOAD fft_WIDTH(local GF61 *lds, GF61 *u, TrigGF61 trig) {
-  u32 me = get_local_id(0);
+void OVERLOAD fft_WIDTH(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) {
+  u32 WG = WIDTH / NW;
 
 #if !UNROLL_W
   __attribute__((opencl_unroll_hint(1)))
 #endif
-  for (u32 s = 1; s < WIDTH / NW; s *= NW) {
-    if (s > 1) { bar(); }
+  for (u32 s = 1; s < WG; s *= NW) {
     fft_NW(u);
-    tabMul(WIDTH / NW, trig, u, NW, s, me);
-    shufl(WIDTH / NW, lds,  u, NW, s);
+    tabMul(WG, trig, u, NW, s, lowMe);
+    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
   }
   fft_NW(u);
 }
 
-void OVERLOAD new_fft_WIDTH1(local GF61 *lds, GF61 *u, TrigGF61 trig) { fft_WIDTH(lds, u, trig); }
-void OVERLOAD new_fft_WIDTH2(local GF61 *lds, GF61 *u, TrigGF61 trig) { fft_WIDTH(lds, u, trig); }
+void OVERLOAD new_fft_WIDTH1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_WIDTH2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
 
 #endif
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 479238c6..5ef7d515 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -171,7 +171,7 @@ i32 optional_sub(i32 a, const i32 b) {
 
 // Optionally subtract a value if first arg is greater than value.
 i32 optional_mod(i32 a, const i32 b) {
-#if 0 //HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (not sure why)
+#if ENABLE_OPTIONAL_MOD && HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (not sure why)
   __asm("{.reg .pred %%p;\n\t"
         " setp.ge.s32 %%p, %0, %1;\n\t"   // a > b
         " @%%p sub.s32 %0, %0, %1;}"      // if (a > b) a = a - b
@@ -207,7 +207,7 @@ u64 OVERLOAD mad32(u32 a, u32 b, u64 c) {
 }
 
 u128 OVERLOAD mad64(u64 a, u64 b, u64 c) {
-#if 0 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher    // Slower on TitanV and mobile 4070, don't understand why
+#if ENABLE_MAD64 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher    // Slower on TitanV and mobile 4070, don't understand why
   u64 reslo, reshi;
   __asm("mad.lo.cc.u64 %0, %2, %3, %4;\n\t"
         "madc.hi.u64   %1, %2, %3, 0;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b), "l"(u128_lo64(c)));
@@ -236,7 +236,7 @@ u128 OVERLOAD mad64(u64 a, u64 b, u64 c) {
 }
 
 u128 OVERLOAD mad64(u64 a, u64 b, u128 c) {
-#if 0 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher  // Slower on TitanV and mobile 4070, don't understand why
+#if ENABLE_MAD64 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher  // Slower on TitanV and mobile 4070, don't understand why
   u64 reslo, reshi;
   __asm("mad.lo.cc.u64 %0, %2, %3, %4;\n\t"
         "madc.hi.u64   %1, %2, %3, %5;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b), "l"(u128_lo64(c)), "l"(u128_hi64(c)));
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 263937f3..36fcac56 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -54,13 +54,13 @@
 //      u[i]      i ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...SMALL_HEIGHT-1 (multiples of one)
 
-void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line) {
+void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
-  out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + (u32) get_local_id(0); // One pad every line + a big pad every SMALL_HEIGHT lines
+  out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
   for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
 #else
-  out += line * WIDTH + (u32) get_local_id(0);
+  out += line * WIDTH + me;
   for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
 #endif
 }
@@ -311,8 +311,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
 }
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line) {
-  u32 me = get_local_id(0);
+void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   u32 SIZEY = OUT_WG / OUT_SIZEX;
 
 #if PAD_SIZE > 0
@@ -381,13 +380,13 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line) {
 
 #if FFT_FP32 || NTT_GF31
 
-void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line) {
+void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
-  out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + (u32) get_local_id(0); // One pad every line + a big pad every SMALL_HEIGHT lines
+  out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
   for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
 #else
-  out += line * WIDTH + (u32) get_local_id(0);
+  out += line * WIDTH + me;
   for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
 #endif
 }
@@ -537,8 +536,7 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
 #endif
 }
 
-void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line) {
-  u32 me = get_local_id(0);
+void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 SIZEY = OUT_WG / OUT_SIZEX;
 #if PAD_SIZE > 0
   // Adjust in pointer based on the x value used in writeMiddleOutLine
@@ -595,8 +593,8 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line) {
 
 // Since F2 and GF31 are the same size we can simply call the floats based code
 
-void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line) {
-  writeCarryFusedLine((F2 *) u, (P(F2)) out, line);
+void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
+  writeCarryFusedLine((F2 *) u, (P(F2)) out, line, me);
 }
 
 void OVERLOAD readMiddleInLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
@@ -623,8 +621,8 @@ void OVERLOAD writeMiddleOutLine (P(GF31) out, GF31 *u, u32 chunk_y, u32 chunk_x
   writeMiddleOutLine ((P(F2)) out, (F2 *) u, chunk_y, chunk_x);
 }
 
-void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line) {
-  readCarryFusedLine((CP(F2)) in, (F2 *) u, line);
+void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
+  readCarryFusedLine((CP(F2)) in, (F2 *) u, line, me);
 }
 
 #endif
@@ -638,8 +636,8 @@ void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line) {
 
 // Since T2 and GF61 are the same size we can simply call the doubles based code
 
-void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line) {
-  writeCarryFusedLine((T2 *) u, (P(T2)) out, line);
+void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
+  writeCarryFusedLine((T2 *) u, (P(T2)) out, line, me);
 }
 
 void OVERLOAD readMiddleInLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
@@ -666,8 +664,8 @@ void OVERLOAD writeMiddleOutLine (P(GF61) out, GF61 *u, u32 chunk_y, u32 chunk_x
   writeMiddleOutLine ((P(T2)) out, (T2 *) u, chunk_y, chunk_x);
 }
 
-void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line) {
-  readCarryFusedLine((CP(T2)) in, (T2 *) u, line);
+void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
+  readCarryFusedLine((CP(T2)) in, (T2 *) u, line, me);
 }
 
 #endif
@@ -778,8 +776,7 @@ void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line) {
 //      line      ranges 0...BIG_HEIGHT-1 (multiples of one)
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line) {
-  u32 me = get_local_id(0);             // Multiples of BIG_HEIGHT
+void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
@@ -787,8 +784,7 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line) {
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
-void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line) {
-  u32 me = get_local_id(0);             // Multiples of BIG_HEIGHT
+void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {  // me is multiples of BIG_HEIGHT
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
@@ -899,8 +895,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 //      line      ranges 0...BIG_HEIGHT-1 (multiples of one)
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line) {
-  u32 me = get_local_id(0);             // Multiples of BIG_HEIGHT
+void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
@@ -908,8 +903,7 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line) {
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
-void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line) {
-  u32 me = get_local_id(0);             // Multiples of BIG_HEIGHT
+void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {   // me is multiples of BIG_HEIGHT
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
@@ -990,12 +984,12 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 y, u32 x)
 
 // Since F2 and GF31 are the same size we can simply call the floats based code
 
-void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line) {
-  readCarryFusedLine((CP(F2)) in, (F2 *) u, line);
+void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
+  readCarryFusedLine((CP(F2)) in, (F2 *) u, line, me);
 }
 
-void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line) {
-  writeCarryFusedLine((F2 *) u, (P(F2)) out, line);
+void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
+  writeCarryFusedLine((F2 *) u, (P(F2)) out, line, me);
 }
 
 void OVERLOAD readMiddleInLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
@@ -1033,12 +1027,12 @@ void OVERLOAD writeMiddleOutLine (P(GF31) out, GF31 *u, u32 y, u32 x) {
 
 // Since T2 and GF61 are the same size we can simply call the doubles based code
 
-void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line) {
-  readCarryFusedLine((CP(T2)) in, (T2 *) u, line);
+void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
+  readCarryFusedLine((CP(T2)) in, (T2 *) u, line, me);
 }
 
-void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line) {
-  writeCarryFusedLine((T2 *) u, (P(T2)) out, line);
+void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
+  writeCarryFusedLine((T2 *) u, (P(T2)) out, line, me);
 }
 
 void OVERLOAD readMiddleInLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 1cdd5db0..3e2299f8 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -49,7 +49,8 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  local T2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local T2 lds[lds_bytes / sizeof(T2)];
 
   T2 u[NH], v[NH];
   T2 p[NH], q[NH];
@@ -65,7 +66,9 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   readTailFusedLine(in, u, line1, me);
   readTailFusedLine(in, v, line2, me);
 
-#if NH == 8
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
   T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
 #else
   T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
@@ -74,19 +77,15 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig, w);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
 #else
   readTailFusedLine(a, p, line1, me);
   readTailFusedLine(a, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, p, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, q, smallTrig, w);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, p, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, q, smallTrig, w, 1, SHUFL_BYTES_H, me);
 #endif
 
   T2 trig = slowTrig_N(line1 + me * H, ND / NH);
@@ -109,10 +108,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig, w);
+  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out, memline2, me);
   writeTailFusedLine(u, out, memline1, me);
 }
@@ -164,7 +161,8 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  local F2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local F2 lds[lds_bytes / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   CP(F2) aF2 = (CP(F2)) a;
@@ -188,19 +186,15 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, aF2, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, aF2, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, v, smallTrigF2);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
 #else
   readTailFusedLine(aF2, p, line1, me);
   readTailFusedLine(aF2, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, v, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, p, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, q, smallTrigF2);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, p, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, q, smallTrigF2, 1, SHUFL_BYTES_H, me);
 #endif
 
   F2 trig = slowTrig_N(line1 + me * H, ND / NH);
@@ -223,10 +217,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, u, smallTrigF2);
+  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, outF2, memline2, me);
   writeTailFusedLine(u, outF2, memline1, me);
 }
@@ -278,7 +270,8 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 }
 
 KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  local GF31 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF31 lds[lds_bytes / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
@@ -302,19 +295,15 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a31, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a31, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig31);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
 #else
   readTailFusedLine(a31, p, line1, me);
   readTailFusedLine(a31, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, p, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, q, smallTrig31);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, p, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, q, smallTrig31, 1, SHUFL_BYTES_H, me);
 #endif
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -354,10 +343,8 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig31);
+  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out31, memline2, me);
   writeTailFusedLine(u, out31, memline1, me);
 }
@@ -407,7 +394,8 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 }
 
 KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  local GF61 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF61 lds[lds_bytes / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
@@ -431,19 +419,15 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a61, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a61, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig61);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
 #else
   readTailFusedLine(a61, p, line1, me);
   readTailFusedLine(a61, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, p, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, q, smallTrig61);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, p, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, q, smallTrig61, 1, SHUFL_BYTES_H, me);
 #endif
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -483,10 +467,8 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig61);
+  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out61, memline2, me);
   writeTailFusedLine(u, out61, memline1, me);
 }
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index bf960f1c..d9edc1f7 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -54,7 +54,8 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local T2 lds[lds_bytes / sizeof(T2)];
   T2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -66,7 +67,9 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 me = get_local_id(0);
   readTailFusedLine(in, u, line, me);
 
-#if NH == 8
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
   T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
 #else
   T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
@@ -74,20 +77,20 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   T2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  fft_HEIGHT(lds, u, smallTrig, w);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  bar();
-  fft_HEIGHT(lds, u, smallTrig, w);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), me);
 }
 
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local T2 lds[lds_bytes / sizeof(T2)];
 
   T2 u[NH], v[NH];
 
@@ -107,22 +110,17 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in, u, line1, me);
   readTailFusedLine(in, v, line2, me);
 
-#if NH == 8
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
   T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
 #else
   T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
 #endif
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig + zerohack, w);
-  bar();
-  fft_HEIGHT(lds + zerohack, v, smallTrig + zerohack, w);
-#else
-  fft_HEIGHT(lds, u, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig, w);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  fft_HEIGHT(lds + zerohack, u, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds + zerohack, v, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS == 2
@@ -169,10 +167,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig, w);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig, w);
+  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out, memline2, me);
   writeTailFusedLine(u, out, memline1, me);
@@ -202,7 +198,8 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local T2 lds[lds_bytes * 2 / sizeof(T2)];
 
   T2 u[NH];
 
@@ -227,18 +224,16 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // Read lines u and v
   readTailFusedLine(in, u, line, lowMe);
 
-#if NH == 8
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
   T2 w = fancyTrig_N(H * lowMe);
 #else
   T2 w = slowTrig_N(H * lowMe, ND / NH);
 #endif
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT2_1(lds + zerohack, u, smallTrig + zerohack, w);
-#else
-  new_fft_HEIGHT2_1(lds, u, smallTrig, w);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 2, SHUFL_BYTES_H, lowMe);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS == 2
@@ -263,8 +258,6 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   T2 trig = NTLOAD(smallTrig[height_trigs + line_u*G_H*2 + me]);
 #endif
 
-  bar(G_H);
-
 #if SINGLE_KERNEL
   // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
   if (line_u == 0) {
@@ -276,15 +269,12 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   if (1) {
 #endif
-    revCrossLine(G_H, lds, u + NH/2, NH/2, isSecondHalf);
+    revCrossLine(lds, u);
     pairSq(NH/2, u, u + NH/2, trig, false);
-    bar(G_H);
-    revCrossLine(G_H, lds, u + NH/2, NH/2, !isSecondHalf);
+    revCrossLine(lds, u);
   }
 
-  bar(G_H);
-
-  new_fft_HEIGHT2_2(lds, u, smallTrig, w);
+  new_fft_HEIGHT2(lds, u, smallTrig, w, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -342,7 +332,8 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local F2 lds[lds_bytes / sizeof(F2)];
   F2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -360,20 +351,20 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  fft_HEIGHT(lds, u, smallTrigF2);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  bar();
-  fft_HEIGHT(lds, u, smallTrigF2);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), me);
 }
 
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local F2 lds[lds_bytes / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -397,16 +388,9 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(inF2, u, line1, me);
   readTailFusedLine(inF2, v, line2, me);
 
-#if ZEROHACK_H
-  u32 zerohack = get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrigF2 + zerohack);
-  bar();
-  fft_HEIGHT(lds + zerohack, v, smallTrigF2 + zerohack);
-#else
-  fft_HEIGHT(lds, u, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, v, smallTrigF2);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  fft_HEIGHT(lds + zerohack, u, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds + zerohack, v, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS32 == 2
@@ -453,10 +437,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrigF2);
-  bar();
-  fft_HEIGHT(lds, u, smallTrigF2);
+  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, outF2, memline2, me);
   writeTailFusedLine(u, outF2, memline1, me);
@@ -486,7 +468,8 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local F2 lds[lds_bytes * 2 / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -515,12 +498,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // Read lines u and v
   readTailFusedLine(inF2, u, line, lowMe);
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT2_1(lds + zerohack, u, smallTrigF2 + zerohack);
-#else
-  new_fft_HEIGHT2_1(lds, u, smallTrigF2);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 2, SHUFL_BYTES_H, lowMe);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS32 == 2
@@ -545,8 +524,6 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   F2 trig = NTLOAD(smallTrigF2[height_trigs + line_u*G_H*2 + me]);
 #endif
 
-  bar(G_H);
-
 #if SINGLE_KERNEL
   // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
   if (line_u == 0) {
@@ -558,15 +535,12 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   if (1) {
 #endif
-    revCrossLine(G_H, lds, u + NH/2, NH/2, isSecondHalf);
+    revCrossLine(lds, u);
     pairSq(NH/2, u, u + NH/2, trig, false);
-    bar(G_H);
-    revCrossLine(G_H, lds, u + NH/2, NH/2, !isSecondHalf);
+    revCrossLine(lds, u);
   }
 
-  bar(G_H);
-
-  new_fft_HEIGHT2_2(lds, u, smallTrigF2);
+  new_fft_HEIGHT2(lds, u, smallTrigF2, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -627,7 +601,8 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF31 lds[lds_bytes / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -663,19 +638,20 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig31);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig31);
+
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), me);
 }
 
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF31 lds[lds_bytes / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -699,16 +675,9 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in31, u, line1, me);
   readTailFusedLine(in31, v, line2, me);
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig31 + zerohack);
-  bar();
-  fft_HEIGHT(lds + zerohack, v, smallTrig31 + zerohack);
-#else
-  fft_HEIGHT(lds, u, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig31);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  fft_HEIGHT(lds + zerohack, u, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds + zerohack, v, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS31 >= 1
@@ -751,10 +720,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig31);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig31);
+  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out31, memline2, me);
   writeTailFusedLine(u, out31, memline1, me);
@@ -783,7 +750,8 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF31 lds[lds_bytes * 2 / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -812,12 +780,8 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // Read lines u and v
   readTailFusedLine(in31, u, line, lowMe);
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT2_1(lds + zerohack, u, smallTrig31 + zerohack);
-#else
-  new_fft_HEIGHT2_1(lds, u, smallTrig31);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 2, SHUFL_BYTES_H, lowMe);
 
   // Do a little bit of memory access and a little bit of math.  Good on a Radeon VII.
 #if TAIL_TRIGS31 >= 1
@@ -838,8 +802,6 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   GF31 trig = NTLOAD(smallTrig31[height_trigs + line_u*G_H*2 + me]);
 #endif
 
-  bar(G_H);
-
 #if SINGLE_KERNEL
   // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
   if (line_u == 0) {
@@ -851,15 +813,12 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   if (1) {
 #endif
-    revCrossLine(G_H, lds, u + NH/2, NH/2, isSecondHalf);
+    revCrossLine(lds, u);
     pairSq(NH/2, u, u + NH/2, trig, false);
-    bar(G_H);
-    revCrossLine(G_H, lds, u + NH/2, NH/2, !isSecondHalf);
+    revCrossLine(lds, u);
   }
 
-  bar(G_H);
-
-  new_fft_HEIGHT2_2(lds, u, smallTrig31);
+  new_fft_HEIGHT2(lds, u, smallTrig31, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -920,7 +879,8 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[SMALL_HEIGHT / 2];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF61 lds[lds_bytes / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -956,19 +916,20 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig61);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig61);
+
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), me);
 }
 
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF61 lds[lds_bytes / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -992,16 +953,9 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in61, u, line1, me);
   readTailFusedLine(in61, v, line2, me);
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig61 + zerohack);
-  bar();
-  fft_HEIGHT(lds + zerohack, v, smallTrig61 + zerohack);
-#else
-  fft_HEIGHT(lds, u, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, v, smallTrig61);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  fft_HEIGHT(lds + zerohack, u, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds + zerohack, v, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS61 >= 1
@@ -1044,10 +998,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
-  bar();
-  fft_HEIGHT(lds, v, smallTrig61);
-  bar();
-  fft_HEIGHT(lds, u, smallTrig61);
+  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out61, memline2, me);
   writeTailFusedLine(u, out61, memline1, me);
@@ -1076,7 +1028,8 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[SMALL_HEIGHT];
+  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
+  local GF61 lds[lds_bytes * 2 / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -1105,12 +1058,8 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // Read lines u and v
   readTailFusedLine(in61, u, line, lowMe);
 
-#if ZEROHACK_H
-  u32 zerohack = (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT2_1(lds + zerohack, u, smallTrig61 + zerohack);
-#else
-  new_fft_HEIGHT2_1(lds, u, smallTrig61);
-#endif
+  u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 2, SHUFL_BYTES_H, lowMe);
 
   // Do a little bit of memory access and a little bit of math.  Good on a Radeon VII.
 #if TAIL_TRIGS61 >= 1
@@ -1131,8 +1080,6 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   GF61 trig = NTLOAD(smallTrig61[height_trigs + line_u*G_H*2 + me]);
 #endif
 
-  bar(G_H);
-
 #if SINGLE_KERNEL
   // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
   if (line_u == 0) {
@@ -1144,15 +1091,12 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   if (1) {
 #endif
-    revCrossLine(G_H, lds, u + NH/2, NH/2, isSecondHalf);
+    revCrossLine(lds, u);
     pairSq(NH/2, u, u + NH/2, trig, false);
-    bar(G_H);
-    revCrossLine(G_H, lds, u + NH/2, NH/2, !isSecondHalf);
+    revCrossLine(lds, u);
   }
 
-  bar(G_H);
-
-  new_fft_HEIGHT2_2(lds, u, smallTrig61);
+  new_fft_HEIGHT2(lds, u, smallTrig61, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), lowMe);
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index 01710cf1..9234f858 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -30,84 +30,181 @@
 #define SINGLE_WIDE     TAIL_KERNELS < 2          // Old single-wide tailSquare vs. new double-wide tailSquare
 #define SINGLE_KERNEL   (TAIL_KERNELS & 1) == 0   // TailSquare uses a single kernel vs. two kernels
 
-#if FFT_FP64
+// 64-bit implementations of reverse routines
 
-void OVERLOAD reverse(u32 WG, local T2 *lds, T2 *u, bool bump) {
+#if FFT_FP64 | NTT_GF61
+
+void OVERLOAD reverse(u32 WG, local T2 *lds2, T2 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
-  bar();
-
+  if (SHUFL_BYTES_H >= 8) {
+    local T2 *lds = lds2;
+    bar(WG);
 #if NH == 8
-  lds[revMe + 0 * WG] = u[3];
-  lds[revMe + 1 * WG] = u[2];
-  lds[revMe + 2 * WG] = u[1];
-  lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
+    lds[revMe + 0 * WG] = u[3];
+    lds[revMe + 1 * WG] = u[2];
+    lds[revMe + 2 * WG] = u[1];
+    lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
 #elif NH == 4
-  lds[revMe + 0 * WG] = u[1];
-  lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
-#else
-#error
+    lds[revMe + 0 * WG] = u[1];
+    lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
 #endif
+    bar(WG);
+    for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+  }
 
-  bar();
-  for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+  else if (SHUFL_BYTES_H == 4) {
+    local T *lds = (local T *) lds2;
+    bar(WG);
+#if NH == 8
+    lds[revMe + 0 * WG] = u[3].x;
+    lds[revMe + 1 * WG] = u[2].x;
+    lds[revMe + 2 * WG] = u[1].x;
+    lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0].x;
+#elif NH == 4
+    lds[revMe + 0 * WG] = u[1].x;
+    lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0].x;
+#endif
+    bar(WG);
+    for (i32 i = 0; i < NH/2; ++i) { u[i].x = lds[i * WG + me]; }
+    bar(WG);
+#if NH == 8
+    lds[revMe + 0 * WG] = u[3].y;
+    lds[revMe + 1 * WG] = u[2].y;
+    lds[revMe + 2 * WG] = u[1].y;
+    lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0].y;
+#elif NH == 4
+    lds[revMe + 0 * WG] = u[1].y;
+    lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0].y;
+#endif
+    bar(WG);
+    for (i32 i = 0; i < NH/2; ++i) { u[i].y = lds[i * WG + me]; }
+  }
 }
 
-void OVERLOAD reverseLine(u32 WG, local T2 *lds2, T2 *u) {
+void OVERLOAD reverseLine(u32 WG, local T2 *lds, T2 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
-  local T2 *lds = lds2 + revMe;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { lds[WG * (NH - 1 - i)] = u[i]; }
-
-  lds = lds2 + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[WG * i]; }
-}
-
-// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(u32 WG, local T2* lds2, T2 *u, u32 n, bool writeSecondHalf) {
-  u32 me = get_local_id(0);
-  u32 lowMe = me % WG;
-  
-  u32 revLowMe = WG - 1 - lowMe;
-
-  for (u32 i = 0; i < n; ++i) { lds2[WG * n * writeSecondHalf + WG * (n - 1 - i) + revLowMe] = u[i]; }
+  if (SHUFL_BYTES_H == 16) {
+    local T2 *ldsOut = lds + revMe;
+    local T2 *ldsIn = lds + me;
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i] = ldsIn[WG * i]; }
+  }
 
-  bar();   // we need a full bar because we're crossing halves
+  else if (SHUFL_BYTES_H == 8) {
+    local T *ldsOut = (local T *) lds + revMe;
+    local T *ldsIn = (local T *) lds + me;
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[WG * i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i].y = ldsIn[WG * i]; }
+  }
 
-  for (u32 i = 0; i < n; ++i) { u[i] = lds2[WG * n * !writeSecondHalf + WG * i + lowMe]; }
+  else if (SHUFL_BYTES_H == 4) {
+    local int *ldsOut = (local int *) lds + revMe;
+    local int *ldsIn = (local int *) lds + me;
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).x; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.x = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).y; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.y = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).z; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.z = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).w; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.w = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+  }
 }
 
 //
-// These versions are for the kernel(s) that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// These versions are for the kernel(s) that use a double-wide workgroup (u in half the workgroup, v in the other half)
 //
 
-void OVERLOAD reverse2(local T2 *lds, T2 *u) {
+void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
   u32 me = get_local_id(0);
-  
-  // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
-  //	u[7]rev   u[6]rev
-  //	u[5]rev   u[4]rev
-  //	v[7]rev   v[6]rev
-  //	v[5]rev   v[4]rev
-  bar();
-  for (u32 i = 0; i < NH / 2; ++i) {
-    u32 j = (i * G_H + me % G_H);
-    lds[me < G_H ? ((NH/2)*G_H - j) % ((NH/2)*G_H) : NH*G_H-1 - j] = u[NH/2 + i];
+  u32 lowMe = me % G_H;
+
+  if (SHUFL_BYTES_H >= 8) {
+    local T2 *lds = lds2;
+    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);
+    // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
+    //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
+    //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i]; }
+    // For NH=8, read from lds into u[i]:
+    //  u[4] =   u[7]rev   v[7]rev
+    //  u[5] =   u[6]rev   v[6]rev
+    //  u[6] =   u[5]rev   v[5]rev
+    //  u[7] =   u[4]rev   v[4]rev
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * G_H + lowMe]; }
+  }
+
+  else if (SHUFL_BYTES_H == 4) {
+    local T *lds = (local T *) lds2;
+    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i].x; }
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].x = lds[i * G_H + lowMe]; }
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i].y; }
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].y = lds[i * G_H + lowMe]; }
   }
-  // For NH=8, read from lds into u[i]:
-  //	u[4] =   u[7]rev   v[7]rev
-  //	u[5] =   u[6]rev   v[6]rev
-  //	u[6] =   u[5]rev   v[5]rev
-  //	u[7] =   u[4]rev   v[4]rev
-  bar();
-  lds += me % G_H + (me / G_H) * NH/2 * G_H;
-  for (u32 i = 0; i < NH / 2; ++i) { u[NH/2 + i] = lds[i * G_H]; }
 }
 
+// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
+void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;
+  u32 revLowMe = G_H - 1 - lowMe;
+
+  if (SHUFL_BYTES_H >= 8) {
+    local T2 *ldsOut = lds2;
+    local T2 *ldsIn = lds2;
+    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);     // Crossing LDS halves
+    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);               // Staying within LDS halves (just like shufl)
+    bar();   // we need a full bar because we're crossing halves
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
+    bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[G_H * i + lowMe]; }
+  }
+
+  else if (SHUFL_BYTES_H == 4) {
+    local T *ldsOut = (local T *) lds2;
+    local T *ldsIn = (local T *) lds2;
+    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
+    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
+    bar();   // we need a full bar because we're crossing halves
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
+    bar();   // we need a full bar because we just crossed halves
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].x = ldsIn[G_H * i + lowMe]; }
+    bar();   // we need a full bar because we're crossing halves
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].y; }
+    bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].y = ldsIn[G_H * i + lowMe]; }
+  }
+}
+
+#if 0    // Unused
+
 // Somewhat similar to reverseLine.
 // The u values are in threads < G_H, the v values to reverse in threads >= G_H.
 // Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
@@ -119,7 +216,7 @@ void OVERLOAD reverse2(local T2 *lds, T2 *u) {
 void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
   u32 me = get_local_id(0);
 
-// NOTE:  It is important that this routine use lds memory in coordination with shufl2.  Failure to do so would require an
+// NOTE:  It is important that this routine use lds memory in coordination with shufl.  Failure to do so would require an
 // unqualified bar() call here.  Specifically, the u values are stored in the upper half of lds memory (SMALL_HEIGHT T2 values).
 // The v values are stored in the lower half of lds memory (the next SMALL_HEIGHT T2 values).
 
@@ -191,89 +288,107 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
 
 #endif
 
+#endif
+
 
 /**************************************************************************/
 /*            Similar to above, but for an FFT based on FP32              */
 /**************************************************************************/
 
-#if FFT_FP32
+#if FFT_FP32 | NTT_GF31
 
 void OVERLOAD reverse(u32 WG, local F2 *lds, F2 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
-  bar();
-
+  if (SHUFL_BYTES_H >= 4) {
+    bar(WG);
 #if NH == 8
-  lds[revMe + 0 * WG] = u[3];
-  lds[revMe + 1 * WG] = u[2];
-  lds[revMe + 2 * WG] = u[1];
-  lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
+    lds[revMe + 0 * WG] = u[3];
+    lds[revMe + 1 * WG] = u[2];
+    lds[revMe + 2 * WG] = u[1];
+    lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
 #elif NH == 4
-  lds[revMe + 0 * WG] = u[1];
-  lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
-#else
-#error
+    lds[revMe + 0 * WG] = u[1];
+    lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
 #endif
-
-  bar();
-  for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+    bar(WG);
+    for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+  }
 }
 
-void OVERLOAD reverseLine(u32 WG, local F2 *lds2, F2 *u) {
+void OVERLOAD reverseLine(u32 WG, local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
-  local F2 *lds = lds2 + revMe;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { lds[WG * (NH - 1 - i)] = u[i]; }
-
-  lds = lds2 + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[WG * i]; }
-}
-
-// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(u32 WG, local F2* lds2, F2 *u, u32 n, bool writeSecondHalf) {
-  u32 me = get_local_id(0);
-  u32 lowMe = me % WG;
-
-  u32 revLowMe = WG - 1 - lowMe;
-
-  for (u32 i = 0; i < n; ++i) { lds2[WG * n * writeSecondHalf + WG * (n - 1 - i) + revLowMe] = u[i]; }
-
-  bar();   // we need a full bar because we're crossing halves
+  if (SHUFL_BYTES_H >= 8) {
+    local F2 *ldsOut = lds + revMe;
+    local F2 *ldsIn = lds + me;
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i] = ldsIn[WG * i]; }
+  }
 
-  for (u32 i = 0; i < n; ++i) { u[i] = lds2[WG * n * !writeSecondHalf + WG * i + lowMe]; }
+  else if (SHUFL_BYTES_H == 4) {
+    local F *ldsOut = (local F *) lds + revMe;
+    local F *ldsIn = (local F *) lds + me;
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[WG * i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < NH; ++i) { u[i].y = ldsIn[WG * i]; }
+  }
 }
 
 //
-// These versions are for the kernel(s) that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// These versions are for the kernel(s) that use a double-wide workgroup (u in half the workgroup, v in the other half)
 //
 
 void OVERLOAD reverse2(local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;
+
+  if (SHUFL_BYTES_H >= 4) {
+    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
+    // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
+    //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
+    //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i]; }
+    // For NH=8, read from lds into u[i]:
+    //  u[4] =   u[7]rev   v[7]rev
+    //  u[5] =   u[6]rev   v[6]rev
+    //  u[6] =   u[5]rev   v[5]rev
+    //  u[7] =   u[4]rev   v[4]rev
+    bar(G_H);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * G_H + lowMe]; }
+  }
+}
 
-  // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
-  //	u[7]rev   u[6]rev
-  //	u[5]rev   u[4]rev
-  //	v[7]rev   v[6]rev
-  //	v[5]rev   v[4]rev
-  bar();
-  for (u32 i = 0; i < NH / 2; ++i) {
-    u32 j = (i * G_H + me % G_H);
-    lds[me < G_H ? ((NH/2)*G_H - j) % ((NH/2)*G_H) : NH*G_H-1 - j] = u[NH/2 + i];
+// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
+void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;
+  u32 revLowMe = G_H - 1 - lowMe;
+
+  if (SHUFL_BYTES_H >= 4) {
+    local F2 *ldsOut = lds2;
+    local F2 *ldsIn = lds2;
+    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
+    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
+    bar();   // we need a full bar because we're crossing halves
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
+    bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[G_H * i + lowMe]; }
   }
-  // For NH=8, read from lds into u[i]:
-  //	u[4] =   u[7]rev   v[7]rev
-  //	u[5] =   u[6]rev   v[6]rev
-  //	u[6] =   u[5]rev   v[5]rev
-  //	u[7] =   u[4]rev   v[4]rev
-  bar();
-  lds += me % G_H + (me / G_H) * NH/2 * G_H;
-  for (u32 i = 0; i < NH / 2; ++i) { u[NH/2 + i] = lds[i * G_H]; }
 }
 
+#if 0    // Unused
+
 // Somewhat similar to reverseLine.
 // The u values are in threads < G_H, the v values to reverse in threads >= G_H.
 // Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
@@ -357,6 +472,8 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 
 #endif
 
+#endif
+
 
 /**************************************************************************/
 /*          Similar to above, but for an NTT based on GF(M31^2)           */
@@ -365,161 +482,32 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 #if NTT_GF31
 
 void OVERLOAD reverse(u32 WG, local GF31 *lds, GF31 *u, bool bump) {
-  u32 me = get_local_id(0);
-  u32 revMe = WG - 1 - me + bump;
-
-  bar();
-
-#if NH == 8
-  lds[revMe + 0 * WG] = u[3];
-  lds[revMe + 1 * WG] = u[2];
-  lds[revMe + 2 * WG] = u[1];
-  lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
-#elif NH == 4
-  lds[revMe + 0 * WG] = u[1];
-  lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
-#else
-#error
-#endif
-
-  bar();
-  for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+  reverse(WG, (local F2 *) lds, (F2 *) u, bump);
 }
 
-void OVERLOAD reverseLine(u32 WG, local GF31 *lds2, GF31 *u) {
-  u32 me = get_local_id(0);
-  u32 revMe = WG - 1 - me;
-
-  local GF31 *lds = lds2 + revMe;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { lds[WG * (NH - 1 - i)] = u[i]; }
-
-  lds = lds2 + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[WG * i]; }
+void OVERLOAD reverseLine(u32 WG, local GF31 *lds, GF31 *u) {
+  reverseLine(WG, (local F2 *) lds, (F2 *) u);
 }
 
-// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(u32 WG, local GF31* lds2, GF31 *u, u32 n, bool writeSecondHalf) {
-  u32 me = get_local_id(0);
-  u32 lowMe = me % WG;
-
-  u32 revLowMe = WG - 1 - lowMe;
-
-  for (u32 i = 0; i < n; ++i) { lds2[WG * n * writeSecondHalf + WG * (n - 1 - i) + revLowMe] = u[i]; }
-
-  bar();   // we need a full bar because we're crossing halves
-
-  for (u32 i = 0; i < n; ++i) { u[i] = lds2[WG * n * !writeSecondHalf + WG * i + lowMe]; }
-}
-
-//
-// These versions are for the kernel(s) that uses a double-wide workgroup (u in half the workgroup, v in the other half)
-//
-
 void OVERLOAD reverse2(local GF31 *lds, GF31 *u) {
-  u32 me = get_local_id(0);
-  
-  // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
-  //	u[7]rev   u[6]rev
-  //	u[5]rev   u[4]rev
-  //	v[7]rev   v[6]rev
-  //	v[5]rev   v[4]rev
-  bar();
-  for (u32 i = 0; i < NH / 2; ++i) {
-    u32 j = (i * G_H + me % G_H);
-    lds[me < G_H ? ((NH/2)*G_H - j) % ((NH/2)*G_H) : NH*G_H-1 - j] = u[NH/2 + i];
-  }
-  // For NH=8, read from lds into u[i]:
-  //	u[4] =   u[7]rev   v[7]rev
-  //	u[5] =   u[6]rev   v[6]rev
-  //	u[6] =   u[5]rev   v[5]rev
-  //	u[7] =   u[4]rev   v[4]rev
-  bar();
-  lds += me % G_H + (me / G_H) * NH/2 * G_H;
-  for (u32 i = 0; i < NH / 2; ++i) { u[NH/2 + i] = lds[i * G_H]; }
+  reverse2((local F2 *) lds, (F2 *) u);
 }
 
-// Somewhat similar to reverseLine.
-// The u values are in threads < G_H, the v values to reverse in threads >= G_H.
-// Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
-// so that pairSq2 can easily operate on pairs.  This means for NH = 4, web output:
-//      u[0]    u[1]            // Returned in u[0]
-//      u[2]    u[3]            // Returned in u[1]
-//      v[3]rev v[2]rev         // Returned in u[2]
-//      v[1]rev v[0]rev         // Returned in u[3]
-void OVERLOAD reverseLine2(local GF31 *lds, GF31 *u) {
-  u32 me = get_local_id(0);
-
-// NOTE:  It is important that this routine use lds memory in coordination with shufl2.  Failure to do so would require an
-// unqualified bar() call here.  Specifically, the u values are stored in the upper half of lds memory (SMALL_HEIGHT GF31 values).
-// The v values are stored in the lower half of lds memory (the next SMALL_HEIGHT GF31 values).
-
-  if (G_H > WAVEFRONT) bar();
-
-// For NH=4, the lds indices (where to write each incoming u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-// That means saving to lds using index: me < G_H ? me % G_H + i * G_H : 8*G_H-1 - me % G_H - i * G_H
-
-#if 1
-  local GF31 *ldsOut = lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
+void OVERLOAD revCrossLine(local GF31* lds, GF31 *u) {
+  revCrossLine((local F2 *) lds, (F2 *) u);
+}
 
-  lds += me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*G_H]; }
-#else
-  local Z61 *ldsOut = (local Z61 *) lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*G_H] = u[i].y; }
+#if 0    // Unused
 
-  local ZF61 *ldsIn = (local T *) lds + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*G_H]; u[i].y = ldsIn[NH*2*G_H + i * 2*G_H]; }
-#endif
+void OVERLOAD reverseLine2(local GF31 *lds, GF31 *u) {
+  reverseLine2((local F2 *) lds, (F2 *) u);
 }
 
-// Undo a reverseLine2
 void OVERLOAD unreverseLine2(local GF31 *lds, GF31 *u) {
-  u32 me = get_local_id(0);
-
-// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl2.  By initially
-// writing to the lds locations that reverseLine2 read from we do not need an initial bar() call here.  Also, by reading
-// from the lds locations that shufl2 will use (u values in the upper half of lds memory, v values in the lower half of
-// lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
-
-#if 1
-  local GF31 *ldsOut = lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i]; }
-
-// For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  lds += (me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H;
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
-  bar();
-  for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
-#else
-  local Z61 *ldsOut = (local T *) lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i].x; ldsOut[NH*2*G_H + i * 2*G_H] = u[i].y; }
+  unreverseLine2((local F2 *) lds, (F2 *) u);
+}
 
-// For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  local Z61 *ldsIn = (local T *) lds + ((me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
-  bar();
-  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*G_H]; }
 #endif
-}
 
 #endif
 
@@ -531,160 +519,31 @@ void OVERLOAD unreverseLine2(local GF31 *lds, GF31 *u) {
 #if NTT_GF61
 
 void OVERLOAD reverse(u32 WG, local GF61 *lds, GF61 *u, bool bump) {
-  u32 me = get_local_id(0);
-  u32 revMe = WG - 1 - me + bump;
-
-  bar();
-
-#if NH == 8
-  lds[revMe + 0 * WG] = u[3];
-  lds[revMe + 1 * WG] = u[2];
-  lds[revMe + 2 * WG] = u[1];
-  lds[bump ? ((revMe + 3 * WG) % (4 * WG)) : (revMe + 3 * WG)] = u[0];
-#elif NH == 4
-  lds[revMe + 0 * WG] = u[1];
-  lds[bump ? ((revMe + WG) % (2 * WG)) : (revMe + WG)] = u[0];
-#else
-#error
-#endif
-
-  bar();
-  for (i32 i = 0; i < NH/2; ++i) { u[i] = lds[i * WG + me]; }
+  reverse(WG, (local T2 *) lds, (T2 *) u, bump);
 }
 
-void OVERLOAD reverseLine(u32 WG, local GF61 *lds2, GF61 *u) {
-  u32 me = get_local_id(0);
-  u32 revMe = WG - 1 - me;
-
-  local GF61 *lds = lds2 + revMe;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { lds[WG * (NH - 1 - i)] = u[i]; }
-
-  lds = lds2 + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[WG * i]; }
+void OVERLOAD reverseLine(u32 WG, local GF61 *lds, GF61 *u) {
+  reverseLine(WG, (local T2 *) lds, (T2 *) u);
 }
 
-// This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(u32 WG, local GF61* lds2, GF61 *u, u32 n, bool writeSecondHalf) {
-  u32 me = get_local_id(0);
-  u32 lowMe = me % WG;
-
-  u32 revLowMe = WG - 1 - lowMe;
-
-  for (u32 i = 0; i < n; ++i) { lds2[WG * n * writeSecondHalf + WG * (n - 1 - i) + revLowMe] = u[i]; }
-
-  bar();   // we need a full bar because we're crossing halves
-
-  for (u32 i = 0; i < n; ++i) { u[i] = lds2[WG * n * !writeSecondHalf + WG * i + lowMe]; }
-}
-
-//
-// These versions are for the kernel(s) that uses a double-wide workgroup (u in half the workgroup, v in the other half)
-//
-
 void OVERLOAD reverse2(local GF61 *lds, GF61 *u) {
-  u32 me = get_local_id(0);
-  
-  // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
-  //	u[7]rev   u[6]rev
-  //	u[5]rev   u[4]rev
-  //	v[7]rev   v[6]rev
-  //	v[5]rev   v[4]rev
-  bar();
-  for (u32 i = 0; i < NH / 2; ++i) {
-    u32 j = (i * G_H + me % G_H);
-    lds[me < G_H ? ((NH/2)*G_H - j) % ((NH/2)*G_H) : NH*G_H-1 - j] = u[NH/2 + i];
-  }
-  // For NH=8, read from lds into u[i]:
-  //	u[4] =   u[7]rev   v[7]rev
-  //	u[5] =   u[6]rev   v[6]rev
-  //	u[6] =   u[5]rev   v[5]rev
-  //	u[7] =   u[4]rev   v[4]rev
-  bar();
-  lds += me % G_H + (me / G_H) * NH/2 * G_H;
-  for (u32 i = 0; i < NH / 2; ++i) { u[NH/2 + i] = lds[i * G_H]; }
+  reverse2((local T2 *) lds, (T2 *) u);
 }
 
-// Somewhat similar to reverseLine.
-// The u values are in threads < G_H, the v values to reverse in threads >= G_H.
-// Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
-// so that pairSq2 can easily operate on pairs.  This means for NH = 4, web output:
-//      u[0]    u[1]            // Returned in u[0]
-//      u[2]    u[3]            // Returned in u[1]
-//      v[3]rev v[2]rev         // Returned in u[2]
-//      v[1]rev v[0]rev         // Returned in u[3]
-void OVERLOAD reverseLine2(local GF61 *lds, GF61 *u) {
-  u32 me = get_local_id(0);
-
-// NOTE:  It is important that this routine use lds memory in coordination with shufl2.  Failure to do so would require an
-// unqualified bar() call here.  Specifically, the u values are stored in the upper half of lds memory (SMALL_HEIGHT GF61 values).
-// The v values are stored in the lower half of lds memory (the next SMALL_HEIGHT GF61 values).
-
-  if (G_H > WAVEFRONT) bar();
-
-// For NH=4, the lds indices (where to write each incoming u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-// That means saving to lds using index: me < G_H ? me % G_H + i * G_H : 8*G_H-1 - me % G_H - i * G_H
-
-#if 1
-  local GF61 *ldsOut = lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
+void OVERLOAD revCrossLine(local GF61* lds, GF61 *u) {
+  revCrossLine((local T2 *) lds, (T2 *) u);
+}
 
-  lds += me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*G_H]; }
-#else
-  local Z61 *ldsOut = (local Z61 *) lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*G_H] = u[i].y; }
+#if 0    // Unused
 
-  local ZF61 *ldsIn = (local T *) lds + me;
-  bar();
-  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*G_H]; u[i].y = ldsIn[NH*2*G_H + i * 2*G_H]; }
-#endif
+void OVERLOAD reverseLine2(local GF61 *lds, GF61 *u) {
+  reverseLine2((local T2 *) lds, (T2 *) u);
 }
 
-// Undo a reverseLine2
 void OVERLOAD unreverseLine2(local GF61 *lds, GF61 *u) {
-  u32 me = get_local_id(0);
-
-// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl2.  By initially
-// writing to the lds locations that reverseLine2 read from we do not need an initial bar() call here.  Also, by reading
-// from the lds locations that shufl2 will use (u values in the upper half of lds memory, v values in the lower half of
-// lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
-
-#if 1
-  local GF61 *ldsOut = lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i]; }
-
-// For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  lds += (me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H;
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
-  bar();
-  for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
-#else
-  local Z61 *ldsOut = (local T *) lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i].x; ldsOut[NH*2*G_H + i * 2*G_H] = u[i].y; }
+  unreverseLine2((local T2 *) lds, (T2 *) u);
+}
 
-// For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  local Z61 *ldsIn = (local T *) lds + ((me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
-  bar();
-  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*G_H]; }
 #endif
-}
 
 #endif
diff --git a/src/tune.cpp b/src/tune.cpp
index 4d613d0f..ae376054 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -911,7 +911,7 @@ void Tune::tune() {
     }
 
     // Find best BIGLIT setting
-    if (time_FFTs) {
+    if (0 && time_FFTs) {        // Deprecated
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_biglit = 0;
@@ -954,7 +954,7 @@ void Tune::tune() {
       config.write("\n  -log 1000000\n");
     }
     if (args->workers < 2) {
-      config.write("\n# Running two workers sometimes gives better throughput.  Autoprimenet will need to create up a second worktodo file.");
+      config.write("\n# Running two workers sometimes gives better throughput.  AutoPrimenet will need to create a second worktodo file.");
       config.write("\n#  -workers 2\n");
       config.write("\n# Changing TAIL_KERNELS to 3 when running two workers may be better.");
       config.write("\n#  -use TAIL_KERNELS=3\n");

From 08036f356c6b6a0fa8c28d37880426ed649e939c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 12 Mar 2026 02:00:30 +0000
Subject: [PATCH 009/214] Testing indicates WMUL=2 should dbe the default.
 RTX4xxx and RTX5xxx GPUs benefit from L2STORE and LULOAD.  Added support for
 those options officially. Since FAST_BARRIER seems to now work on nVidia, the
 option is now tuned.

---
 src/Gpu.cpp    |  4 +++-
 src/cl/base.cl |  8 +++++++
 src/tune.cpp   | 63 +++++++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 73 insertions(+), 2 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 84cc4434..6d00c0fd 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -228,7 +228,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   // Default value for -use options that must also be parsed in C++ code
   tail_single_wide = 0, tail_single_kernel = 1;         // Default tailSquare is double-wide in one kernel
   in_place = 0;                                         // Default is not in-place
-  wmul = 1;						// Default is carryFused processes one workgroup at a time
+  wmul = 2;						// Default is carryFused processes two lines at a time
   pad_size = isAmdGpu(id) ? 256 : 0;                    // Default is 256 bytes for AMD, 0 for others
 
   // Validate -use options
@@ -263,6 +263,8 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "TABMUL_CHAIN32",
                               "TABMUL_CHAIN61",
                               "MODM31",
+                              "ENABLE_L2STORE",
+                              "ENABLE_LULOAD",
                               "WMUL"
                             });
     if (!isValid) {
diff --git a/src/cl/base.cl b/src/cl/base.cl
index f252cfe1..1765fdfe 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -189,6 +189,14 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define ZEROHACK_H 1
 #endif
 
+#if !defined(ENABLE_L2STORE)
+#define ENABLE_L2STORE 1
+#endif
+
+#if !defined(ENABLE_LULOAD)
+#define ENABLE_LULOAD 1
+#endif
+
 // Expected defines: EXP the exponent.
 // WIDTH, SMALL_HEIGHT, MIDDLE.
 
diff --git a/src/tune.cpp b/src/tune.cpp
index ae376054..76474bcb 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -343,6 +343,7 @@ void Tune::tune() {
   
   // There are some options and variants that are different based on GPU manufacturer
   bool AMDGPU = isAmdGpu(q->context->deviceId());
+  bool NVIDIAGPU = isNvidiaGpu(q->context->deviceId());
 
   bool tune_config = 1;
   bool time_FFTs = 0;
@@ -601,7 +602,7 @@ void Tune::tune() {
     }
 
     // Find best FAST_BARRIER setting
-    if (AMDGPU) {
+    if (1 /*AMDGPU*/) {			// FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_fast_barrier = 0;
@@ -910,6 +911,66 @@ void Tune::tune() {
       args->flags["ZEROHACK_H"] = to_string(best_zerohack_h);
     }
 
+    // Find best WMUL setting
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_wmul = 0;
+      u32 current_wmul = args->value("WMUL", 2);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 wmul : {1, 2, 4}) {
+        args->flags["WMUL"] = to_string(wmul);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using WMUL=%u is %6.1f\n", fft.spec().c_str(), wmul, cost);
+        if (wmul == current_wmul) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_wmul = wmul; }
+      }
+      log("Best WMUL is %u.  Default WMUL is 2.\n", best_wmul);
+      configsUpdate(current_cost, best_cost, 0.003, "WMUL", best_wmul, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["WMUL"] = to_string(best_wmul);
+    }
+
+    // Find best ENABLE_L2STORE setting
+    if (NVIDIAGPU) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_enable_l2store = 0;
+      u32 current_enable_l2store = args->value("ENABLE_L2STORE", 2);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 enable_l2store : {0, 1}) {
+        args->flags["ENABLE_L2STORE"] = to_string(enable_l2store);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using ENABLE_L2STORE=%u is %6.1f\n", fft.spec().c_str(), enable_l2store, cost);
+        if (enable_l2store == current_enable_l2store) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_enable_l2store = enable_l2store; }
+      }
+      log("Best ENABLE_L2STORE is %u.  Default ENABLE_L2STORE is 1.\n", best_enable_l2store);
+      configsUpdate(current_cost, best_cost, 0.003, "ENABLE_L2STORE", best_enable_l2store, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["ENABLE_L2STORE"] = to_string(best_enable_l2store);
+    }
+
+    // Find best ENABLE_LULOAD setting
+    if (NVIDIAGPU) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_enable_luload = 0;
+      u32 current_enable_luload = args->value("ENABLE_LULOAD", 2);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 enable_luload : {0, 1}) {
+        args->flags["ENABLE_LULOAD"] = to_string(enable_luload);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using ENABLE_LULOAD=%u is %6.1f\n", fft.spec().c_str(), enable_luload, cost);
+        if (enable_luload == current_enable_luload) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_enable_luload = enable_luload; }
+      }
+      log("Best ENABLE_LULOAD is %u.  Default ENABLE_LULOAD is 1.\n", best_enable_luload);
+      configsUpdate(current_cost, best_cost, 0.003, "ENABLE_LULOAD", best_enable_luload, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["ENABLE_LULOAD"] = to_string(best_enable_luload);
+    }
+
     // Find best BIGLIT setting
     if (0 && time_FFTs) {        // Deprecated
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};

From 1b0a8238f6761ee7dc7d97d36121b6900fdf8b9d Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 12 Mar 2026 08:01:26 +0000
Subject: [PATCH 010/214] Fixed bug in unused PTX code

---
 src/cl/math.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 5ef7d515..28401a7b 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -210,7 +210,7 @@ u128 OVERLOAD mad64(u64 a, u64 b, u64 c) {
 #if ENABLE_MAD64 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher    // Slower on TitanV and mobile 4070, don't understand why
   u64 reslo, reshi;
   __asm("mad.lo.cc.u64 %0, %2, %3, %4;\n\t"
-        "madc.hi.u64   %1, %2, %3, 0;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b), "l"(u128_lo64(c)));
+        "madc.hi.u64   %1, %2, %3, 0;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b), "l"(c));
   return make_u128(reshi, reslo);
 #elif HAS_PTX >= 200        // mad instruction requires sm_20 support or higher       // Faster on TitanV.  No difference on mobile 4070.  Much cleaner PTX code generated.
   uint2 a2 = as_uint2(a);

From fa7c9ec3036a50d184f8a5949ccfc56ad2c961af Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 13 Mar 2026 17:54:54 +0000
Subject: [PATCH 011/214] Fixed bug where WMUL default was 2 in Gpu.cpp and 1
 in carryfused.cl

---
 src/cl/carryfused.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index ba48c8bb..312923dc 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -18,7 +18,7 @@ void spin() {
 
 // Increasing WMUL to 2 will reduce carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
 #ifndef WMUL
-#define WMUL 1
+#define WMUL 2
 #endif
 
 #if AMDGPU

From b34571c36f29131d7308625074f8ad439d4de90a Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 14 Mar 2026 19:23:32 +0000
Subject: [PATCH 012/214] Change lds_bytes to a #define.  Some OpenCL compilers
 did not like a const u32 definition.

---
 src/cl/carryfused.cl | 36 ++++++++++++++----------------------
 src/cl/ffthin.cl     | 15 +++++++--------
 src/cl/tailmul.cl    | 15 +++++++--------
 src/cl/tailsquare.cl | 39 +++++++++++++++------------------------
 4 files changed, 43 insertions(+), 62 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 312923dc..ccbf931e 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -16,6 +16,9 @@ void spin() {
 #endif
 }
 
+// LDS bytes used by shufl for each line processed in fft_WIDTH
+#define LDS_BYTES  (WIDTH * SHUFL_BYTES_W)
+
 // Increasing WMUL to 2 will reduce carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
 #ifndef WMUL
 #define WMUL 2
@@ -33,8 +36,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
   // If WMUL is one, there is no shuffling of carries
   if (WMUL == 1) return;
 
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
-  const u32 lds_i64s = lds_bytes / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL workgroup
+  const u32 lds_i64s = LDS_BYTES / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL line
   local i64 *lds = (local i64 *) lds2;
 
   // Handle nasty case where we are writing 8-byte quantities but SHUFL_BYTES_W is only 4 bytes
@@ -87,8 +89,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
   // If WMUL is one, there is no shuffling of carries
   if (WMUL == 1) return;
 
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
-  const u32 lds_i32s = lds_bytes / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL workgroup
+  const u32 lds_i32s = LDS_BYTES / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL line
   local i32 *lds = (local i32 *) lds2;
   lds += (me / G_W) * lds_i32s + lowMe;                         // This WMUL workgroup's LDS area
 
@@ -109,8 +110,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
+  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
 
   T2 u[NW];
 
@@ -298,8 +298,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local F2 lds[WMUL * lds_bytes / sizeof(F2)];
+  local F2 lds[WMUL * LDS_BYTES / sizeof(F2)];
 
   F2 u[NW];
 
@@ -481,8 +480,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF31 lds[WMUL * lds_bytes / sizeof(GF31)];
+  local GF31 lds[WMUL * LDS_BYTES / sizeof(GF31)];
 
   GF31 u[NW];
 
@@ -690,8 +688,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds[WMUL * LDS_BYTES / sizeof(GF61)];
 
   GF61 u[NW];
 
@@ -906,8 +903,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
+  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
 
   T2 u[NW];
@@ -1143,8 +1139,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local F2 ldsF2[WMUL * lds_bytes / sizeof(F2)];
+  local F2 ldsF2[WMUL * LDS_BYTES / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
 
   F2 uF2[NW];
@@ -1383,8 +1378,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
 
   F2 uF2[NW];
@@ -1622,8 +1616,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
 
   GF31 u31[NW];
@@ -1870,8 +1863,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
 
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index 82b3377d..233aa92f 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -4,12 +4,14 @@
 #include "math.cl"
 #include "fftheight.cl"
 
+// LDS bytes used by shufl for each line processed in fft_HEIGHT
+#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+
 #if FFT_FP64
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NH];
   u32 g = get_group_id(0);
@@ -39,8 +41,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -74,8 +75,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -103,8 +103,7 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 3e2299f8..14682112 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -5,6 +5,9 @@
 #include "trig.cl"
 #include "fftheight.cl"
 
+// LDS bytes used by shufl for each line processed in fft_HEIGHT
+#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+
 #if FFT_FP64
 
 // Handle the final multiplication step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -49,8 +52,7 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NH], v[NH];
   T2 p[NH], q[NH];
@@ -161,8 +163,7 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   CP(F2) aF2 = (CP(F2)) a;
@@ -270,8 +271,7 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 }
 
 KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
@@ -394,8 +394,7 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 }
 
 KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index d9edc1f7..c4625378 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -4,6 +4,9 @@
 #include "trig.cl"
 #include "fftheight.cl"
 
+// LDS bytes used by shufl for each line processed in fft_HEIGHT
+#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+
 #if FFT_FP64
 
 // Handle the final squaring step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -54,8 +57,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
   T2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -89,8 +91,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NH], v[NH];
 
@@ -198,8 +199,7 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes * 2 / sizeof(T2)];
+  local T2 lds[2 * LDS_BYTES / sizeof(T2)];
 
   T2 u[NH];
 
@@ -332,8 +332,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
   F2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -363,8 +362,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -468,8 +466,7 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes * 2 / sizeof(F2)];
+  local F2 lds[2 * LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -601,8 +598,7 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -650,8 +646,7 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -750,8 +745,7 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes * 2 / sizeof(GF31)];
+  local GF31 lds[2 * LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -879,8 +873,7 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -928,8 +921,7 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -1028,8 +1020,7 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes * 2 / sizeof(GF61)];
+  local GF61 lds[2 * LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);

From 76486bdc9b5ba0ae8ce69cbfd69520f28d258d19 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 23 Mar 2026 19:07:38 +0000
Subject: [PATCH 013/214] Added load/store macros for many nvidia options. 
 Added ability to connect PRPLL's loads and stores to any of the load/store
 possibilities.

---
 src/cl/base.cl       | 412 ++++++++++++++++++++++++++++++++++++-------
 src/cl/carryfused.cl |  90 +++++-----
 src/cl/fft-middle.cl |  32 ++--
 src/cl/fftbase.cl    |  46 ++---
 src/cl/middle.cl     |  96 +++++-----
 src/cl/tailmul.cl    |  35 ++--
 src/cl/tailsquare.cl | 107 +++++------
 7 files changed, 546 insertions(+), 272 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 1765fdfe..75ccabf8 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -189,14 +189,6 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define ZEROHACK_H 1
 #endif
 
-#if !defined(ENABLE_L2STORE)
-#define ENABLE_L2STORE 1
-#endif
-
-#if !defined(ENABLE_LULOAD)
-#define ENABLE_LULOAD 1
-#endif
-
 // Expected defines: EXP the exponent.
 // WIDTH, SMALL_HEIGHT, MIDDLE.
 
@@ -267,54 +259,383 @@ ulong2 OVERLOAD U2(ulong a, ulong b) { return (ulong2) (a, b); }
 #define P(x) global x * restrict
 #define CP(x) const P(x)
 
-// Macros for non-temporal load and store.  The theory behind only non-temporal reads (option 2) is that with alternating buffers,
-// read buffers will not be needed for quite a while, but write buffers will be needed soon.
-#if NONTEMPORAL == 1 && defined(__has_builtin) && __has_builtin(__builtin_nontemporal_load) && __has_builtin(__builtin_nontemporal_store)
-#define NTLOAD(mem)        __builtin_nontemporal_load(&(mem))
-#define NTSTORE(mem,val)   __builtin_nontemporal_store(val, &(mem))
-#elif NONTEMPORAL == 2 && defined(__has_builtin) && __has_builtin(__builtin_nontemporal_load)
-#define NTLOAD(mem)        __builtin_nontemporal_load(&(mem))
-#define NTSTORE(mem,val)   (mem) = val
+#define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
+
+
+// For reasons unknown, loading trig values into nVidia's constant cache has terrible performance
+#if AMDGPU
+typedef constant const T2* Trig;
+typedef constant const T* TrigSingle;
+typedef constant const F2* TrigFP32;
+typedef constant const GF31* TrigGF31;
+typedef constant const GF61* TrigGF61;
+#else
+typedef global const T2* Trig;
+typedef global const T* TrigSingle;
+typedef global const F2* TrigFP32;
+typedef global const GF31* TrigGF31;
+typedef global const GF61* TrigGF61;
+#endif
+// However, caching weights in nVidia's constant cache improves performance.
+// Even better is to not pollute the constant cache with weights that are used only once.
+// This requires two typedefs depending on how we want to use the BigTab pointer.
+// For AMD we can declare BigTab as constant or global - it doesn't really matter.
+typedef constant const double2* ConstBigTab;
+typedef constant const float2* ConstBigTabFP32;
+#if AMDGPU
+typedef constant const double2* BigTab;
+typedef constant const float2* BigTabFP32;
+#else
+typedef global const double2* BigTab;
+typedef global const float2* BigTabFP32;
+#endif
+
+//
+// nVidia GPUs have lots of different caching options for loads and stores.
+// AMD GPUs have have far fewer options for loads and stores.
+// These routines let us try the different options.
+//
+
+// Basic load and store.  Presumably stored in all caches using a standard LRU algorithm.
+
+#define LOAD(mem)        *(mem)
+#define STORE(mem,val)   *(mem) = val
+
+// Non-temporal load and store.
+
+#if defined(__has_builtin) && __has_builtin(__builtin_nontemporal_load)
+#define NTLOAD(mem)        __builtin_nontemporal_load(mem)
+#else
+#define NTLOAD           LOAD
+#endif
+
+#if defined(__has_builtin) && __has_builtin(__builtin_nontemporal_store)
+#define NTSTORE(mem,val)   __builtin_nontemporal_store(val, mem)
+#else
+#define NTSTORE          STORE
+#endif
+
+// Routines for loading data from memory into the L2 cache but not the L1 cache.
+
+#if HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+T2 OVERLOAD L2LOAD(CP(T2) mem) {
+  T2 retval;
+  __asm("ld.global.cg.v2.f64  {%0, %1}, [%2];" : "=d"(retval.x), "=d"(retval.y) : "l"(mem));
+  return retval;
+}
+T OVERLOAD L2LOAD(TrigSingle mem) {
+  T retval;
+  __asm("ld.global.cg.f64  %0, [%1];" : "=d"(retval) : "l"(mem));
+  return retval;
+}
+F2 OVERLOAD L2LOAD(CP(F2) mem) {
+  F2 retval;
+  __asm("ld.global.cg.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
+  return retval;
+}
+i64 OVERLOAD L2LOAD(i64 *mem) {
+  i64 retval;
+  __asm("ld.global.cg.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
+  return retval;
+}
+GF61 OVERLOAD L2LOAD(TrigGF61 mem) {
+  GF61 retval;
+  __asm("ld.global.cg.v2.b64  {%0, %1}, [%2];" : "=l"(retval.x), "=l"(retval.y) : "l"(mem));
+  return retval;
+}
+i32 OVERLOAD L2LOAD(i32 *mem) {
+  i32 retval;
+  __asm("ld.global.cg.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
+  return retval;
+}
+GF31 OVERLOAD L2LOAD(TrigGF31 mem) {
+  GF31 retval;
+  __asm("ld.global.cg.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  return retval;
+}
 #else
-#define NTLOAD(mem)        (mem)
-#define NTSTORE(mem,val)   (mem) = val
+#define L2LOAD     LOAD
 #endif
 
 // Routines for storing to L2 cache bypassing L1 cache.
+
+#if HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
+void OVERLOAD L2STORE(P(T2) mem, T2 val) {
+  __asm("st.global.cg.v2.f64  [%0], {%1, %2};" : : "l"(mem), "d"(val.x), "d"(val.y));
+}
+void OVERLOAD L2STORE(P(F2) mem, F2 val) {
+  __asm("st.global.cg.v2.f32  [%0], {%1, %2};" : : "l"(mem), "f"(val.x), "f"(val.y));
+}
 void OVERLOAD L2STORE(i64 *mem, i64 val) {
-#if ENABLE_L2STORE && HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
   __asm("st.global.cg.b64  [%0], %1;" : : "l"(mem), "l"(val));
-#else
-  *mem = val;
-#endif
 }
 void OVERLOAD L2STORE(i32 *mem, i32 val) {
-#if ENABLE_L2STORE && HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
   __asm("st.global.cg.b32  [%0], %1;" : : "l"(mem), "r"(val));
+}
 #else
-  *mem = val;
+#define L2STORE    STORE
 #endif
+
+// Routines for loading data from memory into the L1 and L2 caches, but cache line is marked evict first.
+
+#if HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+T2 OVERLOAD EFLOAD(CP(T2) mem) {
+  T2 retval;
+  __asm("ld.global.cs.v2.f64  {%0, %1}, [%2];" : "=d"(retval.x), "=d"(retval.y) : "l"(mem));
+  return retval;
+}
+T OVERLOAD EFLOAD(TrigSingle mem) {
+  T retval;
+  __asm("ld.global.cs.f64  %0, [%1];" : "=d"(retval) : "l"(mem));
+  return retval;
+}
+F2 OVERLOAD EFLOAD(CP(F2) mem) {
+  F2 retval;
+  __asm("ld.global.cs.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
+  return retval;
+}
+i64 OVERLOAD EFLOAD(i64 *mem) {
+  i64 retval;
+  __asm("ld.global.cs.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
+  return retval;
+}
+GF61 OVERLOAD EFLOAD(TrigGF61 mem) {
+  GF61 retval;
+  __asm("ld.global.cs.v2.b64  {%0, %1}, [%2];" : "=l"(retval.x), "=l"(retval.y) : "l"(mem));
+  return retval;
+}
+i32 OVERLOAD EFLOAD(i32 *mem) {
+  i32 retval;
+  __asm("ld.global.cs.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
+  return retval;
+}
+GF31 OVERLOAD EFLOAD(TrigGF31 mem) {
+  GF31 retval;
+  __asm("ld.global.cs.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  return retval;
 }
+#else
+#define EFLOAD    LOAD
+#endif
+
+// Routines for storing to L1 and L2 caches with cache line marked evict first.
+
+#if HAS_PTX >= 200        // Cache hints requires sm_20 support or higher
+void OVERLOAD EFSTORE(P(T2) mem, T2 val) {
+  __asm("st.global.cs.v2.f64  [%0], {%1, %2};" : : "l"(mem), "d"(val.x), "d"(val.y));
+}
+void OVERLOAD EFSTORE(P(F2) mem, F2 val) {
+  __asm("st.global.cs.v2.f32  [%0], {%1, %2};" : : "l"(mem), "f"(val.x), "f"(val.y));
+}
+void OVERLOAD EFSTORE(i64 *mem, i64 val) {
+  __asm("st.global.cs.b64  [%0], %1;" : : "l"(mem), "l"(val));
+}
+void OVERLOAD EFSTORE(i32 *mem, i32 val) {
+  __asm("st.global.cs.b32  [%0], %1;" : : "l"(mem), "r"(val));
+}
+#else
+#define EFSTORE   STORE
+#endif
 
 // Routines for loading a value and marking it for "last use".
+
+#if HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+T2 OVERLOAD LULOAD(Trig mem) {
+  T2 retval;
+  __asm("ld.global.lu.v2.f64  {%0, %1}, [%2];" : "=d"(retval.x), "=d"(retval.y) : "l"(mem));
+  return retval;
+}
+T OVERLOAD LULOAD(TrigSingle mem) {
+  T retval;
+  __asm("ld.global.lu.f64  %0, [%1];" : "=d"(retval) : "l"(mem));
+  return retval;
+}
+F2 OVERLOAD LULOAD(TrigFP32 mem) {
+  F2 retval;
+  __asm("ld.global.lu.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
+  return retval;
+}
 i64 OVERLOAD LULOAD(i64 *mem) {
-#if ENABLE_LULOAD && HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
   i64 retval;
   __asm("ld.global.lu.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
   return retval;
-#else
-  return *mem;
-#endif
+}
+GF61 OVERLOAD LULOAD(TrigGF61 mem) {
+  GF61 retval;
+  __asm("ld.global.lu.v2.b64  {%0, %1}, [%2];" : "=l"(retval.x), "=l"(retval.y) : "l"(mem));
+  return retval;
 }
 i32 OVERLOAD LULOAD(i32 *mem) {
-#if ENABLE_LULOAD && HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
   i32 retval;
   __asm("ld.global.lu.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
   return retval;
+}
+GF31 OVERLOAD LULOAD(TrigGF31 mem) {
+  GF31 retval;
+  __asm("ld.global.lu.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  return retval;
+}
 #else
-  return *mem;
+#define LULOAD    LOAD
 #endif
+
+// Routines for loading a read-only and placing it in the non-coherent texture cache.
+
+#if HAS_PTX >= 500         // Texture cache requires sm_50 support or higher
+T2 OVERLOAD NCLOAD(Trig mem) {
+  T2 retval;
+  __asm("ld.global.nc.v2.f64  {%0, %1}, [%2];" : "=d"(retval.x), "=d"(retval.y) : "l"(mem));
+  return retval;
 }
+T OVERLOAD NCLOAD(TrigSingle mem) {
+  T retval;
+  __asm("ld.global.nc.f64  %0, [%1];" : "=d"(retval) : "l"(mem));
+  return retval;
+}
+F2 OVERLOAD NCLOAD(TrigFP32 mem) {
+  F2 retval;
+  __asm("ld.global.nc.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
+  return retval;
+}
+i64 OVERLOAD NCLOAD(i64 *mem) {
+  i64 retval;
+  __asm("ld.global.nc.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
+  return retval;
+}
+GF61 OVERLOAD NCLOAD(TrigGF61 mem) {
+  GF61 retval;
+  __asm("ld.global.nc.v2.b64  {%0, %1}, [%2];" : "=l"(retval.x), "=l"(retval.y) : "l"(mem));
+  return retval;
+}
+i32 OVERLOAD NCLOAD(i32 *mem) {
+  i32 retval;
+  __asm("ld.global.nc.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
+  return retval;
+}
+GF31 OVERLOAD NCLOAD(TrigGF31 mem) {
+  GF31 retval;
+  __asm("ld.global.lu.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  return retval;
+}
+#else
+#define NCLOAD    LOAD
+#endif
+
+//
+//  These macros map various types of data accesses to one of the load/store routines above
+//
+
+// Routines for loading/storing FFT data.  Lots of data, kernels read it once, write it once.  If possible, data should not be written to L1 cache.
+// If L2 cache is "small", we should look for ways to prioritize keeping data that is re-used in the L2 cache.
+
+#define FFTLOAD_TYPE     LOADS % 10
+#define CSLOAD_TYPE      (LOADS / 10) % 10
+#define TFLOAD_TYPE      (LOADS / 100) % 10
+#define TSLOAD_TYPE      (LOADS / 1000) % 10
+#define TOLOAD_TYPE      (LOADS / 10000) % 10
+
+#define FFTSTORE_TYPE     STORES % 10
+#define CSSTORE_TYPE      (STORES / 10) % 10
+
+#if FFTLOAD_TYPE == 1
+#define FFTLOAD    NTLOAD
+#elif FFTLOAD_TYPE == 2
+#define FFTLOAD    L2LOAD
+#elif FFTLOAD_TYPE == 3
+#define FFTLOAD    EFLOAD
+#elif FFTLOAD_TYPE == 4
+#define FFTLOAD    LULOAD
+#else
+#define FFTLOAD    LOAD
+#endif
+
+#if FFTSTORE_TYPE == 1
+#define FFTSTORE   NTSTORE
+#elif FFTSTORE_TYPE == 2
+#define FFTSTORE   L2STORE
+#elif FFTSTORE_TYPE == 3
+#define FFTSTORE   EFSTORE
+#else
+#define FFTSTORE   STORE
+#endif
+
+// Routines for loading/storing carryShuttle data.  CarryFused writes it once, and reads it once.  The data is never used again.
+// If possible, data should not be written to L1 cache and not written to memory after it is read.
+
+#if CSLOAD_TYPE == 1
+#define CSLOAD    NTLOAD
+#elif CSLOAD_TYPE == 2
+#define CSLOAD    L2LOAD
+#elif CSLOAD_TYPE == 3
+#define CSLOAD    EFLOAD
+#elif CSLOAD_TYPE == 4
+#define CSLOAD    LULOAD
+#else
+#define CSLOAD    LOAD
+#endif
+
+#if CSSTORE_TYPE == 1
+#define CSSTORE   NTSTORE
+#elif CSSTORE_TYPE == 2
+#define CSSTORE   L2STORE
+#elif CSSTORE_TYPE == 3
+#define CSSTORE   EFSTORE
+#else
+#define CSSTORE   STORE
+#endif
+
+// Routines for loading trig data that is frequently reused.  If possible, data should saved in L1 and L2 caches and perhaps marked evict last.
+// TF stands for "Trig Frequently reused".  It is highly unlikely that any option other than the default LOAD makes sense.
+
+#if TFLOAD_TYPE == 1
+#define TFLOAD    NTLOAD
+#elif TFLOAD_TYPE == 2
+#define TFLOAD    L2LOAD
+#elif TFLOAD_TYPE == 3
+#define TFLOAD    EFLOAD
+#elif TFLOAD_TYPE == 4
+#define TFLOAD    LULOAD
+#elif TFLOAD_TYPE == 5
+#define TFLOAD    NCLOAD
+#else
+#define TFLOAD    LOAD
+#endif
+
+// Routines for loading trig data that is used once but is smaller than a cache line.  The rest of the cache line will be needed soon.
+// If possible, data should saved in L1(?) and L2 caches and perhaps marked evict first.
+// TS stands for "Trig Several reuses".
+
+#if TSLOAD_TYPE == 1
+#define TSLOAD    NTLOAD
+#elif TSLOAD_TYPE == 2
+#define TSLOAD    L2LOAD
+#elif TSLOAD_TYPE == 3
+#define TSLOAD    EFLOAD
+#elif TSLOAD_TYPE == 4
+#define TSLOAD    LULOAD
+#elif TSLOAD_TYPE == 5
+#define TSLOAD    NCLOAD
+#else
+#define TSLOAD    LOAD
+#endif
+
+// Routines for loading trig data that is used once and is a cache line or larger.
+// If possible, data should saved in L2 caches if the L2 cache is very large.
+// TO stands for "Trig used Once".
+
+#if TOLOAD_TYPE == 1
+#define TOLOAD    NTLOAD
+#elif TOLOAD_TYPE == 2
+#define TOLOAD    L2LOAD
+#elif TOLOAD_TYPE == 3
+#define TOLOAD    EFLOAD
+#elif TOLOAD_TYPE == 4
+#define TOLOAD    LULOAD
+#elif TOLOAD_TYPE == 5
+#define TOLOAD    NCLOAD
+#else
+#define TOLOAD    LOAD
+#endif
 
 // Prefetch macros.  Unused at present, I tried using them in fftMiddleInGF61 on a 5080 with no benefit.
 void PREFETCHL1(const __global void *addr) {
@@ -328,36 +649,6 @@ void PREFETCHL2(const __global void *addr) {
 #endif
 }
 
-// For reasons unknown, loading trig values into nVidia's constant cache has terrible performance
-#if AMDGPU
-typedef constant const T2* Trig;
-typedef constant const T* TrigSingle;
-typedef constant const F2* TrigFP32;
-typedef constant const GF31* TrigGF31;
-typedef constant const GF61* TrigGF61;
-#else
-typedef global const T2* Trig;
-typedef global const T* TrigSingle;
-typedef global const F2* TrigFP32;
-typedef global const GF31* TrigGF31;
-typedef global const GF61* TrigGF61;
-#endif
-// However, caching weights in nVidia's constant cache improves performance.
-// Even better is to not pollute the constant cache with weights that are used only once.
-// This requires two typedefs depending on how we want to use the BigTab pointer.
-// For AMD we can declare BigTab as constant or global - it doesn't really matter.
-typedef constant const double2* ConstBigTab;
-typedef constant const float2* ConstBigTabFP32;
-#if AMDGPU
-typedef constant const double2* BigTab;
-typedef constant const float2* BigTabFP32;
-#else
-typedef global const double2* BigTab;
-typedef global const float2* BigTabFP32;
-#endif
-
-#define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
-
 #if FFT_FP64
 void OVERLOAD read(u32 WG, u32 N, T2 *u, const global T2 *in, u32 base) {
   in += base + (u32) get_local_id(0);
@@ -441,3 +732,4 @@ void OVERLOAD bar(const u32 WG) {
 // A half-barrier is only needed when half-a-workgroup needs a barrier.
 // This is used e.g. by the double-wide tailSquare, where LDS is split between the halves.
 void halfBar() { if (get_enqueued_local_size(0) / 2 > WAVEFRONT) { bar(); } }
+
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 312923dc..7e64f179 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -16,6 +16,9 @@ void spin() {
 #endif
 }
 
+// LDS bytes used by shufl for each line processed in fft_WIDTH
+#define LDS_BYTES  (WIDTH * SHUFL_BYTES_W)
+
 // Increasing WMUL to 2 will reduce carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
 #ifndef WMUL
 #define WMUL 2
@@ -33,8 +36,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
   // If WMUL is one, there is no shuffling of carries
   if (WMUL == 1) return;
 
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
-  const u32 lds_i64s = lds_bytes / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL workgroup
+  const u32 lds_i64s = LDS_BYTES / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL line
   local i64 *lds = (local i64 *) lds2;
 
   // Handle nasty case where we are writing 8-byte quantities but SHUFL_BYTES_W is only 4 bytes
@@ -87,8 +89,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
   // If WMUL is one, there is no shuffling of carries
   if (WMUL == 1) return;
 
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes used by shufl for each WMUL workgroup
-  const u32 lds_i32s = lds_bytes / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL workgroup
+  const u32 lds_i32s = LDS_BYTES / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL line
   local i32 *lds = (local i32 *) lds2;
   lds += (me / G_W) * lds_i32s + lowMe;                         // This WMUL workgroup's LDS area
 
@@ -109,8 +110,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
+  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
 
   T2 u[NW];
 
@@ -192,7 +192,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -254,7 +254,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -264,7 +264,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -298,8 +298,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local F2 lds[WMUL * lds_bytes / sizeof(F2)];
+  local F2 lds[WMUL * LDS_BYTES / sizeof(F2)];
 
   F2 u[NW];
 
@@ -376,7 +375,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -438,7 +437,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -448,7 +447,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -481,8 +480,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF31 lds[WMUL * lds_bytes / sizeof(GF31)];
+  local GF31 lds[WMUL * LDS_BYTES / sizeof(GF31)];
 
   GF31 u[NW];
 
@@ -585,7 +583,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -638,7 +636,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -648,7 +646,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -690,8 +688,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds[WMUL * LDS_BYTES / sizeof(GF61)];
 
   GF61 u[NW];
 
@@ -799,7 +796,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -853,7 +850,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -863,7 +860,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -906,8 +903,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local T2 lds[WMUL * lds_bytes / sizeof(T2)];
+  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
 
   T2 u[NW];
@@ -1024,7 +1020,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
   // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -1086,7 +1082,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -1096,7 +1092,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -1143,8 +1139,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local F2 ldsF2[WMUL * lds_bytes / sizeof(F2)];
+  local F2 ldsF2[WMUL * LDS_BYTES / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
 
   F2 uF2[NW];
@@ -1264,7 +1259,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -1326,7 +1321,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -1336,7 +1331,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -1383,8 +1378,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
 
   F2 uF2[NW];
@@ -1504,7 +1498,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -1566,7 +1560,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -1576,7 +1570,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -1622,8 +1616,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
 
   GF31 u31[NW];
@@ -1753,7 +1746,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -1807,7 +1800,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -1817,7 +1810,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
@@ -1870,8 +1863,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  const u32 lds_bytes = WIDTH * SHUFL_BYTES_W;                  // LDS bytes needed for each WMUL workgroup
-  local GF61 lds61[WMUL * lds_bytes / sizeof(GF61)];
+  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
 
@@ -2015,7 +2007,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
-    for (i32 i = 0; i < NW; ++i) { L2STORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
+    for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
 #if OLD_FENCE
@@ -2077,7 +2069,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
     if (gr < H / WMUL) {
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess(me, i)]);
       }
     } else {
 
@@ -2087,7 +2079,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
 
       for (i32 i = 0; i < NW; ++i) {
-        carry[i] = LULOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
+        carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
 
       if (me == 0) {
diff --git a/src/cl/fft-middle.cl b/src/cl/fft-middle.cl
index 31db8bfc..03203a89 100644
--- a/src/cl/fft-middle.cl
+++ b/src/cl/fft-middle.cl
@@ -100,7 +100,7 @@ void OVERLOAD middleMul(T2 *u, u32 s, Trig trig) {
   if (MIDDLE == 1) return;
 
   if (WIDTH == SMALL_HEIGHT) trig += SMALL_HEIGHT;     // In this case we can share the MiddleMul2 trig table.  Skip over the MiddleMul trig table.
-  T2 w = trig[s];           // s / BIG_HEIGHT
+  T2 w = TFLOAD(&trig[s]);           // s / BIG_HEIGHT
 
   if (MIDDLE < SHARP_MIDDLE) {
     WADD(1, w);
@@ -191,8 +191,8 @@ void OVERLOAD middleMul2(T2 *u, u32 x, u32 y, double factor, Trig trig) {
     return;
   }
 
-  trig += SMALL_HEIGHT;     // Skip over the MiddleMul trig table
-  T2 w = trig[x];           // x / (MIDDLE * WIDTH)
+  trig += SMALL_HEIGHT;          // Skip over the MiddleMul trig table
+  T2 w = TFLOAD(&trig[x]);       // x / (MIDDLE * WIDTH)
 
   if (MIDDLE < SHARP_MIDDLE) {
     T2 base = slowTrig_N(x * y + x * SMALL_HEIGHT, ND / MIDDLE * 2) * factor;
@@ -208,7 +208,7 @@ void OVERLOAD middleMul2(T2 *u, u32 x, u32 y, double factor, Trig trig) {
 
     Trig trig2 = trig + WIDTH;          // Skip over the fist MiddleMul2 trig table
     u32 desired_root = x * y;
-    T2 base = cmulFancy(trig2[desired_root % SMALL_HEIGHT], trig[desired_root / SMALL_HEIGHT]) * factor;   //Optimization to do: put multiply by factor in trig2 table
+    T2 base = cmulFancy(TFLOAD(&trig2[desired_root % SMALL_HEIGHT]), TFLOAD(&trig[desired_root / SMALL_HEIGHT])) * factor;   //Optimization to do: put multiply by factor in trig2 table
 
     WADD(0, base);
     for (u32 k = 1; k < MIDDLE; ++k) {
@@ -396,8 +396,8 @@ void OVERLOAD middleMul(F2 *u, u32 s, TrigFP32 trig) {
   if (MIDDLE == 1) return;
 
   if (WIDTH == SMALL_HEIGHT) trig += SMALL_HEIGHT;     // In this case we can share the MiddleMul2 trig table.  Skip over the MiddleMul trig table.
-  F2 w = trig[s];           // s / BIG_HEIGHT
-  
+  F2 w = TFLOAD(&trig[s]);           // s / BIG_HEIGHT
+
   if (MIDDLE < SHARP_MIDDLE) {
     WADD(1, w);
 #if MM_CHAIN == 0
@@ -488,7 +488,7 @@ void OVERLOAD middleMul2(F2 *u, u32 x, u32 y, float factor, TrigFP32 trig) {
   }
 
   trig += SMALL_HEIGHT;     // Skip over the MiddleMul trig table
-  F2 w = trig[x];           // x / (MIDDLE * WIDTH)
+  F2 w = TFLOAD(&trig[x]);           // x / (MIDDLE * WIDTH)
 
   if (MIDDLE < SHARP_MIDDLE) {
     F2 base = slowTrig_N(x * y + x * SMALL_HEIGHT, ND / MIDDLE * 2) * factor;
@@ -504,7 +504,7 @@ void OVERLOAD middleMul2(F2 *u, u32 x, u32 y, float factor, TrigFP32 trig) {
 
     TrigFP32 trig2 = trig + WIDTH;          // Skip over the fist MiddleMul2 trig table
     u32 desired_root = x * y;
-    F2 base = cmulFancy(trig2[desired_root % SMALL_HEIGHT], trig[desired_root / SMALL_HEIGHT]) * factor;   //Optimization to do: put multiply by factor in trig2 table
+    F2 base = cmulFancy(TFLOAD(&trig2[desired_root % SMALL_HEIGHT]), TFLOAD(&trig[desired_root / SMALL_HEIGHT])) * factor;   //Optimization to do: put multiply by factor in trig2 table
 
     WADD(0, base);
     for (u32 k = 1; k < MIDDLE; ++k) {
@@ -668,13 +668,13 @@ void OVERLOAD middleMul(GF31 *u, u32 s, TrigGF31 trig) {
 #if !MIDDLE_CHAIN           // Read all trig values from memory
 
   for (u32 k = 1; k < MIDDLE; ++k) {
-    WADD(k, trig[s]);
+    WADD(k, TFLOAD(&trig[s]));
     s += SMALL_HEIGHT;
   }
 
 #else
 
-  GF31 w = trig[s];         // s / BIG_HEIGHT
+  GF31 w = TFLOAD(&trig[s]);         // s / BIG_HEIGHT
   WADD(1, w);
   if (MIDDLE == 2) return;
 
@@ -705,9 +705,9 @@ void OVERLOAD middleMul2(GF31 *u, u32 x, u32 y, TrigGF31 trig) {
   // The first trig table can be shared with MiddleMul trig table if WIDTH = HEIGHT.
   if (WIDTH == SMALL_HEIGHT) trig1 = trig;
 
-  GF31 w = trig1[x];         // x / (MIDDLE * WIDTH)
+  GF31 w = TFLOAD(&trig1[x]);         // x / (MIDDLE * WIDTH)
   u32 desired_root = x * y;
-  GF31 base = cmul(trig2[desired_root % SMALL_HEIGHT], trig1[desired_root / SMALL_HEIGHT]);
+  GF31 base = cmul(TFLOAD(&trig2[desired_root % SMALL_HEIGHT]), TFLOAD(&trig1[desired_root / SMALL_HEIGHT]));
 
   WADD(0, base);
   for (u32 k = 1; k < MIDDLE; ++k) {
@@ -788,13 +788,13 @@ void OVERLOAD middleMul(GF61 *u, u32 s, TrigGF61 trig) {
 #if !MIDDLE_CHAIN           // Read all trig values from memory
 
   for (u32 k = 1; k < MIDDLE; ++k) {
-    WADD(k, trig[s]);
+    WADD(k, TFLOAD(&trig[s]));
     s += SMALL_HEIGHT;
   }
 
 #else
 
-  GF61 w = trig[s];         // s / BIG_HEIGHT
+  GF61 w = TFLOAD(&trig[s]);         // s / BIG_HEIGHT
   WADD(1, w);
   if (MIDDLE == 2) return;
 
@@ -825,9 +825,9 @@ void OVERLOAD middleMul2(GF61 *u, u32 x, u32 y, TrigGF61 trig) {
   // The first trig table can be shared with MiddleMul trig table if WIDTH = HEIGHT.
   if (WIDTH == SMALL_HEIGHT) trig1 = trig;
 
-  GF61 w = trig1[x];                      // x / (MIDDLE * WIDTH)
+  GF61 w = TFLOAD(&trig1[x]);                      // x / (MIDDLE * WIDTH)
   u32 desired_root = x * y;
-  GF61 base = cmul(trig2[desired_root % SMALL_HEIGHT], trig1[desired_root / SMALL_HEIGHT]);
+  GF61 base = cmul(TFLOAD(&trig2[desired_root % SMALL_HEIGHT]), TFLOAD(&trig1[desired_root / SMALL_HEIGHT]));
 
   WADD(0, base);
   for (u32 k = 1; k < MIDDLE; ++k) {
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 9d2fde10..88cd3380 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -246,7 +246,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
 // Apparently, chained Fancy muls at these short n=4 and n=8 lengths are very accurate.
 
   if (TABMUL_CHAIN) {
-    T2 w = trig[p];
+    T2 w = TFLOAD(&trig[p]);
     chainMul(n, u, w, 0);
     return;
   }
@@ -255,7 +255,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
 // Radeon VII loves this case, it is faster than the chainmul case.  nVidia Titan V hates this case.
 
   if (!TABMUL_CHAIN) {
-    T2 w = trig[p];
+    T2 w = TFLOAD(&trig[p]);
 
     if (n >= 8) {
       u[1] = cmulFancy(u[1], w);
@@ -264,7 +264,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
     }
 
     for (u32 i = 2; i < n; ++i) {
-      u[i] = cmul(u[i], trig[(i-1)*WG + p]);
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
@@ -292,11 +292,11 @@ void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32
 
   // Read 3 lines of sine/cosine values for the first fft4.  Read two of the lines as a pair as AMD likes T2 global memory reads
   Trig trig2 = (Trig) trig1;
-  T2 sine_over_cosines = trig2[me];
+  T2 sine_over_cosines = TFLOAD(&trig2[me]);
   preloads[0] = sine_over_cosines.x;
   preloads[1] = sine_over_cosines.y;
   // Read 3rd line
-  preloads[2] = trig1[2*WG + me];
+  preloads[2] = TFLOAD(&trig1[2*WG + me]);
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
@@ -326,7 +326,7 @@ void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
     // Read pairs of lines to make AMD happy with T2 global memory loads
     for (u32 i = 0; i < 4; i += 2) {
       Trig trig2 = (Trig) (trig1 + i*WG);
-      T2 cosines = trig2[me];
+      T2 cosines = TFLOAD(&trig2[me]);
       preloads[i] = cosines.x;
       preloads[i+1] = cosines.y;
     }
@@ -357,8 +357,8 @@ void finish_tabMul4_fft4(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
 
   // Preload one line of sine/cosines and one line of cosines for later tabMuls.  We'll later broadcast these values as needed using LDS.
   if (f == 1) {
-    preloads[4] = trig1[3*WG + me];             // Sine/cosines for later tabMuls
-    preloads[5] = trig1[4*WG + 4*WG + me];      // Cosines for later tabMuls
+    preloads[4] = TFLOAD(&trig1[3*WG + me]);             // Sine/cosines for later tabMuls
+    preloads[5] = TFLOAD(&trig1[4*WG + 4*WG + me]);      // Cosines for later tabMuls
   }
 
   // Do the last level of fft4 applying cosine1
@@ -380,12 +380,12 @@ void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32
   // Read 7 lines of sine/cosine values for the first fft8.  Read six of the lines as pairs as AMD likes T2 global memory reads
   for (u32 i = 1; i < 7; i += 2) {
     Trig trig2 = (Trig) (trig1 + (i-1)*WG);
-    T2 sine_over_cosines = trig2[me];
+    T2 sine_over_cosines = TFLOAD(&trig2[me]);
     preloads[i-1] = sine_over_cosines.x;
     preloads[i] = sine_over_cosines.y;
   }
   // Read 7th line
-  preloads[6] = trig1[6*WG + me];
+  preloads[6] = TFLOAD(&trig1[6*WG + me]);
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
@@ -415,7 +415,7 @@ void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
     // Read pairs of lines to make AMD happy with T2 global memory loads
     for (u32 i = 0; i < 8; i += 2) {
       Trig trig2 = (Trig) (trig1 + i*WG);
-      T2 cosines = trig2[me];
+      T2 cosines = TFLOAD(&trig2[me]);
       preloads[i] = cosines.x;
       preloads[i+1] = cosines.y;
     }
@@ -455,8 +455,8 @@ void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
 
     // Preload one line of sine/cosines and one line of cosines for second tabMul.  We'll later broadcast these values as needed using LDS.
     if (f == 1) {
-      preloads[8] = trig1[7*WG + me];             // Sine/cosines for second tabMul
-      preloads[9] = trig1[8*WG + 8*WG + me];      // Cosines for second tabMul
+      preloads[8] = TFLOAD(&trig1[7*WG + me]);             // Sine/cosines for second tabMul
+      preloads[9] = TFLOAD(&trig1[8*WG + 8*WG + me]);      // Cosines for second tabMul
     }
 
     // Do the fft4Core and fft4CoreSpecial applying cosine2, cosine3/cosine1
@@ -486,8 +486,8 @@ void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
 
     // Preload one line of sine/cosines and one line of cosines for second tabMul.  We'll later broadcast these values as needed using LDS.
     if (f == 1) {
-      preloads[8] = trig1[7*WG + me];             // Sine/cosines for second tabMul
-      preloads[9] = trig1[8*WG + 8*WG + me];      // Cosines for second tabMul
+      preloads[8] = TFLOAD(&trig1[7*WG + me]);             // Sine/cosines for second tabMul
+      preloads[9] = TFLOAD(&trig1[8*WG + 8*WG + me]);      // Cosines for second tabMul
     }
 
     // Do the fft4Core and fft4CoreSpecial applying cosine2, cosine3
@@ -562,7 +562,7 @@ void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN32) {
-    chainMul(n, u, trig[p], 0);
+    chainMul(n, u, TFLOAD(&trig[p]), 0);
     return;
   }
 
@@ -570,12 +570,12 @@ void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
 
   if (!TABMUL_CHAIN32) {
     if (n >= 8) {
-      u[1] = cmulFancy(u[1], trig[p]);
+      u[1] = cmulFancy(u[1], TFLOAD(&trig[p]));
     } else {
-      u[1] = cmul(u[1], trig[p]);
+      u[1] = cmul(u[1], TFLOAD(&trig[p]));
     }
     for (u32 i = 2; i < n; ++i) {
-      u[i] = cmul(u[i], trig[(i-1)*WG + p]);
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
@@ -630,7 +630,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN31) {
-    chainMul(n, u, trig[p]);
+    chainMul(n, u, TFLOAD(&trig[p]));
     return;
   }
 
@@ -638,7 +638,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
 
   if (!TABMUL_CHAIN31) {
     for (u32 i = 1; i < n; ++i) {
-      u[i] = cmul(u[i], trig[(i-1)*WG + p]);
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
@@ -693,7 +693,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN61) {
-    chainMul(n, u, trig[p], 0);
+    chainMul(n, u, TFLOAD(&trig[p]), 0);
     return;
   }
 
@@ -701,7 +701,7 @@ void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
 
   if (!TABMUL_CHAIN61) {
     for (u32 i = 1; i < n; ++i) {
-      u[i] = cmul(u[i], trig[(i-1)*WG + p]);
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 36fcac56..41809b48 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -58,10 +58,10 @@ void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
-  for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
+  for (u32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W], u[i]); }
 #else
   out += line * WIDTH + me;
-  for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
+  for (u32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W], u[i]); }
 #endif
 }
 
@@ -71,10 +71,10 @@ void OVERLOAD readMiddleInLine(T2 *u, CP(T2) in, u32 y, u32 x) {
   // Rather than having u[i] also increment by one, we choose a larger pad increment
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   in += y * WIDTH + y * PAD_SIZE + (y / SMALL_HEIGHT) * BIG_PAD_SIZE + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * (SMALL_HEIGHT * (WIDTH + PAD_SIZE) + BIG_PAD_SIZE)]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * (SMALL_HEIGHT * (WIDTH + PAD_SIZE) + BIG_PAD_SIZE)]); }
 #else
   in += y * WIDTH + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SMALL_HEIGHT * WIDTH]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SMALL_HEIGHT * WIDTH]); }
 #endif
 }
 
@@ -108,7 +108,7 @@ void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
                                                         //              = SMALL_HEIGHT / (IN_WG / IN_SIZEX) * (MIDDLE * IN_WG + PAD_SIZE)
                                                         //              = SMALL_HEIGHT * MIDDLE * IN_SIZEX + SMALL_HEIGHT / SIZEY * PAD_SIZE
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * IN_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * IN_WG], u[i]); }
 
 #else
 
@@ -118,7 +118,7 @@ void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
                                                         //                       = MIDDLE * SMALL_HEIGHT / (IN_WG / IN_SIZEX) * IN_WG
                                                         //                       = MIDDLE * SMALL_HEIGHT * IN_SIZEX
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * IN_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * IN_WG], u[i]); }
 
 #endif
 }
@@ -151,7 +151,7 @@ void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   for (i32 i = 0; i < NH; ++i) {
 //    u32 fftMiddleIn_y = i * G_H + me;                         // The fftMiddleIn y value
 //    u32 chunk_y = fftMiddleIn_y / SIZEY;                      // The fftMiddleIn chunk_y value
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * IN_WG + PAD_SIZE)]);   // Adjust in pointer the same way writeMiddleInLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * IN_WG + PAD_SIZE)]);   // Adjust in pointer the same way writeMiddleInLine did
     chunk_y += chunk_y_incr;
   }
 
@@ -177,7 +177,7 @@ void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   for (i32 i = 0; i < NH; ++i) {
     u32 fftMiddleIn_y = i * G_H + me;                           // The fftMiddleIn y value
     u32 chunk_y = fftMiddleIn_y / SIZEY;                        // The fftMiddleIn chunk_y value
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * IN_WG)]);              // Adjust in pointer the same way writeMiddleInLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * IN_WG)]);              // Adjust in pointer the same way writeMiddleInLine did
     chunk_y += chunk_y_incr;
   }
 
@@ -208,10 +208,10 @@ void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 #else
   out += line * (SMALL_HEIGHT + PAD_SIZE) + me;                         // Pad every output line
 #endif
-  for (u32 i = 0; i < NH; ++i) { NTSTORE(out[i * G_H], u[i]); }
+  for (u32 i = 0; i < NH; ++i) { FFTSTORE(&out[i * G_H], u[i]); }
 #else                                                                   // No padding
   out += line * SMALL_HEIGHT + me;
-  for (u32 i = 0; i < NH; ++i) { NTSTORE(out[i * G_H], u[i]); }
+  for (u32 i = 0; i < NH; ++i) { FFTSTORE(&out[i * G_H], u[i]); }
 #endif
 }
 
@@ -225,10 +225,10 @@ void OVERLOAD readMiddleOutLine(T2 *u, CP(T2) in, u32 y, u32 x) {
 #else
   in += y * MIDDLE * (SMALL_HEIGHT + PAD_SIZE) + x;
 #endif
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * (SMALL_HEIGHT + PAD_SIZE)]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * (SMALL_HEIGHT + PAD_SIZE)]); }
 #else                                                                   // No rotation, might be better on nVidia cards
   in += y * MIDDLE * SMALL_HEIGHT + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SMALL_HEIGHT]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SMALL_HEIGHT]); }
 #endif
 }
 
@@ -295,7 +295,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
                                                         //              = WIDTH / (OUT_WG / OUT_SIZEX) * (MIDDLE * OUT_WG + PAD_SIZE)
                                                         //              = WIDTH * MIDDLE * OUT_SIZEX + WIDTH / SIZEY * PAD_SIZE
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * OUT_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * OUT_WG], u[i]); }
 
 #else
 
@@ -305,7 +305,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
                                         //                       = MIDDLE * WIDTH / (OUT_WG / OUT_SIZEX) * OUT_WG
                                         //                       = MIDDLE * WIDTH * OUT_SIZEX
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * OUT_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * OUT_WG], u[i]); }
 
 #endif
 }
@@ -337,7 +337,7 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   for (i32 i = 0; i < NW; ++i) {
 //    u32 fftMiddleOut_y = i * G_W + me;                        // The fftMiddleOut y value
 //    u32 chunk_y = fftMiddleOut_y / SIZEY;                     // The fftMiddleOut chunk_y value
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * OUT_WG + PAD_SIZE)]);  // Adjust in pointer the same way writeMiddleOutLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * OUT_WG + PAD_SIZE)]);  // Adjust in pointer the same way writeMiddleOutLine did
     chunk_y += chunk_y_incr;
   }
 
@@ -363,7 +363,7 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   for (i32 i = 0; i < NW; ++i) {
 //    u32 fftMiddleOut_y = i * G_W + me;                          // The fftMiddleOut y value
 //    u32 chunk_y = fftMiddleOut_y / SIZEY;                       // The fftMiddleOut chunk_y value
-    u[i] = NTLOAD(in[chunk_y * MIDDLE * OUT_WG]);               // Adjust in pointer the same way writeMiddleOutLine did
+    u[i] = FFTLOAD(&in[chunk_y * MIDDLE * OUT_WG]);               // Adjust in pointer the same way writeMiddleOutLine did
     chunk_y += chunk_y_incr;
   }
 
@@ -384,10 +384,10 @@ void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
-  for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
+  for (u32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W], u[i]); }
 #else
   out += line * WIDTH + me;
-  for (u32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W], u[i]); }
+  for (u32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W], u[i]); }
 #endif
 }
 
@@ -397,10 +397,10 @@ void OVERLOAD readMiddleInLine(F2 *u, CP(F2) in, u32 y, u32 x) {
   // Rather than having u[i] also increment by one, we choose a larger pad increment
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   in += y * WIDTH + y * PAD_SIZE + (y / SMALL_HEIGHT) * BIG_PAD_SIZE + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * (SMALL_HEIGHT * (WIDTH + PAD_SIZE) + BIG_PAD_SIZE)]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * (SMALL_HEIGHT * (WIDTH + PAD_SIZE) + BIG_PAD_SIZE)]); }
 #else
   in += y * WIDTH + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SMALL_HEIGHT * WIDTH]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SMALL_HEIGHT * WIDTH]); }
 #endif
 }
 
@@ -417,7 +417,7 @@ void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
                                                         //              = SMALL_HEIGHT / (IN_WG / IN_SIZEX) * (MIDDLE * IN_WG + PAD_SIZE)
                                                         //              = SMALL_HEIGHT * MIDDLE * IN_SIZEX + SMALL_HEIGHT / SIZEY * PAD_SIZE
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * IN_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * IN_WG], u[i]); }
 #else
   // Output data such that readCarryFused lines are packed tightly together.  No padding.
   out += chunk_y * MIDDLE * IN_WG +                     // Write y chunks after middles
@@ -425,7 +425,7 @@ void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
                                                         //                       = MIDDLE * SMALL_HEIGHT / (IN_WG / IN_SIZEX) * IN_WG
                                                         //                       = MIDDLE * SMALL_HEIGHT * IN_SIZEX
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * IN_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * IN_WG], u[i]); }
 #endif
 }
 
@@ -452,7 +452,7 @@ void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 fftMiddleIn_y_incr = G_H;                                 // The increment to next fftMiddleIn y value
   u32 chunk_y_incr = fftMiddleIn_y_incr / SIZEY;                // The increment to next fftMiddleIn chunk_y value
   for (i32 i = 0; i < NH; ++i) {
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * IN_WG + PAD_SIZE)]);   // Adjust in pointer the same way writeMiddleInLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * IN_WG + PAD_SIZE)]);   // Adjust in pointer the same way writeMiddleInLine did
     chunk_y += chunk_y_incr;
   }
 #else                                                           // Read data that was not rotated or padded
@@ -474,7 +474,7 @@ void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   for (i32 i = 0; i < NH; ++i) {
     u32 fftMiddleIn_y = i * G_H + me;                           // The fftMiddleIn y value
     u32 chunk_y = fftMiddleIn_y / SIZEY;                        // The fftMiddleIn chunk_y value
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * IN_WG)]);              // Adjust in pointer the same way writeMiddleInLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * IN_WG)]);              // Adjust in pointer the same way writeMiddleInLine did
     chunk_y += chunk_y_incr;
   }
 #endif
@@ -488,10 +488,10 @@ void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 #else
   out += line * (SMALL_HEIGHT + PAD_SIZE) + me;                         // Pad every output line
 #endif
-  for (u32 i = 0; i < NH; ++i) { NTSTORE(out[i * G_H], u[i]); }
+  for (u32 i = 0; i < NH; ++i) { FFTSTORE(&out[i * G_H], u[i]); }
 #else                                                                   // No padding
   out += line * SMALL_HEIGHT + me;
-  for (u32 i = 0; i < NH; ++i) { NTSTORE(out[i * G_H], u[i]); }
+  for (u32 i = 0; i < NH; ++i) { FFTSTORE(&out[i * G_H], u[i]); }
 #endif
 }
 
@@ -505,10 +505,10 @@ void OVERLOAD readMiddleOutLine(F2 *u, CP(F2) in, u32 y, u32 x) {
 #else
   in += y * MIDDLE * (SMALL_HEIGHT + PAD_SIZE) + x;
 #endif
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * (SMALL_HEIGHT + PAD_SIZE)]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * (SMALL_HEIGHT + PAD_SIZE)]); }
 #else                                                                   // No rotation, might be better on nVidia cards
   in += y * MIDDLE * SMALL_HEIGHT + x;
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SMALL_HEIGHT]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SMALL_HEIGHT]); }
 #endif
 }
 
@@ -524,7 +524,7 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
                                                         //              = WIDTH / (OUT_WG / OUT_SIZEX) * (MIDDLE * OUT_WG + PAD_SIZE)
                                                         //              = WIDTH * MIDDLE * OUT_SIZEX + WIDTH / SIZEY * PAD_SIZE
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * OUT_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * OUT_WG], u[i]); }
 #else
   // Output data such that readCarryFused lines are packed tightly together.  No padding.
   out += chunk_y * MIDDLE * OUT_WG +             // Write y chunks after middles
@@ -532,7 +532,7 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
                                         //                       = MIDDLE * WIDTH / (OUT_WG / OUT_SIZEX) * OUT_WG
                                         //                       = MIDDLE * WIDTH * OUT_SIZEX
   // Write each u[i] sequentially
-  for (int i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * OUT_WG], u[i]); }
+  for (int i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * OUT_WG], u[i]); }
 #endif
 }
 
@@ -556,7 +556,7 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 fftMiddleOut_y_incr = G_W;                                // The increment to next fftMiddleOut y value
   u32 chunk_y_incr = fftMiddleOut_y_incr / SIZEY;               // The increment to next fftMiddleOut chunk_y value
   for (i32 i = 0; i < NW; ++i) {
-    u[i] = NTLOAD(in[chunk_y * (MIDDLE * OUT_WG + PAD_SIZE)]);  // Adjust in pointer the same way writeMiddleOutLine did
+    u[i] = FFTLOAD(&in[chunk_y * (MIDDLE * OUT_WG + PAD_SIZE)]);  // Adjust in pointer the same way writeMiddleOutLine did
     chunk_y += chunk_y_incr;
   }
 #else                                                           // Read data that was not rotated or padded
@@ -576,7 +576,7 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 fftMiddleOut_y_incr = G_W;                                // The increment to next fftMiddleOut y value
   u32 chunk_y_incr = fftMiddleOut_y_incr / SIZEY;               // The increment to next fftMiddleOut chunk_y value
   for (i32 i = 0; i < NW; ++i) {
-    u[i] = NTLOAD(in[chunk_y * MIDDLE * OUT_WG]);               // Adjust in pointer the same way writeMiddleOutLine did
+    u[i] = FFTLOAD(&in[chunk_y * MIDDLE * OUT_WG]);               // Adjust in pointer the same way writeMiddleOutLine did
     chunk_y += chunk_y_incr;
   }
 #endif
@@ -780,7 +780,7 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
-  for (u32 i = 0; i < NW; ++i) { u[i] = NTLOAD(in[i * G_W / 16 * SIZEW]); }
+  for (u32 i = 0; i < NW; ++i) { u[i] = FFTLOAD(&in[i * G_W / 16 * SIZEW]); }
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
@@ -788,7 +788,7 @@ void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {  // me i
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
-  for (i32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W / 16 * SIZEW], u[i]); }
+  for (i32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W / 16 * SIZEW], u[i]); }
 }
 
 //****************************************************************************************
@@ -801,14 +801,14 @@ void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {  // me i
 
 void OVERLOAD readMiddleInLine(T2 *u, CP(T2) in, u32 y, u32 x) {
   in += (x / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, y / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SIZEM]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM]); }
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
 void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, y / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * SIZEM], u[i]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
 }
 
 //****************************************************************************************
@@ -824,14 +824,14 @@ void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   in += (width / 16 * SIZEW) + (middle * SIZEM) + (width % 16 * SIZEBLK) + (me % 16);
-  for (i32 i = 0; i < NH; ++i) { u[i] = NTLOAD(in[SWIZ(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
+  for (i32 i = 0; i < NH; ++i) { u[i] = FFTLOAD(&in[SWIZ(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
 }
 
 void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   out += (width / 16 * SIZEW) + (middle * SIZEM) + (width % 16 * SIZEBLK) + (me % 16);
-  for (i32 i = 0; i < NH; ++i) { NTSTORE(out[SWIZ(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16], u[i]); }
+  for (i32 i = 0; i < NH; ++i) { FFTSTORE(&out[SWIZ(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16], u[i]); }
 }
 
 //****************************************************************************************
@@ -844,14 +844,14 @@ void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 
 void OVERLOAD readMiddleOutLine(T2 *u, CP(T2) in, u32 y, u32 x) {
   in += (y / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, x / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SIZEM]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM]); }
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
 void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, x / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * SIZEM], u[i]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
 }
 
 #endif
@@ -899,7 +899,7 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
-  for (u32 i = 0; i < NW; ++i) { u[i] = NTLOAD(in[i * G_W / 16 * SIZEW32]); }
+  for (u32 i = 0; i < NW; ++i) { u[i] = FFTLOAD(&in[i * G_W / 16 * SIZEW32]); }
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
@@ -907,7 +907,7 @@ void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {   // me
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
-  for (i32 i = 0; i < NW; ++i) { NTSTORE(out[i * G_W / 16 * SIZEW32], u[i]); }
+  for (i32 i = 0; i < NW; ++i) { FFTSTORE(&out[i * G_W / 16 * SIZEW32], u[i]); }
 }
 
 //****************************************************************************************
@@ -920,14 +920,14 @@ void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {   // me
 
 void OVERLOAD readMiddleInLine(F2 *u, CP(F2) in, u32 y, u32 x) {
   in += (x / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, y / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SIZEM32]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM32]); }
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
 void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, y / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * SIZEM32], u[i]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
 }
 
 //****************************************************************************************
@@ -943,14 +943,14 @@ void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   in += (width / 16 * SIZEW32) + (middle * SIZEM32) + (width % 16 * SIZEBLK32) + (me % 16);
-  for (i32 i = 0; i < NH; ++i) { u[i] = NTLOAD(in[SWIZ32(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
+  for (i32 i = 0; i < NH; ++i) { u[i] = FFTLOAD(&in[SWIZ32(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
 }
 
 void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   out += (width / 16 * SIZEW32) + (middle * SIZEM32) + (width % 16 * SIZEBLK32) + (me % 16);
-  for (i32 i = 0; i < NH; ++i) { NTSTORE(out[SWIZ32(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16], u[i]); }
+  for (i32 i = 0; i < NH; ++i) { FFTSTORE(&out[SWIZ32(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16], u[i]); }
 }
 
 //****************************************************************************************
@@ -963,14 +963,14 @@ void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 
 void OVERLOAD readMiddleOutLine(F2 *u, CP(F2) in, u32 y, u32 x) {
   in += (y / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, x / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = NTLOAD(in[i * SIZEM32]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM32]); }
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
 void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, x / 16) * 16) + (x % 16);
-  for (i32 i = 0; i < MIDDLE; ++i) { NTSTORE(out[i * SIZEM32], u[i]); }
+  for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
 }
 
 #endif
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 3e2299f8..51ac9c11 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -5,6 +5,9 @@
 #include "trig.cl"
 #include "fftheight.cl"
 
+// LDS bytes used by shufl for each line processed in fft_HEIGHT
+#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+
 #if FFT_FP64
 
 // Handle the final multiplication step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -49,8 +52,7 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NH], v[NH];
   T2 p[NH], q[NH];
@@ -161,8 +163,7 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   CP(F2) aF2 = (CP(F2)) a;
@@ -270,8 +271,7 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 }
 
 KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
@@ -310,18 +310,18 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS31 >= 1
-  GF31 trig = smallTrig31[height_trigs + me];                    // Trig values for line zero, should be cached
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + me]);                    // Trig values for line zero, should be cached
 #if SINGLE_WIDE
-  GF31 mult = smallTrig31[height_trigs + G_H + line1];
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line1]);
 #else
-  GF31 mult = smallTrig31[height_trigs + G_H + line1 * 2];
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line1 * 2]);
 #endif
   trig = cmul(trig, mult);
 #else
 #if SINGLE_WIDE
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + line1*G_H + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line1*G_H + me]);
 #else
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + line1*2*G_H + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line1*2*G_H + me]);
 #endif
 #endif
 
@@ -394,8 +394,7 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 }
 
 KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
@@ -434,18 +433,18 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS61 >= 1
-  GF61 trig = smallTrig61[height_trigs + me];                    // Trig values for line zero, should be cached
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + me]);                    // Trig values for line zero, should be cached
 #if SINGLE_WIDE
-  GF61 mult = smallTrig61[height_trigs + G_H + line1];
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line1]);
 #else
-  GF61 mult = smallTrig61[height_trigs + G_H + line1 * 2];
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line1 * 2]);
 #endif
   trig = cmul(trig, mult);
 #else
 #if SINGLE_WIDE
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + line1*G_H + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line1*G_H + me]);
 #else
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + line1*2*G_H + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line1*2*G_H + me]);
 #endif
 #endif
 
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index d9edc1f7..e30b8012 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -4,6 +4,9 @@
 #include "trig.cl"
 #include "fftheight.cl"
 
+// LDS bytes used by shufl for each line processed in fft_HEIGHT
+#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+
 #if FFT_FP64
 
 // Handle the final squaring step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -54,8 +57,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
   T2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -89,8 +91,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NH], v[NH];
 
@@ -132,8 +133,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*5;
   // Read a hopefully cached line of data and one non-cached T2 per line
-  T2 trig = smallTrig[height_trigs + me];                    // Trig values for line zero, should be cached
-  T2 mult = smallTrig[height_trigs + G_H + line1];           // Line multiplier
+  T2 trig = TFLOAD(&smallTrig[height_trigs + me]);                    // Trig values for line zero, should be cached
+  T2 mult = TSLOAD(&smallTrig[height_trigs + G_H + line1]);           // Line multiplier
   trig = cmulFancy(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -142,7 +143,7 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*5;
   // Read pre-computed trig values
-  T2 trig = NTLOAD(smallTrig[height_trigs + line1*G_H + me]);
+  T2 trig = TOLOAD(&smallTrig[height_trigs + line1*G_H + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -198,8 +199,7 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local T2 lds[lds_bytes * 2 / sizeof(T2)];
+  local T2 lds[2 * LDS_BYTES / sizeof(T2)];
 
   T2 u[NH];
 
@@ -245,8 +245,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*5;
   // Read a hopefully cached line of data and one non-cached T2 per line
-  T2 trig = smallTrig[height_trigs + lowMe];                                 // Trig values for line zero, should be cached
-  T2 mult = smallTrig[height_trigs + G_H + line_u*2 + isSecondHalf];         // Two multipliers.  One for line u, one for line v.
+  T2 trig = TFLOAD(&smallTrig[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  T2 mult = TSLOAD(&smallTrig[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
   trig = cmulFancy(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -255,7 +255,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*5;
   // Read pre-computed trig values
-  T2 trig = NTLOAD(smallTrig[height_trigs + line_u*G_H*2 + me]);
+  T2 trig = TOLOAD(&smallTrig[height_trigs + line_u*G_H*2 + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -332,8 +332,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
   F2 u[NH];
   u32 H = ND / SMALL_HEIGHT;
 
@@ -363,8 +362,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -402,8 +400,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached F2 per line
-  F2 trig = smallTrigF2[height_trigs + me];                    // Trig values for line zero, should be cached
-  F2 mult = smallTrigF2[height_trigs + G_H + line1];           // Line multiplier
+  F2 trig = TFLOAD(&smallTrigF2[height_trigs + me]);                    // Trig values for line zero, should be cached
+  F2 mult = TSLOAD(&smallTrigF2[height_trigs + G_H + line1]);           // Line multiplier
   trig = cmulFancy(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -412,7 +410,7 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  F2 trig = NTLOAD(smallTrigF2[height_trigs + line1*G_H + me]);
+  F2 trig = TOLOAD(&smallTrigF2[height_trigs + line1*G_H + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -468,8 +466,7 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local F2 lds[lds_bytes * 2 / sizeof(F2)];
+  local F2 lds[2 * LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -511,8 +508,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached F2 per line
-  F2 trig = smallTrigF2[height_trigs + lowMe];                                 // Trig values for line zero, should be cached
-  F2 mult = smallTrigF2[height_trigs + G_H + line_u*2 + isSecondHalf];         // Two multipliers.  One for line u, one for line v.
+  F2 trig = TFLOAD(&smallTrigF2[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  F2 mult = TSLOAD(&smallTrigF2[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
   trig = cmulFancy(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -521,7 +518,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  F2 trig = NTLOAD(smallTrigF2[height_trigs + line_u*G_H*2 + me]);
+  F2 trig = TOLOAD(&smallTrigF2[height_trigs + line_u*G_H*2 + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -601,8 +598,7 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -623,18 +619,18 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS31 >= 1
-  GF31 trig = smallTrig31[height_trigs + me];
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + me]);
 #if SINGLE_WIDE
-  GF31 mult = smallTrig31[height_trigs + G_H + line];
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line]);
 #else
-  GF31 mult = smallTrig31[height_trigs + G_H + which];
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + which]);
 #endif
   trig = cmul(trig, mult);
 #else
 #if SINGLE_WIDE
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + line*G_H + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line*G_H + me]);
 #else
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + which*G_H + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + which*G_H + me]);
 #endif
 #endif
 
@@ -650,8 +646,7 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -685,8 +680,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached GF31 per line
-  GF31 trig = smallTrig31[height_trigs + me];                    // Trig values for line zero, should be cached
-  GF31 mult = smallTrig31[height_trigs + G_H + line1];           // Line multiplier
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + me]);                    // Trig values for line zero, should be cached
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line1]);           // Line multiplier
   trig = cmul(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -695,7 +690,7 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + line1*G_H + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line1*G_H + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -750,8 +745,7 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF31 lds[lds_bytes * 2 / sizeof(GF31)];
+  local GF31 lds[2 * LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -789,8 +783,8 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached GF31 per line
-  GF31 trig = smallTrig31[height_trigs + lowMe];                                 // Trig values for line zero, should be cached
-  GF31 mult = smallTrig31[height_trigs + G_H + line_u*2 + isSecondHalf];         // Two multipliers.  One for line u, one for line v.
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
   trig = cmul(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -799,7 +793,7 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  GF31 trig = NTLOAD(smallTrig31[height_trigs + line_u*G_H*2 + me]);
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line_u*G_H*2 + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -879,8 +873,7 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -901,18 +894,18 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS61 >= 1
-  GF61 trig = smallTrig61[height_trigs + me];
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + me]);
 #if SINGLE_WIDE
-  GF61 mult = smallTrig61[height_trigs + G_H + line];
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line]);
 #else
-  GF61 mult = smallTrig61[height_trigs + G_H + which];
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + which]);
 #endif
   trig = cmul(trig, mult);
 #else
 #if SINGLE_WIDE
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + line*G_H + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line*G_H + me]);
 #else
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + which*G_H + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + which*G_H + me]);
 #endif
 #endif
 
@@ -928,8 +921,7 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -963,8 +955,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached GF61 per line
-  GF61 trig = smallTrig61[height_trigs + me];                    // Trig values for line zero, should be cached
-  GF61 mult = smallTrig61[height_trigs + G_H + line1];           // Line multiplier
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + me]);                    // Trig values for line zero, should be cached
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line1]);           // Line multiplier
   trig = cmul(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -973,7 +965,7 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + line1*G_H + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line1*G_H + me]);
 #endif
 
 #if SINGLE_KERNEL
@@ -1028,8 +1020,7 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  const u32 lds_bytes = SMALL_HEIGHT * SHUFL_BYTES_H;
-  local GF61 lds[lds_bytes * 2 / sizeof(GF61)];
+  local GF61 lds[2 * LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -1067,8 +1058,8 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read a hopefully cached line of data and one non-cached GF61 per line
-  GF61 trig = smallTrig61[height_trigs + lowMe];                                 // Trig values for line zero, should be cached
-  GF61 mult = smallTrig61[height_trigs + G_H + line_u*2 + isSecondHalf];         // Two multipliers.  One for line u, one for line v.
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
   trig = cmul(trig, mult);
 
   // On consumer-grade GPUs, it is likely beneficial to read all trig values.
@@ -1077,7 +1068,7 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
   u32 height_trigs = SMALL_HEIGHT*1;
   // Read pre-computed trig values
-  GF61 trig = NTLOAD(smallTrig61[height_trigs + line_u*G_H*2 + me]);
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line_u*G_H*2 + me]);
 #endif
 
 #if SINGLE_KERNEL

From a2db643eb40c50691d3034625008c825e26f44bd Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 23 Mar 2026 19:19:07 +0000
Subject: [PATCH 014/214] Added CUDA support courtesy of "Sherpa" and Frey.
 Started some changess needed to get MSVC to compile PRPLL (CUDA support on
 Windows will require MSVC).

---
 Makefile                   |   44 +-
 README.md                  |   13 +-
 README.txt                 |    4 +
 src/Args.cpp               |   19 +-
 src/Args.h                 |    9 +-
 src/Gpu.cpp                |   61 +-
 src/Gpu.h                  |    2 +-
 src/KernelCompiler.cpp     |    7 +
 src/clwrap.h               |   11 +
 src/cuda/clwrap_cuda.cpp   | 1099 ++++++++++++++++++++++++++++++++++++
 src/cuda/cudawrap.cpp      |  505 +++++++++++++++++
 src/cuda/cudawrap.h        |  138 +++++
 src/cuda/opencl_compat.cuh |  365 ++++++++++++
 src/cuda/tinycuda.h        |  317 +++++++++++
 src/tune.cpp               |  286 +++++++---
 15 files changed, 2755 insertions(+), 125 deletions(-)
 create mode 100644 src/cuda/clwrap_cuda.cpp
 create mode 100644 src/cuda/cudawrap.cpp
 create mode 100644 src/cuda/cudawrap.h
 create mode 100644 src/cuda/opencl_compat.cuh
 create mode 100644 src/cuda/tinycuda.h

diff --git a/Makefile b/Makefile
index b1c021e0..1ba62799 100644
--- a/Makefile
+++ b/Makefile
@@ -1,4 +1,4 @@
-# Use "make DEBUG=1" for a debug build
+# Use "make CUDA=1" for a CUDA build, use "make DEBUG=1" for a debug build
 
 # The build artifacts are put in the "build-release" subfolder (or "build-debug" for a debug build).
 
@@ -19,32 +19,39 @@ else
 CXX ?= g++
 endif
 
-ifneq ($(findstring MINGW, $(HOST_OS)), MINGW)
-COMMON_FLAGS = -Wall -std=c++20 -static-libstdc++ -static-libgcc
+ifeq ($(CUDA), 1)
+ BIN=build-cuda
+ CUDASRCS1 = clwrap_cuda.cpp cudawrap.cpp
+ CUDAFLAGS = -DCUDA_BACKEND -Isrc/cuda -I/usr/local/cuda/include
+ CUDAOBJS = $(CUDASRCS1:%.cpp=$(BIN)/%.o)
+ OPENCL_LIBS = -L/usr/local/cuda/lib64 -lcuda -lnvrtc
 else
-# For mingw-64 use this:
-COMMON_FLAGS = -Wall -std=c++20 -static-libstdc++ -static-libgcc -static
+ BIN=build-release
+ CUDAFLAGS =
+ CUDAOBJS =
+ ifeq ($(HOST_OS), Darwin)
+  OPENCL_LIBS = -framework OpenCL
+ else
+  OPENCL_LIBS = -lOpenCL
+ endif
 endif
-# -fext-numeric-literals
 
-ifeq ($(HOST_OS), Darwin)
-OPENCL_LIBS = -framework OpenCL
+ifneq ($(findstring MINGW, $(HOST_OS)), MINGW)
+ COMMON_FLAGS = -Wall $(CUDAFLAGS) -std=c++20 -static-libstdc++ -static-libgcc
 else
-OPENCL_LIBS = -lOpenCL
+# For mingw-64 use this:
+ COMMON_FLAGS = -Wall $(CUDAFLAGS) -std=c++20 -static-libstdc++ -static-libgcc -static
 endif
-
+# -fext-numeric-literals
 
 ifeq ($(DEBUG), 1)
 
 BIN=build-debug
-
 CXXFLAGS = -g $(COMMON_FLAGS)
 STRIP=
 
 else
 
-BIN=build-release
-
 CXXFLAGS = -O3 -DNDEBUG $(COMMON_FLAGS)
 STRIP=-s
 
@@ -56,7 +63,7 @@ SRCS2 = test.cpp
 
 # SRCS=$(addprefix src/, $(SRCS1))
 
-OBJS = $(SRCS1:%.cpp=$(BIN)/%.o)
+OBJS = $(CUDAOBJS) $(SRCS1:%.cpp=$(BIN)/%.o)
 DEPDIR := $(BIN)/.d
 $(shell mkdir -p $(DEPDIR) >/dev/null)
 DEPFLAGS = -MT $@ -MMD -MP -MF $(DEPDIR)/$*.Td
@@ -80,16 +87,19 @@ $(BIN)/prpll-amd: ${OBJS}
 	$(CXX) $(CXXFLAGS) -o $@ ${OBJS} $(LIBPATH) -lamdocl64 -L/opt/rocm/lib ${STRIP}
 
 clean:
-	rm -rf build-debug build-release
+	rm -rf build-debug build-release build-cuda
 
 $(BIN)/%.o : src/%.cpp $(DEPDIR)/%.d
 	$(COMPILE.cc) $(OUTPUT_OPTION) $<
 	$(POSTCOMPILE)
 
+$(BIN)/%.o : src/cuda/%.cpp $(DEPDIR)/%.d
+	$(COMPILE.cc) $(OUTPUT_OPTION) $<
+	$(POSTCOMPILE)
 
-# src/bundle.cpp is just a wrapping of the OpenCL sources (*.cl) as a C string.
+# src/bundle.cpp is just a wrapping of the OpenCL sources (*.cl) as a C string (as well as the CUDA OpenCL translation code)
 
-src/bundle.cpp: genbundle.sh src/cl/*.cl
+src/bundle.cpp: genbundle.sh src/cuda/*.cuh src/cl/*.cl
 	bash genbundle.sh $^ > src/bundle.cpp
 
 $(DEPDIR)/%.d: ;
diff --git a/README.md b/README.md
index 5ae916af..ba6b9ada 100644
--- a/README.md
+++ b/README.md
@@ -20,7 +20,7 @@
 
 PRPLL implements two primality tests for Mersenne numbers: PRP ("PRobable Prime") and LL ("Lucas-Lehmer") as the name suggests.
 
-PRPLL is an OpenCL (GPU) program for primality testing Mersenne numbers.
+PRPLL is an OpenCL (GPU) and CUDA program for primality testing Mersenne numbers.
 
 
 ## Build
@@ -32,12 +32,21 @@ Invoke `make` in the source directory.
 See `prpll -h` for the command line options.
 
 
+## License
+
+This project is licensed under the **GNU General Public License v3.0** - see [LICENSE](LICENSE) for details.
+
+
+## Credits
+
+[PRPLL](https://github.com/preda/gpuowl) was originally authored (as gpuowl) by **Mihai Preda**.  **George Woltman** authored optimizations and NTT code contributions.  The CUDA backend was authored by **"Sherpa"** in honor of John Allen Frey.
+
+
 ## Why LL
 
 For Mersenne primes search, the PRP test is by far preferred over LL, such that LL is not used anymore for search.
 But LL is still used to verify a prime found by PRP (which is a very rare occurence).
 
-
 ### Lucas-Lehmer (LL)
 This is a test that proves whether a Mersenne number is prime or not, but without providing a factor in the case where it is not prime.
 The Lucas-Lehmer test is very simple to describe: iterate the function f(x)=(x^2 - 2) modulo M(p) starting with the number 4. If
diff --git a/README.txt b/README.txt
index 64b8dcd9..825fb6c3 100644
--- a/README.txt
+++ b/README.txt
@@ -9,6 +9,7 @@ In the gpuowl project directory (where the file Makefile is located) run make.
 This will produce a file "prpll" in the build-debug or build-release subdirectory.
 
 Use "make" to do a release build in the "build-release" subdirectory.
+Use "make CUDA=1" to produce a CUDA version in the "build-cuda" subdirectory.
 Use "make DEBUG=1" to produce a debug build in the "build-debug" subdirectory.
 Use "make exe" for a Windows build.
 Use "make clean" to remove the "build-debug" and "build-release" directories.
@@ -28,3 +29,6 @@ Run
 you need to fix your OpenCL installation first.
 
 2. run "prpll -h", and verify that it displays a list of devices towards the end.
+
+3. run "prpll -tune", to tune various PRPLL options for your GPU.
+
diff --git a/src/Args.cpp b/src/Args.cpp
index e66e1cc0..cece2fa6 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -2,7 +2,6 @@
 
 #include "Args.h"
 #include "File.h"
-#include "FFTConfig.h"
 #include "clwrap.h"
 #include "gpuid.h"
 #include "Proof.h"
@@ -99,14 +98,13 @@ bool Args::hasFlag(const string& key) const { return flags.find(key) != flags.en
 void Args::printHelp() {
   printf(R"(
 PRPLL is "PRobable Prime and Lucas-Lehmer Categorizer", AKA "Purple-cat"
-PRPLL is under active development and not ready for production use.
 
-PRPLL is an OpenCL (GPU) program for primality testing Mersenne numbers (of the form 2^n - 1).
+PRPLL is an OpenCL/CUDA (GPU) program for primality testing Mersenne numbers (of the form 2^n - 1).
 
 To check that OpenCL is installed correctly use the command "clinfo". If clinfo does not find any
 devices or otherwise fails, this program will not run.
 
-This program is tested on Linux/ROCm (AMD GPUs); it may also run on Windows and on Nvidia GPUs.
+This program is tested on Linux/ROCm (AMD GPUs); it also runs on Windows and on Nvidia GPUs.
 
 For information about Mersenne primes search see https://www.mersenne.org/
 
@@ -168,8 +166,8 @@ named "config.txt" in the prpll run directory.
 -roe               : measure the Round-Off Error (Z) for more iterations (slow)
 
 -use <define>      : comma separated list of defines for configuring gpuowl.cl, such as:
-  -use FAST_BARRIER: on AMD Radeon VII and older AMD GPUs, use a faster barrier(). Do not use
-                     this option on Nvidia GPUs or on RDNA AMD GPUs where it produces errors
+  -use FAST_BARRIER: on AMD Radeon VII and older AMD GPUs, use a faster barrier().  This option
+                     may not work on Nvidia GPUs or on RDNA AMD GPUs where it produces errors
                      (which are nevertheless detected).
   -use NO_ASM      : do not use __asm() blocks (inline assembly)
   -use STATS=<val> : enable carry statistics collection & logging, for the kernel according to <val>:
@@ -200,11 +198,14 @@ named "config.txt" in the prpll run directory.
 -tune <options>    : Looks for best settings to include in config.txt.  Times many FFTs to find fastest one to test exponents -- written to tune.txt.
                      An -fft <spec> can be given on the command line to limit which FFTs are timed.
                      Options are not required.  If present, the options are a comma separated list from below.
-                         noconfig     - Skip timings to find best config.txt settings
-                         fp64         - Tune for settings that affect FP64 FFTs.  Time FP64 FFTs for tune.txt.
+                         noconfig     - Skip timings to find best config.txt settings.
+			 inplace      - Skip timings for not-in-place FFTs and NTTs.  All nVidia GPUs seem to prefer in-place FFTs and NTTs.
+			 fp64         - Tune for settings that affect FP64 FFTs.  Time FP64 FFTs for tune.txt.
                          ntt          - Tune for settings that affect integer NTTs.  Time integer NTTs for tune.txt.
+                         nofp32       - Do not tune for settings that affect FP32 FFTs.  Some openCL compilers have trouble with FP32.
                          minexp=<val> - Time FFTs to find the best one for exponents greater than <val>.
                          maxexp=<val> - Time FFTs to find the best one for exponents less than <val>.
+                         quick=<val> - Higher values equals a quicker, potentially less accurate tune.  Val ranges from 1 to 10.
 -device <N>        : select the GPU at position N in the list of devices
 -uid    <UID>      : select the GPU with the given UID (on ROCm/AMDGPU, Linux)
 -pci    <BDF>      : select the GPU with the given PCI BDF, e.g. "0c:00.0"
@@ -380,7 +381,7 @@ void Args::parse(const string& line) {
     else if (key == "-dir") { dir = s; }
     else if (key == "-carry") {
       if (s == "short" || s == "long") {
-        carry = s == "short" ? CARRY_SHORT : CARRY_LONG;
+        carry = s == "short" ? CARRY_32 : CARRY_64;
       } else {
         log("-carry expects short|long\n");
         throw "-carry expects short|long";
diff --git a/src/Args.h b/src/Args.h
index d7273afe..99d3a87d 100644
--- a/src/Args.h
+++ b/src/Args.h
@@ -3,6 +3,7 @@
 #pragma once
 
 #include "common.h"
+#include "FFTConfig.h"
 
 #include <string>
 #include <map>
@@ -21,10 +22,8 @@ class Args {
   static vector<KeyVal> splitUses(std::string ss);
   static std::string mergeArgs(int argc, char **argv);
 
-  enum {CARRY_AUTO = 0, CARRY_SHORT, CARRY_LONG};
-
   explicit Args(bool silent = false) : silent{silent} {}
-  
+
   void parse(const string& line);
   void setDefaults();
   bool uses(const std::string& key) const { return flags.find(key) != flags.end(); }
@@ -56,7 +55,7 @@ class Args {
   std::map<std::string, vector<KeyVal>> perFftConfig;
 
   int device = 0;
-  
+
   bool safeMath = true;
   bool clean = true;
   bool verbose = false;
@@ -72,7 +71,7 @@ class Args {
 
   bool keepProof = false;
 
-  int carry = CARRY_AUTO;
+  enum CARRY_KIND carry = CARRY_AUTO;
   u32 workers = 1;
   u32 blockSize = 1000;
   u32 logStep = 20000;
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 6d00c0fd..5d30c848 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -228,7 +228,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   // Default value for -use options that must also be parsed in C++ code
   tail_single_wide = 0, tail_single_kernel = 1;         // Default tailSquare is double-wide in one kernel
   in_place = 0;                                         // Default is not in-place
-  wmul = 2;						// Default is carryFused processes two lines at a time
+  wmul = 2;                                             // Default is carryFused processes two lines at a time
   pad_size = isAmdGpu(id) ? 256 : 0;                    // Default is 256 bytes for AMD, 0 for others
 
   // Validate -use options
@@ -248,7 +248,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "DEBUG",
                               "CARRY64",
                               "BIGLIT",                 // Deprecated
-                              "NONTEMPORAL",
+                              "NONTEMPORAL",            // Deprecated
                               "INPLACE",
                               "PAD",
                               "MIDDLE_IN_LDS_TRANSPOSE",
@@ -263,8 +263,8 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "TABMUL_CHAIN32",
                               "TABMUL_CHAIN61",
                               "MODM31",
-                              "ENABLE_L2STORE",
-                              "ENABLE_LULOAD",
+                              "LOADS","STORES",
+                              "CFBLKS","MIBLKS","MOBLKS","TSBLKS",  // CUDA - experimental
                               "WMUL"
                             });
     if (!isValid) {
@@ -283,6 +283,13 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
     if (k == "PAD") pad_size = atoi(v.c_str());
   }
 
+  // Maximum WMUL is 32KB / (WIDTH * SHUFL_BYTES_W)
+  {
+    u32 shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
+    u32 max_wmul = 32768 / (fft.shape.width * shufl_bytes_w);
+    if (wmul > max_wmul) wmul = max_wmul;
+  }
+
   string defines = toDefine(config);
   if (doLog) { log("config: %s\n", defines.c_str()); }
 
@@ -505,40 +512,53 @@ Gpu::~Gpu() {
 #define ROE_SIZE 100000
 #define CARRY_SIZE 100000
 
+#if CUDA_BACKEND
+#define CARRYFUSED_BLOCKS(x)  args.value("CFBLKS", 0) == 0 ? x : args.value("CFBLKS", 0) == 1 ? x " -DCUDA_MIN_BLOCKS=3" : x " -maxregcount 84"
+#define MIDDLEIN_BLOCKS    args.value("MIBLKS", 0) == 0 ? "" : args.value("MIBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
+#define MIDDLEOUT_BLOCKS   args.value("MOBLKS", 0) == 0 ? "" : args.value("MOBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
+#define TAILSQUARE_BLOCKS  args.value("TSBLKS", 0) == 0 ? "" : args.value("TSBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
+#else
+#define CARRYFUSED_BLOCKS(x)  ""
+#define MIDDLEIN_BLOCKS    ""
+#define MIDDLEOUT_BLOCKS   ""
+#define TAILSQUARE_BLOCKS  ""
+#endif
+
 Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
   queue(q),
   background{shared.background},
   args{*shared.args},
   E(E),
   N(fft.shape.size()),
-  fft(fft),  
+  fft(fft),
   WIDTH(fft.shape.width),
   SMALL_H(fft.shape.height),
   BIG_H(SMALL_H * fft.shape.middle),
   hN(N / 2),
   nW(fft.shape.nW()),
   nH(fft.shape.nH()),
-  useLongCarry{args.carry == Args::CARRY_LONG},
+  useLongCarry{args.carry == CARRY_64},
   compiler{args, queue->context, clDefines(args, queue->context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), queue, __VA_ARGS__)
 
-  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H)),
+  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
   K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH),
   K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2),
   K(ktailSquare,           "tailsquare.cl", "tailSquare",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2),                                                           // Single-wide tailSquare with one kernel
+                                               hN / nH / 2,                                                            // Single-wide tailSquare with one kernel
+                                               TAILSQUARE_BLOCKS),
   K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2),
   K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H)),
+  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
   K(kfftW,                 "fftw.cl", "fftW", hN / nW),
 
-  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H)),
+  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
   K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH),
-  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2),
+  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, TAILSQUARE_BLOCKS),
   K(ktailSquareGF31,       "tailsquare.cl", "tailSquareGF31",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
@@ -546,20 +566,21 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
                                                hN / nH / 2),                                                           // Single-wide tailSquare with one kernel
   K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2),
   K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H)),
+  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
   K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW),
 
-  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H)),
+  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
   K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH),
   K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2),
   K(ktailSquareGF61,       "tailsquare.cl", "tailSquareGF61",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2),                                                           // Single-wide tailSquare with one kernel
+                                               hN / nH / 2,                                                            // Single-wide tailSquare with one kernel
+                                               TAILSQUARE_BLOCKS),
   K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2),
   K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H)),
+  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
   K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW),
 
   K(kfftP,                 "fftp.cl", "fftP", hN / nW),
@@ -568,11 +589,11 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1"),
   K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1 -DROE=1"),
   K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, "-DLL=1"),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DROE=1"),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DMUL3=1"),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DMUL3=1 -DROE=1"),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, "-DLL=1"),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("")),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DROE=1")),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DMUL3=1")),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DMUL3=1 -DROE=1")),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DLL=1")),
 
   K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN),
 
diff --git a/src/Gpu.h b/src/Gpu.h
index b184c4d6..32c0a407 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -21,7 +21,7 @@
 #include <cmath>
 
 struct PRPResult;
-struct Task;
+class Task;
 
 class Signal;
 class ProofSet;
diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index cbf50c16..59165081 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -65,9 +65,16 @@ Program KernelCompiler::compile(const string& fileName, const string& extraArgs)
   if (!dump.empty()) {
     args += " -save-temps="s + dump + "/" + fileName;
   }
+#ifdef CUDA_BACKEND
   int err = clCompileProgram(p1.get(), 1, &deviceId, args.c_str(),
                              clSources.size(), (const cl_program*) (clSources.data()), getClFileNames().data(),
                              nullptr, nullptr);
+#else
+  // Skip first file (opencl_compat.cuh) if this is a standard openCL application rather than a CUDA translation
+  int err = clCompileProgram(p1.get(), 1, &deviceId, args.c_str(),
+                             clSources.size()-1, (const cl_program*) (clSources.data()+1), getClFileNames().data()+1,
+                             nullptr, nullptr);
+#endif
   if (string mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
   if (err != CL_SUCCESS) {
     log("Compiling '%s' error %s (args %s)\n", fileName.c_str(), errMes(err).c_str(), args.c_str());
diff --git a/src/clwrap.h b/src/clwrap.h
index 8b9bf9e4..f5cf78fd 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -2,7 +2,11 @@
 
 #pragma once
 
+#ifdef CUDA_BACKEND
+#include "tinycuda.h"
+#else
 #include "tinycl.h"
+#endif
 
 #include <string>
 #include <string_view>
@@ -123,3 +127,10 @@ std::array<i64, 3> getEventNanos(cl_event event);
 u32 getEventInfo(cl_event event);
 
 cl_context getQueueContext(cl_command_queue q);
+
+#ifdef CUDA_BACKEND
+// Set L2 cache persistence for multiple read-only buffers on the given stream.
+// Computes the address span covering all buffers and sets a single access policy window.
+// Buffers that are nullptr or zero-size are skipped.
+void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers);
+#endif
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
new file mode 100644
index 00000000..0f24cb63
--- /dev/null
+++ b/src/cuda/clwrap_cuda.cpp
@@ -0,0 +1,1099 @@
+// CUDA Driver API implementation of OpenCL API functions.
+// This replaces clwrap.cpp when building with the native CUDA backend,
+// mapping all cl* calls to cu* equivalents via the CUDA Driver API.
+
+#include "tinycuda.h"
+#include "cudawrap.h"  // For NvrtcProgram::preprocessOpenCL and compile
+
+#include <cstdio>
+#include <cstring>
+#include <cassert>
+#include <string>
+#include <vector>
+#include <map>
+#include <algorithm>
+#include <sstream>
+#include <stdexcept>
+#include <fstream>
+#include <filesystem>
+#include <unordered_set>
+#ifdef __linux__
+#include <unistd.h>
+#endif
+
+using namespace std;
+
+// Track allocated cl_mem objects so clSetKernelArg can distinguish buffer args from scalars.
+// In OpenCL, buffer args are passed as &memobj where memobj is cl_mem (a pointer to _cl_mem).
+// We need to convert these to CUdeviceptr for CUDA kernel launch.
+static unordered_set<cl_mem> g_allocatedBuffers;
+
+// Global CUDA context — set once by clCreateContext, used to ensure current before CUDA calls
+static CUcontext g_cudaContext = nullptr;
+
+static void ensureContextCurrent() {
+  if (g_cudaContext) {
+    cuCtxSetCurrent(g_cudaContext);
+  }
+}
+
+// Global state for CUDA initialization
+static bool g_cudaInitialized = false;
+static void ensureCudaInit() {
+  if (!g_cudaInitialized) {
+    CUresult err = cuInit(0);
+    if (err != CUDA_SUCCESS) {
+      fprintf(stderr, "cuInit failed: %d\n", (int)err);
+    }
+    g_cudaInitialized = true;
+  }
+}
+
+// Global device list (allocated once, never freed)
+static vector<_cl_device_id> g_devices;
+static bool g_devicesEnumerated = false;
+
+static void enumerateDevices() {
+  if (g_devicesEnumerated) return;
+  ensureCudaInit();
+  int count = 0;
+  cuDeviceGetCount(&count);
+  g_devices.resize(count);
+  for (int i = 0; i < count; i++) {
+    cuDeviceGet(&g_devices[i].dev, i);
+  }
+  g_devicesEnumerated = true;
+}
+
+// ---- OpenCL API implementations ----
+
+extern "C" {
+
+unsigned clGetPlatformIDs(unsigned num, cl_platform_id* platforms, unsigned* numRet) {
+  // CUDA has no "platforms" concept — just return 1 dummy
+  if (numRet) *numRet = 1;
+  if (platforms && num >= 1) platforms[0] = nullptr;
+  return CL_SUCCESS;
+}
+
+int clGetDeviceIDs(cl_platform_id, cl_device_type, unsigned num, cl_device_id* devices, unsigned* numRet) {
+  enumerateDevices();
+  unsigned n = g_devices.size();
+  if (numRet) *numRet = n;
+  if (devices) {
+    for (unsigned i = 0; i < min(num, n); i++) {
+      devices[i] = &g_devices[i];
+    }
+  }
+  return n > 0 ? CL_SUCCESS : CL_DEVICE_NOT_FOUND;
+}
+
+cl_context clCreateContext(const intptr_t*, unsigned nDevices, const cl_device_id* devices,
+                           void (*)(const char*, const void*, size_t, void*), void*, int* err) {
+  if (!devices || nDevices == 0) { if (err) *err = CL_INVALID_DEVICE; return nullptr; }
+  auto* ctx = new _cl_context;
+  ctx->dev = devices[0]->dev;
+#if CUDA_VERSION >= 13000
+  CUctxCreateParams params{};
+  CUresult r = cuCtxCreate_v4(&ctx->ctx, &params, 0, ctx->dev);
+#else
+  CUresult r = cuCtxCreate(&ctx->ctx, 0, ctx->dev);
+#endif
+  if (r != CUDA_SUCCESS) {
+    delete ctx;
+    if (err) *err = CL_OUT_OF_RESOURCES;
+    return nullptr;
+  }
+  g_cudaContext = ctx->ctx;  // Track for ensureContextCurrent()
+
+  // L2 persistence: no benefit measured for this workload.
+  // cuCtxSetLimit(CU_LIMIT_PERSISTING_L2_CACHE_SIZE, 16 * 1024 * 1024);
+
+  if (err) *err = CL_SUCCESS;
+  return ctx;
+}
+
+int clReleaseContext(cl_context ctx) {
+  if (ctx) {
+    cuCtxDestroy(ctx->ctx);
+    delete ctx;
+  }
+  return CL_SUCCESS;
+}
+
+int clReleaseProgram(cl_program p) {
+  if (p) {
+    // NOTE: Do NOT unload the module here. PRPLL's loadAux() gets a kernel from
+    // the program, then releases the program. The kernel's CUfunction remains valid
+    // only while the CUmodule is loaded. In OpenCL, clCreateKernel retains the
+    // program. In our CUDA shim, we simply never unload modules — they persist for
+    // the process lifetime. This is safe because PRPLL creates a fixed set of kernels
+    // at startup and uses them until exit.
+    // if (p->moduleLoaded) cuModuleUnload(p->module);
+    delete p;
+  }
+  return CL_SUCCESS;
+}
+
+int clReleaseCommandQueue(cl_command_queue q) {
+  if (q) {
+    cuStreamDestroy(q->stream);
+    delete q;
+  }
+  return CL_SUCCESS;
+}
+
+// ---- Program compilation (NVRTC) ----
+
+cl_program clCreateProgramWithSource(cl_context ctx, unsigned count, const char** strings,
+                                      const size_t* lengths, int* err) {
+  auto* prog = new _cl_program;
+  for (unsigned i = 0; i < count; i++) {
+    if (lengths && lengths[i]) {
+      prog->source.append(strings[i], lengths[i]);
+    } else {
+      prog->source.append(strings[i]);
+    }
+  }
+  if (err) *err = CL_SUCCESS;
+  return prog;
+}
+
+cl_program clCreateProgramWithBinary(cl_context ctx, unsigned nDevices, const cl_device_id*,
+                                      const size_t* lengths, const unsigned char** binaries,
+                                      int* binaryStatus, int* err) {
+  // "Binary" in CUDA land = PTX string
+  auto* prog = new _cl_program;
+  if (lengths && binaries && lengths[0] > 0) {
+    prog->ptx.assign((const char*)binaries[0], lengths[0]);
+    prog->compiled = true;
+    // Load the module (JIT-compile PTX to SASS)
+    ensureContextCurrent();
+    CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+    if (r == CUDA_SUCCESS) {
+      prog->moduleLoaded = true;
+      if (binaryStatus) binaryStatus[0] = CL_SUCCESS;
+    } else {
+      fprintf(stderr, "cuModuleLoadData from cache failed: %d, PTX size=%zu\n", (int)r, lengths[0]);
+      prog->compiled = false;
+      if (binaryStatus) binaryStatus[0] = CL_INVALID_BINARY;
+      if (err) { *err = CL_INVALID_BINARY; return prog; }
+    }
+  }
+  if (err) *err = CL_SUCCESS;
+  return prog;
+}
+
+// Build log storage (per-program)
+static string g_lastBuildLog;
+
+int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* devices, const char* options,
+                     unsigned numHeaders, const cl_program* headers, const char* const* headerNames,
+                     void (*)(cl_program, void*), void*) {
+  if (!prog) return CL_INVALID_PROGRAM;
+
+  // Get device arch for NVRTC
+  CUdevice dev = devices ? devices[0]->dev : g_devices[0].dev;
+  int major = 0, minor = 0;
+  cuDeviceGetAttribute(&major, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR, dev);
+  cuDeviceGetAttribute(&minor, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR, dev);
+
+  char archOpt[32];
+  snprintf(archOpt, sizeof(archOpt), "--gpu-architecture=sm_%d%d", major, minor);
+
+  // Parse OpenCL options string into NVRTC options
+  // Convert OpenCL build options to NVRTC equivalents:
+  //   -cl-std=CL2.0         → -std=c++17
+  //   -cl-finite-math-only  → --fmad=true (enable FMA contraction, the safe subset)
+  //   -Dfoo=bar             → -Dfoo=bar (pass through)
+  vector<string> nvrtcOpts;
+  nvrtcOpts.push_back(archOpt);
+  nvrtcOpts.push_back("-default-device");
+  nvrtcOpts.push_back("-std=c++17");
+  nvrtcOpts.push_back("-w");  // Suppress NVRTC macro redefinition warnings
+
+  // FMA contraction: OpenCL uses -cl-finite-math-only + #pragma OPENCL FP_CONTRACT ON
+  // to allow the compiler to contract a*b+c into FMA instructions. NVRTC's --fmad=true
+  // is the safe equivalent — it ONLY enables FMA contraction without the dangerous
+  // parts of -use_fast_math (no flush-to-zero, no reduced-precision division/sqrt).
+  // This is critical for FFT performance: every butterfly is multiply-add pairs.
+  nvrtcOpts.push_back("--fmad=true");
+
+  // NOTE: --restrict (all kernel pointers are __restrict__) was tested but causes GPU read
+  // errors — some PRPLL kernels use in-place operations where in/out buffers alias.
+  // Do NOT enable globally. The compiler still auto-uses __ldg() for const pointers on sm_35+.
+
+  // Debug: dump full options string
+  {
+    static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+    static bool dumpedOpts = false;
+    if (dumpPrefix && !dumpedOpts && options) {
+      dumpedOpts = true;
+      fprintf(stderr, "clCompileProgram options: [%s]\n", options);
+      FILE* optLog = fopen("kernel_regs.log", "a");
+      if (optLog) { fprintf(optLog, "clCompileProgram options: [%s]\n", options); fclose(optLog); }
+    }
+  }
+
+  if (options) {
+    istringstream iss(options);
+    string tok;
+    while (iss >> tok) {
+      if (tok.substr(0, 2) == "-D") {
+        // Fix AMD-only FFT variants for NVIDIA: variant_W=0 and variant_H=0 require
+        // AMD builtins (__builtin_amdgcn_ds_bpermute etc). Replace with variant 2.
+        // FFT_VARIANT is a 3-digit number WMH: e.g. 000, 101, 202
+        if (tok.find("FFT_VARIANT=") != string::npos) {
+          size_t eqPos = tok.find('=');
+          string valStr = tok.substr(eqPos + 1);
+          // Strip trailing 'u' suffix
+          if (!valStr.empty() && valStr.back() == 'u') valStr.pop_back();
+          int val = atoi(valStr.c_str());
+          int vW = val / 100;
+          int vM = (val % 100) / 10;
+          int vH = val % 10;
+          if (vW == 0) vW = 2;  // AMD BCAST → NVIDIA generic
+          if (vH == 0) vH = 2;
+          int newVal = vW * 100 + vM * 10 + vH;
+          tok = "-DFFT_VARIANT=" + to_string(newVal) + "u";
+        }
+        nvrtcOpts.push_back(tok);
+      } else if (tok == "-cl-finite-math-only" || tok == "-cl-fast-relaxed-math") {
+        // FMA contraction already enabled above via --fmad=true.
+        // Do NOT use -use_fast_math here — it enables flush-to-zero and
+        // reduced-precision division/sqrt which breaks tailMul accuracy.
+      }
+      // Skip other -cl-* options (not applicable to NVRTC)
+    }
+  }
+
+  // Build NVRTC headers from the cl_program header array
+  vector<pair<string, string>> nvrtcHeaders;
+
+  // Add all OpenCL source headers
+  for (unsigned i = 0; i < numHeaders; i++)  {
+    // First header: opencl_compat.cuh (inject as virtual NVRTC header)
+    if (i == 0) {
+      nvrtcHeaders.push_back({"opencl_compat.cuh", headers[0]->source});
+    }
+    // Remaining headers need preprocessing
+    else if (headers[i] && headerNames[i]) {
+      // Preprocess OpenCL source for CUDA compatibility
+      string processedSrc = NvrtcProgram::preprocessOpenCL(headers[i]->source);
+      // Debug: verify KERNEL macro replacement
+      {
+        static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+        if (dumpPrefix && string(headerNames[i]) == "base.cl") {
+          auto pos = processedSrc.find("KERNEL");
+          if (pos != string::npos) {
+            string ctx = processedSrc.substr(pos > 20 ? pos-20 : 0, 120);
+            fprintf(stderr, "base.cl KERNEL context: [%s]\n", ctx.c_str());
+          }
+        }
+      }
+      nvrtcHeaders.push_back({headerNames[i], processedSrc});
+    }
+  }
+
+  // Preprocess the main source
+  string processedSource = NvrtcProgram::preprocessOpenCL(prog->source);
+
+  // Prepend opencl_compat.cuh include if not already there
+  if (processedSource.find("opencl_compat.cuh") == string::npos) {
+    processedSource = "#include \"opencl_compat.cuh\"\n" + processedSource;
+  }
+
+  // Debug: dump preprocessed source when PRPLL_DUMP_PTX is set
+  {
+    static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+    if (dumpPrefix) {
+      static int srcCount = 0;
+      char fname[512];
+      snprintf(fname, sizeof(fname), "%s_src_%d.cu", dumpPrefix, srcCount++);
+      FILE* f = fopen(fname, "w");
+      if (f) {
+        fwrite(processedSource.c_str(), 1, processedSource.size(), f);
+        fclose(f);
+        fprintf(stderr, "Source dumped to %s (%zu bytes)\n", fname, processedSource.size());
+      }
+    }
+  }
+
+  // Store preprocessed source for __launch_bounds__ parsing in clCreateKernel
+  prog->preprocessedSource = processedSource;
+  for (auto& [name, src] : nvrtcHeaders) {
+    prog->preprocessedSource += "\n";
+    prog->preprocessedSource += src;
+  }
+
+  // Debug: dump NVRTC options when dumping PTX
+  {
+    static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+    static bool dumpedOnce = false;
+    if (dumpPrefix && !dumpedOnce) {
+      dumpedOnce = true;
+      fprintf(stderr, "NVRTC options (%zu):\n", nvrtcOpts.size());
+      for (auto& o : nvrtcOpts) fprintf(stderr, "  %s\n", o.c_str());
+    }
+  }
+
+  try {
+    prog->ptx = NvrtcProgram::compile(processedSource, "prpll_kernel.cu", nvrtcOpts, nvrtcHeaders);
+    prog->compiled = true;
+    g_lastBuildLog.clear();
+    return CL_SUCCESS;
+  } catch (const exception& e) {
+    g_lastBuildLog = e.what();
+    prog->compiled = false;
+    fprintf(stderr, "NVRTC COMPILE FAILED: %s\n", e.what());
+    // Dump the full preprocessed source for debugging
+    {
+      char fname[64];
+      static int failCount = 0;
+      snprintf(fname, sizeof(fname), "prpll_fail_%d.cu", failCount++);
+      FILE* f = fopen(fname, "w");
+      if (f) {
+        fprintf(f, "// === FAILED Main source ===\n%s\n", processedSource.c_str());
+        for (auto& [name, src] : nvrtcHeaders) {
+          fprintf(f, "\n// === Header: %s (%zu bytes) ===\n%s\n", name.c_str(), src.size(), src.c_str());
+        }
+        fclose(f);
+        fprintf(stderr, "Dumped failed source to %s\n", fname);
+      }
+    }
+    return CL_COMPILE_PROGRAM_FAILURE;
+  }
+}
+
+cl_program clLinkProgram(cl_context ctx, unsigned nDevices, const cl_device_id*,
+                          const char* options, unsigned nProgs, const cl_program* progs,
+                          void (*)(cl_program, void*), void*, int* err) {
+  ensureContextCurrent();
+  // In CUDA, compilation produces PTX directly — no separate link step needed.
+  // Just load the PTX as a CUmodule.
+  if (!progs || nProgs == 0 || !progs[0] || !progs[0]->compiled) {
+    if (err) *err = CL_LINK_PROGRAM_FAILURE;
+    return nullptr;
+  }
+
+  auto* linked = new _cl_program;
+  linked->ptx = progs[0]->ptx;
+  linked->compiled = true;
+  // Carry preprocessed source through for KERNEL(N) parsing in clCreateKernel
+  for (unsigned i = 0; i < nProgs; ++i) {
+    if (progs[i] && !progs[i]->preprocessedSource.empty()) {
+      linked->preprocessedSource += progs[i]->preprocessedSource;
+      linked->preprocessedSource += "\n";
+    }
+  }
+
+  // Use cuModuleLoadDataEx with error log to see JIT errors
+  char jitErrorLog[8192] = {};
+  char jitInfoLog[4096] = {};
+  CUjit_option jitOpts[] = {
+    CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES, CU_JIT_ERROR_LOG_BUFFER,
+    CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES, CU_JIT_INFO_LOG_BUFFER
+  };
+  void* jitOptVals[] = {
+    (void*)(size_t)sizeof(jitErrorLog), (void*)jitErrorLog,
+    (void*)(size_t)sizeof(jitInfoLog), (void*)jitInfoLog
+  };
+  CUresult r = cuModuleLoadDataEx(&linked->module, linked->ptx.c_str(), 4, jitOpts, jitOptVals);
+  if (r != CUDA_SUCCESS) {
+    const char* errName = nullptr;
+    cuGetErrorName(r, &errName);
+    fprintf(stderr, "cuModuleLoadData FAILED: %s (%d)\n", errName ? errName : "?", (int)r);
+    if (jitErrorLog[0]) fprintf(stderr, "JIT error log: %s\n", jitErrorLog);
+    if (jitInfoLog[0]) fprintf(stderr, "JIT info log: %s\n", jitInfoLog);
+    // Dump first 2000 chars of PTX for debugging
+    fprintf(stderr, "PTX size: %zu bytes\n", linked->ptx.size());
+    // Dump full PTX to file
+    {
+      FILE* ptxFile = fopen("failed_ptx.ptx", "w");
+      if (ptxFile) {
+        fwrite(linked->ptx.c_str(), 1, linked->ptx.size(), ptxFile);
+        fclose(ptxFile);
+        fprintf(stderr, "Dumped failed PTX to failed_ptx.ptx\n");
+      }
+    }
+    delete linked;
+    if (err) *err = CL_LINK_PROGRAM_FAILURE;
+    return nullptr;
+  }
+  linked->moduleLoaded = true;
+
+  // Dump PTX to file when PRPLL_DUMP_PTX is set (e.g., PRPLL_DUMP_PTX=kernel)
+  // Creates files like kernel_0.ptx, kernel_1.ptx, etc.
+  {
+    static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+    if (dumpPrefix) {
+      static int ptxCount = 0;
+      char fname[512];
+      snprintf(fname, sizeof(fname), "%s_%d.ptx", dumpPrefix, ptxCount++);
+      FILE* f = fopen(fname, "w");
+      if (f) {
+        fwrite(linked->ptx.c_str(), 1, linked->ptx.size(), f);
+        fclose(f);
+        fprintf(stderr, "PTX dumped to %s (%zu bytes)\n", fname, linked->ptx.size());
+      }
+    }
+  }
+
+  if (err) *err = CL_SUCCESS;
+  return linked;
+}
+
+int clBuildProgram(cl_program prog, unsigned nDevices, const cl_device_id* devices,
+                   const char* options, void (*)(cl_program, void*), void*) {
+  // If the program was loaded from binary (cached PTX) and already has a module,
+  // skip recompilation — the module is already JIT'd and ready.
+  if (prog && prog->moduleLoaded) {
+    return CL_SUCCESS;
+  }
+
+  // clBuildProgram = compile + link in one step
+  int err = clCompileProgram(prog, nDevices, devices, options, 0, nullptr, nullptr, nullptr, nullptr);
+  if (err != CL_SUCCESS) return err;
+
+  CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+  if (r != CUDA_SUCCESS) return CL_BUILD_PROGRAM_FAILURE;
+  prog->moduleLoaded = true;
+  return CL_SUCCESS;
+}
+
+int clGetProgramBuildInfo(cl_program prog, cl_device_id, cl_program_build_info info,
+                           size_t size, void* value, size_t* sizeRet) {
+  if (info == CL_PROGRAM_BUILD_LOG) {
+    size_t len = g_lastBuildLog.size() + 1;
+    if (sizeRet) *sizeRet = len;
+    if (value && size >= len) {
+      memcpy(value, g_lastBuildLog.c_str(), len);
+    }
+  }
+  return CL_SUCCESS;
+}
+
+int clGetProgramInfo(cl_program prog, cl_program_info info, size_t size, void* value, size_t* sizeRet) {
+  if (!prog) return CL_INVALID_PROGRAM;
+  if (info == CL_PROGRAM_BINARY_SIZES) {
+    size_t ptxSize = prog->ptx.size();
+    if (sizeRet) *sizeRet = sizeof(size_t);
+    if (value && size >= sizeof(size_t)) memcpy(value, &ptxSize, sizeof(size_t));
+  } else if (info == CL_PROGRAM_BINARIES) {
+    if (sizeRet) *sizeRet = sizeof(unsigned char*);
+    if (value && size >= sizeof(unsigned char*)) {
+      unsigned char** ptrs = (unsigned char**)value;
+      if (ptrs[0]) memcpy(ptrs[0], prog->ptx.data(), prog->ptx.size());
+    }
+  }
+  return CL_SUCCESS;
+}
+
+// ---- Kernel ----
+
+cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
+  ensureContextCurrent();
+  if (!prog || !prog->moduleLoaded) {
+    if (err) *err = CL_INVALID_PROGRAM;
+    return nullptr;
+  }
+  auto* k = new _cl_kernel;
+  k->name = name;
+  k->parentModule = prog->module;
+  CUresult r = cuModuleGetFunction(&k->func, prog->module, name);
+  if (r != CUDA_SUCCESS) {
+    fprintf(stderr, "cuModuleGetFunction('%s') failed: %d, moduleLoaded=%d, module=%p\n",
+            name, (int)r, prog->moduleLoaded, (void*)prog->module);
+    delete k;
+    if (err) *err = CL_INVALID_KERNEL_NAME;
+    return nullptr;
+  }
+
+  // Shared memory carveout: default adaptive carveout is optimal for mixed kernel workloads.
+
+  // Log register and shared memory usage per kernel when PRPLL_DUMP_PTX is set
+  {
+    static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+    if (dumpPrefix) {
+      int numRegs = 0, shmem = 0, maxThreads = 0;
+      cuFuncGetAttribute(&numRegs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
+      cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
+      cuFuncGetAttribute(&maxThreads, CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK, k->func);
+      fprintf(stderr, "  %-25s: %3d regs, %5d shmem, maxThreads=%d\n", name, numRegs, shmem, maxThreads);
+      // Also write to file since WSL2+CUDA swallows stderr
+      FILE* regLog = fopen("kernel_regs.log", "a");
+      if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, maxThreads=%d\n", name, numRegs, shmem, maxThreads); fclose(regLog); }
+    }
+  }
+
+  // Parse .maxntid from PTX to get __launch_bounds__ value.
+  // PTX pattern: .visible .entry <name>(...)\n.maxntid N, 1, 1
+  k->reqWorkGroupSize = 256; // fallback
+  {
+    const string& ptx = prog->ptx;
+    string entryPattern = ".entry " + string(name) + "(";
+    size_t pos = ptx.find(entryPattern);
+    if (pos != string::npos) {
+      // Found the kernel entry. Now find .maxntid before the next .entry or opening brace
+      size_t searchEnd = ptx.find(".entry ", pos + 1);
+      if (searchEnd == string::npos) searchEnd = ptx.size();
+      string maxntidPattern = ".maxntid ";
+      size_t mpos = ptx.find(maxntidPattern, pos);
+      if (mpos != string::npos && mpos < searchEnd) {
+        int val = atoi(ptx.c_str() + mpos + maxntidPattern.size());
+        if (val > 0) {
+          k->reqWorkGroupSize = val;
+        }
+      }
+    }
+  }
+
+  if (err) *err = CL_SUCCESS;
+  return k;
+}
+
+int clReleaseKernel(cl_kernel k) {
+  delete k;
+  return CL_SUCCESS;
+}
+
+int clSetKernelArg(cl_kernel k, unsigned pos, size_t size, const void* value) {
+  if (!k) return CL_INVALID_KERNEL;
+
+  // Detect cl_mem buffer arguments and convert to CUdeviceptr.
+  // In OpenCL, buffer args are set with clSetKernelArg(k, i, sizeof(cl_mem), &memobj).
+  // sizeof(cl_mem) == sizeof(void*) == 8 on 64-bit. The value at 'value' is a cl_mem pointer.
+  // We need to store the CUdeviceptr (GPU address) instead of the cl_mem (host pointer).
+  if (size == sizeof(cl_mem) && value) {
+    cl_mem mem = *(cl_mem*)value;
+    if (mem && g_allocatedBuffers.count(mem)) {
+      CUdeviceptr devPtr = mem->ptr;
+      k->setArg(pos, sizeof(CUdeviceptr), &devPtr);
+      return CL_SUCCESS;
+    }
+    // NULL cl_mem → pass a null device pointer
+    if (!mem) {
+      CUdeviceptr devPtr = 0;
+      k->setArg(pos, sizeof(CUdeviceptr), &devPtr);
+      return CL_SUCCESS;
+    }
+  }
+
+  k->setArg(pos, size, value);
+  return CL_SUCCESS;
+}
+
+// ---- Buffer ----
+
+cl_mem clCreateBuffer(cl_context ctx, cl_mem_flags flags, size_t size, void* hostPtr, int* err) {
+  auto* buf = new _cl_mem;
+  buf->size = size;
+  ensureContextCurrent();
+  CUresult r = cuMemAlloc(&buf->ptr, size);
+  if (r != CUDA_SUCCESS) {
+    delete buf;
+    if (err) *err = CL_MEM_OBJECT_ALLOCATION_FAILURE;
+    return nullptr;
+  }
+  // Handle CL_MEM_COPY_HOST_PTR
+  if ((flags & CL_MEM_COPY_HOST_PTR) && hostPtr) {
+    cuMemcpyHtoD(buf->ptr, hostPtr, size);
+  }
+  g_allocatedBuffers.insert(buf);
+  if (err) *err = CL_SUCCESS;
+  return buf;
+}
+
+int clReleaseMemObject(cl_mem buf) {
+  if (buf) {
+    ensureContextCurrent();
+    g_allocatedBuffers.erase(buf);
+    cuMemFree(buf->ptr);
+    delete buf;
+  }
+  return CL_SUCCESS;
+}
+
+// ---- Command Queue ----
+
+cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id dev,
+                                                     const cl_queue_properties* props, int* err) {
+  auto* q = new _cl_command_queue;
+  q->context = ctx;
+  q->profiling = false;
+
+  // Check for profiling flag
+  if (props) {
+    for (int i = 0; props[i]; i += 2) {
+      if (props[i] == CL_QUEUE_PROPERTIES && (props[i+1] & CL_QUEUE_PROFILING_ENABLE)) {
+        q->profiling = true;
+      }
+    }
+  }
+
+  // Make sure context is current
+  cuCtxSetCurrent(ctx->ctx);
+  CUresult r = cuStreamCreate(&q->stream, CU_STREAM_NON_BLOCKING);
+  if (r != CUDA_SUCCESS) {
+    delete q;
+    if (err) *err = CL_OUT_OF_RESOURCES;
+    return nullptr;
+  }
+  if (err) *err = CL_SUCCESS;
+  return q;
+}
+
+// ---- Enqueue operations ----
+
+int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
+                            const size_t* globalOffset, const size_t* globalSize,
+                            const size_t* localSize, unsigned nWaits,
+                            const cl_event* waits, cl_event* event) {
+  if (!q || !k) return CL_INVALID_VALUE;
+  ensureContextCurrent();
+
+  size_t gs = globalSize[0];
+  size_t ls = localSize ? localSize[0] : 256;
+  size_t numBlocks = (gs + ls - 1) / ls;
+
+  // Build args array
+  void* argPtrs[_cl_kernel::MAX_ARGS];
+  k->buildArgPointers(argPtrs);
+
+  // Env-gated kernel profiling (PRPLL_PROFILE=1) — takes priority over event profiling
+  static bool doProfile = (getenv("PRPLL_PROFILE") != nullptr);
+
+  // Event handling (skipped when env profiler is active)
+  if (!doProfile && event && q->profiling) {
+    auto* ev = new _cl_event;
+    cuEventCreate(&ev->start, CU_EVENT_DEFAULT);
+    cuEventCreate(&ev->end, CU_EVENT_DEFAULT);
+    ev->hasTimings = true;
+    ev->commandType = CL_COMMAND_NDRANGE_KERNEL;
+    cuEventRecord(ev->start, q->stream);
+    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    cuEventRecord(ev->end, q->stream);
+    *event = ev;
+    return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+  }
+  if (doProfile) {
+    static std::map<std::string, double> kTime;
+    static std::map<std::string, int> kCount;
+    static std::map<std::string, int> kRegs;
+    static std::map<std::string, int> kShmem;
+    static int totalLaunches = 0;
+    static CUevent pStart = nullptr, pEnd = nullptr;
+    if (!pStart) { cuEventCreate(&pStart, CU_EVENT_DEFAULT); cuEventCreate(&pEnd, CU_EVENT_DEFAULT); }
+
+    cuEventRecord(pStart, q->stream);
+    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    cuEventRecord(pEnd, q->stream);
+    cuEventSynchronize(pEnd);
+    float ms = 0;
+    cuEventElapsedTime(&ms, pStart, pEnd);
+    kTime[k->name] += ms;
+    kCount[k->name]++;
+    if (!kRegs.count(k->name)) {
+      int regs = 0, shmem = 0;
+      cuFuncGetAttribute(&regs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
+      cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
+      kRegs[k->name] = regs;
+      kShmem[k->name] = shmem;
+    }
+    totalLaunches++;
+
+    if (totalLaunches % 10000 == 0) {
+      fprintf(stderr, "\n=== NTT KERNEL PROFILE (%d launches) ===\n", totalLaunches);
+      std::vector<std::pair<double, std::string>> sorted;
+      double totalMs = 0;
+      for (auto& [n, t] : kTime) { sorted.push_back({t, n}); totalMs += t; }
+      std::sort(sorted.rbegin(), sorted.rend());
+      for (auto& [t, n] : sorted) {
+        fprintf(stderr, "  %6.1f ms (%5.1f%%) %5d calls  avg %.3f ms  regs=%d shmem=%d  %s\n",
+                t, 100.0*t/totalMs, kCount[n], t/kCount[n], kRegs[n], kShmem[n], n.c_str());
+      }
+      fprintf(stderr, "  TOTAL: %.1f ms\n===\n\n", totalMs);
+    }
+    if (event) *event = nullptr;
+    return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+  }
+
+  CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+  if (r != CUDA_SUCCESS) {
+    const char* errName = nullptr;
+    cuGetErrorName(r, &errName);
+    fprintf(stderr, "cuLaunchKernel FAILED for '%s': %s (%d)\n", k->name.c_str(), errName ? errName : "?", (int)r);
+  }
+
+  if (event) *event = nullptr;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clEnqueueReadBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
+                         size_t offset, size_t size, void* ptr,
+                         unsigned nWaits, const cl_event* waits, cl_event* event) {
+  // Must use stream-ordered copy because the stream was created with CU_STREAM_NON_BLOCKING,
+  // which means cuMemcpyDtoH (NULL stream) won't wait for pending kernels on this stream.
+  CUresult r = cuMemcpyDtoHAsync(ptr, buf->ptr + offset, size, q->stream);
+  if (r == CUDA_SUCCESS && blocking) {
+    r = cuStreamSynchronize(q->stream);
+  }
+  if (event) *event = nullptr;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clEnqueueWriteBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
+                          size_t offset, size_t size, const void* ptr,
+                          unsigned nWaits, const cl_event* waits, cl_event* event) {
+  // Must use stream-ordered copy (same reason as clEnqueueReadBuffer above)
+  CUresult r = cuMemcpyHtoDAsync(buf->ptr + offset, ptr, size, q->stream);
+  if (r == CUDA_SUCCESS && blocking) {
+    r = cuStreamSynchronize(q->stream);
+  }
+  if (event) *event = nullptr;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clEnqueueCopyBuffer(cl_command_queue q, cl_mem src, cl_mem dst,
+                         size_t srcOffset, size_t dstOffset, size_t size,
+                         unsigned nWaits, const cl_event* waits, cl_event* event) {
+  CUresult r = cuMemcpyDtoDAsync(dst->ptr + dstOffset, src->ptr + srcOffset, size, q->stream);
+  if (event) *event = nullptr;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clEnqueueFillBuffer(cl_command_queue q, cl_mem buf, const void* pattern,
+                         size_t patternSize, size_t offset, size_t size,
+                         unsigned nWaits, const cl_event* waits, cl_event* event) {
+  CUresult r;
+  if (patternSize == 1) {
+    unsigned char val;
+    memcpy(&val, pattern, 1);
+    r = cuMemsetD8Async(buf->ptr + offset, val, size, q->stream);
+  } else if (patternSize == 4) {
+    unsigned int val;
+    memcpy(&val, pattern, 4);
+    r = cuMemsetD32Async(buf->ptr + offset, val, size / 4, q->stream);
+  } else {
+    // For other pattern sizes, fall back to memset 0 (common case is zero-fill)
+    r = cuMemsetD8Async(buf->ptr + offset, 0, size, q->stream);
+  }
+  if (event) *event = nullptr;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clEnqueueMarkerWithWaitList(cl_command_queue q, unsigned nWaits,
+                                 const cl_event* waits, cl_event* event) {
+  if (event) {
+    auto* ev = new _cl_event;
+    cuEventCreate(&ev->end, CU_EVENT_DEFAULT);
+    cuEventRecord(ev->end, q->stream);
+    ev->commandType = CL_COMMAND_MARKER;
+    *event = ev;
+  }
+  return CL_SUCCESS;
+}
+
+int clFlush(cl_command_queue q) {
+  // CUDA streams auto-flush; no-op
+  return CL_SUCCESS;
+}
+
+int clFinish(cl_command_queue q) {
+  if (q) cuStreamSynchronize(q->stream);
+  return CL_SUCCESS;
+}
+
+// ---- Events ----
+
+int clReleaseEvent(cl_event ev) {
+  delete ev;
+  return CL_SUCCESS;
+}
+
+int clWaitForEvents(unsigned n, const cl_event* events) {
+  for (unsigned i = 0; i < n; i++) {
+    if (events[i] && events[i]->end) {
+      cuEventSynchronize(events[i]->end);
+    }
+  }
+  return CL_SUCCESS;
+}
+
+int clGetEventInfo(cl_event ev, cl_event_info info, size_t size, void* value, size_t* sizeRet) {
+  if (!ev) return CL_INVALID_VALUE;
+  if (info == CL_EVENT_COMMAND_EXECUTION_STATUS) {
+    int status = CL_COMPLETE;
+    if (ev->end) {
+      CUresult r = cuEventQuery(ev->end);
+      if (r == CUDA_ERROR_NOT_READY) status = CL_RUNNING;
+    }
+    if (sizeRet) *sizeRet = sizeof(int);
+    if (value && size >= sizeof(int)) memcpy(value, &status, sizeof(int));
+  } else if (info == CL_EVENT_COMMAND_TYPE) {
+    u32 type = ev->commandType;
+    if (sizeRet) *sizeRet = sizeof(u32);
+    if (value && size >= sizeof(u32)) memcpy(value, &type, sizeof(u32));
+  }
+  return CL_SUCCESS;
+}
+
+int clGetEventProfilingInfo(cl_event ev, cl_profiling_info info, size_t size, void* value, size_t* sizeRet) {
+  if (!ev || !ev->hasTimings) return CL_PROFILING_INFO_NOT_AVAILABLE;
+
+  // CUDA events give elapsed time between two events, not absolute timestamps.
+  // We fake absolute timestamps by using a base time.
+  u64 timestamp = 0;
+  if (info == CL_PROFILING_COMMAND_START || info == CL_PROFILING_COMMAND_SUBMIT ||
+      info == CL_PROFILING_COMMAND_QUEUED) {
+    timestamp = 0;  // Relative start
+  } else if (info == CL_PROFILING_COMMAND_END || info == CL_PROFILING_COMMAND_COMPLETE) {
+    float ms = 0;
+    cuEventElapsedTime(&ms, ev->start, ev->end);
+    timestamp = (u64)(ms * 1e6);  // Convert ms to ns
+  }
+
+  if (sizeRet) *sizeRet = sizeof(u64);
+  if (value && size >= sizeof(u64)) memcpy(value, &timestamp, sizeof(u64));
+  return CL_SUCCESS;
+}
+
+// ---- Device info ----
+
+int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* value, size_t* sizeRet) {
+  if (!dev) return CL_INVALID_DEVICE;
+
+  switch (info) {
+  case CL_DEVICE_NAME: {
+    char name[256];
+    cuDeviceGetName(name, sizeof(name), dev->dev);
+    size_t len = strlen(name) + 1;
+    if (sizeRet) *sizeRet = len;
+    if (value && size >= len) memcpy(value, name, len);
+    break;
+  }
+  case CL_DEVICE_VENDOR_ID: {
+    // Return NVIDIA vendor ID
+    unsigned int vid = 0x10DE;
+    if (sizeRet) *sizeRet = sizeof(vid);
+    if (value && size >= sizeof(vid)) memcpy(value, &vid, sizeof(vid));
+    break;
+  }
+  case CL_DEVICE_MAX_COMPUTE_UNITS: {
+    int units = 0;
+    cuDeviceGetAttribute(&units, CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT, dev->dev);
+    unsigned int val = units;
+    if (sizeRet) *sizeRet = sizeof(val);
+    if (value && size >= sizeof(val)) memcpy(value, &val, sizeof(val));
+    break;
+  }
+  case CL_DEVICE_MAX_CLOCK_FREQUENCY: {
+    int mhz = 0;
+    cuDeviceGetAttribute(&mhz, CU_DEVICE_ATTRIBUTE_CLOCK_RATE, dev->dev);
+    unsigned int val = mhz / 1000;  // kHz to MHz
+    if (sizeRet) *sizeRet = sizeof(val);
+    if (value && size >= sizeof(val)) memcpy(value, &val, sizeof(val));
+    break;
+  }
+  case CL_DEVICE_GLOBAL_MEM_SIZE: {
+    size_t mem = 0;
+    cuDeviceTotalMem(&mem, dev->dev);
+    u64 val = mem;
+    if (sizeRet) *sizeRet = sizeof(val);
+    if (value && size >= sizeof(val)) memcpy(value, &val, sizeof(val));
+    break;
+  }
+  case CL_DRIVER_VERSION:
+  case CL_DEVICE_VERSION: {
+    int ver = 0;
+    cuDriverGetVersion(&ver);
+    char verStr[64];
+    snprintf(verStr, sizeof(verStr), "CUDA %d.%d", ver / 1000, (ver % 1000) / 10);
+    size_t len = strlen(verStr) + 1;
+    if (sizeRet) *sizeRet = len;
+    if (value && size >= len) memcpy(value, verStr, len);
+    break;
+  }
+  case CL_DEVICE_ERROR_CORRECTION_SUPPORT: {
+    int ecc = 0;
+    cuDeviceGetAttribute(&ecc, CU_DEVICE_ATTRIBUTE_ECC_ENABLED, dev->dev);
+    cl_bool val = ecc;
+    if (sizeRet) *sizeRet = sizeof(val);
+    if (value && size >= sizeof(val)) memcpy(value, &val, sizeof(val));
+    break;
+  }
+  case CL_DEVICE_BUILT_IN_KERNELS: {
+    const char* empty = "";
+    if (sizeRet) *sizeRet = 1;
+    if (value && size >= 1) memcpy(value, empty, 1);
+    break;
+  }
+  case CL_DEVICE_BOARD_NAME_AMD:
+  case CL_DEVICE_PCIE_ID_AMD:
+  case CL_DEVICE_TOPOLOGY_AMD: {
+    // AMD-specific queries — return failure
+    return CL_INVALID_VALUE;
+  }
+  case CL_DEVICE_GLOBAL_FREE_MEMORY_AMD: {
+    size_t freeMem = 0, totalMem = 0;
+    cuMemGetInfo(&freeMem, &totalMem);
+    // AMD returns in KB
+    u64 freeKB = freeMem / 1024;
+    if (sizeRet) *sizeRet = sizeof(freeKB);
+    if (value && size >= sizeof(freeKB)) memcpy(value, &freeKB, sizeof(freeKB));
+    break;
+  }
+  default:
+    return CL_INVALID_VALUE;
+  }
+  return CL_SUCCESS;
+}
+
+int clGetPlatformInfo(cl_platform_id, cl_device_info info, size_t size, void* value, size_t* sizeRet) {
+  if (info == CL_PLATFORM_VERSION) {
+    const char* ver = "CUDA (via PRPLL CUDA backend)";
+    size_t len = strlen(ver) + 1;
+    if (sizeRet) *sizeRet = len;
+    if (value && size >= len) memcpy(value, ver, len);
+    return CL_SUCCESS;
+  }
+  return CL_INVALID_VALUE;
+}
+
+int clGetCommandQueueInfo(cl_command_queue q, cl_command_queue_info info,
+                           size_t size, void* value, size_t* sizeRet) {
+  if (info == CL_QUEUE_CONTEXT) {
+    if (sizeRet) *sizeRet = sizeof(cl_context);
+    if (value && size >= sizeof(cl_context)) memcpy(value, &q->context, sizeof(cl_context));
+    return CL_SUCCESS;
+  }
+  return CL_INVALID_VALUE;
+}
+
+// ---- Kernel info ----
+
+int clGetKernelInfo(cl_kernel k, cl_kernel_info info, size_t size, void* value, size_t* sizeRet) {
+  if (!k) return CL_INVALID_KERNEL;
+  if (info == CL_KERNEL_NUM_ARGS) {
+    int n = k->numArgs;
+    if (sizeRet) *sizeRet = sizeof(n);
+    if (value && size >= sizeof(n)) memcpy(value, &n, sizeof(n));
+  } else if (info == CL_KERNEL_ATTRIBUTES) {
+    const char* empty = "";
+    if (sizeRet) *sizeRet = 1;
+    if (value && size >= 1) memcpy(value, empty, 1);
+  }
+  return CL_SUCCESS;
+}
+
+int clGetKernelArgInfo(cl_kernel k, unsigned pos, cl_kernel_arg_info info,
+                        size_t size, void* value, size_t* sizeRet) {
+  if (info == CL_KERNEL_ARG_NAME) {
+    char name[32];
+    snprintf(name, sizeof(name), "arg%u", pos);
+    size_t len = strlen(name) + 1;
+    if (sizeRet) *sizeRet = len;
+    if (value && size >= len) memcpy(value, name, len);
+  }
+  return CL_SUCCESS;
+}
+
+int clGetKernelWorkGroupInfo(cl_kernel k, cl_device_id dev, cl_kernel_work_group_info info,
+                              size_t size, void* value, size_t* sizeRet) {
+  if (!k) return CL_INVALID_KERNEL;
+  ensureContextCurrent();
+  if (info == CL_KERNEL_COMPILE_WORK_GROUP_SIZE) {
+    // Return the __launch_bounds__ value parsed from source during clCreateKernel.
+    // This matches OpenCL's CL_KERNEL_COMPILE_WORK_GROUP_SIZE which returns reqd_work_group_size.
+    // Previously we used CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK which returns the hardware max
+    // based on register/shared memory usage — NOT the declared group size. This caused wrong
+    // block sizes for every kernel (e.g., tailMul expected 64 threads but got 1024).
+    int wgSize = k->reqWorkGroupSize > 0 ? k->reqWorkGroupSize : 256;
+    size_t wgs[3] = { (size_t)wgSize, 1, 1 };
+    if (sizeRet) *sizeRet = sizeof(wgs);
+    if (value && size >= sizeof(wgs)) memcpy(value, wgs, sizeof(wgs));
+  }
+  return CL_SUCCESS;
+}
+
+// ---- SVM (not used but must exist) ----
+
+void* clSVMAlloc(cl_context, cl_svm_mem_flags, size_t size, unsigned) {
+  CUdeviceptr ptr;
+  ensureContextCurrent();
+  cuMemAlloc(&ptr, size);
+  return (void*)(uintptr_t)ptr;
+}
+
+void clSVMFree(cl_context, void* ptr) {
+  ensureContextCurrent();
+  cuMemFree((CUdeviceptr)(uintptr_t)ptr);
+}
+
+int clSetKernelArgSVMPointer(cl_kernel k, unsigned pos, const void* ptr) {
+  CUdeviceptr dp = (CUdeviceptr)(uintptr_t)ptr;
+  k->setArg(pos, sizeof(dp), &dp);
+  return CL_SUCCESS;
+}
+
+} // extern "C"
+
+// C++ linkage — must be outside the extern "C" block above.
+
+// Set L2 cache persistence for multiple read-only buffers on the given stream.
+// Computes the minimum address span covering all buffers, then sets one access policy
+// window with hitRatio sized so that only the actual buffer bytes get persisting treatment,
+// not the gaps between non-contiguous allocations.
+void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
+  if (!q) return;
+
+  // Find address span and total data size
+  CUdeviceptr minAddr = ~(CUdeviceptr)0;
+  CUdeviceptr maxAddr = 0;
+  size_t totalDataBytes = 0;
+
+  for (auto buf : buffers) {
+    if (!buf || buf->size == 0) continue;
+    CUdeviceptr lo = buf->ptr;
+    CUdeviceptr hi = buf->ptr + buf->size;
+    if (lo < minAddr) minAddr = lo;
+    if (hi > maxAddr) maxAddr = hi;
+    totalDataBytes += buf->size;
+  }
+
+  if (totalDataBytes == 0 || maxAddr <= minAddr) return;
+
+  size_t spanBytes = (size_t)(maxAddr - minAddr);
+
+  // Query the device's max access policy window size
+  int maxWindowSize = 0;
+  cuDeviceGetAttribute(&maxWindowSize, CU_DEVICE_ATTRIBUTE_MAX_ACCESS_POLICY_WINDOW_SIZE, 0);
+  if (maxWindowSize > 0 && spanBytes > (size_t)maxWindowSize) {
+    fprintf(stderr, "L2 persist: span %zuMB exceeds max window %dMB, clamping\n",
+            spanBytes / (1024*1024), maxWindowSize / (1024*1024));
+    spanBytes = maxWindowSize;
+  }
+
+  // hitRatio = actual data / window span. This way only the real buffer data gets
+  // persisting treatment, and any gaps between allocations get streaming treatment.
+  float hitRatio = (float)totalDataBytes / (float)spanBytes;
+  if (hitRatio > 1.0f) hitRatio = 1.0f;
+
+  CUstreamAttrValue attr;
+  memset(&attr, 0, sizeof(attr));
+  attr.accessPolicyWindow.base_ptr = (void*)(uintptr_t)minAddr;
+  attr.accessPolicyWindow.num_bytes = spanBytes;
+  attr.accessPolicyWindow.hitRatio = hitRatio;
+  attr.accessPolicyWindow.hitProp = CU_ACCESS_PROPERTY_PERSISTING;
+  attr.accessPolicyWindow.missProp = CU_ACCESS_PROPERTY_STREAMING;
+
+  CUresult r = cuStreamSetAttribute(q->stream, CU_STREAM_ATTRIBUTE_ACCESS_POLICY_WINDOW, &attr);
+  if (r != CUDA_SUCCESS) {
+    fprintf(stderr, "L2 persist: cuStreamSetAttribute failed (%d)\n", (int)r);
+  } else {
+    fprintf(stderr, "L2 persist: window %zuMB (%.1f%% hit ratio), %zuMB actual data, %zu buffers\n",
+            spanBytes / (1024*1024), hitRatio * 100.0f, totalDataBytes / (1024*1024),
+            buffers.size());
+  }
+}
+
diff --git a/src/cuda/cudawrap.cpp b/src/cuda/cudawrap.cpp
new file mode 100644
index 00000000..905e34c7
--- /dev/null
+++ b/src/cuda/cudawrap.cpp
@@ -0,0 +1,505 @@
+// CUDA Driver API wrappers implementation
+
+#include "cudawrap.h"
+
+#include <stdexcept>
+#include <sstream>
+#include <cstdio>
+#include <cstdarg>
+#include <cstring>
+
+// Local log function — avoids dependency on PRPLL's log.h/File.h chain
+static void cuda_log(const char* fmt, ...) {
+  va_list args;
+  va_start(args, fmt);
+  vfprintf(stderr, fmt, args);
+  va_end(args);
+}
+
+// ---- Error checking ----
+
+void checkCuda(CUresult err, const char* file, int line, const char* func, const char* expr) {
+  if (err != CUDA_SUCCESS) {
+    const char* errName = nullptr;
+    const char* errStr = nullptr;
+    cuGetErrorName(err, &errName);
+    cuGetErrorString(err, &errStr);
+    char buf[512];
+    snprintf(buf, sizeof(buf), "CUDA error %d (%s): %s at %s:%d in %s: %s",
+             (int)err, errName ? errName : "?", errStr ? errStr : "?",
+             file, line, func, expr);
+    cuda_log("%s\n", buf);
+    throw std::runtime_error(buf);
+  }
+}
+
+void checkNvrtc(nvrtcResult err, const char* file, int line, const char* func, const char* expr) {
+  if (err != NVRTC_SUCCESS) {
+    char buf[512];
+    snprintf(buf, sizeof(buf), "NVRTC error %d (%s) at %s:%d in %s: %s",
+             (int)err, nvrtcGetErrorString(err), file, line, func, expr);
+    cuda_log("%s\n", buf);
+    throw std::runtime_error(buf);
+  }
+}
+
+// ---- Device management ----
+
+std::vector<CUdevice> getAllDevices() {
+  CU_CHECK(cuInit(0));
+  int count = 0;
+  CU_CHECK(cuDeviceGetCount(&count));
+  std::vector<CUdevice> devices(count);
+  for (int i = 0; i < count; ++i) {
+    CU_CHECK(cuDeviceGet(&devices[i], i));
+  }
+  return devices;
+}
+
+std::string getDeviceName(CUdevice dev) {
+  char name[256];
+  CU_CHECK(cuDeviceGetName(name, sizeof(name), dev));
+  return name;
+}
+
+std::string getDriverVersion() {
+  int ver = 0;
+  CU_CHECK(cuDriverGetVersion(&ver));
+  char buf[32];
+  snprintf(buf, sizeof(buf), "%d.%d", ver / 1000, (ver % 1000) / 10);
+  return buf;
+}
+
+float getGpuRamGB(CUdevice dev) {
+  size_t bytes = 0;
+  CU_CHECK(cuDeviceTotalMem(&bytes, dev));
+  return bytes / (1024.0f * 1024.0f * 1024.0f);
+}
+
+u64 getFreeMem(CUdevice dev) {
+  // Need a context to query free memory
+  size_t free_bytes = 0, total = 0;
+  CU_CHECK(cuMemGetInfo(&free_bytes, &total));
+  return free_bytes;
+}
+
+std::string getShortInfo(CUdevice dev) {
+  int major = 0, minor = 0;
+  cuDeviceGetAttribute(&major, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR, dev);
+  cuDeviceGetAttribute(&minor, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR, dev);
+  char buf[256];
+  snprintf(buf, sizeof(buf), "%s (sm_%d%d, %.1f GB)", getDeviceName(dev).c_str(),
+           major, minor, getGpuRamGB(dev));
+  return buf;
+}
+
+// ---- Context ----
+
+CudaContext::CudaContext(CUdevice dev) : device(dev) {
+#if CUDA_VERSION >= 13000
+  CUctxCreateParams params{};
+  CU_CHECK(cuCtxCreate_v4(&ctx, &params, CU_CTX_SCHED_BLOCKING_SYNC, dev));
+#else
+  CU_CHECK(cuCtxCreate(&ctx, CU_CTX_SCHED_BLOCKING_SYNC, dev));
+#endif
+}
+
+CudaContext::~CudaContext() {
+  if (ctx) cuCtxDestroy(ctx);
+}
+
+void CudaContext::makeCurrent() {
+  CU_CHECK(cuCtxSetCurrent(ctx));
+}
+
+// ---- Module ----
+
+CudaModule::CudaModule(const std::string& ptx, const std::string& name) {
+  CUjit_option options[] = { CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES, CU_JIT_ERROR_LOG_BUFFER };
+  char errorLog[4096] = {};
+  void* optionValues[] = { (void*)(size_t)sizeof(errorLog), (void*)errorLog };
+
+  CUresult err = cuModuleLoadDataEx(&module, ptx.c_str(), 2, options, optionValues);
+  if (err != CUDA_SUCCESS) {
+    cuda_log("Module load error for '%s': %s\n", name.c_str(), errorLog);
+    checkCuda(err, __FILE__, __LINE__, __func__, "cuModuleLoadDataEx");
+  }
+}
+
+CudaModule::~CudaModule() {
+  if (module) cuModuleUnload(module);
+}
+
+CUfunction CudaModule::getFunction(const char* name) const {
+  CUfunction func{};
+  CU_CHECK(cuModuleGetFunction(&func, module, name));
+  return func;
+}
+
+// ---- Stream ----
+
+CudaStream::CudaStream() {
+  CU_CHECK(cuStreamCreate(&stream, CU_STREAM_DEFAULT));
+}
+
+CudaStream::~CudaStream() {
+  if (stream) cuStreamDestroy(stream);
+}
+
+void CudaStream::sync() {
+  CU_CHECK(cuStreamSynchronize(stream));
+}
+
+// ---- Buffer ----
+
+CudaBuffer::CudaBuffer(size_t bytes) : bytes(bytes) {
+  if (bytes > 0) {
+    CU_CHECK(cuMemAlloc(&ptr, bytes));
+  }
+}
+
+CudaBuffer::~CudaBuffer() {
+  if (ptr) cuMemFree(ptr);
+}
+
+void CudaBuffer::readSync(void* dst, size_t n) const {
+  assert(n <= bytes);
+  CU_CHECK(cuMemcpyDtoH(dst, ptr, n));
+}
+
+void CudaBuffer::writeSync(const void* src, size_t n) {
+  assert(n <= bytes);
+  CU_CHECK(cuMemcpyHtoD(ptr, src, n));
+}
+
+void CudaBuffer::zero() {
+  if (bytes > 0) {
+    CU_CHECK(cuMemsetD8(ptr, 0, bytes));
+  }
+}
+
+void CudaBuffer::copyFrom(const CudaBuffer& src) {
+  assert(bytes == src.bytes);
+  CU_CHECK(cuMemcpyDtoD(ptr, src.ptr, bytes));
+}
+
+void CudaBuffer::fillPattern(const void* pattern, size_t patternSize) {
+  if (patternSize == 4) {
+    u32 val;
+    memcpy(&val, pattern, 4);
+    CU_CHECK(cuMemsetD32(ptr, val, bytes / 4));
+  } else if (patternSize == 1) {
+    u8 val;
+    memcpy(&val, pattern, 1);
+    CU_CHECK(cuMemsetD8(ptr, val, bytes));
+  } else {
+    // For other sizes, use cuMemsetD32 with multiple passes or copy pattern manually
+    // This is rarely used
+    assert(false && "fillPattern: unsupported pattern size");
+  }
+}
+
+// ---- NVRTC Compilation ----
+
+// Helper: skip balanced parentheses starting at '(' at position i
+static size_t skipBalancedParens(const std::string& s, size_t i) {
+  if (i >= s.size() || s[i] != '(') return i;
+  int depth = 1;
+  i++;
+  while (i < s.size() && depth > 0) {
+    if (s[i] == '(') depth++;
+    else if (s[i] == ')') depth--;
+    i++;
+  }
+  return i;
+}
+
+// Strip OpenCL-specific constructs that NVRTC can't handle:
+// 1. __global/global pointer qualifiers (without breaking __global__)
+// 2. #pragma OPENCL ... directives
+// 3. __attribute__((overloadable)) and __attribute__((reqd_work_group_size(...)))
+// 4. OpenCL vector cast syntax: (type2)(a, b) → make_type2(a, b) [deferred to compat header]
+std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
+  std::string result;
+  result.reserve(source.size());
+  size_t i = 0;
+  while (i < source.size()) {
+    // Strip #pragma OPENCL ... lines
+    if (i + 14 <= source.size() && source.compare(i, 14, "#pragma OPENCL") == 0) {
+      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      if (atLineStart) {
+        while (i < source.size() && source[i] != '\n') i++;
+        result += "// [stripped pragma]";
+        continue;
+      }
+    }
+
+    // Replace base.cl's KERNEL macro with CUDA-compatible version
+    // OpenCL: #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
+    // CUDA:   #define KERNEL(x) extern "C" __global__ void __launch_bounds__(x)
+    if (i + 15 <= source.size() && source.compare(i, 15, "#define KERNEL(") == 0) {
+      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      if (atLineStart) {
+        while (i < source.size() && source[i] != '\n') i++;
+        result += "#ifdef CUDA_MIN_BLOCKS\n";
+        result += "#define KERNEL(x) extern \"C\" __global__ void __launch_bounds__(x, CUDA_MIN_BLOCKS)\n";
+        result += "#else\n";
+        result += "#define KERNEL(x) extern \"C\" __global__ void __launch_bounds__(x)\n";
+        result += "#endif";
+        continue;
+      }
+    }
+
+    // Strip base.cl's OpenCL typedefs that conflict with opencl_compat.cuh
+    // Only strip exact OpenCL patterns (using OpenCL types like 'long', 'ulong', 'uint')
+    // NOT our compat header's versions (which use 'long long', 'unsigned long long', etc.)
+    if (i + 7 <= source.size() && source.compare(i, 7, "typedef") == 0) {
+      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      if (atLineStart) {
+        size_t lineEnd = source.find('\n', i);
+        if (lineEnd == std::string::npos) lineEnd = source.size();
+        std::string line = source.substr(i, lineEnd - i);
+        // Strip trailing whitespace/CR for comparison
+        while (!line.empty() && (line.back() == ' ' || line.back() == '\r')) line.pop_back();
+        // Only strip the EXACT OpenCL patterns from base.cl:
+        if (line == "typedef int i32;" ||
+            line == "typedef uint u32;" ||
+            line == "typedef long i64;" ||
+            line == "typedef ulong u64;") {
+          result += "// [stripped OpenCL typedef]";
+          i = lineEnd;
+          continue;
+        }
+      }
+    }
+
+    // Convert vector array access: .a[0] → .a.x, .a[1] → .a.y
+    // OpenCL allows vec2[i] indexing; CUDA uses .x/.y member access.
+    // Used in fftp.cl: union { uint2 a; u64 b; } m31_combo; #define frac_bits m31_combo.a[0]
+    if (i + 5 <= source.size() && source.compare(i, 5, ".a[0]") == 0) {
+      result += ".a.x";
+      i += 5;
+      continue;
+    }
+    if (i + 5 <= source.size() && source.compare(i, 5, ".a[1]") == 0) {
+      result += ".a.y";
+      i += 5;
+      continue;
+    }
+
+    // Handle __attribute__((...)) for overloadable and reqd_work_group_size
+    if (i + 15 <= source.size() && source.compare(i, 15, "__attribute__((") == 0) {
+      size_t nameStart = i + 15;
+      if (nameStart + 12 <= source.size() && source.compare(nameStart, 12, "overloadable") == 0) {
+        // Strip __attribute__((overloadable)) — C++ has native overloading
+        i = skipBalancedParens(source, i + 13);
+        while (i < source.size() && source[i] == ' ') i++;
+        continue;
+      }
+      if (nameStart + 20 <= source.size() && source.compare(nameStart, 20, "reqd_work_group_size") == 0) {
+        // Convert __attribute__((reqd_work_group_size(N, 1, 1))) → __launch_bounds__(N)
+        // Extract the first number from the args
+        size_t argsStart = nameStart + 20;
+        while (argsStart < source.size() && source[argsStart] == '(') argsStart++;
+        size_t numEnd = argsStart;
+        while (numEnd < source.size() && source[numEnd] >= '0' && source[numEnd] <= '9') numEnd++;
+        if (numEnd > argsStart) {
+          std::string wgSize = source.substr(argsStart, numEnd - argsStart);
+          result += "__launch_bounds__(" + wgSize + ") ";
+        }
+        // Skip past the entire __attribute__((...))
+        i = skipBalancedParens(source, i + 13);
+        while (i < source.size() && source[i] == ' ') i++;
+        continue;
+      }
+    }
+
+    // Convert OpenCL vector cast syntax: (type2)(a, b) → make_type2(a, b)
+    // Matches: (double2), (float2), (int2), (uint2), (long2), (ulong2)
+    if (source[i] == '(' && i + 1 < source.size()) {
+      static const char* vecTypes[] = {
+        "double2)", "float2)", "int2)", "uint2)", "long2)", "ulong2)", "Word2)", nullptr
+      };
+      static const char* makeNames[] = {
+        "make_double2", "make_float2", "make_int2", "make_uint2", "make_long2", "make_ulong2", "make_Word2"
+      };
+      bool matched = false;
+      for (int vi = 0; vecTypes[vi]; vi++) {
+        size_t tlen = strlen(vecTypes[vi]);
+        if (i + 1 + tlen <= source.size() && source.compare(i + 1, tlen, vecTypes[vi]) == 0) {
+          // Check what follows: should be whitespace then '(' for a cast constructor
+          size_t after = i + 1 + tlen;
+          while (after < source.size() && source[after] == ' ') after++;
+          if (after < source.size() && source[after] == '(') {
+            // It's (type2) (args) — replace with make_type2(args)
+            result += makeNames[vi];
+            i = after;  // now pointing at '(' of args
+            matched = true;
+            break;
+          }
+          // Also handle (type2){args} — less common but possible
+          if (after < source.size() && source[after] == '{') {
+            result += makeNames[vi];
+            result += '(';
+            i = after + 1;  // skip '{'
+            // Find matching '}' and replace with ')'
+            int depth = 1;
+            while (i < source.size() && depth > 0) {
+              if (source[i] == '{') depth++;
+              else if (source[i] == '}') { depth--; if (depth == 0) { result += ')'; i++; break; } }
+              else result += source[i];
+              i++;
+            }
+            matched = true;
+            break;
+          }
+        }
+      }
+      if (matched) continue;
+    }
+
+    // Convert "local TYPE NAME[" to "__shared__ TYPE NAME[" for shared memory declarations
+    // This handles: "  local T2 lds[WIDTH / 4];" → "  __shared__ T2 lds[WIDTH / 4];"
+    // Also handles: "  local T lds[IN_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];"
+    // But NOT: "local T2 *lds" in function params (which becomes just "T2 *lds" via macro)
+    if (i + 6 <= source.size() && source.compare(i, 6, "local ") == 0) {
+      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+      if (!preceded) {
+        // Check if this "local" is followed by a type then a name then '['
+        // i.e., it's a shared memory array declaration
+        size_t lineEnd = source.find('\n', i);
+        if (lineEnd == std::string::npos) lineEnd = source.size();
+        std::string line = source.substr(i, lineEnd - i);
+        // Match: "local TYPE IDENT[" pattern — indicates array declaration
+        // Array declarations have '[' and end with ';'. They may also contain '(' in
+        // the array size expression (e.g., ternary operators). The key distinction is
+        // that function parameters don't have '['.
+        if (line.find('[') != std::string::npos) {
+          result += "__shared__ ";
+          i += 6;  // skip "local "
+          continue;
+        }
+        // For everything else (params, casts), just skip "local " → empty
+        i += 6;
+        continue;
+      }
+    }
+    // Same for __local
+    if (i + 8 <= source.size() && source.compare(i, 8, "__local ") == 0) {
+      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+      if (!preceded) {
+        size_t lineEnd = source.find('\n', i);
+        if (lineEnd == std::string::npos) lineEnd = source.size();
+        std::string line = source.substr(i, lineEnd - i);
+        if (line.find('[') != std::string::npos) {
+          result += "__shared__ ";
+          i += 8;
+          continue;
+        }
+        i += 8;
+        continue;
+      }
+    }
+
+    // Replace "n" constraint with "r" in PTX asm (NVRTC requires true constants for "n")
+    // Match: "n"( → "r"(
+    if (i + 3 <= source.size() && source.compare(i, 3, "\"n\"") == 0) {
+      // Check we're inside an asm statement context (look for preceding ':')
+      // Simple heuristic: if the previous non-whitespace char is ':', ':' + space, or ','
+      size_t back = i;
+      while (back > 0 && (source[back-1] == ' ' || source[back-1] == '\t')) back--;
+      if (back > 0 && (source[back-1] == ':' || source[back-1] == ',')) {
+        result += "\"r\"";
+        i += 3;
+        continue;
+      }
+    }
+
+    // Match __global NOT followed by _
+    if (i + 8 <= source.size() && source.compare(i, 8, "__global") == 0) {
+      if (i + 8 < source.size() && source[i + 8] == '_') {
+        result += source[i++];
+      } else {
+        bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+        if (preceded) {
+          result += source[i++];
+        } else {
+          i += 8;
+        }
+      }
+    }
+    // Match standalone "global" (not inside a word or PTX instruction)
+    else if (i + 6 <= source.size() && source.compare(i, 6, "global") == 0) {
+      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_' || source[i-1] == '.'));
+      bool followed = (i + 6 < source.size() && (isalnum(source[i + 6]) || source[i + 6] == '_'));
+      if (!preceded && !followed) {
+        i += 6;
+      } else {
+        result += source[i++];
+      }
+    } else {
+      result += source[i++];
+    }
+  }
+  return result;
+}
+
+std::string NvrtcProgram::compile(const std::string& source, const std::string& name,
+                                   const std::vector<std::string>& options,
+                                   const std::vector<std::pair<std::string, std::string>>& headers) {
+  // Prepare header arrays
+  std::vector<const char*> headerSources, headerNames;
+  for (auto& [hName, hSource] : headers) {
+    headerNames.push_back(hName.c_str());
+    headerSources.push_back(hSource.c_str());
+  }
+
+  nvrtcProgram prog;
+  NVRTC_CHECK(nvrtcCreateProgram(&prog, source.c_str(), name.c_str(),
+                                  (int)headers.size(),
+                                  headerSources.empty() ? nullptr : headerSources.data(),
+                                  headerNames.empty() ? nullptr : headerNames.data()));
+
+  // Convert options to char*
+  std::vector<const char*> opts;
+  for (auto& o : options) opts.push_back(o.c_str());
+
+  nvrtcResult compileResult = nvrtcCompileProgram(prog, (int)opts.size(), opts.data());
+
+  // Get compilation log
+  size_t logSize;
+  nvrtcGetProgramLogSize(prog, &logSize);
+  if (logSize > 1) {
+    std::string compileLog(logSize, '\0');
+    nvrtcGetProgramLog(prog, compileLog.data());
+    if (compileResult != NVRTC_SUCCESS) {
+      cuda_log("NVRTC compile error for '%s':\n%s\n", name.c_str(), compileLog.c_str());
+    }
+  }
+
+  if (compileResult != NVRTC_SUCCESS) {
+    nvrtcDestroyProgram(&prog);
+    throw std::runtime_error("NVRTC compilation failed for " + name);
+  }
+
+  // Get PTX
+  size_t ptxSize;
+  NVRTC_CHECK(nvrtcGetPTXSize(prog, &ptxSize));
+  std::string ptx(ptxSize, '\0');
+  NVRTC_CHECK(nvrtcGetPTX(prog, ptx.data()));
+
+  nvrtcDestroyProgram(&prog);
+  return ptx;
+}
+
+// ---- Kernel launcher ----
+
+void CudaKernelLauncher::launch(CUstream stream, u32 gridSize, void** args, u32 sharedMem) {
+  CU_CHECK(cuLaunchKernel(func,
+                           gridSize, 1, 1,   // grid dimensions
+                           blockSize, 1, 1,   // block dimensions
+                           sharedMem,         // shared memory bytes
+                           stream,            // stream
+                           args,              // kernel arguments
+                           nullptr));         // extra
+}
diff --git a/src/cuda/cudawrap.h b/src/cuda/cudawrap.h
new file mode 100644
index 00000000..bd0e6e46
--- /dev/null
+++ b/src/cuda/cudawrap.h
@@ -0,0 +1,138 @@
+// CUDA Driver API wrappers, parallel to clwrap.h for OpenCL.
+// Uses the CUDA Driver API (cu*) for maximum control.
+
+#pragma once
+
+#include <cuda.h>
+#include <nvrtc.h>
+#include <string>
+#include <vector>
+#include <memory>
+#include <array>
+#include <cassert>
+
+// Types — when building standalone tests, define minimal types.
+// When building as part of PRPLL, common.h is already included.
+#if __has_include("../common.h") && !defined(CUDAWRAP_STANDALONE)
+#include "../common.h"
+#else
+#ifndef CUDAWRAP_TYPES_DEFINED
+#define CUDAWRAP_TYPES_DEFINED
+typedef unsigned int u32;
+typedef unsigned long long u64;
+typedef unsigned char u8;
+#endif
+#endif
+
+// ---- Error checking ----
+void checkCuda(CUresult err, const char* file, int line, const char* func, const char* expr);
+void checkNvrtc(nvrtcResult err, const char* file, int line, const char* func, const char* expr);
+
+#define CU_CHECK(expr) checkCuda((expr), __FILE__, __LINE__, __func__, #expr)
+#define NVRTC_CHECK(expr) checkNvrtc((expr), __FILE__, __LINE__, __func__, #expr)
+
+// ---- Device management ----
+std::vector<CUdevice> getAllDevices();
+std::string getDeviceName(CUdevice dev);
+std::string getDriverVersion();
+float getGpuRamGB(CUdevice dev);
+u64 getFreeMem(CUdevice dev);
+std::string getShortInfo(CUdevice dev);
+
+// ---- Context ----
+class CudaContext {
+  CUcontext ctx{};
+  CUdevice device{};
+public:
+  explicit CudaContext(CUdevice dev);
+  ~CudaContext();
+
+  CUcontext get() const { return ctx; }
+  CUdevice getDevice() const { return device; }
+  void makeCurrent();
+};
+
+// ---- Module (compiled kernels) ----
+class CudaModule {
+  CUmodule module{};
+public:
+  CudaModule() = default;
+  explicit CudaModule(const std::string& ptx, const std::string& name = "");
+  ~CudaModule();
+
+  CudaModule(CudaModule&& rhs) noexcept : module(rhs.module) { rhs.module = nullptr; }
+  CudaModule& operator=(CudaModule&& rhs) noexcept {
+    if (this != &rhs) { if (module) cuModuleUnload(module); module = rhs.module; rhs.module = nullptr; }
+    return *this;
+  }
+
+  CUmodule get() const { return module; }
+  CUfunction getFunction(const char* name) const;
+};
+
+// ---- Stream (equivalent to cl_command_queue) ----
+class CudaStream {
+  CUstream stream{};
+public:
+  CudaStream();
+  ~CudaStream();
+
+  CUstream get() const { return stream; }
+  void sync();
+
+  CudaStream(CudaStream&& rhs) noexcept : stream(rhs.stream) { rhs.stream = nullptr; }
+  CudaStream& operator=(CudaStream&&) = delete;
+};
+
+// ---- Memory buffer ----
+class CudaBuffer {
+  CUdeviceptr ptr{};
+  size_t bytes{};
+public:
+  CudaBuffer() = default;
+  explicit CudaBuffer(size_t bytes);
+  ~CudaBuffer();
+
+  CudaBuffer(CudaBuffer&& rhs) noexcept : ptr(rhs.ptr), bytes(rhs.bytes) { rhs.ptr = 0; rhs.bytes = 0; }
+  CudaBuffer& operator=(CudaBuffer&& rhs) noexcept {
+    if (this != &rhs) { if (ptr) cuMemFree(ptr); ptr = rhs.ptr; bytes = rhs.bytes; rhs.ptr = 0; rhs.bytes = 0; }
+    return *this;
+  }
+
+  CUdeviceptr get() const { return ptr; }
+  size_t size() const { return bytes; }
+
+  void readSync(void* dst, size_t n) const;
+  void writeSync(const void* src, size_t n);
+  void zero();
+  void copyFrom(const CudaBuffer& src);
+  void fillPattern(const void* pattern, size_t patternSize);
+};
+
+// ---- NVRTC Compilation ----
+struct NvrtcProgram {
+  // Preprocess OpenCL source for CUDA: strip __global/global pointer qualifiers
+  // without breaking __global__ (CUDA kernel qualifier).
+  static std::string preprocessOpenCL(const std::string& source);
+
+  static std::string compile(const std::string& source, const std::string& name,
+                              const std::vector<std::string>& options,
+                              const std::vector<std::pair<std::string, std::string>>& headers = {});
+};
+
+// ---- Kernel launcher ----
+class CudaKernelLauncher {
+  CUfunction func{};
+  std::string name;
+  u32 blockSize{};
+
+public:
+  CudaKernelLauncher() = default;
+  CudaKernelLauncher(CUfunction f, const std::string& name, u32 blockSize)
+    : func(f), name(name), blockSize(blockSize) {}
+
+  void launch(CUstream stream, u32 gridSize, void** args, u32 sharedMem = 0);
+
+  CUfunction get() const { return func; }
+  const std::string& getName() const { return name; }
+};
diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
new file mode 100644
index 00000000..3316c26f
--- /dev/null
+++ b/src/cuda/opencl_compat.cuh
@@ -0,0 +1,365 @@
+// OpenCL → CUDA compatibility header for PRPLL
+// Allows .cl kernel files to compile under NVRTC with minimal changes.
+// Used together with NvrtcProgram::preprocessOpenCL() which strips:
+//   - __global/global pointer qualifiers (can't #define without breaking __global__)
+//   - #pragma OPENCL ... directives
+//   - __attribute__((overloadable)) and __attribute__((reqd_work_group_size(...)))
+
+#pragma once
+
+// ---- Qualifiers ----
+// __kernel / kernel → extern "C" __global__ (CUDA kernel launch qualifier)
+// extern "C" is needed so cuModuleGetFunction() can find kernels by unmangled name
+#define __kernel extern "C" __global__
+#define kernel extern "C" __global__
+
+// __local / local — OpenCL address space qualifier for shared memory.
+// In CUDA, __shared__ can only be used on variable declarations, NOT on function parameters.
+// The preprocessor handles this: it strips "local" from function parameter lists
+// and adds __shared__ for variable declarations matching "local TYPE NAME[".
+#define __local
+#define local
+
+// __constant / constant → const (CUDA __constant__ is file-scope only, can't be used
+// for kernel params). The compiler auto-uses __ldg() for const pointers on sm_35+.
+#define __constant const
+#define constant const
+
+// restrict → __restrict__ (different keyword in CUDA)
+#define restrict __restrict__
+
+// ---- Work-item functions ----
+#define get_local_id(d)    ((unsigned int)threadIdx.x)
+#define get_group_id(d)    ((unsigned int)blockIdx.x)
+#define get_local_size(d)  ((unsigned int)blockDim.x)
+#define get_global_id(d)   ((unsigned int)(blockIdx.x * blockDim.x + threadIdx.x))
+#define get_num_groups(d)  ((unsigned int)gridDim.x)
+#define get_global_size(d) ((unsigned int)(gridDim.x * blockDim.x))
+#define get_enqueued_local_size(d) get_local_size(d)
+
+// ---- Barriers ----
+#define CLK_LOCAL_MEM_FENCE 0
+#define CLK_GLOBAL_MEM_FENCE 0
+#define barrier(flags) __syncthreads()
+
+// ---- Memory fences ----
+// OpenCL write_mem_fence / read_mem_fence → CUDA __threadfence()
+#define write_mem_fence(flags) __threadfence()
+#define read_mem_fence(flags) __threadfence()
+#define mem_fence(flags) __threadfence()
+
+// ---- Overloadable ----
+// CUDA C++ supports function overloading natively
+#define OVERLOAD
+
+// ---- OpenCL extension macros ----
+#define cl_khr_fp64 1
+#define cl_khr_subgroups 1
+
+// ---- Kernel macro ----
+// PRPLL uses KERNEL(WG_SIZE) void kernelName(...)
+// base.cl defines: #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
+// Our preprocessor replaces base.cl's KERNEL macro with a CUDA version.
+// This fallback is only used if base.cl hasn't been included yet.
+// KERNEL macro fallback — usually overridden by base.cl KERNEL macro replacement in cudawrap.cpp
+#define KERNEL(x) extern "C" __global__ void __launch_bounds__(x)
+
+// ---- Pointer macros ----
+#define P(x)  x* __restrict__
+#define CP(x) const x* __restrict__
+
+// ---- OpenCL type aliases ----
+// CRITICAL: On Linux x86_64, CUDA's built-in vector types (long2, ulong2) use
+// 'long' / 'unsigned long' for their members. These are DISTINCT C++ types from
+// 'long long' / 'unsigned long long' even though both are 64-bit.
+// We MUST use 'unsigned long' for ulong so that Z61 (typedef'd from ulong) matches
+// ulong2 member types. Otherwise overloaded functions like add(Z31,Z31) vs add(Z61,Z61)
+// become ambiguous when called with ulong2 member values (which are 'unsigned long').
+typedef unsigned long ulong;
+typedef long          slong;  // OpenCL's signed 'long' (64-bit)
+
+// Standard PRPLL type aliases
+typedef unsigned int uint;
+
+// These match OpenCL's types exactly. The preprocessor strips base.cl's
+// re-definitions of i32/u32/i64/u64 to avoid redeclaration errors.
+// Must use 'long' / 'unsigned long' to match CUDA vector type members.
+typedef unsigned int  u32;
+typedef int           i32;
+typedef unsigned long u64;
+typedef long          i64;
+
+// ---- Math constants ----
+#ifndef M_PI
+#define M_PI      3.14159265358979323846
+#endif
+#ifndef M_SQRT1_2
+#define M_SQRT1_2 0.70710678118654752440
+#endif
+
+// ---- Vector arithmetic operators ----
+// OpenCL supports +, -, *, / on vector types natively. CUDA does not.
+// double2
+__device__ __forceinline__ double2 operator+(double2 a, double2 b) { return make_double2(a.x+b.x, a.y+b.y); }
+__device__ __forceinline__ double2 operator-(double2 a, double2 b) { return make_double2(a.x-b.x, a.y-b.y); }
+__device__ __forceinline__ double2 operator*(double2 a, double2 b) { return make_double2(a.x*b.x, a.y*b.y); }
+__device__ __forceinline__ double2 operator-(double2 a) { return make_double2(-a.x, -a.y); }
+__device__ __forceinline__ double2 operator*(double s, double2 a) { return make_double2(s*a.x, s*a.y); }
+__device__ __forceinline__ double2 operator*(double2 a, double s) { return make_double2(a.x*s, a.y*s); }
+__device__ __forceinline__ double2& operator+=(double2& a, double2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ double2& operator-=(double2& a, double2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// float2
+__device__ __forceinline__ float2 operator+(float2 a, float2 b) { return make_float2(a.x+b.x, a.y+b.y); }
+__device__ __forceinline__ float2 operator-(float2 a, float2 b) { return make_float2(a.x-b.x, a.y-b.y); }
+__device__ __forceinline__ float2 operator*(float2 a, float2 b) { return make_float2(a.x*b.x, a.y*b.y); }
+__device__ __forceinline__ float2 operator-(float2 a) { return make_float2(-a.x, -a.y); }
+__device__ __forceinline__ float2 operator*(float s, float2 a) { return make_float2(s*a.x, s*a.y); }
+__device__ __forceinline__ float2 operator*(float2 a, float s) { return make_float2(a.x*s, a.y*s); }
+__device__ __forceinline__ float2& operator+=(float2& a, float2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ float2& operator-=(float2& a, float2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// int2
+__device__ __forceinline__ int2 operator+(int2 a, int2 b) { return make_int2(a.x+b.x, a.y+b.y); }
+__device__ __forceinline__ int2 operator-(int2 a, int2 b) { return make_int2(a.x-b.x, a.y-b.y); }
+__device__ __forceinline__ int2 operator*(int2 a, int2 b) { return make_int2(a.x*b.x, a.y*b.y); }
+__device__ __forceinline__ int2 operator-(int2 a) { return make_int2(-a.x, -a.y); }
+__device__ __forceinline__ int2& operator+=(int2& a, int2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ int2& operator-=(int2& a, int2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// uint2
+__device__ __forceinline__ uint2 operator+(uint2 a, uint2 b) { return make_uint2(a.x+b.x, a.y+b.y); }
+__device__ __forceinline__ uint2 operator-(uint2 a, uint2 b) { return make_uint2(a.x-b.x, a.y-b.y); }
+__device__ __forceinline__ uint2 operator*(uint2 a, uint2 b) { return make_uint2(a.x*b.x, a.y*b.y); }
+__device__ __forceinline__ uint2& operator+=(uint2& a, uint2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ uint2& operator-=(uint2& a, uint2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// long2
+__device__ __forceinline__ long2 operator+(long2 a, long2 b) { return {a.x+b.x, a.y+b.y}; }
+__device__ __forceinline__ long2 operator-(long2 a, long2 b) { return {a.x-b.x, a.y-b.y}; }
+__device__ __forceinline__ long2 operator*(long2 a, long2 b) { return {a.x*b.x, a.y*b.y}; }
+__device__ __forceinline__ long2 operator-(long2 a) { return {-a.x, -a.y}; }
+__device__ __forceinline__ long2& operator+=(long2& a, long2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ long2& operator-=(long2& a, long2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// ulong2
+__device__ __forceinline__ ulong2 operator+(ulong2 a, ulong2 b) { return {a.x+b.x, a.y+b.y}; }
+__device__ __forceinline__ ulong2 operator-(ulong2 a, ulong2 b) { return {a.x-b.x, a.y-b.y}; }
+__device__ __forceinline__ ulong2 operator*(ulong2 a, ulong2 b) { return {a.x*b.x, a.y*b.y}; }
+__device__ __forceinline__ ulong2& operator+=(ulong2& a, ulong2 b) { a.x+=b.x; a.y+=b.y; return a; }
+__device__ __forceinline__ ulong2& operator-=(ulong2& a, ulong2 b) { a.x-=b.x; a.y-=b.y; return a; }
+
+// Scalar * vector operators for types not built-in to NVRTC
+// (NVRTC already provides double2*double, int2*int, uint2*uint, etc.)
+// These cover cross-type scalar*vector that OpenCL supports natively.
+__device__ __forceinline__ long2 operator*(long long s, long2 v) { return {s*v.x, s*v.y}; }
+__device__ __forceinline__ long2 operator*(long2 v, long long s) { return {v.x*s, v.y*s}; }
+__device__ __forceinline__ ulong2 operator*(unsigned long long s, ulong2 v) { return {s*v.x, s*v.y}; }
+__device__ __forceinline__ ulong2 operator*(ulong2 v, unsigned long long s) { return {v.x*s, v.y*s}; }
+// int * ulong2 (common in NTT code: int literal * GF61)
+__device__ __forceinline__ ulong2 operator*(int s, ulong2 v) { return {(unsigned long long)s*v.x, (unsigned long long)s*v.y}; }
+__device__ __forceinline__ ulong2 operator*(ulong2 v, int s) { return {v.x*(unsigned long long)s, v.y*(unsigned long long)s}; }
+
+// ---- Vector constructors (U2) ----
+// OpenCL (type2)(a,b) cast syntax is converted to make_type2(a,b) by the preprocessor.
+// base.cl defines U2() as overloaded functions — they'll work after preprocessing.
+// NVRTC provides make_double2, make_float2, make_int2, make_uint2, make_long2, make_ulong2 built-in.
+
+// ---- Type reinterpretation (as_*) ----
+// Scalar ↔ vector bitwise reinterpretations (OpenCL as_type functions)
+
+// as_uint2: split 64-bit value into two 32-bit halves
+__device__ __forceinline__ uint2 as_uint2(double v) {
+  unsigned long long bits = __double_as_longlong(v);
+  return make_uint2((unsigned int)(bits), (unsigned int)(bits >> 32));
+}
+__device__ __forceinline__ uint2 as_uint2(unsigned long long v) {
+  return make_uint2((unsigned int)(v), (unsigned int)(v >> 32));
+}
+__device__ __forceinline__ uint2 as_uint2(unsigned long v) {
+  return make_uint2((unsigned int)(v), (unsigned int)((unsigned long long)v >> 32));
+}
+__device__ __forceinline__ uint2 as_uint2(long long v) {
+  return make_uint2((unsigned int)((unsigned long long)v), (unsigned int)((unsigned long long)v >> 32));
+}
+__device__ __forceinline__ uint2 as_uint2(long v) {
+  return make_uint2((unsigned int)((unsigned long)v), (unsigned int)((unsigned long long)v >> 32));
+}
+
+// as_int2: split 64-bit value into two signed 32-bit halves
+__device__ __forceinline__ int2 as_int2(double v) {
+  unsigned long long bits = __double_as_longlong(v);
+  return make_int2((int)(unsigned int)(bits), (int)(unsigned int)(bits >> 32));
+}
+__device__ __forceinline__ int2 as_int2(long long v) {
+  return make_int2((int)(unsigned int)((unsigned long long)v), (int)(unsigned int)((unsigned long long)v >> 32));
+}
+__device__ __forceinline__ int2 as_int2(long v) {
+  return make_int2((int)(unsigned int)((unsigned long)v), (int)(unsigned int)((unsigned long long)v >> 32));
+}
+
+// as_double: reinterpret bits as double
+__device__ __forceinline__ double as_double(int2 v) {
+  unsigned long long bits = ((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x;
+  return __longlong_as_double(bits);
+}
+__device__ __forceinline__ double as_double(uint2 v) {
+  unsigned long long bits = ((unsigned long long)v.y << 32) | v.x;
+  return __longlong_as_double(bits);
+}
+__device__ __forceinline__ double as_double(unsigned long long v) {
+  return __longlong_as_double(v);
+}
+__device__ __forceinline__ double as_double(unsigned long v) {
+  return __longlong_as_double((unsigned long long)v);
+}
+__device__ __forceinline__ double as_double(long long v) { return __longlong_as_double(v); }
+__device__ __forceinline__ double as_double(long v) { return __longlong_as_double((long long)v); }
+
+// as_ulong: reinterpret as unsigned 64-bit (returns 'unsigned long' to match ulong typedef)
+__device__ __forceinline__ unsigned long as_ulong(uint2 v) {
+  return (unsigned long)(((unsigned long long)v.y << 32) | v.x);
+}
+__device__ __forceinline__ unsigned long as_ulong(int2 v) {
+  return (unsigned long)(((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x);
+}
+__device__ __forceinline__ unsigned long as_ulong(double v) {
+  return (unsigned long)__double_as_longlong(v);
+}
+
+// as_long: reinterpret as signed 64-bit (returns 'long' to match slong/i64)
+__device__ __forceinline__ long as_long(int2 v) {
+  return (long)(((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x);
+}
+__device__ __forceinline__ long as_long(uint2 v) {
+  return (long)(((unsigned long long)v.y << 32) | v.x);
+}
+__device__ __forceinline__ long as_long(double v) { return (long)__double_as_longlong(v); }
+
+// as_float / as_int / as_uint: 32-bit reinterprets
+__device__ __forceinline__ float as_float(int v) { return __int_as_float(v); }
+__device__ __forceinline__ float as_float(unsigned int v) { return __int_as_float((int)v); }
+__device__ __forceinline__ int as_int(float v) { return __float_as_int(v); }
+__device__ __forceinline__ unsigned int as_uint(float v) { return (unsigned int)__float_as_int(v); }
+
+// 16-byte reinterprets: int4 ↔ double2 ↔ ulong2
+__device__ __forceinline__ int4 as_int4(double2 v) {
+  union { double2 d; int4 i; } u;
+  u.d = v;
+  return u.i;
+}
+__device__ __forceinline__ int4 as_int4(ulong2 v) {
+  union { ulong2 ul; int4 i; } u;
+  u.ul = v;
+  return u.i;
+}
+__device__ __forceinline__ double2 as_double2(int4 v) {
+  union { int4 i; double2 d; } u;
+  u.i = v;
+  return u.d;
+}
+__device__ __forceinline__ ulong2 as_ulong2(int4 v) {
+  union { int4 i; ulong2 ul; } u;
+  u.i = v;
+  return u.ul;
+}
+__device__ __forceinline__ double2 as_double2(ulong2 v) {
+  union { ulong2 ul; double2 d; } u;
+  u.ul = v;
+  return u.d;
+}
+__device__ __forceinline__ ulong2 as_ulong2(double2 v) {
+  union { double2 d; ulong2 ul; } u;
+  u.d = v;
+  return u.ul;
+}
+
+// ---- Math builtins ----
+// fma for vector types (OpenCL supports element-wise fma on vector types)
+__device__ __forceinline__ double2 fma(double2 a, double2 b, double2 c) {
+  return make_double2(fma(a.x, b.x, c.x), fma(a.y, b.y, c.y));
+}
+__device__ __forceinline__ float2 fma(float2 a, float2 b, float2 c) {
+  return make_float2(fmaf(a.x, b.x, c.x), fmaf(a.y, b.y, c.y));
+}
+// Mixed scalar-vector fma: fma(scalar, vec2, vec2) — broadcasts scalar
+__device__ __forceinline__ double2 fma(double a, double2 b, double2 c) {
+  return make_double2(fma(a, b.x, c.x), fma(a, b.y, c.y));
+}
+__device__ __forceinline__ float2 fma(float a, float2 b, float2 c) {
+  return make_float2(fmaf(a, b.x, c.x), fmaf(a, b.y, c.y));
+}
+
+// mul_hi: upper half of multiplication
+__device__ __forceinline__ unsigned int mul_hi(unsigned int a, unsigned int b) {
+  return __umulhi(a, b);
+}
+// Overloads for both 'unsigned long long' and 'unsigned long' (distinct types on Linux x86_64)
+__device__ __forceinline__ unsigned long long mul_hi(unsigned long long a, unsigned long long b) {
+  return __umul64hi(a, b);
+}
+__device__ __forceinline__ unsigned long mul_hi(unsigned long a, unsigned long b) {
+  return (unsigned long)__umul64hi((unsigned long long)a, (unsigned long long)b);
+}
+__device__ __forceinline__ unsigned int mad_hi(unsigned int a, unsigned int b, unsigned int c) {
+  return __umulhi(a, b) + c;
+}
+
+// ---- Atomic operations ----
+#define atomic_max(p, v) atomicMax((unsigned int*)(p), (unsigned int)(v))
+#define atomic_add(p, v) atomicAdd(p, v)
+
+// OpenCL 2.0 C11-style atomics — optimized for CUDA carry stairway pattern.
+// The carryFused kernel uses: producer writes data, threadfence, bar, atomic_store(flag, 1)
+// then consumer does: atomic_load(flag) in spin loop, bar, threadfence, read data.
+// We minimize redundant fences while maintaining correctness.
+__device__ __forceinline__ void atomic_store_uint(volatile unsigned int* p, unsigned int v) {
+  // Volatile store only — no fence needed here. The caller always does
+  // write_mem_fence(CLK_GLOBAL_MEM_FENCE) [= __threadfence()] before calling
+  // atomic_store(), which already orders all prior writes before this store.
+  // Adding a second __threadfence() here was redundant but costly (~100-400 cycles).
+  *p = v;
+}
+__device__ __forceinline__ unsigned int atomic_load_uint(volatile unsigned int* p) {
+  // Acquire load: volatile ensures we re-read from memory, not from register.
+  // No fence needed here — the caller does read_mem_fence AFTER confirming the flag.
+  return *p;
+}
+#define atomic_store(p, v) atomic_store_uint((volatile unsigned int*)(p), (unsigned int)(v))
+#define atomic_load_explicit(p, order, scope) atomic_load_uint((volatile unsigned int*)(p))
+#define memory_order_relaxed 0
+#define memory_order_acquire 0
+#define memory_order_release 0
+#define memory_scope_device 0
+typedef volatile unsigned int atomic_uint;
+
+// ---- Inline assembly ----
+// OpenCL uses __asm(); NVRTC uses asm()
+#define __asm asm
+
+// ---- sub_group / warp functions ----
+#define sub_group_broadcast(v, lane) __shfl_sync(0xFFFFFFFF, (v), (lane))
+
+// ---- Mark as CUDA compilation ----
+#define CUDA_BACKEND 1
+
+// ---- Word2 constructor (typedef for long2 or int2) ----
+// base.cl defines Word2 as long2 (WordSize==8) or int2 (WordSize==4).
+// The preprocessor converts (Word2)(a, b) → make_Word2(a, b).
+// Must key on WordSize, not CARRY64, because FFT3261 has WordSize=8 without CARRY64.
+#if WordSize == 8
+__device__ __forceinline__ long2 make_Word2(long a, long b) { return make_long2(a, b); }
+#else
+__device__ __forceinline__ int2 make_Word2(int a, int b) { return make_int2(a, b); }
+#endif
+
+// ---- Force NVIDIAGPU and HAS_PTX ----
+#ifndef NVIDIAGPU
+#define NVIDIAGPU 1
+#endif
+#ifndef HAS_PTX
+#define HAS_PTX 1200
+#endif
+#ifndef AMDGPU
+#define AMDGPU 0
+#endif
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
new file mode 100644
index 00000000..5a34c15e
--- /dev/null
+++ b/src/cuda/tinycuda.h
@@ -0,0 +1,317 @@
+// CUDA type shim — replaces tinycl.h for the native CUDA backend.
+// Maps OpenCL types and constants to CUDA Driver API equivalents.
+// Used together with clwrap_cuda.cpp which implements cl* functions via cu*.
+
+#pragma once
+
+#include "../common.h"
+#include <cuda.h>
+#include <nvrtc.h>
+#include <cstdint>
+#include <cstddef>
+#include <vector>
+#include <string>
+#include <cstring>
+
+// ---- Opaque handle wrappers ----
+// OpenCL uses opaque pointer types (struct _cl_foo*).
+// CUDA uses different representations (int, pointer, u64).
+// We wrap CUDA handles in structs so they're pointer-like opaque types.
+
+// cl_device_id wraps CUdevice (int)
+struct _cl_device_id { CUdevice dev; };
+typedef _cl_device_id* cl_device_id;
+
+// cl_context wraps CUcontext
+struct _cl_context { CUcontext ctx; CUdevice dev; };
+typedef _cl_context* cl_context;
+
+// cl_command_queue wraps CUstream
+struct _cl_command_queue {
+  CUstream stream;
+  cl_context context;
+  bool profiling;
+};
+typedef _cl_command_queue* cl_command_queue;
+
+// cl_mem wraps CUdeviceptr + size
+struct _cl_mem {
+  CUdeviceptr ptr;
+  size_t size;
+};
+typedef _cl_mem* cl_mem;
+
+// cl_program: dual-purpose — stores either source string or compiled PTX/module
+struct _cl_program {
+  std::string source;     // OpenCL source (before NVRTC compilation)
+  std::string preprocessedSource; // CUDA source after preprocessOpenCL (for parsing __launch_bounds__)
+  std::string ptx;        // Compiled PTX (after NVRTC compilation)
+  CUmodule module;        // Loaded module (after cuModuleLoadData)
+  bool compiled;
+  bool moduleLoaded;
+
+  _cl_program() : module{}, compiled{false}, moduleLoaded{false} {}
+};
+typedef _cl_program* cl_program;
+
+// cl_kernel wraps CUfunction + accumulated arguments
+struct _cl_kernel {
+  CUfunction func;
+  std::string name;
+  CUmodule parentModule;  // Keep reference so module isn't unloaded
+  int numArgs;
+  int reqWorkGroupSize;   // From __launch_bounds__(N) in source, matches OpenCL reqd_work_group_size
+
+  // Argument accumulator for setArg/launch pattern
+  static constexpr int MAX_ARGS = 32;
+  static constexpr int MAX_ARG_BYTES = 512;
+  char argData[MAX_ARG_BYTES];
+  size_t argSizes[MAX_ARGS];
+  size_t argOffsets[MAX_ARGS];
+
+  _cl_kernel() : func{}, parentModule{}, numArgs{0}, reqWorkGroupSize{0} {
+    memset(argData, 0, sizeof(argData));
+    memset(argSizes, 0, sizeof(argSizes));
+    memset(argOffsets, 0, sizeof(argOffsets));
+  }
+
+  void setArg(int pos, size_t size, const void* value) {
+    if (pos >= MAX_ARGS) return;
+    if (pos >= numArgs) numArgs = pos + 1;
+
+    // Fixed 8-byte slots per arg position. CUDA kernel args are pointers (8 bytes)
+    // or small scalars (4 bytes). Using fixed slots avoids data corruption when
+    // args are set out of order (e.g., setFixedArgs(2,3) then operator()(0,1)).
+    size_t offset = pos * 8;
+    argOffsets[pos] = offset;
+    argSizes[pos] = size;
+    if (offset + size <= MAX_ARG_BYTES && value) {
+      memcpy(argData + offset, value, size);
+    }
+  }
+
+  // Build void* args[] array for cuLaunchKernel
+  void buildArgPointers(void** ptrs) const {
+    for (int i = 0; i < numArgs; i++) {
+      ptrs[i] = const_cast<char*>(argData + argOffsets[i]);
+    }
+  }
+};
+typedef _cl_kernel* cl_kernel;
+
+// cl_event wraps CUevent pair (start + end for profiling)
+struct _cl_event {
+  CUevent start;
+  CUevent end;
+  bool hasTimings;
+  u32 commandType;
+
+  _cl_event() : start{}, end{}, hasTimings{false}, commandType{0} {}
+  ~_cl_event() {
+    if (start) cuEventDestroy(start);
+    if (end) cuEventDestroy(end);
+  }
+};
+typedef _cl_event* cl_event;
+
+// Unused types — just need to exist for compilation
+typedef struct _cl_platform_id* cl_platform_id;
+typedef struct _cl_sampler*     cl_sampler;
+
+typedef unsigned cl_bool;
+typedef unsigned cl_program_build_info;
+typedef unsigned cl_program_info;
+typedef unsigned cl_device_info;
+typedef unsigned cl_kernel_info;
+typedef unsigned cl_kernel_arg_info;
+typedef unsigned cl_kernel_work_group_info;
+typedef unsigned cl_profiling_info;
+typedef unsigned cl_event_info;
+typedef unsigned cl_command_queue_info;
+
+typedef u64 cl_mem_flags;
+typedef u64 cl_svm_mem_flags;
+typedef u64 cl_device_type;
+typedef u64 cl_queue_properties;
+
+using cl_queue = cl_command_queue;
+
+// ---- Constants ----
+#define CL_SUCCESS              0
+#define CL_DEVICE_TYPE_GPU      (1 << 2)
+#define CL_DEVICE_TYPE_ALL      0xFFFFFFFF
+
+#define CL_DEVICE_VENDOR_ID             0x1001
+#define CL_DEVICE_MAX_COMPUTE_UNITS     0x1002
+#define CL_DEVICE_MAX_CLOCK_FREQUENCY   0x100C
+#define CL_DEVICE_GLOBAL_MEM_SIZE       0x101F
+#define CL_DEVICE_ERROR_CORRECTION_SUPPORT 0x1024
+#define CL_DEVICE_NAME          0x102B
+#define CL_DRIVER_VERSION       0x102D
+#define CL_DEVICE_VERSION       0x102F
+#define CL_DEVICE_BUILT_IN_KERNELS 0x103F
+#define CL_PLATFORM_VERSION     0x0901
+
+#define CL_PROGRAM_BINARY_SIZES 0x1165
+#define CL_PROGRAM_BINARIES     0x1166
+#define CL_PROGRAM_BUILD_LOG    0x1183
+
+#define CL_MEM_READ_WRITE       (1 << 0)
+#define CL_MEM_WRITE_ONLY       (1 << 1)
+#define CL_MEM_READ_ONLY        (1 << 2)
+#define CL_MEM_USE_HOST_PTR     (1 << 3)
+#define CL_MEM_ALLOC_HOST_PTR   (1 << 4)
+#define CL_MEM_COPY_HOST_PTR    (1 << 5)
+#define CL_MEM_HOST_WRITE_ONLY  (1 << 7)
+#define CL_MEM_HOST_READ_ONLY   (1 << 8)
+#define CL_MEM_HOST_NO_ACCESS   (1 << 9)
+#define CL_MEM_SVM_FINE_GRAIN_BUFFER (1 << 10)
+#define CL_MEM_SVM_ATOMICS           (1 << 11)
+
+#define CL_QUEUE_OUT_OF_ORDER_EXEC_MODE_ENABLE (1 << 0)
+#define CL_QUEUE_PROFILING_ENABLE              (1 << 1)
+#define CL_QUEUE_ON_DEVICE                     (1 << 2)
+#define CL_QUEUE_ON_DEVICE_DEFAULT             (1 << 3)
+
+#define CL_QUEUE_CONTEXT            0x1090
+#define CL_QUEUE_DEVICE             0x1091
+#define CL_QUEUE_REFERENCE_COUNT    0x1092
+#define CL_QUEUE_PROPERTIES         0x1093
+
+#define CL_PROFILING_COMMAND_QUEUED  0x1280
+#define CL_PROFILING_COMMAND_SUBMIT  0x1281
+#define CL_PROFILING_COMMAND_START   0x1282
+#define CL_PROFILING_COMMAND_END     0x1283
+#define CL_PROFILING_COMMAND_COMPLETE 0x1284
+
+#define CL_EVENT_COMMAND_QUEUE              0x11D0
+#define CL_EVENT_COMMAND_TYPE               0x11D1
+#define CL_EVENT_REFERENCE_COUNT            0x11D2
+#define CL_EVENT_COMMAND_EXECUTION_STATUS   0x11D3
+#define CL_EVENT_CONTEXT                    0x11D4
+
+#define CL_COMMAND_NDRANGE_KERNEL   0x11F0
+#define CL_COMMAND_READ_BUFFER      0x11F3
+#define CL_COMMAND_WRITE_BUFFER     0x11F4
+#define CL_COMMAND_COPY_BUFFER      0x11F5
+#define CL_COMMAND_FILL_BUFFER      0x1207
+#define CL_COMMAND_MARKER           0x11FE
+
+#define CL_COMPLETE     0x0
+#define CL_RUNNING      0x1
+#define CL_SUBMITTED    0x2
+#define CL_QUEUED       0x3
+
+#define CL_KERNEL_NUM_ARGS       0x1191
+#define CL_KERNEL_ARG_NAME       0x119A
+#define CL_KERNEL_ATTRIBUTES     0x1195
+#define CL_KERNEL_COMPILE_WORK_GROUP_SIZE 0x11B1
+
+// AMD-specific (unused but must exist for compilation)
+#define CL_DEVICE_PCIE_ID_AMD           0x4034
+#define CL_DEVICE_TOPOLOGY_AMD          0x4037
+#define CL_DEVICE_BOARD_NAME_AMD        0x4038
+#define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
+
+typedef union {
+  struct { u32 type; u32 data[5]; } raw;
+  struct { u32 type; char unused[17]; char bus; char device; char function; } pcie;
+} cl_device_topology_amd;
+
+// Error codes
+#define CL_DEVICE_NOT_FOUND             -1
+#define CL_DEVICE_NOT_AVAILABLE         -2
+#define CL_COMPILER_NOT_AVAILABLE       -3
+#define CL_MEM_OBJECT_ALLOCATION_FAILURE -4
+#define CL_OUT_OF_RESOURCES             -5
+#define CL_OUT_OF_HOST_MEMORY           -6
+#define CL_PROFILING_INFO_NOT_AVAILABLE -7
+#define CL_BUILD_PROGRAM_FAILURE        -11
+#define CL_COMPILE_PROGRAM_FAILURE      -15
+#define CL_LINK_PROGRAM_FAILURE         -17
+#define CL_INVALID_VALUE                -30
+#define CL_INVALID_DEVICE               -33
+#define CL_INVALID_CONTEXT              -34
+#define CL_INVALID_MEM_OBJECT           -38
+#define CL_INVALID_BINARY               -42
+#define CL_INVALID_BUILD_OPTIONS        -43
+#define CL_INVALID_PROGRAM              -44
+#define CL_INVALID_KERNEL_NAME          -46
+#define CL_INVALID_KERNEL               -48
+#define CL_INVALID_ARG_INDEX            -49
+#define CL_INVALID_ARG_VALUE            -50
+#define CL_INVALID_ARG_SIZE             -51
+#define CL_INVALID_WORK_GROUP_SIZE      -54
+#define CL_INVALID_GLOBAL_WORK_SIZE     -63
+
+// ---- OpenCL API function declarations ----
+// These are implemented in clwrap_cuda.cpp using CUDA Driver API.
+// They match the signatures from tinycl.h so clwrap.h compiles unchanged.
+
+extern "C" {
+
+unsigned clGetPlatformIDs(unsigned, cl_platform_id*, unsigned*);
+int clGetDeviceIDs(cl_platform_id, cl_device_type, unsigned, cl_device_id*, unsigned*);
+cl_context clCreateContext(const intptr_t*, unsigned, const cl_device_id*,
+                           void (*)(const char*, const void*, size_t, void*), void*, int*);
+int clReleaseContext(cl_context);
+int clReleaseProgram(cl_program);
+int clReleaseCommandQueue(cl_command_queue);
+int clEnqueueNDRangeKernel(cl_command_queue, cl_kernel, unsigned, const size_t*,
+                            const size_t*, const size_t*, unsigned, const cl_event*, cl_event*);
+
+cl_program clCreateProgramWithSource(cl_context, unsigned, const char**, const size_t*, int*);
+cl_program clCreateProgramWithBinary(cl_context, unsigned, const cl_device_id*, const size_t*,
+                                      const unsigned char**, int*, int*);
+
+int clBuildProgram(cl_program, unsigned, const cl_device_id*, const char*,
+                   void (*)(cl_program, void*), void*);
+int clCompileProgram(cl_program, unsigned, const cl_device_id*, const char*,
+                     unsigned numHeaders, const cl_program* headers, const char* const* headerNames,
+                     void (*)(cl_program, void*), void*);
+cl_program clLinkProgram(cl_context, unsigned, const cl_device_id*, const char*,
+                          unsigned nProgs, const cl_program* progs,
+                          void (*)(cl_program, void*), void*, int* err);
+
+int clGetProgramBuildInfo(cl_program, cl_device_id, cl_program_build_info, size_t, void*, size_t*);
+int clGetProgramInfo(cl_program, cl_program_info, size_t, void*, size_t*);
+int clGetDeviceInfo(cl_device_id, cl_device_info, size_t, void*, size_t*);
+int clGetPlatformInfo(cl_platform_id, cl_device_info, size_t, void*, size_t*);
+int clGetCommandQueueInfo(cl_command_queue, cl_command_queue_info, size_t, void*, size_t*);
+
+cl_kernel clCreateKernel(cl_program, const char*, int*);
+int clReleaseKernel(cl_kernel);
+cl_mem clCreateBuffer(cl_context, cl_mem_flags, size_t, void*, int*);
+int clReleaseMemObject(cl_mem);
+cl_command_queue clCreateCommandQueueWithProperties(cl_context, cl_device_id,
+                                                     const cl_queue_properties*, int*);
+
+int clEnqueueMarkerWithWaitList(cl_command_queue, unsigned, const cl_event*, cl_event*);
+int clEnqueueReadBuffer(cl_command_queue, cl_mem, cl_bool, size_t, size_t, void*,
+                         unsigned, const cl_event*, cl_event*);
+int clEnqueueWriteBuffer(cl_command_queue, cl_mem, cl_bool, size_t, size_t, const void*,
+                          unsigned, const cl_event*, cl_event*);
+int clEnqueueCopyBuffer(cl_command_queue, cl_mem, cl_mem, size_t, size_t, size_t,
+                         unsigned, const cl_event*, cl_event*);
+int clEnqueueFillBuffer(cl_command_queue, cl_mem, const void*, size_t, size_t, size_t,
+                         unsigned, const cl_event*, cl_event*);
+
+int clFlush(cl_command_queue);
+int clFinish(cl_command_queue);
+int clSetKernelArg(cl_kernel, unsigned, size_t, const void*);
+
+int clReleaseEvent(cl_event);
+int clWaitForEvents(unsigned, const cl_event*);
+
+int clGetKernelInfo(cl_kernel, cl_kernel_info, size_t, void*, size_t*);
+int clGetKernelArgInfo(cl_kernel, unsigned, cl_kernel_arg_info, size_t, void*, size_t*);
+int clGetKernelWorkGroupInfo(cl_kernel, cl_device_id, cl_kernel_work_group_info, size_t, void*, size_t*);
+
+int clGetEventInfo(cl_event, cl_event_info, size_t, void*, size_t*);
+int clGetEventProfilingInfo(cl_event, cl_profiling_info, size_t, void*, size_t*);
+
+void* clSVMAlloc(cl_context, cl_svm_mem_flags, size_t, unsigned);
+void clSVMFree(cl_context, void*);
+int clSetKernelArgSVMPointer(cl_kernel, unsigned, const void*);
+
+}
diff --git a/src/tune.cpp b/src/tune.cpp
index 21db6f40..fb8aca16 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -133,36 +133,36 @@ float Tune::maxBpw(FFTConfig fft) {
   // Fine tune our estimate for Z=34
   float z1 = zForBpw(bpw1, fft, 1);
 printf ("Guess bpw for %s is %.2f first Z34 is %.2f\n", fft.spec().c_str(), bpw1, z1);
-  while (z1 < 31.0 || z1 > 37.0) {
+  while (z1 < 31.0f || z1 > 37.0f) {
     float prev_bpw1 = bpw1;
     float prev_z1 = z1;
-    bpw1 = bpw1 + (z1 - 34) * bpw_step;
+    bpw1 = bpw1 + (z1 - 34.0f) * bpw_step;
     z1 = zForBpw(bpw1, fft, 1);
 printf ("Reguess bpw for %s is %.2f first Z34 is %.2f\n", fft.spec().c_str(), bpw1, z1);
     bpw_step = - (bpw1 - prev_bpw1) / (z1 - prev_z1);
-    if (bpw_step < 0.005) bpw_step = 0.005;
-    if (bpw_step > 0.025) bpw_step = 0.025;
+    if (bpw_step < 0.005f) bpw_step = 0.005f;
+    if (bpw_step > 0.025f) bpw_step = 0.025f;
   }
 
   // Get more samples for this bpw -- average in the sample we already have
   z1 = (z1 + (sample_size - 1) * zForBpw(bpw1, fft, sample_size - 1)) / sample_size;
 
   // Pick a bpw somewhere near Z=22 then fine tune the guess
-  float bpw2 = bpw1 + (z1 - 22) * bpw_step;
+  float bpw2 = bpw1 + (z1 - 22.0f) * bpw_step;
   float z2 = zForBpw(bpw2, fft, 1);
 printf ("Guess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bpw2, z2);
-  while (z2 < 20.0 || z2 > 25.0) {
+  while (z2 < 20.0f || z2 > 25.0f) {
     float prev_bpw2 = bpw2;
     float prev_z2 = z2;
 //    bool error_recovery = (z2 <= 0.0);
 //    if (error_recovery) bpw2 -= bpw_step; else
-    bpw2 = bpw2 + (z2 - 21) * bpw_step;
+    bpw2 = bpw2 + (z2 - 21.0f) * bpw_step;
     z2 = zForBpw(bpw2, fft, 1);
 printf ("Reguess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bpw2, z2);
 //  if (error_recovery) { if (z2 >= 20.0) break; else continue; }
     bpw_step = - (bpw2 - prev_bpw2) / (z2 - prev_z2);
-    if (bpw_step < 0.005) bpw_step = 0.005;
-    if (bpw_step > 0.025) bpw_step = 0.025;
+    if (bpw_step < 0.005f) bpw_step = 0.005f;
+    if (bpw_step > 0.025f) bpw_step = 0.025f;
   }
 
   // Get more samples for this bpw -- average in the sample we already have
@@ -174,7 +174,7 @@ printf ("Reguess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bp
 
 float Tune::zForBpw(float bpw, FFTConfig fft, u32 count) {
   u64 exponent = (count == 1) ? primes.prevPrime(fft.size() * bpw) : primes.nextPrime(fft.size() * bpw);
-  float total_z = 0.0;
+  float total_z = 0.0f;
   for (u32 i = 0; i < count; i++, exponent = primes.nextPrime (exponent + 1)) {
     auto [ok, res, roeSq, roeMul] = Gpu::make(q, exponent, shared, fft, {}, false)->measureROE(true);
     float z = roeSq.z();
@@ -196,7 +196,7 @@ void Tune::ztune() {
     u32 variant = 202;
     u32 sample_size = 5;
     FFTConfig fft{shape, variant, CARRY_AUTO};
-    for (float bpw = 18.18; bpw < 18.305; bpw += 0.02) {
+    for (float bpw = 18.18f; bpw < 18.305f; bpw += 0.02f) {
       float z = zForBpw(bpw, fft, sample_size);
       log ("Avg zForBpw %s %.2f %.2f\n", fft.spec().c_str(), bpw, z);
     }
@@ -248,7 +248,7 @@ void Tune::carryTune() {
     vector<float> zv;
     double m = 0;
     const float mid = fft.shape.carry32BPW();
-    for (float bpw : {mid - 0.05, mid + 0.05}) {
+    for (float bpw : {mid - 0.05f, mid + 0.05f}) {
       u64 exponent = primes.nearestPrime(fft.size() * bpw);
       auto [ok, carry] = Gpu::make(q, exponent, shared, fft, {}, false)->measureCarry();
       m = carry.max;
@@ -340,7 +340,7 @@ void configsUpdate(double current_cost, double best_cost, double threshold, cons
 void Tune::tune() {
   Args *args = shared.args;
   vector<FFTShape> shapes = FFTShape::multiSpec(args->fftSpec);
-  
+
   // There are some options and variants that are different based on GPU manufacturer
   bool AMDGPU = isAmdGpu(q->context->deviceId());
   bool NVIDIAGPU = isNvidiaGpu(q->context->deviceId());
@@ -349,8 +349,8 @@ void Tune::tune() {
   bool time_FFTs = 0;
   bool time_NTTs = 0;
   bool time_FP32 = 1;
-  bool time_inplace_only = 0;
-  int quick = 7;                        // Run config from slowest (quick=1) to fastest (quick=10)
+  bool time_inplace_only = NVIDIAGPU ? 1 : 0;           // Default is nVidia is better off with INPLACE=1, AMD GPUs need to time extra options used when INPLACE=0
+  int quick = 7;                                        // Run config from slowest (quick=1) to fastest (quick=10)
   u64 min_exponent = 75000000;
   u64 max_exponent = 350000000;
   if (!args->fftSpec.empty()) { min_exponent = 0; max_exponent = 1000000000000ull; }
@@ -581,28 +581,212 @@ void Tune::tune() {
       args->flags["INPLACE"] = to_string(best_inplace);
     }
 
-    // Find best NONTEMPORAL setting
+    // Find best LOADS/STORES settings
+    if (1) {
+      u32 loads = args->value("LOADS", 0);
+      u32 stores = args->value("STORES", 0);
+
+      // Find best FFT data LOADS setting
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_fft_load = 0;
+        double best_cost = -1.0;
+	for (u32 fft_load : {0, 1, 2, 3, 4}) {
+          if (!NVIDIAGPU && fft_load >= 2) continue;
+          args->flags["LOADS"] = to_string(loads / 10 * 10 + fft_load);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using FFT load=%u is %6.1f\n", fft.spec().c_str(), fft_load, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_load = fft_load; }
+        }
+        log("Best FFT load is %u.  Default is 0.\n", best_fft_load);
+        loads = loads / 10 * 10 + best_fft_load;
+        args->flags["LOADS"] = to_string(loads);
+      }
+
+      // Find best FFT data STORES setting
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_fft_store = 0;
+        double best_cost = -1.0;
+	for (u32 fft_store : {0, 1, 2, 3, 4}) {
+          if (!NVIDIAGPU && fft_store >= 2) continue;
+          args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using FFT store=%u is %6.1f\n", fft.spec().c_str(), fft_store, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_store = fft_store; }
+        }
+        log("Best FFT store is %u.  Default is 0.\n", best_fft_store);
+        stores = stores / 10 * 10 + best_fft_store;
+        args->flags["STORES"] = to_string(stores);
+      }
+
+      // Find best carryShuttle LOADS/STORES settings
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_cs_load = 0, best_cs_store = 0;
+        double best_cost = -1.0;
+	for (u32 cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load and L2 store
+          if (!NVIDIAGPU && cs == 2) continue;
+	  u32 cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
+	  u32 cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
+          args->flags["LOADS"] = to_string(loads / 100 * 100 + cs_load * 10 + loads % 10);
+          args->flags["STORES"] = to_string(stores / 100 * 100 + cs_store * 10 + stores % 10);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using carry shuttle load=%u, store=%u is %6.1f\n", fft.spec().c_str(), cs_load, cs_store, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_cs_load = cs_load; best_cs_store = cs_store; }
+        }
+        log("Best carry shuttle load/store is %u/%u.  Default is 0/0.\n", best_cs_load, best_cs_store);
+        loads = loads / 100 * 100 + best_cs_load * 10 + loads % 10;
+        stores = stores / 100 * 100 + best_cs_store * 10 + stores % 10;
+        args->flags["LOADS" ] = to_string(loads);
+        args->flags["STORES"] = to_string(stores);
+      }
+
+      // Find best TRIG frequently used data LOADS setting
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_trig_load = 0;
+        double best_cost = -1.0;
+	for (u32 trig_load : {0, 5}) {
+          if (!NVIDIAGPU && trig_load >= 2) continue;
+          args->flags["LOADS"] = to_string(loads / 1000 * 1000 + trig_load * 100 + loads % 100);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using Trig frequently used load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
+        }
+        log("Best Trig frquently used load is %u.  Default is 0.\n", best_trig_load);
+        loads = loads / 1000 * 1000 + best_trig_load * 100 + loads % 100;
+        args->flags["LOADS" ] = to_string(loads);
+      }
+
+      // Find best TRIG several uses data LOADS setting
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_trig_load = 0;
+        double best_cost = -1.0;
+	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
+          if (!NVIDIAGPU && trig_load >= 2) continue;
+          args->flags["LOADS"] = to_string(loads / 10000 * 10000 + trig_load * 1000 + loads % 1000);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using Trig several uses load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
+        }
+        log("Best Trig several uses load is %u.  Default is 0.\n", best_trig_load);
+        loads = loads / 10000 * 10000 + best_trig_load * 1000 + loads % 1000;
+        args->flags["LOADS" ] = to_string(loads);
+      }
+
+      // Find best TRIG used once data LOADS setting
+      if (1) {
+        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+        u64 exponent = primes.prevPrime(fft.maxExp());
+        u32 best_trig_load = 0;
+        double best_cost = -1.0;
+	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
+          if (!NVIDIAGPU && trig_load >= 2) continue;
+          args->flags["LOADS"] = to_string(trig_load * 10000 + loads % 10000);
+          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          log("Time for %12s using Trig used once load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
+          if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
+        }
+        log("Best Trig used once load is %u.  Default is 0.\n", best_trig_load);
+        loads = best_trig_load * 10000 + loads % 10000;
+        args->flags["LOADS" ] = to_string(loads);
+      }
+
+      // Write accumulated LOADS/STORES settings
+      configsUpdate(1.000, 0.000, 0.000, "LOADS", loads, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["LOADS"] = to_string(loads);
+      configsUpdate(1.000, 0.000, 0.000, "STORES", stores, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["STORES"] = to_string(stores);
+    }
+
+    // Find best CUDA compiler options
+#if CUDA_BACKEND
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_cfblks = 0;
+      u32 current_cfblks = args->value("CFBLKS", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 cfblks : {0, 1, 2}) {
+        args->flags["CFBLKS"] = to_string(cfblks);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using CFBLKS=%u is %6.1f\n", fft.spec().c_str(), cfblks, cost);
+        if (cfblks == current_cfblks) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_cfblks = cfblks; }
+      }
+      log("Best CFBLKS is %u.  Default CFBLKS is 0.\n", best_cfblks);
+      configsUpdate(current_cost, best_cost, 0.000, "CFBLKS", best_cfblks, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["CFBLKS"] = to_string(best_cfblks);
+    }
+
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_miblks = 0;
+      u32 current_miblks = args->value("MIBLKS", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 miblks : {0, 1, 2}) {
+        args->flags["MIBLKS"] = to_string(miblks);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MIBLKS=%u is %6.1f\n", fft.spec().c_str(), miblks, cost);
+        if (miblks == current_miblks) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_miblks = miblks; }
+      }
+      log("Best MIBLKS is %u.  Default MIBLKS is 0.\n", best_miblks);
+      configsUpdate(current_cost, best_cost, 0.000, "MIBLKS", best_miblks, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MIBLKS"] = to_string(best_miblks);
+    }
+
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_moblks = 0;
+      u32 current_moblks = args->value("MOBLKS", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 moblks : {0, 1, 2}) {
+        args->flags["MOBLKS"] = to_string(moblks);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MOBLKS=%u is %6.1f\n", fft.spec().c_str(), moblks, cost);
+        if (moblks == current_moblks) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_moblks = moblks; }
+      }
+      log("Best MOBLKS is %u.  Default MOBLKS is 0.\n", best_moblks);
+      configsUpdate(current_cost, best_cost, 0.000, "MOBLKS", best_moblks, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MOBLKS"] = to_string(best_moblks);
+    }
+
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_nontemporal = 0;
-      u32 current_nontemporal = args->value("NONTEMPORAL", 0);
+      u32 best_tsblks = 0;
+      u32 current_tsblks = args->value("TSBLKS", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 nontemporal : {0, 1, 2}) {
-        args->flags["NONTEMPORAL"] = to_string(nontemporal);
+      for (u32 tsblks : {0, 1, 2}) {
+        args->flags["TSBLKS"] = to_string(tsblks);
         double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using NONTEMPORAL=%u is %6.1f\n", fft.spec().c_str(), nontemporal, cost);
-        if (nontemporal == current_nontemporal) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_nontemporal = nontemporal; }
+        log("Time for %12s using TSBLKS=%u is %6.1f\n", fft.spec().c_str(), tsblks, cost);
+        if (tsblks == current_tsblks) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tsblks = tsblks; }
       }
-      log("Best NONTEMPORAL is %u.  Default NONTEMPORAL is 0.\n", best_nontemporal);
-      configsUpdate(current_cost, best_cost, 0.000, "NONTEMPORAL", best_nontemporal, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["NONTEMPORAL"] = to_string(best_nontemporal);
+      log("Best TSBLKS is %u.  Default TSBLKS is 0.\n", best_tsblks);
+      configsUpdate(current_cost, best_cost, 0.000, "TSBLKS", best_tsblks, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["TSBLKS"] = to_string(best_tsblks);
     }
+#endif
 
     // Find best FAST_BARRIER setting
-    if (1 /*AMDGPU*/) {			// FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
+    if (1 /*AMDGPU*/) {                 // FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_fast_barrier = 0;
@@ -912,7 +1096,7 @@ void Tune::tune() {
     }
 
     // Find best WMUL setting
-    if (1) {
+    if (1 && defaultShape->width != 4096) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_wmul = 0;
@@ -931,46 +1115,6 @@ void Tune::tune() {
       args->flags["WMUL"] = to_string(best_wmul);
     }
 
-    // Find best ENABLE_L2STORE setting
-    if (NVIDIAGPU) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_enable_l2store = 0;
-      u32 current_enable_l2store = args->value("ENABLE_L2STORE", 2);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 enable_l2store : {0, 1}) {
-        args->flags["ENABLE_L2STORE"] = to_string(enable_l2store);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using ENABLE_L2STORE=%u is %6.1f\n", fft.spec().c_str(), enable_l2store, cost);
-        if (enable_l2store == current_enable_l2store) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_enable_l2store = enable_l2store; }
-      }
-      log("Best ENABLE_L2STORE is %u.  Default ENABLE_L2STORE is 1.\n", best_enable_l2store);
-      configsUpdate(current_cost, best_cost, 0.003, "ENABLE_L2STORE", best_enable_l2store, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["ENABLE_L2STORE"] = to_string(best_enable_l2store);
-    }
-
-    // Find best ENABLE_LULOAD setting
-    if (NVIDIAGPU) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_enable_luload = 0;
-      u32 current_enable_luload = args->value("ENABLE_LULOAD", 2);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 enable_luload : {0, 1}) {
-        args->flags["ENABLE_LULOAD"] = to_string(enable_luload);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using ENABLE_LULOAD=%u is %6.1f\n", fft.spec().c_str(), enable_luload, cost);
-        if (enable_luload == current_enable_luload) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_enable_luload = enable_luload; }
-      }
-      log("Best ENABLE_LULOAD is %u.  Default ENABLE_LULOAD is 1.\n", best_enable_luload);
-      configsUpdate(current_cost, best_cost, 0.003, "ENABLE_LULOAD", best_enable_luload, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["ENABLE_LULOAD"] = to_string(best_enable_luload);
-    }
-
     // Find best BIGLIT setting
     if (0 && time_FFTs) {        // Deprecated
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
@@ -1070,14 +1214,14 @@ skip_1K_256 = 0;
       if (variant_W(variant) == 0) {
         if (!AMDGPU) continue;
         if (shape.width > 1024) continue;
-	if (args->value("NO_ASM", 0)) continue;
+        if (args->value("NO_ASM", 0)) continue;
       }
 
       // Only AMD GPUs support variant zero (BCAST) and only if height <= 1024.
       if (variant_H(variant) == 0) {
         if (!AMDGPU) continue;
         if (shape.height > 1024) continue;
-	if (args->value("NO_ASM", 0)) continue;
+        if (args->value("NO_ASM", 0)) continue;
       }
 
       // Reject shapes that won't be used to test exponents in the user's desired range
@@ -1165,7 +1309,7 @@ skip_1K_256 = 0;
         double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
         bool isUseful = TuneEntry{cost, fft}.update(results);
         log("%c %6.1f %12s %9" PRIu64 "\n", isUseful ? '*' : ' ', cost, fft.spec().c_str(), fft.maxExp());
-	if (isUseful) TuneEntry::writeTuneFile(results);
+        if (isUseful) TuneEntry::writeTuneFile(results);
       }
     }
   }

From 0fe2ee25dcb51df44069933f4aad677d48c8008c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 23 Mar 2026 19:24:44 +0000
Subject: [PATCH 015/214] More changes (many are lint-like fixes) due to
 potential MSVC support.

---
 genbundle.sh         |  10 +-
 src/FFTConfig.cpp    |  12 +-
 src/FFTConfig.h      |   8 +-
 src/File.cpp         |   2 +-
 src/File.h           |  37 ++--
 src/TrigBufCache.cpp |   2 +-
 src/U128.cpp         | 285 ++++++++++++++++++++++++++++++
 src/U128.h           | 390 +++++++++++++++++++++++++++++++++++++++++
 src/common.h         |   5 +
 src/fftbpw.h         | 402 +++++++++++++++++++++----------------------
 src/main.cpp         |   6 +
 src/state.cpp        |   2 +-
 12 files changed, 930 insertions(+), 231 deletions(-)
 create mode 100644 src/U128.cpp
 create mode 100644 src/U128.h

diff --git a/genbundle.sh b/genbundle.sh
index 9d176062..d13521f8 100755
--- a/genbundle.sh
+++ b/genbundle.sh
@@ -19,10 +19,14 @@ do
     names=${names}\"${x}\",
 
     echo "// $xx"
-    #echo const char ${x}_cl[] = R\"cltag\(
-    echo 'R"cltag('
-    cat "$xx"
+
+    # MSVC cannot handle string constants longer than 16KB.  Thus, output one raw line at a time and concatenate them using the C++ preprocessor
+    echo '        R"cltag('
+    while IFS= read -r line; do
+        echo ')cltag" R"cltag('"$line"
+    done < $xx
     echo ')cltag",'
+
     echo
 done
 echo '};'
diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index c21607e1..5441392d 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -34,7 +34,7 @@ u32 parseInt(const string& s) {
   assert(!s.empty());
   char c = s.back();
   u32 multiple = c == 'k' || c == 'K' ? 1024 : c == 'm' || c == 'M' ? 1024 * 1024 : 1;
-  return strtod(s.c_str(), nullptr) * multiple;
+  return u32(strtod(s.c_str(), nullptr) * multiple);
 }
 
 } // namespace
@@ -157,7 +157,7 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
       while (h < 256) { h *= 2; m /= 2; }
       if (m == 1) m = 2;
       bpw = FFTShape{w, m, h}.bpw;
-      for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) bpw[j] -= 0.05;   // Assume this fft spec is worse than measured fft specs
+      for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) bpw[j] -= 0.05f;   // Assume this fft spec is worse than measured fft specs
       if (this->isFavoredShape()) {  // Don't output this warning message for non-favored shapes (we expect the BPW info to be missing)
         printf("BPW info for %s not found, defaults={", s.c_str());
         for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) printf("%s%.2f", j ? ", " : "", (double) bpw[j]);
@@ -177,9 +177,9 @@ float FFTShape::carry32BPW() const {
 
 //GW:  I have no idea why this is needed.  Without it, -tune fails on FFT sizes from 256K to 1M
 // Perhaps it has something to do with RNDVALdoubleToLong in carryutil
-if (18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())) > 19.0) return 19.0;
+if (18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())) > 19.0) return 19.0f;
 
-  return 18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size()));
+  return float(18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())));
 }
 
 bool FFTShape::needsLargeCarry(u64 E) const {
@@ -227,7 +227,7 @@ FFTConfig::FFTConfig(const string& spec) {
   }
 }
 
-FFTConfig::FFTConfig(FFTShape shape, u32 variant, u32 carry) :
+FFTConfig::FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry) :
   shape{shape},
   variant{variant},
   carry{carry}
@@ -265,7 +265,7 @@ float FFTConfig::maxBpw() const {
   else {
     float b1 = shape.bpw[variant_M(variant) * 3 + variant_W(variant)];
     float b2 = shape.bpw[variant_M(variant) * 3 + variant_H(variant)];
-    b = (b1 + b2) / 2.0;
+    b = (b1 + b2) / 2.0f;
   }
   // Only some FFTs support both 32 and 64 bit carries.
   return (carry == CARRY_32 && (shape.fft_type == FFT64 || shape.fft_type == FFT3231)) ? std::min(shape.carry32BPW(), b) : b;
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index a9ad052c..1b139ea6 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -27,8 +27,6 @@ class FFTShape {
 public:
   static std::vector<FFTShape> allShapes(u32 from=0, u32 to = -1);
 
-  static tuple<u32, u32, bool> getChainLengths(u32 fftSize, u64 exponent, u32 middle);
-
   static vector<FFTShape> multiSpec(const string& spec);
 
   enum FFT_TYPES fft_type;
@@ -87,14 +85,14 @@ struct FFTConfig {
 
   FFTShape shape{};
   u32 variant;
-  u32 carry;
+  enum CARRY_KIND carry;
 
   explicit FFTConfig(const string& spec);
-  FFTConfig(FFTShape shape, u32 variant, u32 carry);
+  FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry);
 
   std::string spec() const;
   u64 size() const { return shape.size(); }
-  u64 maxExp()  const { return maxBpw() * shape.size(); }
+  u64 maxExp()  const { return u64(maxBpw() * shape.size()); }
 
   float minBpw() const { return shape.minBpw(); }
   float maxBpw() const;
diff --git a/src/File.cpp b/src/File.cpp
index 3aaad2e0..2d54bda2 100644
--- a/src/File.cpp
+++ b/src/File.cpp
@@ -6,7 +6,7 @@
 
 using namespace std;
 
-File::File(const std::filesystem::__cxx11::path& path, const string& mode, bool throwOnError)
+File::File(const std::filesystem::path& path, const string& mode, bool throwOnError)
   : readOnly{mode == "rb"}, name{path.string()} {
   assert(readOnly || throwOnError);
 
diff --git a/src/File.h b/src/File.h
index 1e1766e4..f3b9b177 100644
--- a/src/File.h
+++ b/src/File.h
@@ -8,7 +8,9 @@
 #include <cstdio>
 #include <cstdarg>
 #include <cassert>
+#ifndef _MSC_VER		// unistd.h does not exist for MSVC
 #include <unistd.h>
+#endif
 #include <filesystem>
 #include <vector>
 #include <string>
@@ -28,6 +30,15 @@
 #define HAS_SETLINEBUF 0
 #endif
 
+//! Macros for __attribute__ compiler/crossplatform support
+#ifndef _MSC_VER
+#define FORMAT_PRINTF(fmt_idx, arg_idx) __attribute__((format(printf, fmt_idx, arg_idx)))
+#define FORMAT_SCANF(fmt_idx, arg_idx) __attribute__((format(scanf, fmt_idx, arg_idx)))
+#else
+#define FORMAT_PRINTF(fmt_idx, arg_idx)
+#define FORMAT_SCANF(fmt_idx, arg_idx)
+#endif
+
 namespace fs = std::filesystem;
 
 struct CRCError {
@@ -48,7 +59,7 @@ class File {
   
   File(const fs::path &path, const string& mode, bool throwOnError);
 
-  bool readNoThrow(void* data, u32 nBytes) const { return fread(data, nBytes, 1, get()); }
+  bool readNoThrow(void* data, u32 nBytes) const { return fread(data, nBytes, 1, this->get()); }
   
   void read(void* data, u32 nBytes) const {
     if (!readNoThrow(data, nBytes)) { throw ReadError{name}; }
@@ -128,18 +139,18 @@ class File {
   void write(const T& x) const { write(&x, sizeof(T)); }
 
   void write(const void* data, u32 nBytes) const {
-    if (!fwrite(data, nBytes, 1, get())) { throw WriteError{name}; }
+    if (!fwrite(data, nBytes, 1, this->get())) { throw WriteError{name}; }
   }
   
   void seek(long offset, int whence = SEEK_SET) {
-    int ret = fseek(get(), offset, whence);
+    int ret = fseek(this->get(), offset, whence);
     if (ret) { throw ReadError{name}; }
       // throw(std::ios_base::failure(("fseek: "s + to_string(ret)).c_str()));
   }
 
-  void flush() { fflush(get()); }
+  void flush() { fflush(this->get()); }
   
-  int printf(const char *fmt, ...) const __attribute__((format(printf, 2, 3))) {
+  int printf(const char *fmt, ...) const FORMAT_PRINTF(2, 3) {
     va_list va;
     va_start(va, fmt);
     int ret = vfprintf(f, fmt, va);
@@ -152,7 +163,7 @@ class File {
     return ret;
   }
 
-  int scanf(const char *fmt, ...) __attribute__((format(scanf, 2, 3))) {
+  int scanf(const char *fmt, ...) FORMAT_SCANF(2, 3) {
     va_list va;
     va_start(va, fmt);
     int ret = vfscanf(f, fmt, va);
@@ -162,13 +173,13 @@ class File {
   
   void write(const string& s) { write(string_view(s)); }
   void write(const char* s) { write(string_view(s)); }
-  void write(string_view s) { write(s.data(), s.size()); }
+  void write(string_view s) { write(s.data(), u32(s.size())); }
 
   operator bool() const { return f != nullptr; }
   FILE* get() const { return f; }
 
   long ftell() const {
-    long pos = ::ftell(get());
+    long pos = ::ftell(this->get());
     assert(pos >= 0);
     return pos;
   }
@@ -191,7 +202,7 @@ class File {
   std::string readLine() {
     char buf[1024];
     buf[0] = 0;
-    bool ok = fgets(buf, sizeof(buf), get());
+    bool ok = fgets(buf, sizeof(buf), this->get());
     if (!ok) { return ""; }  // EOF or error
     string line = buf;
     if (line.empty() || line.back() != '\n') {
@@ -244,11 +255,11 @@ class File {
     read(data.data(), nBytes);
     return data;
   }
-  
-  u32 readUpTo(void* data, u32 nUpToBytes) { return fread(data, 1, nUpToBytes, get()); }
-  
+
+  u32 readUpTo(void* data, u32 nUpToBytes) { return u32(fread(data, 1, nUpToBytes, this->get())); }
+
   string readAll() {
-    size_t sz = size();
+    u32 sz = u32(size());
     return {read<char>(sz).data(), sz};
   }
 };
diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index 03c8e1e6..0edb1f29 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -593,7 +593,7 @@ class Z61
 
         static uint64_t _mul(const uint64_t a, const uint64_t b)
         {
-                const __uint128_t t = a * __uint128_t(b);
+                const u128 t = a * u128(b);
                 const uint64_t lo = uint64_t(t), hi = uint64_t(t >> 64);
                 const uint64_t lo61 = lo & _p, hi61 = (lo >> 61) | (hi << 3);
                 return _add(lo61, hi61);
diff --git a/src/U128.cpp b/src/U128.cpp
new file mode 100644
index 00000000..6b2b858d
--- /dev/null
+++ b/src/U128.cpp
@@ -0,0 +1,285 @@
+/*******************************************************************
+*
+*    Author: Kareem Omar
+*    kareem.h.omar@gmail.com
+*    https://github.com/komrad36
+*
+*    Last updated Feb 15, 2021
+*******************************************************************/
+
+#include <cstdint>
+#include <immintrin.h>
+#include <intrin.h>
+#include <ostream>
+
+#include "U128.h"
+
+using I8 = int8_t;
+using I16 = int16_t;
+using I32 = int32_t;
+using I64 = int64_t;
+
+using U8 = uint8_t;
+using U16 = uint16_t;
+using U32 = uint32_t;
+using U64 = uint64_t;
+
+static inline bool FitsHardwareDivL(U64 nHi, U64 nLo, U64 d)
+{
+    return !(nHi | (d >> 32)) && nLo < (d << 32);
+}
+
+static inline U64 HardwareDivL(U64 n, U64 d, U64& rem)
+{
+    U32 rLo;
+    const U32 qLo = _udiv64(n, U32(d), &rLo);
+    rem = rLo;
+    return qLo;
+}
+
+static inline U64 HardwareDivQ(U64 nHi, U64 nLo, U64 d, U64& rem)
+{
+    nLo = _udiv128(nHi, nLo, d, &nHi);
+    rem = nHi;
+    return nLo;
+}
+
+static inline bool IsPow2(U64 hi, U64 lo)
+{
+    const U64 T = hi | lo;
+    return !((hi & lo) | (T & (T - 1)));
+}
+
+static inline U64 CountTrailingZeros(U64 hi, U64 lo)
+{
+    const U64 nLo = _tzcnt_u64(lo);
+    const U64 nHi = 64ULL + _tzcnt_u64(hi);
+    return lo ? nLo : nHi;
+}
+
+static inline U64 CountLeadingZeros(U64 hi, U64 lo)
+{
+    const U64 nLo = 64ULL + _lzcnt_u64(lo);
+    const U64 nHi = _lzcnt_u64(hi);
+    return hi ? nHi : nLo;
+}
+
+static inline U128 MaskBitsBelow(U64 hi, U64 lo, U64 n)
+{
+    return U128(_bzhi_u64(hi, U32(n < 64 ? 0 : n - 64)), _bzhi_u64(lo, U32(n)));
+}
+
+U128 DivMod(U128 N, U128 D, U128& rem)
+{
+    if (D > N)
+    {
+        rem = N;
+        return 0;
+    }
+
+    U64 nHi = N.m_hi;
+    U64 nLo = N.m_lo;
+    U64 dHi = D.m_hi;
+    U64 dLo = D.m_lo;
+
+    if (IsPow2(dHi, dLo))
+    {
+        const U64 n = CountTrailingZeros(dHi, dLo);
+        rem = MaskBitsBelow(nHi, nLo, n);
+        return N >> n;
+    }
+
+    if (!dHi)
+    {
+        if (nHi < dLo)
+        {
+            U64 remLo;
+            U64 Q;
+            if (FitsHardwareDivL(nHi, nLo, dLo))
+                Q = HardwareDivL(nLo, dLo, remLo);
+            else
+                Q = HardwareDivQ(nHi, nLo, dLo, remLo);
+            rem = remLo;
+            return Q;
+        }
+
+        U64 remLo;
+        const U64 qHi = HardwareDivQ(0, nHi, dLo, remLo);
+        const U64 qLo = HardwareDivQ(remLo, nLo, dLo, remLo);
+        rem = remLo;
+        return U128(qHi, qLo);
+    }
+
+    U64 n = _lzcnt_u64(dHi) - _lzcnt_u64(nHi);
+
+    dHi = __shiftleft128(dLo, dHi, U8(n));
+    dLo <<= n;
+
+    U64 Q = 0;
+    ++n;
+
+    do
+    {
+        U64 tLo, tHi;
+        unsigned char carry = _subborrow_u64(_subborrow_u64(0, nLo, dLo, &tLo), nHi, dHi, &tHi);
+        nLo = !carry ? tLo : nLo;
+        nHi = !carry ? tHi : nHi;
+        Q = (Q << 1) + !carry;
+        dLo = __shiftright128(dLo, dHi, 1);
+        dHi >>= 1;
+    } while (--n);
+
+    rem = U128(nHi, nLo);
+    return Q;
+}
+
+U128::U128(float x)
+{
+    const U32 bits = U32(_mm_cvtsi128_si32(_mm_castps_si128(_mm_set_ss(x))));
+    const U32 s = bits >> 31;
+
+    // technically UB but let's be nice
+    if (s)
+    {
+        m_hi = m_lo = 0ULL;
+        return;
+    }
+
+    const U32 e = (bits >> 23) - 127;
+    const U32 m = (bits & ((1U << 23) - 1U)) | (1U << 23);
+
+    // again, technically UB but let's be nice
+    if (e >= 128)
+    {
+        m_hi = m_lo = ~0ULL;
+        return;
+    }
+
+    if (e >= 23)
+        *this = U128(m) << (e - 23);
+    else
+        *this = m >> (23 - e);
+}
+
+U128::U128(double x)
+{
+    const U64 bits = U64(_mm_cvtsi128_si64(_mm_castpd_si128(_mm_set_sd(x))));
+    const U64 s = bits >> 63;
+
+    // technically UB but let's be nice
+    if (s)
+    {
+        m_hi = m_lo = 0ULL;
+        return;
+    }
+
+    const U64 e = (bits >> 52) - 1023;
+    const U64 m = (bits & ((1ULL << 52) - 1ULL)) | (1ULL << 52);
+
+    // again, technically UB but let's be nice
+    if (e >= 128)
+    {
+        m_hi = m_lo = ~0ULL;
+        return;
+    }
+
+    if (e >= 52)
+        *this = U128(m) << (e - 52);
+    else
+        *this = m >> (52 - e);
+}
+
+U128::operator float() const
+{
+    if (!*this)
+        return 0.0f;
+
+    const U32 numBits = 128U - U32(CountLeadingZeros(m_hi, m_lo));
+
+    U32 bits;
+
+    if (numBits <= 24)
+    {
+        const U32 m = (U32(m_lo) << (24 - numBits)) & ~(1U << 23);
+        const U32 e = numBits + 126;
+        bits = (e << 23) | m;
+    }
+    else
+    {
+        const U32 s = numBits - 24;
+        const U32 m = U32(*this >> s) & ~(1U << 23);
+        const U32 G = U32(*this >> (s - 1));
+        const U32 R = U32(bool(MaskBitsBelow(m_hi, m_lo, s < 2 ? 0 : s - 2)));
+        const U32 e = numBits + 126;
+        bits = ((e << 23) | m) + (G & (R | m) & 1U);
+    }
+
+    return _mm_cvtss_f32(_mm_castsi128_ps(_mm_cvtsi32_si128((I32)bits)));
+}
+
+U128::operator double() const
+{
+    if (!*this)
+        return 0.0;
+
+    const U64 numBits = 128ULL - CountLeadingZeros(m_hi, m_lo);
+
+    U64 bits;
+
+    if (numBits <= 53)
+    {
+        const U64 m = (m_lo << (53 - numBits)) & ~(1ULL << 52);
+        const U64 e = numBits + 1022;
+        bits = (e << 52) | m;
+    }
+    else
+    {
+        const U64 s = numBits - 53;
+        const U64 m = U64(*this >> s) & ~(1ULL << 52);
+        const U64 G = U64(*this >> (s - 1));
+        const U64 R = U64(bool(MaskBitsBelow(m_hi, m_lo, s < 2 ? 0 : s - 2)));
+        const U64 e = numBits + 1022;
+        bits = ((e << 52) | m) + (G & (R | m) & 1ULL);
+    }
+
+    return _mm_cvtsd_f64(_mm_castsi128_pd(_mm_cvtsi64_si128((I64)bits)));
+}
+
+void U128::ToString(char* buf, U64 base/* = 10*/) const
+{
+    U64 i = 0;
+    if (base >= 2 && base <= 36)
+    {
+        U128 n = *this;
+        U128 r, b = base;
+        do
+        {
+            n = DivMod(n, b, r);
+            const char c(r);
+            buf[i++] = c + (c >= 10 ? '7' : '0');
+        } while (n);
+
+        for (U64 j = 0; j < (i >> 1); ++j)
+        {
+            const char t = buf[j];
+            buf[j] = buf[i - j - 1];
+            buf[i - j - 1] = t;
+        }
+    }
+    buf[i] = '\0';
+}
+
+std::ostream& operator<<(std::ostream& os, const U128& x)
+{
+    char buf[40];
+    x.ToString(buf);
+    os << buf;
+    return os;
+}
+
+const char* NatVisStr_DebugOnly(const U128& x)
+{
+    static char buf[40];
+    x.ToString(buf);
+    return buf;
+}
diff --git a/src/U128.h b/src/U128.h
new file mode 100644
index 00000000..2379a8f1
--- /dev/null
+++ b/src/U128.h
@@ -0,0 +1,390 @@
+/*******************************************************************
+*
+*    Author: Kareem Omar
+*    kareem.h.omar@gmail.com
+*    https://github.com/komrad36
+*
+*    Last updated Feb 15, 2021
+*******************************************************************/
+
+#pragma once
+
+#include <cstdint>
+#include <intrin.h>
+#include <iosfwd>
+
+using I8  = int8_t;
+using I16 = int16_t;
+using I32 = int32_t;
+using I64 = int64_t;
+
+using U8  = uint8_t;
+using U16 = uint16_t;
+using U32 = uint32_t;
+using U64 = uint64_t;
+
+#define MAKE_BINARY_OP_HELPERS(op) \
+friend auto operator op(const U128& x, U8   y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, U16  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, U32  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, U64  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, I8   y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, I16  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, I32  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, I64  y) { return operator op(x, (U128)y); }  \
+friend auto operator op(const U128& x, char y) { return operator op(x, (U128)y); }  \
+friend auto operator op(U8   x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(U16  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(U32  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(U64  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(I8   x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(I16  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(I32  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(I64  x, const U128& y) { return operator op((U128)x, y); }  \
+friend auto operator op(char x, const U128& y) { return operator op((U128)x, y); }
+
+#define MAKE_BINARY_OP_HELPERS_FLOAT(op) \
+friend auto operator op(const U128& x, float  y) { return (float)x op y; }   \
+friend auto operator op(const U128& x, double y) { return (double)x op y; }  \
+friend auto operator op(float  x, const U128& y) { return x op (float)y; }    \
+friend auto operator op(double x, const U128& y) { return x op (double)y; }
+
+#define MAKE_BINARY_OP_HELPERS_U64(op) \
+friend U128 operator op(const U128& x, U8  n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, U16 n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, U32 n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, I8  n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, I16 n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, I32 n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, I64 n) { return operator op(x, (U64)n); }    \
+friend U128 operator op(const U128& x, const U128& n) { return operator op(x, (U64)n); }
+
+class U128
+{
+public:
+    friend U128 DivMod(U128 n, U128 d, U128& rem);
+
+    U128() = default;
+    U128(U8    x) : m_lo(x), m_hi(0) {}
+    U128(U16   x) : m_lo(x), m_hi(0) {}
+    U128(U32   x) : m_lo(x), m_hi(0) {}
+    U128(U64   x) : m_lo(x), m_hi(0) {}
+    U128(I8    x) : m_lo(I64(x)), m_hi(I64(x) >> 63) {}
+    U128(I16   x) : m_lo(I64(x)), m_hi(I64(x) >> 63) {}
+    U128(I32   x) : m_lo(I64(x)), m_hi(I64(x) >> 63) {}
+    U128(I64   x) : m_lo(I64(x)), m_hi(I64(x) >> 63) {}
+    U128(U64 hi, U64 lo) : m_lo(lo), m_hi(hi) {}
+
+    // inexact values truncate, as per the Standard [conv.fpint]
+    // passing values unrepresentable in the destination format is undefined behavior,
+    // as per the Standard, but this implementation saturates
+    U128(float x);
+
+    // inexact values truncate, as per the Standard [conv.fpint]
+    // passing values unrepresentable in the destination format is undefined behavior,
+    // as per the Standard, but this implementation saturates
+    U128(double x);
+
+    U128& operator+=(const U128& x)
+    {
+        static_cast<void>(_addcarry_u64(_addcarry_u64(0, m_lo, x.m_lo, &m_lo), m_hi, x.m_hi, &m_hi));
+        return *this;
+    }
+
+    friend U128 operator+(const U128& x, const U128& y)
+    {
+        U128 ret;
+        static_cast<void>(_addcarry_u64(_addcarry_u64(0, x.m_lo, y.m_lo, &ret.m_lo), x.m_hi, y.m_hi, &ret.m_hi));
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS(+);
+    MAKE_BINARY_OP_HELPERS_FLOAT(+);
+
+    U128& operator-=(const U128& x)
+    {
+        static_cast<void>(_subborrow_u64(_subborrow_u64(0, m_lo, x.m_lo, &m_lo), m_hi, x.m_hi, &m_hi));
+        return *this;
+    }
+
+    friend U128 operator-(const U128& x, const U128& y)
+    {
+        U128 ret;
+        static_cast<void>(_subborrow_u64(_subborrow_u64(0, x.m_lo, y.m_lo, &ret.m_lo), x.m_hi, y.m_hi, &ret.m_hi));
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS(-);
+    MAKE_BINARY_OP_HELPERS_FLOAT(-);
+
+    U128& operator*=(const U128& x)
+    {
+        // ab * cd
+        // ==
+        // (2^64*a + b) * (2^64*c + d)
+        // if a*c == e, a*d == f, b*c == g, b*d == h
+        // |ee|ee|  |  |
+        // |  |fg|fg|  |
+        // |  |  |hh|hh|
+
+        U64 hHi;
+        const U64 hLo = _umul128(m_lo, x.m_lo, &hHi);
+        m_hi = hHi + m_hi * x.m_lo + m_lo * x.m_hi;
+        m_lo = hLo;
+        return *this;
+    }
+
+    friend U128 operator*(const U128& x, const U128& y)
+    {
+        U128 ret;
+        U64 hHi;
+        ret.m_lo = _umul128(x.m_lo, y.m_lo, &hHi);
+        ret.m_hi = hHi + y.m_hi * x.m_lo + y.m_lo * x.m_hi;
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS(*);
+    MAKE_BINARY_OP_HELPERS_FLOAT(*);
+
+    U128& operator/=(const U128& x)
+    {
+        U128 rem;
+        *this = DivMod(*this, x, rem);
+        return *this;
+    }
+
+    friend U128 operator/(const U128& x, const U128& y)
+    {
+        U128 rem;
+        return DivMod(x, y, rem);
+    }
+
+    MAKE_BINARY_OP_HELPERS(/);
+    MAKE_BINARY_OP_HELPERS_FLOAT(/);
+
+    U128& operator%=(const U128& x)
+    {
+        static_cast<void>(DivMod(*this, x, *this));
+        return *this;
+    }
+
+    friend U128 operator%(const U128& x, const U128& y)
+    {
+        U128 ret;
+        static_cast<void>(DivMod(x, y, ret));
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS(%);
+
+    U128& operator&=(const U128& x)
+    {
+        m_hi &= x.m_hi;
+        m_lo &= x.m_lo;
+        return *this;
+    }
+
+    friend U128 operator&(const U128& x, const U128& y)
+    {
+        return U128(x.m_hi & y.m_hi, x.m_lo & y.m_lo);
+    }
+
+    MAKE_BINARY_OP_HELPERS(&);
+
+    U128& operator|=(const U128& x)
+    {
+        m_hi |= x.m_hi;
+        m_lo |= x.m_lo;
+        return *this;
+    }
+
+    friend U128 operator|(const U128& x, const U128& y)
+    {
+        return U128(x.m_hi | y.m_hi, x.m_lo | y.m_lo);
+    }
+
+    MAKE_BINARY_OP_HELPERS(|);
+
+    U128& operator^=(const U128& x)
+    {
+        m_hi ^= x.m_hi;
+        m_lo ^= x.m_lo;
+        return *this;
+    }
+
+    friend U128 operator^(const U128& x, const U128& y)
+    {
+        return U128(x.m_hi ^ y.m_hi, x.m_lo ^ y.m_lo);
+    }
+
+    MAKE_BINARY_OP_HELPERS(^);
+
+    U128& operator>>=(U64 n)
+    {
+        const U64 lo = __shiftright128(m_lo, m_hi, (U8)n);
+        const U64 hi = m_hi >> (n & 63ULL);
+
+        m_lo = n & 64 ? hi : lo;
+        m_hi = n & 64 ? 0  : hi;
+
+        return *this;
+    }
+
+    friend U128 operator>>(const U128& x, U64 n)
+    {
+        U128 ret;
+
+        const U64 lo = __shiftright128(x.m_lo, x.m_hi, (U8)n);
+        const U64 hi = x.m_hi >> (n & 63ULL);
+
+        ret.m_lo = n & 64 ? hi : lo;
+        ret.m_hi = n & 64 ? 0  : hi;
+
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS_U64(>>);
+
+    U128& operator<<=(U64 n)
+    {
+        const U64 hi = __shiftleft128(m_lo, m_hi, (U8)n);
+        const U64 lo = m_lo << (n & 63ULL);
+
+        m_hi = n & 64 ? lo : hi;
+        m_lo = n & 64 ? 0 : lo;
+
+        return *this;
+    }
+
+    friend U128 operator<<(const U128& x, U64 n)
+    {
+        U128 ret;
+
+        const U64 hi = __shiftleft128(x.m_lo, x.m_hi, (U8)n);
+        const U64 lo = x.m_lo << (n & 63ULL);
+
+        ret.m_hi = n & 64 ? lo : hi;
+        ret.m_lo = n & 64 ? 0 : lo;
+
+        return ret;
+    }
+
+    MAKE_BINARY_OP_HELPERS_U64(<<);
+
+    friend U128 operator~(const U128& x)
+    {
+        return U128(~x.m_hi, ~x.m_lo);
+    }
+
+    friend U128 operator+(const U128& x)
+    {
+        return x;
+    }
+
+    friend U128 operator-(const U128& x)
+    {
+        U128 ret;
+        static_cast<void>(_subborrow_u64(_subborrow_u64(0, 0, x.m_lo, &ret.m_lo), 0, x.m_hi, &ret.m_hi));
+        return ret;
+    }
+
+    U128& operator++()
+    {
+        operator+=(1);
+        return *this;
+    }
+
+    U128 operator++(int)
+    {
+        const U128 x = *this;
+        operator++();
+        return x;
+    }
+
+    U128& operator--()
+    {
+        operator-=(1);
+        return *this;
+    }
+
+    U128 operator--(int)
+    {
+        const U128 x = *this;
+        operator--();
+        return x;
+    }
+
+    friend bool operator<(const U128& x, const U128& y)
+    {
+        U64 unusedLo, unusedHi;
+        return _subborrow_u64(_subborrow_u64(0, x.m_lo, y.m_lo, &unusedLo), x.m_hi, y.m_hi, &unusedHi);
+    }
+    MAKE_BINARY_OP_HELPERS(<);
+    MAKE_BINARY_OP_HELPERS_FLOAT(<);
+
+    friend bool operator>(const U128& x, const U128& y) { return y < x; }
+    MAKE_BINARY_OP_HELPERS(>);
+    MAKE_BINARY_OP_HELPERS_FLOAT(>);
+
+    friend bool operator<=(const U128& x, const U128& y) { return !(x > y); }
+    MAKE_BINARY_OP_HELPERS(<=);
+    MAKE_BINARY_OP_HELPERS_FLOAT(<=);
+
+    friend bool operator>=(const U128& x, const U128& y) { return !(x < y); }
+    MAKE_BINARY_OP_HELPERS(>=);
+    MAKE_BINARY_OP_HELPERS_FLOAT(>=);
+
+    friend bool operator==(const U128& x, const U128& y)
+    {
+        return !((x.m_hi ^ y.m_hi) | (x.m_lo ^ y.m_lo));
+    }
+    MAKE_BINARY_OP_HELPERS(==);
+    MAKE_BINARY_OP_HELPERS_FLOAT(==);
+
+    friend bool operator!=(const U128& x, const U128& y) { return !(x == y); }
+    MAKE_BINARY_OP_HELPERS(!=);
+    MAKE_BINARY_OP_HELPERS_FLOAT(!=);
+
+    explicit operator bool() const { return m_hi | m_lo; }
+
+    operator U8 () const { return (U8) m_lo; }
+    operator U16() const { return (U16)m_lo; }
+    operator U32() const { return (U32)m_lo; }
+    operator U64() const { return (U64)m_lo; }
+
+    operator I8 () const { return (I8) m_lo; }
+    operator I16() const { return (I16)m_lo; }
+    operator I32() const { return (I32)m_lo; }
+    operator I64() const { return (I64)m_lo; }
+
+    operator char() const { return (char)m_lo; }
+
+    // rounding method is implementation-defined as per the Standard [conv.fpint]
+    // this implementation performs IEEE 754-compliant "round half to even" rounding to nearest,
+    // regardless of the current FPU rounding mode, which matches the behavior of clang and GCC
+    operator float() const;
+
+    // rounding method is implementation-defined as per the Standard [conv.fpint]
+    // this implementation performs IEEE 754-compliant "round half to even" rounding to nearest,
+    // regardless of the current FPU rounding mode, which matches the behavior of clang and GCC
+    operator double() const;
+
+    // caller is responsible for ensuring that buf has space for the U128 AND the null terminator
+    // that follows, in the given output base.
+    // Common bases and worst-case size requirements:
+    // Base  2: 129 bytes (128 + null terminator)
+    // Base  8:  44 bytes ( 43 + null terminator)
+    // Base 10:  40 bytes ( 39 + null terminator)
+    // Base 16:  33 bytes ( 32 + null terminator)
+    void ToString(char* buf, U64 base = 10) const;
+
+private:
+    U64 m_lo;
+    U64 m_hi;
+};
+
+#undef MAKE_BINARY_OP_HELPERS
+#undef MAKE_BINARY_OP_HELPERS_FLOAT
+#undef MAKE_BINARY_OP_HELPERS_U64
+
+std::ostream& operator<<(std::ostream& os, const U128& x);
diff --git a/src/common.h b/src/common.h
index 1b549950..2a2c0bce 100644
--- a/src/common.h
+++ b/src/common.h
@@ -11,8 +11,13 @@ using i32 = int32_t;
 using u32 = uint32_t;
 using i64 = int64_t;
 using u64 = uint64_t;
+#ifndef _MSC_VER                        // MSVC does not suppport 128-bit values
 using i128 = __int128;
 using u128 = unsigned __int128;
+#else
+#include "U128.h"
+using u128 = U128;
+#endif
 // using f128 = __float128;
 
 static_assert(sizeof(u8)  == 1, "size u8");
diff --git a/src/fftbpw.h b/src/fftbpw.h
index f3af7da7..fdd490fc 100644
--- a/src/fftbpw.h
+++ b/src/fftbpw.h
@@ -1,208 +1,208 @@
 // FFT64 - Computed by targeting Z=28
-{ "256:2:256", {19.204, 19.547, 19.636, 19.204, 19.547, 19.636}},
-{ "256:3:256", {19.106, 19.386, 19.369, 19.106, 19.399, 19.361}},
-{ "256:4:256", {18.928, 19.236, 19.322, 18.954, 19.272, 19.367}},
-{ "256:5:256", {19.093, 19.094, 19.242, 19.147, 19.142, 19.314}},
-{ "256:6:256", {18.805, 19.065, 19.005, 18.854, 19.134, 19.101}},
-{ "256:7:256", {18.688, 18.995, 18.971, 18.763, 19.068, 19.071}},
-{ "256:8:256", {18.600, 18.909, 18.964, 18.679, 19.018, 19.120}},
-{ "512:4:256", {18.729, 18.913, 19.062, 18.770, 18.963, 19.120}},
-{ "256:9:256", {18.634, 18.871, 18.802, 18.688, 18.981, 18.961}},
-{"256:10:256", {18.748, 18.770, 18.906, 18.895, 18.896, 19.051}},
-{ "512:5:256", {18.751, 18.766, 18.891, 18.812, 18.832, 18.966}},
-{"256:11:256", {18.523, 18.782, 18.791, 18.594, 18.910, 18.946}},
-{"256:12:256", {18.558, 18.749, 18.669, 18.612, 18.880, 18.842}},
-{ "512:6:256", {18.641, 18.748, 18.838, 18.686, 18.809, 18.949}},
-{"256:13:256", {18.423, 18.693, 18.794, 18.497, 18.820, 18.938}},
-{"256:14:256", {18.450, 18.671, 18.639, 18.519, 18.808, 18.785}},
-{ "512:7:256", {18.547, 18.671, 18.782, 18.629, 18.738, 18.895}},
-{"256:15:256", {18.666, 18.652, 18.628, 18.798, 18.784, 18.791}},
-{"256:16:256", {18.277, 18.568, 18.649, 18.425, 18.741, 18.849}},
-{ "512:8:256", {18.455, 18.592, 18.682, 18.508, 18.673, 18.835}},
-{ "512:4:512", {18.565, 18.599, 18.642, 18.594, 18.629, 18.716}},
-{ "512:9:256", {18.491, 18.579, 18.648, 18.546, 18.661, 18.792}},
-{  "1K:5:256", {18.553, 18.547, 18.713, 18.622, 18.601, 18.762}},
-{"512:10:256", {18.461, 18.479, 18.570, 18.561, 18.572, 18.697}},
-{ "512:5:512", {18.450, 18.473, 18.513, 18.499, 18.513, 18.583}},
-{"512:11:256", {18.335, 18.481, 18.586, 18.444, 18.579, 18.744}},
-{  "1K:6:256", {18.294, 18.528, 18.476, 18.335, 18.596, 18.562}},
-{"512:12:256", {18.381, 18.462, 18.537, 18.448, 18.560, 18.678}},
-{ "512:6:512", {18.440, 18.462, 18.585, 18.479, 18.504, 18.644}},
-{"512:13:256", {18.247, 18.401, 18.482, 18.348, 18.497, 18.645}},
-{  "1K:7:256", {18.171, 18.455, 18.442, 18.238, 18.531, 18.521}},
-{"512:14:256", {18.266, 18.376, 18.467, 18.374, 18.490, 18.637}},
-{ "512:7:512", {18.372, 18.372, 18.462, 18.428, 18.432, 18.567}},
-{"512:15:256", {18.351, 18.355, 18.460, 18.453, 18.465, 18.619}},
-{  "1K:8:256", {18.093, 18.359, 18.435, 18.156, 18.461, 18.570}},
-{"512:16:256", {18.108, 18.260, 18.298, 18.223, 18.420, 18.570}},
-{ "512:8:512", {18.256, 18.280, 18.314, 18.319, 18.369, 18.444}},
-{  "1K:9:256", {18.123, 18.328, 18.245, 18.171, 18.443, 18.426}},
-{ "512:9:512", {18.243, 18.262, 18.343, 18.315, 18.342, 18.493}},
-{ "1K:10:256", {18.233, 18.228, 18.370, 18.357, 18.343, 18.516}},
-{  "1K:5:512", {18.237, 18.232, 18.385, 18.281, 18.272, 18.479}},
-{"512:10:512", {18.142, 18.160, 18.174, 18.226, 18.243, 18.314}},
-{ "1K:11:256", {18.001, 18.234, 18.243, 18.084, 18.362, 18.411}},
-{"512:11:512", {18.156, 18.170, 18.196, 18.242, 18.251, 18.356}},
-{ "1K:12:256", {18.052, 18.225, 18.151, 18.090, 18.332, 18.291}},
-{  "1K:6:512", {18.125, 18.227, 18.293, 18.160, 18.283, 18.401}},
-{"512:12:512", {18.141, 18.163, 18.245, 18.217, 18.237, 18.409}},
-{ "1K:13:256", {17.903, 18.155, 18.249, 17.980, 18.261, 18.380}},
-{"512:13:512", {18.097, 18.104, 18.135, 18.168, 18.171, 18.239}},
-{ "1K:14:256", {17.929, 18.143, 18.103, 18.005, 18.268, 18.244}},
-{  "1K:7:512", {18.043, 18.150, 18.237, 18.100, 18.208, 18.347}},
-{"512:14:512", {18.094, 18.091, 18.154, 18.171, 18.173, 18.311}},
-{ "1K:15:256", {18.131, 18.127, 18.115, 18.260, 18.236, 18.238}},
-{"512:15:512", {18.049, 18.061, 18.112, 18.130, 18.136, 18.236}},
-{ "1K:16:256", {17.752, 18.019, 18.128, 17.892, 18.183, 18.326}},
-{  "1K:8:512", {17.930, 18.069, 18.190, 17.982, 18.137, 18.333}},
-{"512:16:512", {17.971, 17.997, 17.976, 18.072, 18.100, 18.170}},
-{  "1K:9:512", {17.944, 18.049, 18.124, 18.012, 18.122, 18.247}},
-{ "1K:10:512", {17.940, 17.939, 18.044, 18.044, 18.043, 18.195}},
-{   "1K:5:1K", {18.033, 18.016, 18.180, 18.101, 18.072, 18.237}},
-{ "1K:11:512", {17.829, 17.956, 18.078, 17.922, 18.044, 18.219}},
-{ "1K:12:512", {17.829, 17.944, 18.002, 17.912, 18.034, 18.139}},
-{   "1K:6:1K", {17.741, 18.003, 17.931, 17.794, 18.065, 18.051}},
-{ "1K:13:512", {17.744, 17.869, 18.010, 17.822, 17.959, 18.133}},
-{ "1K:14:512", {17.748, 17.854, 17.933, 17.848, 17.968, 18.100}},
-{   "1K:7:1K", {17.647, 17.914, 17.865, 17.714, 17.995, 17.994}},
-{ "1K:15:512", {17.828, 17.824, 17.943, 17.926, 17.934, 18.100}},
-{ "1K:16:512", {17.613, 17.744, 17.813, 17.711, 17.875, 18.073}},
-{   "1K:8:1K", {17.572, 17.810, 17.914, 17.628, 17.923, 18.046}},
-{   "1K:9:1K", {17.600, 17.807, 17.734, 17.636, 17.908, 17.892}},
-{  "1K:10:1K", {17.709, 17.681, 17.841, 17.823, 17.795, 17.981}},
-{  "1K:11:1K", {17.458, 17.682, 17.712, 17.560, 17.811, 17.891}},
-{  "1K:12:1K", {17.474, 17.698, 17.635, 17.560, 17.807, 17.752}},
-{  "1K:13:1K", {17.388, 17.619, 17.706, 17.465, 17.716, 17.853}},
-{  "1K:14:1K", {17.417, 17.627, 17.582, 17.491, 17.734, 17.715}},
-{  "1K:15:1K", {17.612, 17.592, 17.582, 17.720, 17.697, 17.722}},
-{  "1K:16:1K", {17.220, 17.471, 17.615, 17.369, 17.641, 17.778}},
-{  "4K:9:512", {17.457, 17.468, 17.550, 17.519, 17.531, 17.648}},
-{ "4K:10:512", {17.336, 17.336, 17.364, 17.416, 17.433, 17.507}},
-{ "4K:11:512", {17.351, 17.356, 17.393, 17.437, 17.440, 17.548}},
-{ "4K:12:512", {17.351, 17.362, 17.447, 17.420, 17.437, 17.576}},
-{ "4K:13:512", {17.278, 17.271, 17.324, 17.349, 17.351, 17.441}},
-{ "4K:14:512", {17.267, 17.270, 17.342, 17.359, 17.359, 17.503}},
-{ "4K:15:512", {17.238, 17.239, 17.295, 17.305, 17.315, 17.432}},
-{ "4K:16:512", {17.149, 17.163, 17.143, 17.251, 17.271, 17.352}},
-{   "4K:9:1K", {17.130, 17.225, 17.346, 17.189, 17.291, 17.485}},
-{  "4K:10:1K", {17.110, 17.111, 17.209, 17.199, 17.188, 17.351}},
-{  "4K:11:1K", {16.993, 17.108, 17.214, 17.084, 17.196, 17.405}},
-{  "4K:12:1K", {17.006, 17.123, 17.219, 17.101, 17.201, 17.370}},
-{  "4K:13:1K", {16.932, 17.045, 17.154, 17.002, 17.116, 17.298}},
-{  "4K:14:1K", {16.942, 17.055, 17.160, 17.027, 17.127, 17.306}},
-{  "4K:15:1K", {17.021, 17.007, 17.137, 17.104, 17.087, 17.282}},
-{  "4K:16:1K", {16.744, 16.887, 16.966, 16.921, 17.048, 17.208}},
+{ "256:2:256", {19.204f, 19.547f, 19.636f, 19.204f, 19.547f, 19.636f}},
+{ "256:3:256", {19.106f, 19.386f, 19.369f, 19.106f, 19.399f, 19.361f}},
+{ "256:4:256", {18.928f, 19.236f, 19.322f, 18.954f, 19.272f, 19.367f}},
+{ "256:5:256", {19.093f, 19.094f, 19.242f, 19.147f, 19.142f, 19.314f}},
+{ "256:6:256", {18.805f, 19.065f, 19.005f, 18.854f, 19.134f, 19.101f}},
+{ "256:7:256", {18.688f, 18.995f, 18.971f, 18.763f, 19.068f, 19.071f}},
+{ "256:8:256", {18.600f, 18.909f, 18.964f, 18.679f, 19.018f, 19.120f}},
+{ "512:4:256", {18.729f, 18.913f, 19.062f, 18.770f, 18.963f, 19.120f}},
+{ "256:9:256", {18.634f, 18.871f, 18.802f, 18.688f, 18.981f, 18.961f}},
+{"256:10:256", {18.748f, 18.770f, 18.906f, 18.895f, 18.896f, 19.051f}},
+{ "512:5:256", {18.751f, 18.766f, 18.891f, 18.812f, 18.832f, 18.966f}},
+{"256:11:256", {18.523f, 18.782f, 18.791f, 18.594f, 18.910f, 18.946f}},
+{"256:12:256", {18.558f, 18.749f, 18.669f, 18.612f, 18.880f, 18.842f}},
+{ "512:6:256", {18.641f, 18.748f, 18.838f, 18.686f, 18.809f, 18.949f}},
+{"256:13:256", {18.423f, 18.693f, 18.794f, 18.497f, 18.820f, 18.938f}},
+{"256:14:256", {18.450f, 18.671f, 18.639f, 18.519f, 18.808f, 18.785f}},
+{ "512:7:256", {18.547f, 18.671f, 18.782f, 18.629f, 18.738f, 18.895f}},
+{"256:15:256", {18.666f, 18.652f, 18.628f, 18.798f, 18.784f, 18.791f}},
+{"256:16:256", {18.277f, 18.568f, 18.649f, 18.425f, 18.741f, 18.849f}},
+{ "512:8:256", {18.455f, 18.592f, 18.682f, 18.508f, 18.673f, 18.835f}},
+{ "512:4:512", {18.565f, 18.599f, 18.642f, 18.594f, 18.629f, 18.716f}},
+{ "512:9:256", {18.491f, 18.579f, 18.648f, 18.546f, 18.661f, 18.792f}},
+{  "1K:5:256", {18.553f, 18.547f, 18.713f, 18.622f, 18.601f, 18.762f}},
+{"512:10:256", {18.461f, 18.479f, 18.570f, 18.561f, 18.572f, 18.697f}},
+{ "512:5:512", {18.450f, 18.473f, 18.513f, 18.499f, 18.513f, 18.583f}},
+{"512:11:256", {18.335f, 18.481f, 18.586f, 18.444f, 18.579f, 18.744f}},
+{  "1K:6:256", {18.294f, 18.528f, 18.476f, 18.335f, 18.596f, 18.562f}},
+{"512:12:256", {18.381f, 18.462f, 18.537f, 18.448f, 18.560f, 18.678f}},
+{ "512:6:512", {18.440f, 18.462f, 18.585f, 18.479f, 18.504f, 18.644f}},
+{"512:13:256", {18.247f, 18.401f, 18.482f, 18.348f, 18.497f, 18.645f}},
+{  "1K:7:256", {18.171f, 18.455f, 18.442f, 18.238f, 18.531f, 18.521f}},
+{"512:14:256", {18.266f, 18.376f, 18.467f, 18.374f, 18.490f, 18.637f}},
+{ "512:7:512", {18.372f, 18.372f, 18.462f, 18.428f, 18.432f, 18.567f}},
+{"512:15:256", {18.351f, 18.355f, 18.460f, 18.453f, 18.465f, 18.619f}},
+{  "1K:8:256", {18.093f, 18.359f, 18.435f, 18.156f, 18.461f, 18.570f}},
+{"512:16:256", {18.108f, 18.260f, 18.298f, 18.223f, 18.420f, 18.570f}},
+{ "512:8:512", {18.256f, 18.280f, 18.314f, 18.319f, 18.369f, 18.444f}},
+{  "1K:9:256", {18.123f, 18.328f, 18.245f, 18.171f, 18.443f, 18.426f}},
+{ "512:9:512", {18.243f, 18.262f, 18.343f, 18.315f, 18.342f, 18.493f}},
+{ "1K:10:256", {18.233f, 18.228f, 18.370f, 18.357f, 18.343f, 18.516f}},
+{  "1K:5:512", {18.237f, 18.232f, 18.385f, 18.281f, 18.272f, 18.479f}},
+{"512:10:512", {18.142f, 18.160f, 18.174f, 18.226f, 18.243f, 18.314f}},
+{ "1K:11:256", {18.001f, 18.234f, 18.243f, 18.084f, 18.362f, 18.411f}},
+{"512:11:512", {18.156f, 18.170f, 18.196f, 18.242f, 18.251f, 18.356f}},
+{ "1K:12:256", {18.052f, 18.225f, 18.151f, 18.090f, 18.332f, 18.291f}},
+{  "1K:6:512", {18.125f, 18.227f, 18.293f, 18.160f, 18.283f, 18.401f}},
+{"512:12:512", {18.141f, 18.163f, 18.245f, 18.217f, 18.237f, 18.409f}},
+{ "1K:13:256", {17.903f, 18.155f, 18.249f, 17.980f, 18.261f, 18.380f}},
+{"512:13:512", {18.097f, 18.104f, 18.135f, 18.168f, 18.171f, 18.239f}},
+{ "1K:14:256", {17.929f, 18.143f, 18.103f, 18.005f, 18.268f, 18.244f}},
+{  "1K:7:512", {18.043f, 18.150f, 18.237f, 18.100f, 18.208f, 18.347f}},
+{"512:14:512", {18.094f, 18.091f, 18.154f, 18.171f, 18.173f, 18.311f}},
+{ "1K:15:256", {18.131f, 18.127f, 18.115f, 18.260f, 18.236f, 18.238f}},
+{"512:15:512", {18.049f, 18.061f, 18.112f, 18.130f, 18.136f, 18.236f}},
+{ "1K:16:256", {17.752f, 18.019f, 18.128f, 17.892f, 18.183f, 18.326f}},
+{  "1K:8:512", {17.930f, 18.069f, 18.190f, 17.982f, 18.137f, 18.333f}},
+{"512:16:512", {17.971f, 17.997f, 17.976f, 18.072f, 18.100f, 18.170f}},
+{  "1K:9:512", {17.944f, 18.049f, 18.124f, 18.012f, 18.122f, 18.247f}},
+{ "1K:10:512", {17.940f, 17.939f, 18.044f, 18.044f, 18.043f, 18.195f}},
+{   "1K:5:1K", {18.033f, 18.016f, 18.180f, 18.101f, 18.072f, 18.237f}},
+{ "1K:11:512", {17.829f, 17.956f, 18.078f, 17.922f, 18.044f, 18.219f}},
+{ "1K:12:512", {17.829f, 17.944f, 18.002f, 17.912f, 18.034f, 18.139f}},
+{   "1K:6:1K", {17.741f, 18.003f, 17.931f, 17.794f, 18.065f, 18.051f}},
+{ "1K:13:512", {17.744f, 17.869f, 18.010f, 17.822f, 17.959f, 18.133f}},
+{ "1K:14:512", {17.748f, 17.854f, 17.933f, 17.848f, 17.968f, 18.100f}},
+{   "1K:7:1K", {17.647f, 17.914f, 17.865f, 17.714f, 17.995f, 17.994f}},
+{ "1K:15:512", {17.828f, 17.824f, 17.943f, 17.926f, 17.934f, 18.100f}},
+{ "1K:16:512", {17.613f, 17.744f, 17.813f, 17.711f, 17.875f, 18.073f}},
+{   "1K:8:1K", {17.572f, 17.810f, 17.914f, 17.628f, 17.923f, 18.046f}},
+{   "1K:9:1K", {17.600f, 17.807f, 17.734f, 17.636f, 17.908f, 17.892f}},
+{  "1K:10:1K", {17.709f, 17.681f, 17.841f, 17.823f, 17.795f, 17.981f}},
+{  "1K:11:1K", {17.458f, 17.682f, 17.712f, 17.560f, 17.811f, 17.891f}},
+{  "1K:12:1K", {17.474f, 17.698f, 17.635f, 17.560f, 17.807f, 17.752f}},
+{  "1K:13:1K", {17.388f, 17.619f, 17.706f, 17.465f, 17.716f, 17.853f}},
+{  "1K:14:1K", {17.417f, 17.627f, 17.582f, 17.491f, 17.734f, 17.715f}},
+{  "1K:15:1K", {17.612f, 17.592f, 17.582f, 17.720f, 17.697f, 17.722f}},
+{  "1K:16:1K", {17.220f, 17.471f, 17.615f, 17.369f, 17.641f, 17.778f}},
+{  "4K:9:512", {17.457f, 17.468f, 17.550f, 17.519f, 17.531f, 17.648f}},
+{ "4K:10:512", {17.336f, 17.336f, 17.364f, 17.416f, 17.433f, 17.507f}},
+{ "4K:11:512", {17.351f, 17.356f, 17.393f, 17.437f, 17.440f, 17.548f}},
+{ "4K:12:512", {17.351f, 17.362f, 17.447f, 17.420f, 17.437f, 17.576f}},
+{ "4K:13:512", {17.278f, 17.271f, 17.324f, 17.349f, 17.351f, 17.441f}},
+{ "4K:14:512", {17.267f, 17.270f, 17.342f, 17.359f, 17.359f, 17.503f}},
+{ "4K:15:512", {17.238f, 17.239f, 17.295f, 17.305f, 17.315f, 17.432f}},
+{ "4K:16:512", {17.149f, 17.163f, 17.143f, 17.251f, 17.271f, 17.352f}},
+{   "4K:9:1K", {17.130f, 17.225f, 17.346f, 17.189f, 17.291f, 17.485f}},
+{  "4K:10:1K", {17.110f, 17.111f, 17.209f, 17.199f, 17.188f, 17.351f}},
+{  "4K:11:1K", {16.993f, 17.108f, 17.214f, 17.084f, 17.196f, 17.405f}},
+{  "4K:12:1K", {17.006f, 17.123f, 17.219f, 17.101f, 17.201f, 17.370f}},
+{  "4K:13:1K", {16.932f, 17.045f, 17.154f, 17.002f, 17.116f, 17.298f}},
+{  "4K:14:1K", {16.942f, 17.055f, 17.160f, 17.027f, 17.127f, 17.306f}},
+{  "4K:15:1K", {17.021f, 17.007f, 17.137f, 17.104f, 17.087f, 17.282f}},
+{  "4K:16:1K", {16.744f, 16.887f, 16.966f, 16.921f, 17.048f, 17.208f}},
 // FFT3161 - Computed by targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "1:256:2:256", {40.54, 40.54, 40.54, 40.54, 40.54, 40.54}},
-{ "1:256:4:256", {40.19, 40.19, 40.19, 40.19, 40.19, 40.19}},
-{ "1:256:8:256", {39.98, 39.98, 39.98, 39.98, 39.98, 39.98}},
-{ "1:512:4:256", {39.98, 39.98, 39.98, 39.98, 39.98, 39.98}},
-{"1:256:16:256", {39.67, 39.67, 39.67, 39.67, 39.67, 39.67}},
-{ "1:512:8:256", {39.67, 39.67, 39.67, 39.67, 39.67, 39.67}},
-{ "1:512:4:512", {39.67, 39.67, 39.67, 39.67, 39.67, 39.67}},
-{  "1:1K:8:256", {39.46, 39.46, 39.46, 39.46, 39.46, 39.46}},
-{"1:512:16:256", {39.46, 39.46, 39.46, 39.46, 39.46, 39.46}},
-{ "1:512:8:512", {39.46, 39.46, 39.46, 39.46, 39.46, 39.46}},
-{ "1:1K:16:256", {39.15, 39.15, 39.15, 39.15, 39.15, 39.15}},
-{  "1:1K:8:512", {39.15, 39.15, 39.15, 39.15, 39.15, 39.15}},
-{"1:512:16:512", {39.15, 39.15, 39.15, 39.15, 39.15, 39.15}},
-{ "1:1K:16:512", {38.97, 38.97, 38.97, 38.97, 38.97, 38.97}},
-{   "1:1K:8:1K", {38.97, 38.97, 38.97, 38.97, 38.97, 38.97}},
-{  "1:1K:16:1K", {38.62, 38.62, 38.62, 38.62, 38.62, 38.62}},
-{ "1:4K:16:512", {38.37, 38.37, 38.37, 38.37, 38.37, 38.37}},
-{  "1:4K:16:1K", {38.12, 38.12, 38.12, 38.12, 38.12, 38.12}},  // Estimated
+{ "1:256:2:256", {40.54f, 40.54f, 40.54f, 40.54f, 40.54f, 40.54f}},
+{ "1:256:4:256", {40.19f, 40.19f, 40.19f, 40.19f, 40.19f, 40.19f}},
+{ "1:256:8:256", {39.98f, 39.98f, 39.98f, 39.98f, 39.98f, 39.98f}},
+{ "1:512:4:256", {39.98f, 39.98f, 39.98f, 39.98f, 39.98f, 39.98f}},
+{"1:256:16:256", {39.67f, 39.67f, 39.67f, 39.67f, 39.67f, 39.67f}},
+{ "1:512:8:256", {39.67f, 39.67f, 39.67f, 39.67f, 39.67f, 39.67f}},
+{ "1:512:4:512", {39.67f, 39.67f, 39.67f, 39.67f, 39.67f, 39.67f}},
+{  "1:1K:8:256", {39.46f, 39.46f, 39.46f, 39.46f, 39.46f, 39.46f}},
+{"1:512:16:256", {39.46f, 39.46f, 39.46f, 39.46f, 39.46f, 39.46f}},
+{ "1:512:8:512", {39.46f, 39.46f, 39.46f, 39.46f, 39.46f, 39.46f}},
+{ "1:1K:16:256", {39.15f, 39.15f, 39.15f, 39.15f, 39.15f, 39.15f}},
+{  "1:1K:8:512", {39.15f, 39.15f, 39.15f, 39.15f, 39.15f, 39.15f}},
+{"1:512:16:512", {39.15f, 39.15f, 39.15f, 39.15f, 39.15f, 39.15f}},
+{ "1:1K:16:512", {38.97f, 38.97f, 38.97f, 38.97f, 38.97f, 38.97f}},
+{   "1:1K:8:1K", {38.97f, 38.97f, 38.97f, 38.97f, 38.97f, 38.97f}},
+{  "1:1K:16:1K", {38.62f, 38.62f, 38.62f, 38.62f, 38.62f, 38.62f}},
+{ "1:4K:16:512", {38.37f, 38.37f, 38.37f, 38.37f, 38.37f, 38.37f}},
+{  "1:4K:16:1K", {38.12f, 38.12f, 38.12f, 38.12f, 38.12f, 38.12f}}, // Estimated
 // FFT3261 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "2:256:2:256", {34.57, 34.57, 34.57, 34.57, 34.57, 34.57}},
-{ "2:256:4:256", {34.24, 34.24, 34.24, 34.24, 34.24, 34.24}},
-{ "2:256:8:256", {34.06, 34.06, 34.06, 34.06, 34.06, 34.06}},
-{ "2:512:4:256", {34.06, 34.06, 34.06, 34.06, 34.06, 34.06}},
-{"2:256:16:256", {32.07, 32.07, 32.07, 32.07, 32.07, 32.07}},
-{ "2:512:8:256", {32.07, 32.07, 32.07, 32.07, 32.07, 32.07}},
-{ "2:512:4:512", {32.07, 32.07, 32.07, 32.07, 32.07, 32.07}},
-{  "2:1K:8:256", {31.81, 31.81, 31.81, 31.81, 31.81, 31.81}},
-{"2:512:16:256", {31.81, 31.81, 31.81, 31.81, 31.81, 31.81}},
-{ "2:512:8:512", {31.81, 31.81, 31.81, 31.81, 31.81, 31.81}},
-{ "2:1K:16:256", {31.50, 31.50, 31.50, 31.50, 31.50, 31.50}},
-{  "2:1K:8:512", {31.50, 31.50, 31.50, 31.50, 31.50, 31.50}},
-{"2:512:16:512", {31.50, 31.50, 31.50, 31.50, 31.50, 31.50}},
-{ "2:1K:16:512", {28.68, 28.68, 28.68, 28.68, 28.68, 28.68}}, // Very strange. 481421001 has a maxROE of 0.180, 481422001 has a maxROE of 0.5
-{   "2:1K:8:1K", {28.68, 28.68, 28.68, 28.68, 28.68, 28.68}},
-{  "2:1K:16:1K", {25.37, 25.37, 25.37, 25.37, 25.37, 25.37}}, // Also strange. 851422001 ROEmax=0.273, ROEavg=0.003
-{ "2:4K:16:512", {23.27, 23.27, 23.27, 23.27, 23.27, 23.27}},
-{  "2:4K:16:1K", {21.15, 21.15, 21.15, 21.15, 21.15, 21.15}}, // Estimated
+{ "2:256:2:256", {34.57f, 34.57f, 34.57f, 34.57f, 34.57f, 34.57f}},
+{ "2:256:4:256", {34.24f, 34.24f, 34.24f, 34.24f, 34.24f, 34.24f}},
+{ "2:256:8:256", {34.06f, 34.06f, 34.06f, 34.06f, 34.06f, 34.06f}},
+{ "2:512:4:256", {34.06f, 34.06f, 34.06f, 34.06f, 34.06f, 34.06f}},
+{"2:256:16:256", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
+{ "2:512:8:256", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
+{ "2:512:4:512", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
+{  "2:1K:8:256", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
+{"2:512:16:256", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
+{ "2:512:8:512", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
+{ "2:1K:16:256", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
+{  "2:1K:8:512", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
+{"2:512:16:512", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
+{ "2:1K:16:512", {28.68f, 28.68f, 28.68f, 28.68f, 28.68f, 28.68f}}, // Very strange. 481421001 has a maxROE of 0.180, 481422001 has a maxROE of 0.5
+{   "2:1K:8:1K", {28.68f, 28.68f, 28.68f, 28.68f, 28.68f, 28.68f}},
+{  "2:1K:16:1K", {25.37f, 25.37f, 25.37f, 25.37f, 25.37f, 25.37f}}, // Also strange. 851422001 ROEmax=0.273, ROEavg=0.003
+{ "2:4K:16:512", {23.27f, 23.27f, 23.27f, 23.27f, 23.27f, 23.27f}},
+{  "2:4K:16:1K", {21.15f, 21.15f, 21.15f, 21.15f, 21.15f, 21.15f}}, // Estimated
 // FFT61 - Computed by targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "3:256:2:256", {25.02, 25.02, 25.02, 25.02, 25.02, 25.02}},
-{ "3:256:4:256", {24.72, 24.10, 24.10, 24.10, 24.10, 24.10}},
-{ "3:256:8:256", {24.46, 24.46, 24.46, 24.46, 24.46, 24.46}},
-{ "3:512:4:256", {24.46, 24.46, 24.46, 24.46, 24.46, 24.46}},
-{"3:256:16:256", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
-{ "3:512:8:256", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
-{ "3:512:4:512", {24.15, 24.15, 24.15, 24.15, 24.15, 24.15}},
-{  "3:1K:8:256", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}}, // LL of 100028317 failed (ROEmax=0.294, ROEavg=0.247).  Lowering bpw from 23.94 to 23.84.
-{"3:512:16:256", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}},
-{ "3:512:8:512", {23.84, 23.84, 23.84, 23.84, 23.84, 23.84}},
-{ "3:1K:16:256", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},
-{  "3:1K:8:512", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},
-{"3:512:16:512", {23.65, 23.65, 23.65, 23.65, 23.65, 23.65}},
-{ "3:1K:16:512", {23.42, 23.42, 23.42, 23.42, 23.42, 23.42}},
-{   "3:1K:8:1K", {23.42, 23.42, 23.42, 23.42, 23.42, 23.42}},
-{  "3:1K:16:1K", {23.13, 23.13, 23.13, 23.13, 23.13, 23.13}},
-{ "3:4K:16:512", {22.92, 22.92, 22.92, 22.92, 22.92, 22.92}},
-{  "3:4K:16:1K", {22.72, 22.72, 22.72, 22.72, 22.72, 22.72}}, // Estimated
+{ "3:256:2:256", {25.02f, 25.02f, 25.02f, 25.02f, 25.02f, 25.02f}},
+{ "3:256:4:256", {24.72f, 24.10f, 24.10f, 24.10f, 24.10f, 24.10f}},
+{ "3:256:8:256", {24.46f, 24.46f, 24.46f, 24.46f, 24.46f, 24.46f}},
+{ "3:512:4:256", {24.46f, 24.46f, 24.46f, 24.46f, 24.46f, 24.46f}},
+{"3:256:16:256", {24.15f, 24.15f, 24.15f, 24.15f, 24.15f, 24.15f}},
+{ "3:512:8:256", {24.15f, 24.15f, 24.15f, 24.15f, 24.15f, 24.15f}},
+{ "3:512:4:512", {24.15f, 24.15f, 24.15f, 24.15f, 24.15f, 24.15f}},
+{  "3:1K:8:256", {23.84f, 23.84f, 23.84f, 23.84f, 23.84f, 23.84f}}, // LL of 100028317 failed (ROEmax=0.294, ROEavg=0.247).  Lowering bpw from 23.94 to 23.84.
+{"3:512:16:256", {23.84f, 23.84f, 23.84f, 23.84f, 23.84f, 23.84f}},
+{ "3:512:8:512", {23.84f, 23.84f, 23.84f, 23.84f, 23.84f, 23.84f}},
+{ "3:1K:16:256", {23.65f, 23.65f, 23.65f, 23.65f, 23.65f, 23.65f}},
+{  "3:1K:8:512", {23.65f, 23.65f, 23.65f, 23.65f, 23.65f, 23.65f}},
+{"3:512:16:512", {23.65f, 23.65f, 23.65f, 23.65f, 23.65f, 23.65f}},
+{ "3:1K:16:512", {23.42f, 23.42f, 23.42f, 23.42f, 23.42f, 23.42f}},
+{   "3:1K:8:1K", {23.42f, 23.42f, 23.42f, 23.42f, 23.42f, 23.42f}},
+{  "3:1K:16:1K", {23.13f, 23.13f, 23.13f, 23.13f, 23.13f, 23.13f}},
+{ "3:4K:16:512", {22.92f, 22.92f, 22.92f, 22.92f, 22.92f, 22.92f}},
+{  "3:4K:16:1K", {22.72f, 22.72f, 22.72f, 22.72f, 22.72f, 22.72f}}, // Estimated
 // FFT323161 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "4:256:2:256", {50.05, 50.05, 50.05, 50.05, 50.05, 50.05}},
-{ "4:256:4:256", {49.76, 49.76, 49.76, 49.76, 49.76, 49.76}},
-{ "4:256:8:256", {49.59, 49.59, 49.59, 49.59, 49.59, 49.59}},
-{ "4:512:4:256", {49.59, 49.59, 49.59, 49.59, 49.59, 49.59}},
-{"4:256:16:256", {47.59, 47.59, 47.59, 47.59, 47.59, 47.59}},
-{ "4:512:8:256", {47.59, 47.59, 47.59, 47.59, 47.59, 47.59}},
-{ "4:512:4:512", {47.59, 47.59, 47.59, 47.59, 47.59, 47.59}},
-{  "4:1K:8:256", {47.33, 47.33, 47.33, 47.33, 47.33, 47.33}},
-{"4:512:16:256", {47.33, 47.33, 47.33, 47.33, 47.33, 47.33}},
-{ "4:512:8:512", {47.33, 47.33, 47.33, 47.33, 47.33, 47.33}},
-{ "4:1K:16:256", {47.00, 47.00, 47.00, 47.00, 47.00, 47.00}},
-{  "4:1K:8:512", {47.00, 47.00, 47.00, 47.00, 47.00, 47.00}},
-{"4:512:16:512", {47.00, 47.00, 47.00, 47.00, 47.00, 47.00}},
-{ "4:1K:16:512", {44.52, 44.52, 44.52, 44.52, 44.52, 44.52}},
-{   "4:1K:8:1K", {44.52, 44.52, 44.52, 44.52, 44.52, 44.52}},
-{  "4:1K:16:1K", {41.72, 41.72, 41.72, 41.72, 41.72, 41.72}}, // Strange 41.72 has tiny error, 41.75 is 0.5
-{ "4:4K:16:512", {39.50, 39.50, 39.50, 39.50, 39.50, 39.50}}, // Estimated
-{  "4:4K:16:1K", {37.50, 37.50, 37.50, 37.50, 37.50, 37.50}}, // Estimated
+{ "4:256:2:256", {50.05f, 50.05f, 50.05f, 50.05f, 50.05f, 50.05f}},
+{ "4:256:4:256", {49.76f, 49.76f, 49.76f, 49.76f, 49.76f, 49.76f}},
+{ "4:256:8:256", {49.59f, 49.59f, 49.59f, 49.59f, 49.59f, 49.59f}},
+{ "4:512:4:256", {49.59f, 49.59f, 49.59f, 49.59f, 49.59f, 49.59f}},
+{"4:256:16:256", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
+{ "4:512:8:256", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
+{ "4:512:4:512", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
+{  "4:1K:8:256", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
+{"4:512:16:256", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
+{ "4:512:8:512", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
+{ "4:1K:16:256", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
+{  "4:1K:8:512", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
+{"4:512:16:512", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
+{ "4:1K:16:512", {44.52f, 44.52f, 44.52f, 44.52f, 44.52f, 44.52f}},
+{   "4:1K:8:1K", {44.52f, 44.52f, 44.52f, 44.52f, 44.52f, 44.52f}},
+{  "4:1K:16:1K", {41.72f, 41.72f, 41.72f, 41.72f, 41.72f, 41.72f}}, // Strange 41.72 has tiny error, 41.75 is 0.5
+{ "4:4K:16:512", {39.50f, 39.50f, 39.50f, 39.50f, 39.50f, 39.50f}}, // Estimated
+{  "4:4K:16:1K", {37.50f, 37.50f, 37.50f, 37.50f, 37.50f, 37.50f}}, // Estimated
 // FFT3231 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "50:256:2:256", {19.57, 19.57, 19.57, 19.57, 19.57, 19.57}},
-{ "50:256:4:256", {19.23, 19.23, 19.23, 19.23, 19.23, 19.23}},
-{ "50:256:8:256", {19.07, 19.07, 19.07, 19.07, 19.07, 19.07}},
-{ "50:512:4:256", {19.07, 19.07, 19.07, 19.07, 19.07, 19.07}},
-{"50:256:16:256", {17.07, 17.07, 17.07, 17.07, 17.07, 17.07}},
-{ "50:512:8:256", {17.07, 17.07, 17.07, 17.07, 17.07, 17.07}},
-{ "50:512:4:512", {17.07, 17.07, 17.07, 17.07, 17.07, 17.07}},
-{  "50:1K:8:256", {16.78, 16.78, 16.78, 16.78, 16.78, 16.78}},
-{"50:512:16:256", {16.78, 16.78, 16.78, 16.78, 16.78, 16.78}},
-{ "50:512:8:512", {16.78, 16.78, 16.78, 16.78, 16.78, 16.78}},
-{ "50:1K:16:256", {16.52, 16.52, 16.52, 16.52, 16.52, 16.52}},
-{  "50:1K:8:512", {16.52, 16.52, 16.52, 16.52, 16.52, 16.52}},
-{"50:512:16:512", {16.52, 16.52, 16.52, 16.52, 16.52, 16.52}},
-{ "50:1K:16:512", {14.01, 14.01, 14.01, 14.01, 14.01, 14.01}},
-{   "50:1K:8:1K", {14.01, 14.01, 14.01, 14.01, 14.01, 14.01}},
-{  "50:1K:16:1K", {11.21, 11.21, 11.21, 11.21, 11.21, 11.21}}, // Estimated
-{ "50:4K:16:512", {9.15, 9.15, 9.15, 9.15, 9.15, 9.15}}, // Estimated
-{  "50:4K:16:1K", {7.05, 7.05, 7.05, 7.05, 7.05, 7.05}}, // Estimated
+{ "50:256:2:256", {19.57f, 19.57f, 19.57f, 19.57f, 19.57f, 19.57f}},
+{ "50:256:4:256", {19.23f, 19.23f, 19.23f, 19.23f, 19.23f, 19.23f}},
+{ "50:256:8:256", {19.07f, 19.07f, 19.07f, 19.07f, 19.07f, 19.07f}},
+{ "50:512:4:256", {19.07f, 19.07f, 19.07f, 19.07f, 19.07f, 19.07f}},
+{"50:256:16:256", {17.07f, 17.07f, 17.07f, 17.07f, 17.07f, 17.07f}},
+{ "50:512:8:256", {17.07f, 17.07f, 17.07f, 17.07f, 17.07f, 17.07f}},
+{ "50:512:4:512", {17.07f, 17.07f, 17.07f, 17.07f, 17.07f, 17.07f}},
+{  "50:1K:8:256", {16.78f, 16.78f, 16.78f, 16.78f, 16.78f, 16.78f}},
+{"50:512:16:256", {16.78f, 16.78f, 16.78f, 16.78f, 16.78f, 16.78f}},
+{ "50:512:8:512", {16.78f, 16.78f, 16.78f, 16.78f, 16.78f, 16.78f}},
+{ "50:1K:16:256", {16.52f, 16.52f, 16.52f, 16.52f, 16.52f, 16.52f}},
+{  "50:1K:8:512", {16.52f, 16.52f, 16.52f, 16.52f, 16.52f, 16.52f}},
+{"50:512:16:512", {16.52f, 16.52f, 16.52f, 16.52f, 16.52f, 16.52f}},
+{ "50:1K:16:512", {14.01f, 14.01f, 14.01f, 14.01f, 14.01f, 14.01f}},
+{   "50:1K:8:1K", {14.01f, 14.01f, 14.01f, 14.01f, 14.01f, 14.01f}},
+{  "50:1K:16:1K", {11.21f, 11.21f, 11.21f, 11.21f, 11.21f, 11.21f}}, // Estimated
+{ "50:4K:16:512", {9.15f, 9.15f, 9.15f, 9.15f, 9.15f, 9.15f}}, // Estimated
+{  "50:4K:16:1K", {7.05f, 7.05f, 7.05f, 7.05f, 7.05f, 7.05f}}, // Estimated
 // FFT6431 - Computed with variant 202 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "51:256:2:256", {35.27, 35.27, 35.27, 35.27, 35.27, 35.27}},
-{ "51:256:4:256", {34.98, 34.98, 34.98, 34.98, 34.98, 34.98}},
-{ "51:256:8:256", {34.61, 34.61, 34.61, 34.61, 34.61, 34.61}},
-{ "51:512:4:256", {34.61, 34.61, 34.61, 34.61, 34.61, 34.61}},
-{"51:256:16:256", {34.33, 34.33, 34.33, 34.33, 34.33, 34.33}},
-{ "51:512:8:256", {34.33, 34.33, 34.33, 34.33, 34.33, 34.33}},
-{ "51:512:4:512", {34.33, 34.33, 34.33, 34.33, 34.33, 34.33}},
-{  "51:1K:8:256", {33.97, 33.97, 33.97, 33.97, 33.97, 33.97}},
-{"51:512:16:256", {33.97, 33.97, 33.97, 33.97, 33.97, 33.97}},
-{ "51:512:8:512", {33.97, 33.97, 33.97, 33.97, 33.97, 33.97}},
-{ "51:1K:16:256", {33.64, 33.64, 33.64, 33.64, 33.64, 33.64}},
-{  "51:1K:8:512", {33.64, 33.64, 33.64, 33.64, 33.64, 33.64}},
-{"51:512:16:512", {33.64, 33.64, 33.64, 33.64, 33.64, 33.64}},
-{ "51:1K:16:512", {33.45, 33.45, 33.45, 33.45, 33.45, 33.45}},
-{   "51:1K:8:1K", {33.45, 33.45, 33.45, 33.45, 33.45, 33.45}},
-{  "51:1K:16:1K", {33.23, 33.23, 33.23, 33.23, 33.23, 33.23}},
-{ "51:4K:16:512", {32.75, 32.75, 32.75, 32.75, 32.75, 32.75}},
-{  "51:4K:16:1K", {32.25, 32.25, 32.25, 32.25, 32.25, 32.25}}, // Estimated
+{ "51:256:2:256", {35.27f, 35.27f, 35.27f, 35.27f, 35.27f, 35.27f}},
+{ "51:256:4:256", {34.98f, 34.98f, 34.98f, 34.98f, 34.98f, 34.98f}},
+{ "51:256:8:256", {34.61f, 34.61f, 34.61f, 34.61f, 34.61f, 34.61f}},
+{ "51:512:4:256", {34.61f, 34.61f, 34.61f, 34.61f, 34.61f, 34.61f}},
+{"51:256:16:256", {34.33f, 34.33f, 34.33f, 34.33f, 34.33f, 34.33f}},
+{ "51:512:8:256", {34.33f, 34.33f, 34.33f, 34.33f, 34.33f, 34.33f}},
+{ "51:512:4:512", {34.33f, 34.33f, 34.33f, 34.33f, 34.33f, 34.33f}},
+{  "51:1K:8:256", {33.97f, 33.97f, 33.97f, 33.97f, 33.97f, 33.97f}},
+{"51:512:16:256", {33.97f, 33.97f, 33.97f, 33.97f, 33.97f, 33.97f}},
+{ "51:512:8:512", {33.97f, 33.97f, 33.97f, 33.97f, 33.97f, 33.97f}},
+{ "51:1K:16:256", {33.64f, 33.64f, 33.64f, 33.64f, 33.64f, 33.64f}},
+{  "51:1K:8:512", {33.64f, 33.64f, 33.64f, 33.64f, 33.64f, 33.64f}},
+{"51:512:16:512", {33.64f, 33.64f, 33.64f, 33.64f, 33.64f, 33.64f}},
+{ "51:1K:16:512", {33.45f, 33.45f, 33.45f, 33.45f, 33.45f, 33.45f}},
+{   "51:1K:8:1K", {33.45f, 33.45f, 33.45f, 33.45f, 33.45f, 33.45f}},
+{  "51:1K:16:1K", {33.23f, 33.23f, 33.23f, 33.23f, 33.23f, 33.23f}},
+{ "51:4K:16:512", {32.75f, 32.75f, 32.75f, 32.75f, 32.75f, 32.75f}},
+{  "51:4K:16:1K", {32.25f, 32.25f, 32.25f, 32.25f, 32.25f, 32.25f}}, // Estimated
diff --git a/src/main.cpp b/src/main.cpp
index b62f1b32..259b7f9b 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -45,11 +45,17 @@ extern int putenv(char *);
 #endif
 
 int main(int argc, char **argv) {
+//!MSVC version support
+#ifdef _MSC_VER
+  _set_printf_count_output(1);    // I'm not sure what this does (it's from CrazeTheDragon)
+#endif
 
 #if defined(__MSYS__)
   // I was unable to get putenv to link in MSYS2
 #elif defined(__MINGW32__) || defined(__MINGW64__)
   putenv("ROC_SIGNAL_POOL_SIZE=32");
+#elif defined(_WIN32)
+  _putenv_s("ROC_SIGNAL_POOL_SIZE", "32");  // For MSVC
 #else
   // Required to work around a ROCm bug when using multiple queues
   setenv("ROC_SIGNAL_POOL_SIZE", "32", 0);
diff --git a/src/state.cpp b/src/state.cpp
index 77ebff8f..942aeaab 100644
--- a/src/state.cpp
+++ b/src/state.cpp
@@ -107,6 +107,6 @@ vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u64 E) {
   assert(it == itEnd);
   assert(bucket.size == 32 - E % 32);
   assert(bucket.bits == 0 || bucket.bits == 1);
-  data[0] += bucket.bits; // carry wrap-around.
+  data[0] += u32(bucket.bits); // carry wrap-around.
   return out;
 }

From 1b72223f155d4f7f0c9c1472de23e71f58883c95 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 25 Mar 2026 03:05:28 +0000
Subject: [PATCH 016/214] Don't tune LOADS and STORES values if NO_ASM set

---
 src/tune.cpp | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index fb8aca16..978f485c 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -344,6 +344,7 @@ void Tune::tune() {
   // There are some options and variants that are different based on GPU manufacturer
   bool AMDGPU = isAmdGpu(q->context->deviceId());
   bool NVIDIAGPU = isNvidiaGpu(q->context->deviceId());
+  int NO_ASM = args->value("NO_ASM", 0);
 
   bool tune_config = 1;
   bool time_FFTs = 0;
@@ -593,7 +594,7 @@ void Tune::tune() {
         u32 best_fft_load = 0;
         double best_cost = -1.0;
 	for (u32 fft_load : {0, 1, 2, 3, 4}) {
-          if (!NVIDIAGPU && fft_load >= 2) continue;
+          if (fft_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10 * 10 + fft_load);
           double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT load=%u is %6.1f\n", fft.spec().c_str(), fft_load, cost);
@@ -611,7 +612,7 @@ void Tune::tune() {
         u32 best_fft_store = 0;
         double best_cost = -1.0;
 	for (u32 fft_store : {0, 1, 2, 3, 4}) {
-          if (!NVIDIAGPU && fft_store >= 2) continue;
+          if (fft_store >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
           double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT store=%u is %6.1f\n", fft.spec().c_str(), fft_store, cost);
@@ -628,8 +629,8 @@ void Tune::tune() {
         u64 exponent = primes.prevPrime(fft.maxExp());
         u32 best_cs_load = 0, best_cs_store = 0;
         double best_cost = -1.0;
-	for (u32 cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load and L2 store
-          if (!NVIDIAGPU && cs == 2) continue;
+	for (u32 cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load with L2 store
+          if (cs >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
 	  u32 cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
 	  u32 cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
           args->flags["LOADS"] = to_string(loads / 100 * 100 + cs_load * 10 + loads % 10);
@@ -652,7 +653,7 @@ void Tune::tune() {
         u32 best_trig_load = 0;
         double best_cost = -1.0;
 	for (u32 trig_load : {0, 5}) {
-          if (!NVIDIAGPU && trig_load >= 2) continue;
+          if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 1000 * 1000 + trig_load * 100 + loads % 100);
           double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig frequently used load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
@@ -670,7 +671,7 @@ void Tune::tune() {
         u32 best_trig_load = 0;
         double best_cost = -1.0;
 	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
-          if (!NVIDIAGPU && trig_load >= 2) continue;
+          if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10000 * 10000 + trig_load * 1000 + loads % 1000);
           double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig several uses load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
@@ -688,7 +689,7 @@ void Tune::tune() {
         u32 best_trig_load = 0;
         double best_cost = -1.0;
 	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
-          if (!NVIDIAGPU && trig_load >= 2) continue;
+          if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(trig_load * 10000 + loads % 10000);
           double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig used once load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);

From 4f27ed839c580b6ca7b1ae590a636fa37f94fab8 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 25 Mar 2026 03:23:03 +0000
Subject: [PATCH 017/214] Finish MSVC port.  Can't use "long" it is 32-bits in
 MSVC and 64-bits in OpenCL and Linux gcc.

---
 src/File.h                 |   5 +-
 src/Gpu.cpp                |   8 +--
 src/cl/base.cl             |   2 +-
 src/cuda/opencl_compat.cuh | 127 +++++++++++++++----------------------
 4 files changed, 61 insertions(+), 81 deletions(-)

diff --git a/src/File.h b/src/File.h
index f3b9b177..52b84d7c 100644
--- a/src/File.h
+++ b/src/File.h
@@ -67,7 +67,10 @@ class File {
 
   void datasync() {
     fflush(f);
-#if defined(_WIN32) || defined(__WIN32__)
+#if defined(_MSC_VER)
+// We'd really like to use FlushFileBuffers(h), but we do not have easy access to the Windows file handle.
+// We might could get that by getting the pathname and opening the file with native Windows routines.
+#elif defined(_WIN32) || defined(__WIN32__)
     _commit(fileno(f));
 #elif defined(__APPLE__)
     fcntl(fileno(f), F_FULLFSYNC, 0);
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 5d30c848..f79b7536 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -145,10 +145,10 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
 
 string toLiteral(i32 value) { return to_string(value); }
 string toLiteral(u32 value) { return to_string(value) + 'u'; }
-[[maybe_unused]] string toLiteral(long value) { return to_string(value) + "l"; }
-[[maybe_unused]] string toLiteral(unsigned long value) { return to_string(value) + "ul"; }
-[[maybe_unused]] string toLiteral(long long value) { return to_string(value) + "l"; }              // Yes, this looks wrong.  The Mingw64 C compiler uses
-[[maybe_unused]] string toLiteral(unsigned long long value) { return to_string(value) + "ul"; }    // long long for 64-bits, while openCL uses long for 64 bits.
+[[maybe_unused]] string toLiteral(long value) { return to_string(value) + "ll"; }              // Yes, this looks wrong.  MSVC and CUDA requires we always use long long.
+[[maybe_unused]] string toLiteral(unsigned long value) { return to_string(value) + "ull"; }    // See discussion in opencl_compat.cuh.
+[[maybe_unused]] string toLiteral(long long value) { return to_string(value) + "ll"; }
+[[maybe_unused]] string toLiteral(unsigned long long value) { return to_string(value) + "ull"; }
 
 template<typename F>
 string toLiteral(F value) {
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 75ccabf8..f58ff388 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -248,7 +248,7 @@ error - unsupported integer WordSize
 double2 OVERLOAD U2(double a, double b) { return (double2) (a, b); }
 float2 OVERLOAD U2(float a, float b) { return (float2) (a, b); }
 int2 OVERLOAD U2(int a, int b) { return (int2) (a, b); }
-long2 OVERLOAD U2(long a, long b) { return (long2) (a, b); }
+long2 OVERLOAD U2(i64 a, i64 b) { return (long2) (a, b); }
 uint2 OVERLOAD U2(uint a, uint b) { return (uint2) (a, b); }
 ulong2 OVERLOAD U2(ulong a, ulong b) { return (ulong2) (a, b); }
 
diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
index 3316c26f..99c15378 100644
--- a/src/cuda/opencl_compat.cuh
+++ b/src/cuda/opencl_compat.cuh
@@ -69,25 +69,29 @@
 #define CP(x) const x* __restrict__
 
 // ---- OpenCL type aliases ----
-// CRITICAL: On Linux x86_64, CUDA's built-in vector types (long2, ulong2) use
-// 'long' / 'unsigned long' for their members. These are DISTINCT C++ types from
-// 'long long' / 'unsigned long long' even though both are 64-bit.
-// We MUST use 'unsigned long' for ulong so that Z61 (typedef'd from ulong) matches
-// ulong2 member types. Otherwise overloaded functions like add(Z31,Z31) vs add(Z61,Z61)
-// become ambiguous when called with ulong2 member values (which are 'unsigned long').
-typedef unsigned long ulong;
-typedef long          slong;  // OpenCL's signed 'long' (64-bit)
 
 // Standard PRPLL type aliases
 typedef unsigned int uint;
 
-// These match OpenCL's types exactly. The preprocessor strips base.cl's
-// re-definitions of i32/u32/i64/u64 to avoid redeclaration errors.
-// Must use 'long' / 'unsigned long' to match CUDA vector type members.
-typedef unsigned int  u32;
+// These match OpenCL's types exactly. The preprocessor strips base.cl's re-definitions of i32/u32 to avoid redeclaration errors.
 typedef int           i32;
-typedef unsigned long u64;
-typedef long          i64;
+typedef unsigned int  u32;
+
+// OpenCL defines long, ulong, long2, ulong2, etc. as 64-bits.  CUDA defines them as 32-bits (MSVC) or 64-bits (Linux).
+// CUDA defines longlong, ulonglong, longlong2, ulonglong2, etc. as 64-bits.  Map OpenCL types to CUDA types.
+
+//#define long       long long        // Obviously, we can't uncomment this #define.  Instead, we must make sure the opencl code never uses this data type.  Use i64 instead.
+#define long2	     longlong2
+#define ulong	     unsigned long long
+#define ulong2	     ulonglong2
+#define make_long2   make_longlong2
+#define make_ulong2  make_ulonglong2
+
+// These must match the 64-bit data types defined above.  The preprocessor strips base.cl's re-definitions of i64/u64 to avoid redeclaration errors.
+// Must use 'long long' / 'unsigned long long' to match CUDA vector type members so that Z61 (typedef'd from ulong) matches ulong2 member types.
+// Otherwise overloaded functions like add(Z31,Z31) vs add(Z61,Z61) become ambiguous when called with ulong2 member values (which are 'unsigned long').
+typedef long long          i64;
+typedef unsigned long long u64;
 
 // ---- Math constants ----
 #ifndef M_PI
@@ -152,13 +156,13 @@ __device__ __forceinline__ ulong2& operator-=(ulong2& a, ulong2 b) { a.x-=b.x; a
 // Scalar * vector operators for types not built-in to NVRTC
 // (NVRTC already provides double2*double, int2*int, uint2*uint, etc.)
 // These cover cross-type scalar*vector that OpenCL supports natively.
-__device__ __forceinline__ long2 operator*(long long s, long2 v) { return {s*v.x, s*v.y}; }
-__device__ __forceinline__ long2 operator*(long2 v, long long s) { return {v.x*s, v.y*s}; }
-__device__ __forceinline__ ulong2 operator*(unsigned long long s, ulong2 v) { return {s*v.x, s*v.y}; }
-__device__ __forceinline__ ulong2 operator*(ulong2 v, unsigned long long s) { return {v.x*s, v.y*s}; }
+__device__ __forceinline__ long2 operator*(i64 s, long2 v) { return {s*v.x, s*v.y}; }
+__device__ __forceinline__ long2 operator*(long2 v, i64 s) { return {v.x*s, v.y*s}; }
+__device__ __forceinline__ ulong2 operator*(ulong s, ulong2 v) { return {s*v.x, s*v.y}; }
+__device__ __forceinline__ ulong2 operator*(ulong2 v, ulong s) { return {v.x*s, v.y*s}; }
 // int * ulong2 (common in NTT code: int literal * GF61)
-__device__ __forceinline__ ulong2 operator*(int s, ulong2 v) { return {(unsigned long long)s*v.x, (unsigned long long)s*v.y}; }
-__device__ __forceinline__ ulong2 operator*(ulong2 v, int s) { return {v.x*(unsigned long long)s, v.y*(unsigned long long)s}; }
+__device__ __forceinline__ ulong2 operator*(int s, ulong2 v) { return {(ulong)s*v.x, (ulong)s*v.y}; }
+__device__ __forceinline__ ulong2 operator*(ulong2 v, int s) { return {v.x*(ulong)s, v.y*(ulong)s}; }
 
 // ---- Vector constructors (U2) ----
 // OpenCL (type2)(a,b) cast syntax is converted to make_type2(a,b) by the preprocessor.
@@ -170,77 +174,54 @@ __device__ __forceinline__ ulong2 operator*(ulong2 v, int s) { return {v.x*(unsi
 
 // as_uint2: split 64-bit value into two 32-bit halves
 __device__ __forceinline__ uint2 as_uint2(double v) {
-  unsigned long long bits = __double_as_longlong(v);
-  return make_uint2((unsigned int)(bits), (unsigned int)(bits >> 32));
-}
-__device__ __forceinline__ uint2 as_uint2(unsigned long long v) {
-  return make_uint2((unsigned int)(v), (unsigned int)(v >> 32));
+  ulong bits = __double_as_longlong(v);
+  return make_uint2((uint)(bits), (uint)(bits >> 32));
 }
-__device__ __forceinline__ uint2 as_uint2(unsigned long v) {
-  return make_uint2((unsigned int)(v), (unsigned int)((unsigned long long)v >> 32));
+__device__ __forceinline__ uint2 as_uint2(ulong v) {
+  return make_uint2((uint)(v), (uint)(v >> 32));
 }
-__device__ __forceinline__ uint2 as_uint2(long long v) {
-  return make_uint2((unsigned int)((unsigned long long)v), (unsigned int)((unsigned long long)v >> 32));
-}
-__device__ __forceinline__ uint2 as_uint2(long v) {
-  return make_uint2((unsigned int)((unsigned long)v), (unsigned int)((unsigned long long)v >> 32));
+__device__ __forceinline__ uint2 as_uint2(i64 v) {
+  return make_uint2((uint)((ulong)v), (uint)((ulong)v >> 32));
 }
 
 // as_int2: split 64-bit value into two signed 32-bit halves
 __device__ __forceinline__ int2 as_int2(double v) {
-  unsigned long long bits = __double_as_longlong(v);
-  return make_int2((int)(unsigned int)(bits), (int)(unsigned int)(bits >> 32));
-}
-__device__ __forceinline__ int2 as_int2(long long v) {
-  return make_int2((int)(unsigned int)((unsigned long long)v), (int)(unsigned int)((unsigned long long)v >> 32));
+  ulong bits = __double_as_longlong(v);
+  return make_int2((int)(uint)(bits), (int)(uint)(bits >> 32));
 }
-__device__ __forceinline__ int2 as_int2(long v) {
-  return make_int2((int)(unsigned int)((unsigned long)v), (int)(unsigned int)((unsigned long long)v >> 32));
+__device__ __forceinline__ int2 as_int2(i64 v) {
+  return make_int2((int)(uint)((ulong)v), (int)(uint)((ulong)v >> 32));
 }
 
 // as_double: reinterpret bits as double
 __device__ __forceinline__ double as_double(int2 v) {
-  unsigned long long bits = ((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x;
+  ulong bits = ((ulong)(uint)v.y << 32) | (uint)v.x;
   return __longlong_as_double(bits);
 }
 __device__ __forceinline__ double as_double(uint2 v) {
-  unsigned long long bits = ((unsigned long long)v.y << 32) | v.x;
+  ulong bits = ((ulong)v.y << 32) | v.x;
   return __longlong_as_double(bits);
 }
-__device__ __forceinline__ double as_double(unsigned long long v) {
+__device__ __forceinline__ double as_double(ulong v) {
   return __longlong_as_double(v);
 }
-__device__ __forceinline__ double as_double(unsigned long v) {
-  return __longlong_as_double((unsigned long long)v);
-}
-__device__ __forceinline__ double as_double(long long v) { return __longlong_as_double(v); }
-__device__ __forceinline__ double as_double(long v) { return __longlong_as_double((long long)v); }
+__device__ __forceinline__ double as_double(i64 v) { return __longlong_as_double(v); }
 
-// as_ulong: reinterpret as unsigned 64-bit (returns 'unsigned long' to match ulong typedef)
-__device__ __forceinline__ unsigned long as_ulong(uint2 v) {
-  return (unsigned long)(((unsigned long long)v.y << 32) | v.x);
-}
-__device__ __forceinline__ unsigned long as_ulong(int2 v) {
-  return (unsigned long)(((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x);
-}
-__device__ __forceinline__ unsigned long as_ulong(double v) {
-  return (unsigned long)__double_as_longlong(v);
-}
+// as_ulong: reinterpret as unsigned 64-bit
+__device__ __forceinline__ ulong as_ulong(uint2 v) { return (((ulong)v.y << 32) | v.x); }
+__device__ __forceinline__ ulong as_ulong(int2 v) { return (((ulong)(uint)v.y << 32) | (uint)v.x); }
+__device__ __forceinline__ ulong as_ulong(double v) { return (ulong)__double_as_longlong(v); }
 
-// as_long: reinterpret as signed 64-bit (returns 'long' to match slong/i64)
-__device__ __forceinline__ long as_long(int2 v) {
-  return (long)(((unsigned long long)(unsigned int)v.y << 32) | (unsigned int)v.x);
-}
-__device__ __forceinline__ long as_long(uint2 v) {
-  return (long)(((unsigned long long)v.y << 32) | v.x);
-}
-__device__ __forceinline__ long as_long(double v) { return (long)__double_as_longlong(v); }
+// as_long: reinterpret as signed 64-bit
+__device__ __forceinline__ i64 as_long(int2 v) { return (i64)(((ulong)(uint)v.y << 32) | (uint)v.x); }
+__device__ __forceinline__ i64 as_long(uint2 v) { return (i64)(((ulong)v.y << 32) | v.x); }
+__device__ __forceinline__ i64 as_long(double v) { return (i64)__double_as_longlong(v); }
 
 // as_float / as_int / as_uint: 32-bit reinterprets
 __device__ __forceinline__ float as_float(int v) { return __int_as_float(v); }
-__device__ __forceinline__ float as_float(unsigned int v) { return __int_as_float((int)v); }
+__device__ __forceinline__ float as_float(uint v) { return __int_as_float((int)v); }
 __device__ __forceinline__ int as_int(float v) { return __float_as_int(v); }
-__device__ __forceinline__ unsigned int as_uint(float v) { return (unsigned int)__float_as_int(v); }
+__device__ __forceinline__ uint as_uint(float v) { return (uint)__float_as_int(v); }
 
 // 16-byte reinterprets: int4 ↔ double2 ↔ ulong2
 __device__ __forceinline__ int4 as_int4(double2 v) {
@@ -291,17 +272,13 @@ __device__ __forceinline__ float2 fma(float a, float2 b, float2 c) {
 }
 
 // mul_hi: upper half of multiplication
-__device__ __forceinline__ unsigned int mul_hi(unsigned int a, unsigned int b) {
+__device__ __forceinline__ uint mul_hi(uint a, uint b) {
   return __umulhi(a, b);
 }
-// Overloads for both 'unsigned long long' and 'unsigned long' (distinct types on Linux x86_64)
-__device__ __forceinline__ unsigned long long mul_hi(unsigned long long a, unsigned long long b) {
+__device__ __forceinline__ ulong mul_hi(ulong a, ulong b) {
   return __umul64hi(a, b);
 }
-__device__ __forceinline__ unsigned long mul_hi(unsigned long a, unsigned long b) {
-  return (unsigned long)__umul64hi((unsigned long long)a, (unsigned long long)b);
-}
-__device__ __forceinline__ unsigned int mad_hi(unsigned int a, unsigned int b, unsigned int c) {
+__device__ __forceinline__ uint mad_hi(uint a, uint b, uint c) {
   return __umulhi(a, b) + c;
 }
 
@@ -348,7 +325,7 @@ typedef volatile unsigned int atomic_uint;
 // The preprocessor converts (Word2)(a, b) → make_Word2(a, b).
 // Must key on WordSize, not CARRY64, because FFT3261 has WordSize=8 without CARRY64.
 #if WordSize == 8
-__device__ __forceinline__ long2 make_Word2(long a, long b) { return make_long2(a, b); }
+__device__ __forceinline__ long2 make_Word2(i64 a, i64 b) { return make_long2(a, b); }
 #else
 __device__ __forceinline__ int2 make_Word2(int a, int b) { return make_int2(a, b); }
 #endif

From 4044b89b7e042b94177a8bdbecbbf7284b3910ca Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 25 Mar 2026 03:59:17 +0000
Subject: [PATCH 018/214] One more long/long long issue.  Handle the TRIGTGF61
 constant.

---
 src/Gpu.cpp    | 4 ++--
 src/cl/base.cl | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index f79b7536..d69b78ba 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -145,8 +145,8 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
 
 string toLiteral(i32 value) { return to_string(value); }
 string toLiteral(u32 value) { return to_string(value) + 'u'; }
-[[maybe_unused]] string toLiteral(long value) { return to_string(value) + "ll"; }              // Yes, this looks wrong.  MSVC and CUDA requires we always use long long.
-[[maybe_unused]] string toLiteral(unsigned long value) { return to_string(value) + "ull"; }    // See discussion in opencl_compat.cuh.
+[[maybe_unused]] string toLiteral(long value) { return to_string(value) + "ll"; }
+[[maybe_unused]] string toLiteral(unsigned long value) { return to_string(value) + "ull"; }
 [[maybe_unused]] string toLiteral(long long value) { return to_string(value) + "ll"; }
 [[maybe_unused]] string toLiteral(unsigned long long value) { return to_string(value) + "ull"; }
 
diff --git a/src/cl/base.cl b/src/cl/base.cl
index f58ff388..0c41f9fe 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -250,7 +250,8 @@ float2 OVERLOAD U2(float a, float b) { return (float2) (a, b); }
 int2 OVERLOAD U2(int a, int b) { return (int2) (a, b); }
 long2 OVERLOAD U2(i64 a, i64 b) { return (long2) (a, b); }
 uint2 OVERLOAD U2(uint a, uint b) { return (uint2) (a, b); }
-ulong2 OVERLOAD U2(ulong a, ulong b) { return (ulong2) (a, b); }
+ulong2 OVERLOAD U2(unsigned long a, unsigned long b) { return (ulong2) ((ulong)a, (ulong)b); }              // Two versions dealing with longs to handle TAILTGF61 constant
+ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2) ((ulong)a, (ulong)b); }
 
 // Other handy macros
 #define RE(a) (a.x)

From aeb0b571c8c1128aef6e5041c3f0176d9bda2a04 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 25 Mar 2026 05:52:51 +0000
Subject: [PATCH 019/214] I wrongly thought MIDDLE_IN/OUT_LDS_TRANSPOSE
 settings were not used when INPLACE=1.  Tune will now always time these
 settings.

---
 src/tune.cpp | 82 ++++++++++++++++++++++++++--------------------------
 1 file changed, 41 insertions(+), 41 deletions(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index 978f485c..41d445ce 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -445,7 +445,7 @@ void Tune::tune() {
     u32 variant = (defaultShape == &defaultFFTShape) ? 101 : 202;
 //GW: if fft spec on the command line specifies a variant then we should use that variant (I get some interesting results with 000 vs 101 vs 201 vs 202 likely due to rocm optimizer)
 
-    // IN_WG/SIZEX, OUT_WG/SIZEX, PAD, MIDDLE_IN/OUT_LDS_TRANSPOSE apply only if INPLACE=0
+    // IN_WG/SIZEX, OUT_WG/SIZEX, PAD apply only if INPLACE=0
     u32 current_inplace = args->value("INPLACE", 0);
     args->flags["INPLACE"] = to_string(0);
 
@@ -518,46 +518,6 @@ void Tune::tune() {
       args->flags["PAD"] = to_string(best_pad);
     }
 
-    // Find best MIDDLE_IN_LDS_TRANSPOSE setting
-    if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_middle_in_lds_transpose = 0;
-      u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 middle_in_lds_transpose : {0, 1}) {
-        args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
-        if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
-      }
-      log("Best MIDDLE_IN_LDS_TRANSPOSE is %u.  Default MIDDLE_IN_LDS_TRANSPOSE is 1.\n", best_middle_in_lds_transpose);
-      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_IN_LDS_TRANSPOSE", best_middle_in_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(best_middle_in_lds_transpose);
-    }
-
-    // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
-    if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_middle_out_lds_transpose = 0;
-      u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 middle_out_lds_transpose : {0, 1}) {
-        args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
-        if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
-      }
-      log("Best MIDDLE_OUT_LDS_TRANSPOSE is %u.  Default MIDDLE_OUT_LDS_TRANSPOSE is 1.\n", best_middle_out_lds_transpose);
-      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_OUT_LDS_TRANSPOSE", best_middle_out_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(best_middle_out_lds_transpose);
-    }
-
     // If only timing INPLACE=1 options, then set INPLACE
     if (time_inplace_only) {
       args->flags["INPLACE"] = to_string(1);
@@ -1016,6 +976,46 @@ void Tune::tune() {
       args->flags["MODM31"] = to_string(best_modm31);
     }
 
+    // Find best MIDDLE_IN_LDS_TRANSPOSE setting
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_middle_in_lds_transpose = 0;
+      u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 middle_in_lds_transpose : {0, 1}) {
+        args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
+        if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
+      }
+      log("Best MIDDLE_IN_LDS_TRANSPOSE is %u.  Default MIDDLE_IN_LDS_TRANSPOSE is 1.\n", best_middle_in_lds_transpose);
+      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_IN_LDS_TRANSPOSE", best_middle_in_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(best_middle_in_lds_transpose);
+    }
+
+    // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_middle_out_lds_transpose = 0;
+      u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 middle_out_lds_transpose : {0, 1}) {
+        args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
+        if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
+      }
+      log("Best MIDDLE_OUT_LDS_TRANSPOSE is %u.  Default MIDDLE_OUT_LDS_TRANSPOSE is 1.\n", best_middle_out_lds_transpose);
+      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_OUT_LDS_TRANSPOSE", best_middle_out_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(best_middle_out_lds_transpose);
+    }
+
     // Find best UNROLL_W setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};

From 5684b03d09f8e1ef9aa1ca385d0b0d1017abb6ef Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 25 Mar 2026 05:59:21 +0000
Subject: [PATCH 020/214] Revert "I wrongly thought MIDDLE_IN/OUT_LDS_TRANSPOSE
 settings were not used when INPLACE=1.  Tune will now always time these
 settings."

This reverts commit aeb0b571c8c1128aef6e5041c3f0176d9bda2a04.
---
 src/tune.cpp | 82 ++++++++++++++++++++++++++--------------------------
 1 file changed, 41 insertions(+), 41 deletions(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index 41d445ce..978f485c 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -445,7 +445,7 @@ void Tune::tune() {
     u32 variant = (defaultShape == &defaultFFTShape) ? 101 : 202;
 //GW: if fft spec on the command line specifies a variant then we should use that variant (I get some interesting results with 000 vs 101 vs 201 vs 202 likely due to rocm optimizer)
 
-    // IN_WG/SIZEX, OUT_WG/SIZEX, PAD apply only if INPLACE=0
+    // IN_WG/SIZEX, OUT_WG/SIZEX, PAD, MIDDLE_IN/OUT_LDS_TRANSPOSE apply only if INPLACE=0
     u32 current_inplace = args->value("INPLACE", 0);
     args->flags["INPLACE"] = to_string(0);
 
@@ -518,6 +518,46 @@ void Tune::tune() {
       args->flags["PAD"] = to_string(best_pad);
     }
 
+    // Find best MIDDLE_IN_LDS_TRANSPOSE setting
+    if (!time_inplace_only) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_middle_in_lds_transpose = 0;
+      u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 middle_in_lds_transpose : {0, 1}) {
+        args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
+        if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
+      }
+      log("Best MIDDLE_IN_LDS_TRANSPOSE is %u.  Default MIDDLE_IN_LDS_TRANSPOSE is 1.\n", best_middle_in_lds_transpose);
+      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_IN_LDS_TRANSPOSE", best_middle_in_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(best_middle_in_lds_transpose);
+    }
+
+    // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
+    if (!time_inplace_only) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_middle_out_lds_transpose = 0;
+      u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 middle_out_lds_transpose : {0, 1}) {
+        args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
+        if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
+      }
+      log("Best MIDDLE_OUT_LDS_TRANSPOSE is %u.  Default MIDDLE_OUT_LDS_TRANSPOSE is 1.\n", best_middle_out_lds_transpose);
+      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_OUT_LDS_TRANSPOSE", best_middle_out_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(best_middle_out_lds_transpose);
+    }
+
     // If only timing INPLACE=1 options, then set INPLACE
     if (time_inplace_only) {
       args->flags["INPLACE"] = to_string(1);
@@ -976,46 +1016,6 @@ void Tune::tune() {
       args->flags["MODM31"] = to_string(best_modm31);
     }
 
-    // Find best MIDDLE_IN_LDS_TRANSPOSE setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_middle_in_lds_transpose = 0;
-      u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 middle_in_lds_transpose : {0, 1}) {
-        args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
-        if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
-      }
-      log("Best MIDDLE_IN_LDS_TRANSPOSE is %u.  Default MIDDLE_IN_LDS_TRANSPOSE is 1.\n", best_middle_in_lds_transpose);
-      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_IN_LDS_TRANSPOSE", best_middle_in_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(best_middle_in_lds_transpose);
-    }
-
-    // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_middle_out_lds_transpose = 0;
-      u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 middle_out_lds_transpose : {0, 1}) {
-        args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
-        if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
-      }
-      log("Best MIDDLE_OUT_LDS_TRANSPOSE is %u.  Default MIDDLE_OUT_LDS_TRANSPOSE is 1.\n", best_middle_out_lds_transpose);
-      configsUpdate(current_cost, best_cost, 0.000, "MIDDLE_OUT_LDS_TRANSPOSE", best_middle_out_lds_transpose, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(best_middle_out_lds_transpose);
-    }
-
     // Find best UNROLL_W setting
     if (1) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};

From 71ecbdc9cb72498c996a4be5921521d8e6eadaa9 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 26 Mar 2026 02:20:24 +0000
Subject: [PATCH 021/214] Corrected CUDA maxregcount syntax

---
 src/Gpu.cpp | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index d69b78ba..4df2c0f9 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -513,15 +513,15 @@ Gpu::~Gpu() {
 #define CARRY_SIZE 100000
 
 #if CUDA_BACKEND
-#define CARRYFUSED_BLOCKS(x)  args.value("CFBLKS", 0) == 0 ? x : args.value("CFBLKS", 0) == 1 ? x " -DCUDA_MIN_BLOCKS=3" : x " -maxregcount 84"
-#define MIDDLEIN_BLOCKS    args.value("MIBLKS", 0) == 0 ? "" : args.value("MIBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
-#define MIDDLEOUT_BLOCKS   args.value("MOBLKS", 0) == 0 ? "" : args.value("MOBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
-#define TAILSQUARE_BLOCKS  args.value("TSBLKS", 0) == 0 ? "" : args.value("TSBLKS", 0) == 1 ? " -DCUDA_MIN_BLOCKS=3" : " -maxregcount 84"
+#define CARRYFUSED_BLOCKS(x)  args.value("CFBLKS", 0) == 0 ? x  : args.value("CFBLKS", 0) == 1 ? x " -DCUDA_MIN_BLOCKS=2" : x " -maxregcount=128"
+#define MIDDLEIN_BLOCKS       args.value("MIBLKS", 0) == 0 ? "" : args.value("MIBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
+#define MIDDLEOUT_BLOCKS      args.value("MOBLKS", 0) == 0 ? "" : args.value("MOBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
+#define TAILSQUARE_BLOCKS     args.value("TSBLKS", 0) == 0 ? "" : args.value("TSBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
 #else
-#define CARRYFUSED_BLOCKS(x)  ""
-#define MIDDLEIN_BLOCKS    ""
-#define MIDDLEOUT_BLOCKS   ""
-#define TAILSQUARE_BLOCKS  ""
+#define CARRYFUSED_BLOCKS(x)  x
+#define MIDDLEIN_BLOCKS       ""
+#define MIDDLEOUT_BLOCKS      ""
+#define TAILSQUARE_BLOCKS     ""
 #endif
 
 Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :

From 23e15f4c2c0ba30f05fd8717120a3b37138c7f1f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 3 Apr 2026 01:43:00 +0000
Subject: [PATCH 022/214] Added support for CUDA programmable dependents
 launch.  Sadly, it does not seem to help.

---
 src/cl/base.cl             | 17 +++++++++
 src/cl/carryfused.cl       | 78 ++++++++++++++++++++++++++++----------
 src/cl/fftmiddlein.cl      | 48 +++++++++++++++++++++++
 src/cl/fftmiddleout.cl     | 32 ++++++++++++++++
 src/cl/fftw.cl             |  8 ++++
 src/cl/tailmul.cl          | 16 ++++++++
 src/cl/tailsquare.cl       | 54 +++++++++++++++++++++++++-
 src/cuda/cudawrap.cpp      | 25 +++++++++++-
 src/cuda/opencl_compat.cuh |  3 ++
 9 files changed, 258 insertions(+), 23 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 0c41f9fe..545dbb91 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -734,3 +734,20 @@ void OVERLOAD bar(const u32 WG) {
 // This is used e.g. by the double-wide tailSquare, where LDS is split between the halves.
 void halfBar() { if (get_enqueued_local_size(0) / 2 > WAVEFRONT) { bar(); } }
 
+
+// nVidia GPUs (Hopper architecture sm 9.0 and later) support Programatic Dependent Launch where the tail end execution of one kernel can overlap
+// with the beginning of the next kernel.  This requires a special launch kernel command that is only available in CUDA 12.0 and later.
+// These routines let us take advantage of this CUDA feature.  These routines do nothing in OpenCL.
+
+void dependentLaunch() {
+#if CUDA_BACKEND && HAS_PTX >= 900 && ENABLE_PDL
+  __asm volatile("griddepcontrol.launch_dependents;");    // same as cudaTriggerProgrammaticLaunchCompletion();
+#endif
+}
+
+void dependentLaunchWait() {
+#if CUDA_BACKEND && HAS_PTX >= 900 && ENABLE_PDL
+  __asm volatile("griddepcontrol.wait;");                 // same as cudaGridDependencySynchronize();
+#endif
+}
+
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 7e64f179..dff9bb08 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -130,6 +130,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutFP64
+
   readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
@@ -282,8 +284,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
   }
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  dependentLaunch();   // Next kernel will be fftMiddleInFP64
 
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -318,6 +321,8 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutFP32
+
   readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
@@ -465,8 +470,9 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
   }
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -500,6 +506,8 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   __asm("s_setprio 3");
 #endif
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF31
+
   readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
@@ -673,8 +681,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  dependentLaunch();   // Next kernel will be fftMiddleInGF31
 
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -708,6 +717,8 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   __asm("s_setprio 3");
 #endif
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
+
   readCarryFusedLine(in, u, line, lowMe);
 
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
@@ -887,8 +898,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  dependentLaunch();   // Next kernel will be fftMiddleInGF61
 
+  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -929,14 +941,17 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in, u, line, lowMe);
-  readCarryFusedLine(in31, u31, line, lowMe);
-
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+
+  readCarryFusedLine(in, u, line, lowMe);
   new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF31
+
+  readCarryFusedLine(in31, u31, line, lowMe);
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
@@ -1124,6 +1139,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 
+  dependentLaunch();   // Next kernel will be fftMiddleInFP32
+
   new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 }
@@ -1168,14 +1185,17 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line, lowMe);
-  readCarryFusedLine(in31, u31, line, lowMe);
-
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+
+  readCarryFusedLine(inF2, uF2, line, lowMe);
   new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF31
+
+  readCarryFusedLine(in31, u31, line, lowMe);
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
@@ -1363,6 +1383,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
+  dependentLaunch();   // Next kernel will be fftMiddleInFP32
+
   new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 }
@@ -1407,14 +1429,17 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line, lowMe);
-  readCarryFusedLine(in61, u61, line, lowMe);
-
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+
+  readCarryFusedLine(inF2, uF2, line, lowMe);
   new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
+
+  readCarryFusedLine(in61, u61, line, lowMe);
   new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
@@ -1602,6 +1627,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
+  dependentLaunch();   // Next kernel will be fftMiddleInFP32
+
   new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u61, out61, line, lowMe);
 }
@@ -1645,14 +1672,17 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(in31, u31, line, lowMe);
-  readCarryFusedLine(in61, u61, line, lowMe);
-
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+
+  readCarryFusedLine(in31, u31, line, lowMe);
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
+
+  readCarryFusedLine(in61, u61, line, lowMe);
   new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
@@ -1848,6 +1878,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 
+  dependentLaunch();   // Next kernel will be fftMiddleInGF31
+
   new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u61, out61, line, lowMe);
 }
@@ -1897,16 +1929,20 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 3");
 #endif
 
-  readCarryFusedLine(inF2, uF2, line, lowMe);
-  readCarryFusedLine(in31, u31, line, lowMe);
-  readCarryFusedLine(in61, u61, line, lowMe);
-
 // Try this weird FFT_width call that adds a "hidden zero" when unrolling.  This prevents the compiler from finding
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
+
+  readCarryFusedLine(inF2, uF2, line, lowMe);
   new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  readCarryFusedLine(in31, u31, line, lowMe);
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
+
+  readCarryFusedLine(in61, u61, line, lowMe);
   new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
@@ -2118,6 +2154,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
+  dependentLaunch();   // Next kernel will be fftMiddleInFP32
+
   new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 
diff --git a/src/cl/fftmiddlein.cl b/src/cl/fftmiddlein.cl
index d1788799..14b43013 100644
--- a/src/cl/fftmiddlein.cl
+++ b/src/cl/fftmiddlein.cl
@@ -30,6 +30,10 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+#if FFT_TYPE == FFT64
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing FP64 data
+#endif
+
   readMiddleInLine(u, in, y, x);
 
   middleMul2(u, x, y, 1, trig);
@@ -38,6 +42,8 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul(u, y, trig);
 
+  dependentLaunch();       // Next kernel will be tailSquareFP64 which must dependentLaunchWait before reading data
+
 #if MIDDLE_IN_LDS_TRANSPOSE
   // Transpose the x and y values
   local T lds[IN_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];
@@ -85,6 +91,10 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+#if FFT_TYPE == FFT32
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing FP32 data
+#endif
+
   readMiddleInLine(u, inF2, y, x);
 
   middleMul2(u, x, y, 1, trigF2);
@@ -93,6 +103,8 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul(u, y, trigF2);
 
+  dependentLaunch();       // Next kernel will be tailSquareFP32 which must dependentLaunchWait before reading data
+
 #if MIDDLE_IN_LDS_TRANSPOSE
   // Transpose the x and y values
   local F lds[IN_WG / 2 * (MIDDLE <= 16 ? 2 * MIDDLE : MIDDLE)];
@@ -140,6 +152,10 @@ KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+#if FFT_TYPE == FFT31
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing GF31 data
+#endif
+
   readMiddleInLine(u, in31, y, x);
 
   middleMul2(u, x, y, trig31);
@@ -148,6 +164,8 @@ KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul(u, y, trig31);
 
+  dependentLaunch();       // Next kernel will be tailSquareGF31 which must dependentLaunchWait before reading data
+
 #if MIDDLE_IN_LDS_TRANSPOSE
   // Transpose the x and y values
   local Z31 lds[IN_WG / 2 * (MIDDLE <= 16 ? 2 * MIDDLE : MIDDLE)];
@@ -195,6 +213,10 @@ KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+#if FFT_TYPE == FFT61
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing GF31 data
+#endif
+
   readMiddleInLine(u, in61, y, x);
 
   middleMul2(u, x, y, trig61);
@@ -203,6 +225,8 @@ KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul(u, y, trig61);
 
+  dependentLaunch();       // Next kernel will be tailSquareGF61 which must dependentLaunchWait before reading data
+
 #if MIDDLE_IN_LDS_TRANSPOSE
   // Transpose the x and y values
   local Z61 lds[IN_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];
@@ -248,6 +272,10 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+#if FFT_TYPE == FFT64
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing FP64 data
+#endif
+
   readMiddleInLine(u, in, y, x);
 
   middleMul2(u, x, y, 1, trig);
@@ -256,6 +284,8 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul(u, y, trig);
 
+  dependentLaunch();       // Next kernel will be tailSquareFP64 which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local T2 lds[256];
   middleShuffle(lds, u);
@@ -297,6 +327,10 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+#if FFT_TYPE == FFT32
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing FP32 data
+#endif
+
   readMiddleInLine(u, inF2, y, x);
 
   middleMul2(u, x, y, 1, trigF2);
@@ -305,6 +339,8 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul(u, y, trigF2);
 
+  dependentLaunch();       // Next kernel will be tailSquareFP32 which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local F2 lds[256];
   middleShuffle(lds, u);
@@ -346,6 +382,10 @@ KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+#if FFT_TYPE == FFT31
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing GF31 data
+#endif
+
   readMiddleInLine(u, in31, y, x);
 
   middleMul2(u, x, y, trig31);
@@ -354,6 +394,8 @@ KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul(u, y, trig31);
 
+  dependentLaunch();       // Next kernel will be tailSquareGF31 which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local GF31 lds[256];
   middleShuffle(lds, u);
@@ -395,6 +437,10 @@ KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+#if FFT_TYPE == FFT61
+  dependentLaunchWait();   // Previous kernel was carryfused that launched dependents before writing GF31 data
+#endif
+
   readMiddleInLine(u, in61, y, x);
 
   middleMul2(u, x, y, trig61);
@@ -403,6 +449,8 @@ KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul(u, y, trig61);
 
+  dependentLaunch();       // Next kernel will be tailSquareGF61 which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local GF61 lds[256];
   middleShuffle(lds, u);
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index a7263dcd..9249c8c3 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -34,6 +34,8 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareFP64 that launched dependents before writing FP64 data
+
   readMiddleOutLine(u, in, y, x);
 
   middleMul(u, x, trig);
@@ -48,6 +50,8 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul2(u, y, x, factor, trig);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
 #if MIDDLE_OUT_LDS_TRANSPOSE
   // Transpose the x and y values
   local T lds[OUT_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];
@@ -99,6 +103,8 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareFP32 that launched dependents before writing FP64 data
+
   readMiddleOutLine(u, inF2, y, x);
 
   middleMul(u, x, trigF2);
@@ -113,6 +119,8 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul2(u, y, x, factor, trigF2);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
 #if MIDDLE_OUT_LDS_TRANSPOSE
   // Transpose the x and y values
   local F lds[OUT_WG / 2 * (MIDDLE <= 16 ? 2 * MIDDLE : MIDDLE)];
@@ -164,6 +172,8 @@ KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareGF31 that launched dependents before writing GF31 data
+
   readMiddleOutLine(u, in31, y, x);
 
   middleMul(u, x, trig31);
@@ -172,6 +182,8 @@ KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul2(u, y, x, trig31);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
 #if MIDDLE_OUT_LDS_TRANSPOSE
   // Transpose the x and y values
   local Z31 lds[OUT_WG / 2 * (MIDDLE <= 16 ? 2 * MIDDLE : MIDDLE)];
@@ -223,6 +235,8 @@ KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, Trig trig) {
   u32 x = startx + mx;
   u32 y = starty + my;
 
+  dependentLaunchWait();   // Previous kernel was tailSquare61 that launched dependents before writing GF61 data
+
   readMiddleOutLine(u, in61, y, x);
 
   middleMul(u, x, trig61);
@@ -231,6 +245,8 @@ KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, Trig trig) {
 
   middleMul2(u, y, x, trig61);
 
+  dependentLaunch();       // Next kernel will be carryfused which must dependentLaunchWait before reading data
+
 #if MIDDLE_OUT_LDS_TRANSPOSE
   // Transpose the x and y values
   local Z61 lds[OUT_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];
@@ -271,6 +287,8 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareFP64 that launched dependents before writing FP64 data
+
   readMiddleOutLine(u, in, y, x);
 
   middleMul(u, x, trig);
@@ -285,6 +303,8 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul2(u, y, x, factor, trig);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local T2 lds[256];
   middleShuffle(lds, u);
@@ -324,6 +344,8 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareFP32 that launched dependents before writing FP64 data
+
   readMiddleOutLine(u, inF2, y, x);
 
   middleMul(u, x, trigF2);
@@ -338,6 +360,8 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul2(u, y, x, factor, trigF2);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local F2 lds[256];
   middleShuffle(lds, u);
@@ -377,6 +401,8 @@ KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareGF31 that launched dependents before writing GF31 data
+
   readMiddleOutLine(u, in31, y, x);
 
   middleMul(u, x, trig31);
@@ -385,6 +411,8 @@ KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul2(u, y, x, trig31);
 
+  dependentLaunch();       // Next kernel will be carryFused which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local GF31 lds[256];
   middleShuffle(lds, u);
@@ -424,6 +452,8 @@ KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, Trig trig) {
   u32 x = startx + me % 16;
   u32 y = starty + me / 16;
 
+  dependentLaunchWait();   // Previous kernel was tailSquareGF61 that launched dependents before writing GF61 data
+
   readMiddleOutLine(u, in61, y, x);
 
   middleMul(u, x, trig61);
@@ -432,6 +462,8 @@ KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, Trig trig) {
 
   middleMul2(u, y, x, trig61);
 
+  dependentLaunch();       // Next kernel will be carryfused which must dependentLaunchWait before reading data
+
   // Transpose the x and y values
   local GF61 lds[256];
   middleShuffle(lds, u);
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index 89277649..789a707d 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -15,6 +15,8 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 g = get_group_id(0);
   u32 me = get_local_id(0);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOut
+
   readCarryFusedLine(in, u, g, me);
   fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
   out += WIDTH * g;
@@ -42,6 +44,8 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 g = get_group_id(0);
   u32 me = get_local_id(0);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOut
+
   readCarryFusedLine(inF2, u, g, me);
   fft_WIDTH(lds, u, smallTrigF2, 1, SHUFL_BYTES_W, me);
   outF2 += WIDTH * g;
@@ -68,6 +72,8 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 g = get_group_id(0);
   u32 me = get_local_id(0);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOut
+
   readCarryFusedLine(in31, u, g, me);
   fft_WIDTH(lds, u, smallTrig31, 1, SHUFL_BYTES_W, me);
   out31 += WIDTH * g;
@@ -94,6 +100,8 @@ KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 g = get_group_id(0);
   u32 me = get_local_id(0);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleOut
+
   readCarryFusedLine(in61, u, g, me);
   fft_WIDTH(lds, u, smallTrig61, 1, SHUFL_BYTES_W, me);
   out61 += WIDTH * g;
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 51ac9c11..03647fdb 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -64,6 +64,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
   u32 me = get_local_id(0);
   readTailFusedLine(in, u, line1, me);
   readTailFusedLine(in, v, line2, me);
@@ -110,6 +112,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out, memline2, me);
@@ -180,6 +184,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
   u32 me = get_local_id(0);
   readTailFusedLine(inF2, u, line1, me);
   readTailFusedLine(inF2, v, line2, me);
@@ -218,6 +224,8 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, outF2, memline2, me);
@@ -288,6 +296,8 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
   u32 me = get_local_id(0);
   readTailFusedLine(in31, u, line1, me);
   readTailFusedLine(in31, v, line2, me);
@@ -343,6 +353,8 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out31, memline2, me);
@@ -411,6 +423,8 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
   u32 me = get_local_id(0);
   readTailFusedLine(in61, u, line1, me);
   readTailFusedLine(in61, v, line2, me);
@@ -466,6 +480,8 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(v, out61, memline2, me);
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index e30b8012..29832a8b 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -67,6 +67,10 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = which ? (H/2) : 0;
   u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailSquareFP64 which must dependentLaunchWait before reading data from fftMiddleInFP64
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
   readTailFusedLine(in, u, line, me);
 
 #if FFT_VARIANT_H != 0
@@ -108,6 +112,9 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
   u32 me = get_local_id(0);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
   readTailFusedLine(in, u, line1, me);
   readTailFusedLine(in, v, line2, me);
 
@@ -168,6 +175,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
 
@@ -221,6 +230,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = !isSecondHalf ? line_u : line_v;
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
   // Read lines u and v
   readTailFusedLine(in, u, line, lowMe);
 
@@ -274,6 +285,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     revCrossLine(lds, u);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
+
   new_fft_HEIGHT2(lds, u, smallTrig, w, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
@@ -346,6 +359,10 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = which ? (H/2) : 0;
   u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailSquareFP32 which must dependentLaunchWait before reading data from fftMiddleInFP32
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
   readTailFusedLine(inF2, u, line, me);
 
   F2 trig = slowTrig_N(line + me * H, ND / NH);
@@ -383,6 +400,9 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
   u32 me = get_local_id(0);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
   readTailFusedLine(inF2, u, line1, me);
   readTailFusedLine(inF2, v, line2, me);
 
@@ -435,6 +455,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
 
@@ -492,6 +514,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = !isSecondHalf ? line_u : line_v;
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
   // Read lines u and v
   readTailFusedLine(inF2, u, line, lowMe);
 
@@ -537,6 +561,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
     revCrossLine(lds, u);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
+
   new_fft_HEIGHT2(lds, u, smallTrigF2, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
@@ -613,6 +639,10 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = which ? (H/2) : 0;
   u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailSquareGF31 which must dependentLaunchWait before reading data from fftMiddleInGF31
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
   readTailFusedLine(in31, u, line, me);
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -667,6 +697,9 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
   u32 me = get_local_id(0);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
   readTailFusedLine(in31, u, line1, me);
   readTailFusedLine(in31, v, line2, me);
 
@@ -715,6 +748,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
 
@@ -771,6 +806,8 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = !isSecondHalf ? line_u : line_v;
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
   // Read lines u and v
   readTailFusedLine(in31, u, line, lowMe);
 
@@ -812,6 +849,8 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
     revCrossLine(lds, u);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
+
   new_fft_HEIGHT2(lds, u, smallTrig31, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
@@ -821,7 +860,7 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 
 #endif
-  
+
 
 /**************************************************************************/
 /*          Similar to above, but for an NTT based on GF(M61^2)           */
@@ -888,6 +927,10 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = which ? (H/2) : 0;
   u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailSquareGF61 which must dependentLaunchWait before reading data from fftMiddleInGF61
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
   readTailFusedLine(in61, u, line, me);
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -942,6 +985,9 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
   u32 me = get_local_id(0);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
   readTailFusedLine(in61, u, line1, me);
   readTailFusedLine(in61, v, line2, me);
 
@@ -990,6 +1036,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
     reverseLine(G_H, lds, v);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
+
   fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
   fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
 
@@ -1046,6 +1094,8 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   u32 line = !isSecondHalf ? line_u : line_v;
 
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
   // Read lines u and v
   readTailFusedLine(in61, u, line, lowMe);
 
@@ -1087,6 +1137,8 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
     revCrossLine(lds, u);
   }
 
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
+
   new_fft_HEIGHT2(lds, u, smallTrig61, 2, SHUFL_BYTES_H, lowMe);
 
   // Write lines u and v
diff --git a/src/cuda/cudawrap.cpp b/src/cuda/cudawrap.cpp
index 905e34c7..474d7522 100644
--- a/src/cuda/cudawrap.cpp
+++ b/src/cuda/cudawrap.cpp
@@ -495,11 +495,32 @@ std::string NvrtcProgram::compile(const std::string& source, const std::string&
 // ---- Kernel launcher ----
 
 void CudaKernelLauncher::launch(CUstream stream, u32 gridSize, void** args, u32 sharedMem) {
-  CU_CHECK(cuLaunchKernel(func,
+#if CUDA_VERSION >= 12000 && ENABLE_PDL
+   // enable pdl in kernel launch attributes
+   CUlaunchAttribute attrs[1];
+   attrs[0].id = CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION;
+   attrs[0].value.programmaticStreamSerializationAllowed = 1;
+   // set kernel launch configuration
+   CUlaunchConfig_st config = {0};
+   config.gridDimX = gridSize;
+   config.gridDimY = 1;
+   config.gridDimZ = 1;
+   config.blockDimX = blockSize;
+   config.blockDimY = 1;
+   config.blockDimZ = 1;
+   config.hStream = stream;
+   config.sharedMemBytes = sharedMem;
+   config.attrs = attrs;
+   config.numAttrs = 1;
+   // launch the kernel
+   CU_CHECK(cuLaunchKernelEx(&config, func, args, nullptr));
+#else
+   CU_CHECK(cuLaunchKernel(func,
                            gridSize, 1, 1,   // grid dimensions
                            blockSize, 1, 1,   // block dimensions
                            sharedMem,         // shared memory bytes
                            stream,            // stream
                            args,              // kernel arguments
-                           nullptr));         // extra
+			   nullptr));         // extra
+#endif
 }
diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
index 99c15378..92b4dc21 100644
--- a/src/cuda/opencl_compat.cuh
+++ b/src/cuda/opencl_compat.cuh
@@ -7,6 +7,9 @@
 
 #pragma once
 
+// Set flag that OpenCL can access.  Let's us add CUDA-only code to the OpenCL sources.
+#define CUDA_BACKEND 1
+
 // ---- Qualifiers ----
 // __kernel / kernel → extern "C" __global__ (CUDA kernel launch qualifier)
 // extern "C" is needed so cuModuleGetFunction() can find kernels by unmangled name

From c98aa56b0521dce8b9821fa9c8744634632e3d9f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 4 Apr 2026 07:27:58 +0000
Subject: [PATCH 023/214] Fixed issues with usin --maxrregcount to limit number
 of registers used by CUDA kernel

---
 src/cuda/clwrap_cuda.cpp | 48 ++++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 14 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 0f24cb63..ad69354d 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -235,6 +235,7 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
     }
   }
 
+  int maxregcount = 0;
   if (options) {
     istringstream iss(options);
     string tok;
@@ -262,6 +263,9 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
         // FMA contraction already enabled above via --fmad=true.
         // Do NOT use -use_fast_math here — it enables flush-to-zero and
         // reduced-precision division/sqrt which breaks tailMul accuracy.
+      } else if (tok.substr(0, 14) == "--maxrregcount") {
+        nvrtcOpts.push_back(tok);
+        maxregcount = atoi(tok.substr(15, 3).c_str());
       }
       // Skip other -cl-* options (not applicable to NVRTC)
     }
@@ -281,16 +285,17 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
       // Preprocess OpenCL source for CUDA compatibility
       string processedSrc = NvrtcProgram::preprocessOpenCL(headers[i]->source);
       // Debug: verify KERNEL macro replacement
-      {
-        static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
-        if (dumpPrefix && string(headerNames[i]) == "base.cl") {
-          auto pos = processedSrc.find("KERNEL");
-          if (pos != string::npos) {
-            string ctx = processedSrc.substr(pos > 20 ? pos-20 : 0, 120);
-            fprintf(stderr, "base.cl KERNEL context: [%s]\n", ctx.c_str());
-          }
-        }
-      }
+// I'm not sure what Sherpa was trying to print out here.  It prints out nothing useful.
+//      {
+//        static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
+//        if (dumpPrefix && string(headerNames[i]) == "base.cl") {
+//          auto pos = processedSrc.find("KERNEL");
+//          if (pos != string::npos) {
+//            string ctx = processedSrc.substr(pos > 20 ? pos-20 : 0, 120);
+//            fprintf(stderr, "base.cl KERNEL context: [%s]\n", ctx.c_str());
+//          }
+//        }
+//      }
       nvrtcHeaders.push_back({headerNames[i], processedSrc});
     }
   }
@@ -341,7 +346,6 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
     prog->ptx = NvrtcProgram::compile(processedSource, "prpll_kernel.cu", nvrtcOpts, nvrtcHeaders);
     prog->compiled = true;
     g_lastBuildLog.clear();
-    return CL_SUCCESS;
   } catch (const exception& e) {
     g_lastBuildLog = e.what();
     prog->compiled = false;
@@ -363,6 +367,21 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
     }
     return CL_COMPILE_PROGRAM_FAILURE;
   }
+
+  // If --maxrregcount is set it seems nvrtc compile ignores the setting.  Instead modify the PTX and load the modified PTX.
+
+  if (maxregcount) {
+    string maxntidPattern = ".maxntid ";
+    string maxnregPattern = ".maxnreg " + to_string(maxregcount) + "\n";
+    for (size_t startpos = 0; ; ) {
+      size_t pos = prog->ptx.find(maxntidPattern, startpos);
+      if (pos == string::npos) break;
+      prog->ptx.insert(pos, maxnregPattern);
+      startpos = pos + 20;
+    }
+  }
+
+  return CL_SUCCESS;
 }
 
 cl_program clLinkProgram(cl_context ctx, unsigned nDevices, const cl_device_id*,
@@ -515,14 +534,15 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   {
     static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
     if (dumpPrefix) {
-      int numRegs = 0, shmem = 0, maxThreads = 0;
+      int numRegs = 0, shmem = 0, localmem = 0, maxThreads = 0;
       cuFuncGetAttribute(&numRegs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
       cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
+      cuFuncGetAttribute(&localmem, CU_FUNC_ATTRIBUTE_LOCAL_SIZE_BYTES , k->func);
       cuFuncGetAttribute(&maxThreads, CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK, k->func);
-      fprintf(stderr, "  %-25s: %3d regs, %5d shmem, maxThreads=%d\n", name, numRegs, shmem, maxThreads);
+      fprintf(stderr, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads);
       // Also write to file since WSL2+CUDA swallows stderr
       FILE* regLog = fopen("kernel_regs.log", "a");
-      if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, maxThreads=%d\n", name, numRegs, shmem, maxThreads); fclose(regLog); }
+      if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads); fclose(regLog); }
     }
   }
 

From debd808ce65a9038b763b59af8cf347b0664ac02 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 7 Apr 2026 20:01:27 +0000
Subject: [PATCH 024/214] There is now a default limit on the number of GPU
 registers to use for the most important CUDA kernels. There are command line
 options to choose a different maximum number of register, a launch bounds
 with a minimum number of blocks per SM, or a launch_bounds with no limits. In
 my limited testing, this yields a small benefit, ~1%.

---
 src/Args.cpp             |   4 +
 src/Gpu.cpp              | 193 +++++++++++++++++++++++++++++++++------
 src/Gpu.h                |   5 +-
 src/common.h             |   3 +
 src/cuda/clwrap_cuda.cpp |   8 +-
 src/tune.cpp             | 103 +++++----------------
 6 files changed, 202 insertions(+), 114 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index cece2fa6..b9084ba3 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -15,6 +15,9 @@
 #include <sstream>
 #include <algorithm>
 
+// This is a copy of the args.verbose flag.  It allows the CUDA wrapper to access the flag.
+bool prpll_verbose = 0;
+
 int Args::value(const string& key, int valNotFound) const {
   auto it = flags.find(key);
   if (it == flags.end()) { return valNotFound; }
@@ -320,6 +323,7 @@ void Args::parse(const string& line) {
       carryTune = true;
     } else if (key == "-verbose" || key == "-v") {
       verbose = true;
+      prpll_verbose = true;
     } else if (key == "-time") {
       profile = true;
     } else if (key == "-workers") {
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 4df2c0f9..a3983674 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -264,7 +264,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "TABMUL_CHAIN61",
                               "MODM31",
                               "LOADS","STORES",
-                              "CFBLKS","MIBLKS","MOBLKS","TSBLKS",  // CUDA - experimental
+                              "NOREG",                  // CUDA - experimental
                               "WMUL"
                             });
     if (!isValid) {
@@ -509,20 +509,157 @@ Gpu::~Gpu() {
   background->waitEmpty();
 }
 
-#define ROE_SIZE 100000
-#define CARRY_SIZE 100000
-
+// Part of GPU initialization is to compute the default number of registers each kernel should target during compilation.
+// Kernel register usage is critical for maximizing GPU occupancy.  The default values can be overrriden with command line arguments.
+// This feature currently only works for the CUDA compiler.
+string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
 #if CUDA_BACKEND
-#define CARRYFUSED_BLOCKS(x)  args.value("CFBLKS", 0) == 0 ? x  : args.value("CFBLKS", 0) == 1 ? x " -DCUDA_MIN_BLOCKS=2" : x " -maxregcount=128"
-#define MIDDLEIN_BLOCKS       args.value("MIBLKS", 0) == 0 ? "" : args.value("MIBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
-#define MIDDLEOUT_BLOCKS      args.value("MOBLKS", 0) == 0 ? "" : args.value("MOBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
-#define TAILSQUARE_BLOCKS     args.value("TSBLKS", 0) == 0 ? "" : args.value("TSBLKS", 0) == 1 ?   " -DCUDA_MIN_BLOCKS=3" :   " -maxregcount=84"
+  int regs = 0;
+  const char *use_override = "";
+  // Allow command line to prefer the CUDA compiler's default number of registers
+  if (args.value("NOREG", 0)) return string("");
+  // Determine a kernel specific default maximum number of GPU registers (values set to -1 have not been tuned for best default value)
+  switch (which_kernel) {
+  case CARRYFUSED:         // Register usage depends on NW, the FFT/NTT type, and perhaps the long carry setting
+    switch (fft.shape.fft_type) {
+    case FFT64:
+      regs = nW == 8 ? 72 : 64;
+      use_override = "REGCF64";
+      break;
+    case FFT3161:
+      regs = nW == 8 ? 96 : 56;
+      use_override = "REGCF3161";
+      break;
+    case FFT3261:
+      regs = nW == 8 ? 96 : 56;
+      use_override = "REGCF3261";
+      break;
+    case FFT61:
+      regs = nW == 8 ? 80 : 64;
+      use_override = "REGCF61";
+      break;
+    case FFT323161:
+      regs = nW == 8 ? 128 : 72;
+      use_override = "REGCF323161";
+      break;
+    case FFT3231:
+      regs = -1;
+      use_override = "REGCF3231";
+      break;
+    case FFT6431:
+      regs = -1;
+      use_override = "REGCF6431";
+      break;
+    case FFT31:
+      regs = -1;
+      use_override = "REGCF31";
+      break;
+    case FFT32:
+      regs = -1;
+      use_override = "REGCF32";
+      break;
+    }
+    break;
+  case MIDIN:              // Register usage depends on MIDDLE and the FP32/FP64
+    if (fft.FFT_FP64) {
+      if (fft.shape.middle >= 16) regs = 96;
+      else if (fft.shape.middle >= 14) regs = 88;
+      else if (fft.shape.middle >= 13) regs = 80;
+      else if (fft.shape.middle >= 10) regs = 72;
+      else if (fft.shape.middle >= 7) regs = 64;
+      else if (fft.shape.middle >= 5) regs = 56;
+      else if (fft.shape.middle >= 4) regs = 48;
+      else regs = -1;
+      use_override = "REGMI64";
+    } else {
+      if (fft.shape.middle == 16) regs = 56;
+      else if (fft.shape.middle == 8) regs = 40;
+      else if (fft.shape.middle == 4) regs = 32;
+      else regs = -1;
+      use_override = "REGMI32";
+    }
+    break;
+  case MIDIN31:            // Register usage depends on MIDDLE
+    if (fft.shape.middle == 16) regs = 56;
+    else if (fft.shape.middle == 8) regs = 44;
+    else if (fft.shape.middle == 4) regs = 32;
+    else regs = -1;  
+    use_override = "REGMI31";
+    break;
+  case MIDIN61:            // Register usage depends on MIDDLE
+    if (fft.shape.middle == 16) regs = 96;
+    else if (fft.shape.middle == 8) regs = 72;
+    else if (fft.shape.middle == 4) regs = 64;
+    else regs = -1;  
+    use_override = "REGMI61";
+    break;
+  case TAIL:               // Register usage depends on NH and the FP32/FP64 (assumes double-wide kernel)
+    if (fft.FFT_FP64) {
+      regs = nH == 8 ? 80 : 64;
+      use_override = "REGTS64";
+    } else {
+      regs = nH == 8 ? 64 : 48;
+      use_override = "REGTS32";
+    }
+    break;
+  case TAIL31:             // Register usage depends on NH (assumes double-wide kernel)
+    regs = nH == 8 ? 56 : 48;
+    use_override = "REGTS31";
+    break;
+  case TAIL61:             // Register usage depends on NH (assumes double-wide kernel)
+    regs = nH == 8 ? 96 : 64;
+    use_override = "REGTS61";
+    break;
+  case MIDOUT:             // Register usage depends on MIDDLE and the FFT/NTT type
+    if (fft.FFT_FP64) {
+      if (fft.shape.middle >= 15) regs = 96;
+      else if (fft.shape.middle >= 14) regs = 88;
+      else if (fft.shape.middle >= 11) regs = 80;
+      else if (fft.shape.middle >= 10) regs = 72;
+      else if (fft.shape.middle >= 7) regs = 64;
+      else if (fft.shape.middle >= 5) regs = 56;
+      else if (fft.shape.middle >= 4) regs = 48;
+      else regs = -1;
+      use_override = "REGMO64";
+    } else {
+      if (fft.shape.middle == 16) regs = 56;
+      else if (fft.shape.middle == 8) regs = 40;
+      else if (fft.shape.middle == 4) regs = 32;
+      else regs = -1;
+      use_override = "REGMO32";
+    }
+    break;
+  case MIDOUT31:           // Register usage depends on MIDDLE
+    if (fft.shape.middle == 16) regs = 48;
+    else if (fft.shape.middle == 8) regs = 40;
+    else if (fft.shape.middle == 4) regs = 32;
+    else regs = -1;
+    use_override = "REGMO31";
+    break;
+  case MIDOUT61:           // Register usage depends on MIDDLE
+    if (fft.shape.middle == 16) regs = 96;
+    else if (fft.shape.middle == 8) regs = 64;
+    else if (fft.shape.middle == 4) regs = 64;
+    else regs = -1;
+    use_override = "REGMO61";
+    break;
+  }
+  int override_regs = args.value(use_override, 0);
+  // Allow command line to set CUDA launch_bounds rather than explicit maximum register count
+  if (override_regs && args.value("REGLB", 0)) return string("-DCUDA_MIN_BLOCKS=") + to_string(override_regs) + " ";
+  // Return the maximum register count
+  if (override_regs) regs = override_regs;
+  // Sometimes the results using default launch_bounds without setting an explicit maxrrregcount can't be beat
+  if (regs == -1) return string("");
+  // Format an explicit register count setting
+  return string("--maxrregcount=") + to_string(regs) + " ";
 #else
-#define CARRYFUSED_BLOCKS(x)  x
-#define MIDDLEIN_BLOCKS       ""
-#define MIDDLEOUT_BLOCKS      ""
-#define TAILSQUARE_BLOCKS     ""
+  return string("");
 #endif
+}
+
+#define ROE_SIZE 100000
+#define CARRY_SIZE 100000
 
 Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
   queue(q),
@@ -542,45 +679,43 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), queue, __VA_ARGS__)
 
-  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
+  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN).c_str()),
   K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH),
   K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2),
   K(ktailSquare,           "tailsquare.cl", "tailSquare",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2,                                                            // Single-wide tailSquare with one kernel
-                                               TAILSQUARE_BLOCKS),
+                                               hN / nH / 2, numCudaRegisters(TAIL).c_str()),                           // Single-wide tailSquare with one kernel
   K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2),
   K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
+  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT).c_str()),
   K(kfftW,                 "fftw.cl", "fftW", hN / nW),
 
-  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
+  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN31).c_str()),
   K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH),
-  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, TAILSQUARE_BLOCKS),
+  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2),
   K(ktailSquareGF31,       "tailsquare.cl", "tailSquareGF31",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2),                                                           // Single-wide tailSquare with one kernel
+                                               hN / nH / 2, numCudaRegisters(TAIL31).c_str()),                         // Single-wide tailSquare with one kernel
   K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2),
   K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
+  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT31).c_str()),
   K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW),
 
-  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), MIDDLEIN_BLOCKS),
+  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN61).c_str()),
   K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH),
   K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2),
   K(ktailSquareGF61,       "tailsquare.cl", "tailSquareGF61",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2,                                                            // Single-wide tailSquare with one kernel
-                                               TAILSQUARE_BLOCKS),
+                                               hN / nH / 2, numCudaRegisters(TAIL61).c_str()),                         // Single-wide tailSquare with one kernel
   K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2),
   K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), MIDDLEOUT_BLOCKS),
+  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT61).c_str()),
   K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW),
 
   K(kfftP,                 "fftp.cl", "fftP", hN / nW),
@@ -589,11 +724,11 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1"),
   K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1 -DROE=1"),
   K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, "-DLL=1"),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("")),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DROE=1")),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DMUL3=1")),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DMUL3=1 -DROE=1")),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, CARRYFUSED_BLOCKS("-DLL=1")),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, numCudaRegisters(CARRYFUSED).c_str()),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DROE=1").c_str()),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DMUL3=1").c_str()),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1").c_str()),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DLL=1").c_str()),
 
   K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN),
 
diff --git a/src/Gpu.h b/src/Gpu.h
index 32c0a407..09b6aa16 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -306,7 +306,7 @@ class Gpu {
   Saver<PRPState> *getSaver();
 
   void writeIn(Buffer<Word>& buf, const vector<u32> &words);
-  
+
   u64 dataResidue()  { return bufResidue(bufData); }
   u64 checkResidue() { return bufResidue(bufCheck); }
 
@@ -318,7 +318,6 @@ class Gpu {
   vector<u32> readCheck();
   vector<u32> readData();
 
-
   u32 getFFTSize() { return N; }
 
   // return A^h * B
@@ -339,6 +338,8 @@ class Gpu {
 private:
   u32 getProofPower(u64 k);
   void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
+  enum WHICH_KERNEL {CARRYFUSED=0, MIDIN=1, MIDIN31=2, MIDIN61=3, TAIL=4, TAIL31=5, TAIL61=6, MIDOUT=7, MIDOUT31=8, MIDOUT61=9};
+  string numCudaRegisters(enum WHICH_KERNEL which_kernel);
 };
 
 // Compute the size of an FFT/NTT data buffer depending on the FFT/NTT float/prime.  Size is returned in units of sizeof(double).
diff --git a/src/common.h b/src/common.h
index 2a2c0bce..9bd88471 100644
--- a/src/common.h
+++ b/src/common.h
@@ -6,6 +6,9 @@
 #include <string>
 #include <vector>
 
+// This is a copy of the args.verbose flag.  It allows the CUDA wrapper to access the flag.
+extern bool prpll_verbose;
+
 using u8  = uint8_t;
 using i32 = int32_t;
 using u32 = uint32_t;
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index ad69354d..1e3157af 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -533,7 +533,7 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   // Log register and shared memory usage per kernel when PRPLL_DUMP_PTX is set
   {
     static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
-    if (dumpPrefix) {
+    if (prpll_verbose || dumpPrefix) {
       int numRegs = 0, shmem = 0, localmem = 0, maxThreads = 0;
       cuFuncGetAttribute(&numRegs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
       cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
@@ -541,8 +541,10 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
       cuFuncGetAttribute(&maxThreads, CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK, k->func);
       fprintf(stderr, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads);
       // Also write to file since WSL2+CUDA swallows stderr
-      FILE* regLog = fopen("kernel_regs.log", "a");
-      if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads); fclose(regLog); }
+      if (dumpPrefix) {
+        FILE* regLog = fopen("kernel_regs.log", "a");
+	if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads); fclose(regLog); }
+      }
     }
   }
 
diff --git a/src/tune.cpp b/src/tune.cpp
index 978f485c..43401475 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -659,7 +659,7 @@ void Tune::tune() {
           log("Time for %12s using Trig frequently used load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
-        log("Best Trig frquently used load is %u.  Default is 0.\n", best_trig_load);
+        log("Best Trig frequently used load is %u.  Default is 0.\n", best_trig_load);
         loads = loads / 1000 * 1000 + best_trig_load * 100 + loads % 100;
         args->flags["LOADS" ] = to_string(loads);
       }
@@ -707,85 +707,6 @@ void Tune::tune() {
       args->flags["STORES"] = to_string(stores);
     }
 
-    // Find best CUDA compiler options
-#if CUDA_BACKEND
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_cfblks = 0;
-      u32 current_cfblks = args->value("CFBLKS", 0);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 cfblks : {0, 1, 2}) {
-        args->flags["CFBLKS"] = to_string(cfblks);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using CFBLKS=%u is %6.1f\n", fft.spec().c_str(), cfblks, cost);
-        if (cfblks == current_cfblks) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_cfblks = cfblks; }
-      }
-      log("Best CFBLKS is %u.  Default CFBLKS is 0.\n", best_cfblks);
-      configsUpdate(current_cost, best_cost, 0.000, "CFBLKS", best_cfblks, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["CFBLKS"] = to_string(best_cfblks);
-    }
-
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_miblks = 0;
-      u32 current_miblks = args->value("MIBLKS", 0);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 miblks : {0, 1, 2}) {
-        args->flags["MIBLKS"] = to_string(miblks);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MIBLKS=%u is %6.1f\n", fft.spec().c_str(), miblks, cost);
-        if (miblks == current_miblks) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_miblks = miblks; }
-      }
-      log("Best MIBLKS is %u.  Default MIBLKS is 0.\n", best_miblks);
-      configsUpdate(current_cost, best_cost, 0.000, "MIBLKS", best_miblks, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MIBLKS"] = to_string(best_miblks);
-    }
-
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_moblks = 0;
-      u32 current_moblks = args->value("MOBLKS", 0);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 moblks : {0, 1, 2}) {
-        args->flags["MOBLKS"] = to_string(moblks);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using MOBLKS=%u is %6.1f\n", fft.spec().c_str(), moblks, cost);
-        if (moblks == current_moblks) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_moblks = moblks; }
-      }
-      log("Best MOBLKS is %u.  Default MOBLKS is 0.\n", best_moblks);
-      configsUpdate(current_cost, best_cost, 0.000, "MOBLKS", best_moblks, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["MOBLKS"] = to_string(best_moblks);
-    }
-
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
-      u32 best_tsblks = 0;
-      u32 current_tsblks = args->value("TSBLKS", 0);
-      double best_cost = -1.0;
-      double current_cost = -1.0;
-      for (u32 tsblks : {0, 1, 2}) {
-        args->flags["TSBLKS"] = to_string(tsblks);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
-        log("Time for %12s using TSBLKS=%u is %6.1f\n", fft.spec().c_str(), tsblks, cost);
-        if (tsblks == current_tsblks) current_cost = cost;
-        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tsblks = tsblks; }
-      }
-      log("Best TSBLKS is %u.  Default TSBLKS is 0.\n", best_tsblks);
-      configsUpdate(current_cost, best_cost, 0.000, "TSBLKS", best_tsblks, newConfigKeyVals, suggestedConfigKeyVals);
-      args->flags["TSBLKS"] = to_string(best_tsblks);
-    }
-#endif
-
     // Find best FAST_BARRIER setting
     if (1 /*AMDGPU*/) {                 // FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
@@ -1116,6 +1037,28 @@ void Tune::tune() {
       args->flags["WMUL"] = to_string(best_wmul);
     }
 
+    // Find best CUDA compiler options
+#if CUDA_BACKEND
+    if (0) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_noreg = 0;
+      u32 current_noreg = args->value("NOREG", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 noreg : {0, 1}) {
+        args->flags["NOREG"] = to_string(noreg);
+        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using NOREG=%u is %6.1f\n", fft.spec().c_str(), noreg, cost);
+        if (noreg == current_noreg) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_noreg = noreg; }
+      }
+      log("Best NOREG is %u.  Default NOREG is 0.\n", best_noreg);
+      configsUpdate(current_cost, best_cost, 0.000, "NOREG", best_noreg, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["NOREG"] = to_string(best_noreg);
+    }
+#endif
+
     // Find best BIGLIT setting
     if (0 && time_FFTs) {        // Deprecated
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};

From 922a31b086e72b97c57532b10410c7572dc5b3b7 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 10 Apr 2026 00:54:45 +0000
Subject: [PATCH 025/214] Halved the number of bar() calls in middleShuffle

---
 src/cl/fft-middle.cl | 36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/src/cl/fft-middle.cl b/src/cl/fft-middle.cl
index 03203a89..2f75478c 100644
--- a/src/cl/fft-middle.cl
+++ b/src/cl/fft-middle.cl
@@ -352,12 +352,13 @@ void OVERLOAD middleShuffle(local T2 *lds, T2 *u) {
   u32 x = me % 16;
 
   for (int i = 0; i < MIDDLE; ++i) {
-//    lds[x * 16 + y] = u[i];
-    lds[x * 16 + y ^ x] = u[i];		// Swizzling with XOR should reduce LDS bank conflicts
+    lds[x * 16 + y ^ x] = u[i];         // Swizzling with XOR should reduce LDS bank conflicts, formerly "lds[x * 16 + y] = u[i];"
     bar();
-//    u[i] = lds[me];
-    u[i] = lds[y * 16 + x ^ y];
+    u[i] = lds[y * 16 + x ^ y];         // Formerly "u[i] = lds[me];"
+    if (++i == MIDDLE) break;
+    lds[y * 16 + x ^ y] = u[i];
     bar();
+    u[i] = lds[x * 16 + y ^ x];
   }
 }
 
@@ -626,12 +627,13 @@ void OVERLOAD middleShuffle(local F2 *lds, F2 *u) {
   u32 y = me / 16;
   u32 x = me % 16;
   for (int i = 0; i < MIDDLE; ++i) {
-//    lds[x * 16 + y] = u[i];
-    lds[x * 16 + y ^ x] = u[i];		// Swizzling with XOR should reduce LDS bank conflicts
+    lds[x * 16 + y ^ x] = u[i];         // Swizzling with XOR should reduce LDS bank conflicts, formerly "lds[x * 16 + y] = u[i];"
     bar();
-//    u[i] = lds[me];
-    u[i] = lds[y * 16 + x ^ y];
+    u[i] = lds[y * 16 + x ^ y];         // Formerly "u[i] = lds[me];"
+    if (++i == MIDDLE) break;
+    lds[y * 16 + x ^ y] = u[i];
     bar();
+    u[i] = lds[x * 16 + y ^ x];
   }
 }
 #endif
@@ -745,12 +747,13 @@ void OVERLOAD middleShuffle(local GF31 *lds, GF31 *u) {
   u32 y = me / 16;
   u32 x = me % 16;
   for (int i = 0; i < MIDDLE; ++i) {
-//    lds[x * 16 + y] = u[i];
-    lds[x * 16 + y ^ x] = u[i];		// Swizzling with XOR should reduce LDS bank conflicts
+    lds[x * 16 + y ^ x] = u[i];         // Swizzling with XOR should reduce LDS bank conflicts, formerly "lds[x * 16 + y] = u[i];"
     bar();
-//    u[i] = lds[me];
-    u[i] = lds[y * 16 + x ^ y];
+    u[i] = lds[y * 16 + x ^ y];         // Formerly "u[i] = lds[me];"
+    if (++i == MIDDLE) break;
+    lds[y * 16 + x ^ y] = u[i];
     bar();
+    u[i] = lds[x * 16 + y ^ x];
   }
 }
 
@@ -886,12 +889,13 @@ void OVERLOAD middleShuffle(local GF61 *lds, GF61 *u) {
   u32 y = me / 16;
   u32 x = me % 16;
   for (int i = 0; i < MIDDLE; ++i) {
-//    lds[x * 16 + y] = u[i];
-    lds[x * 16 + y ^ x] = u[i];		// Swizzling with XOR should reduce LDS bank conflicts
+    lds[x * 16 + y ^ x] = u[i];         // Swizzling with XOR should reduce LDS bank conflicts, formerly "lds[x * 16 + y] = u[i];"
     bar();
-//    u[i] = lds[me];
-    u[i] = lds[y * 16 + x ^ y];
+    u[i] = lds[y * 16 + x ^ y];         // Formerly "u[i] = lds[me];"
+    if (++i == MIDDLE) break;
+    lds[y * 16 + x ^ y] = u[i];
     bar();
+    u[i] = lds[x * 16 + y ^ x];
   }
 }
 

From 84d1d33dc2b80bfe606514e74464632d93b357e1 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 10 Apr 2026 19:41:56 +0000
Subject: [PATCH 026/214] Fixed bug where an NTT shape that nedded to
 interpolate from the maxbpw table incorrectly used the FP64 bpw table.

---
 src/FFTConfig.cpp | 8 ++------
 src/FFTConfig.h   | 3 +--
 src/tune.cpp      | 8 ++++----
 3 files changed, 7 insertions(+), 12 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index 5441392d..c1009845 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -126,10 +126,6 @@ FFTShape::FFTShape(enum FFT_TYPES t, const string& w, const string& m, const str
   FFTShape{t, parseInt(w), parseInt(m), parseInt(h)}
 {}
 
-FFTShape::FFTShape(u32 w, u32 m, u32 h) :
-  FFTShape(FFT64, w, m, h) {
-}
-
 FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
   fft_type{t}, width{w}, middle{m}, height{h} {
   assert(w && m && h);
@@ -142,7 +138,7 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
     bpw = it->second;
   } else {
     if (height > width) {
-      bpw = FFTShape{h, m, w}.bpw;
+      bpw = FFTShape{t, h, m, w}.bpw;
     } else {
       // Make up some defaults
 
@@ -156,7 +152,7 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
       while (w < h || w < 256 || w == 2048) { w *= 2; h /= 2; }
       while (h < 256) { h *= 2; m /= 2; }
       if (m == 1) m = 2;
-      bpw = FFTShape{w, m, h}.bpw;
+      bpw = FFTShape{t, w, m, h}.bpw;
       for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) bpw[j] -= 0.05f;   // Assume this fft spec is worse than measured fft specs
       if (this->isFavoredShape()) {  // Don't output this warning message for non-favored shapes (we expect the BPW info to be missing)
         printf("BPW info for %s not found, defaults={", s.c_str());
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index 1b139ea6..e16d610a 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -35,8 +35,7 @@ class FFTShape {
   u32 height = 0;
   array<float, NUM_BPW_ENTRIES> bpw;
 
-  FFTShape(u32 w = 1, u32 m = 1, u32 h = 1);
-  FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h);
+  FFTShape(enum FFT_TYPES t = FFT64, u32 w = 1, u32 m = 1, u32 h = 1);
   FFTShape(enum FFT_TYPES t, const string& w, const string& m, const string& h);
   explicit FFTShape(const string& spec);
 
diff --git a/src/tune.cpp b/src/tune.cpp
index 43401475..c00956f0 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -192,7 +192,7 @@ void Tune::ztune() {
 
   // Study a specific shape and variant
   if (0) {
-    FFTShape shape = FFTShape(512, 15, 512);
+    FFTShape shape = FFTShape(FFT64, 512, 15, 512);
     u32 variant = 202;
     u32 sample_size = 5;
     FFTConfig fft{shape, variant, CARRY_AUTO};
@@ -296,7 +296,7 @@ void Tune::ctune() {
     // log("tuning %10s with exponent %" PRIu64 "\n", fft.shape.spec().c_str(), exponent);
 
     vector<int> bestPos(configsVect.size());
-    Entry best{{1, 1, 1}, {}, 1e9};
+    Entry best{{}, {}, 1e9};
 
     for (u32 i = 0; i < configsVect.size(); ++i) {
       for (u32 pos = i ? 1 : 0; pos < configsVect[i].size(); ++pos) {
@@ -1192,7 +1192,7 @@ skip_1K_256 = 0;
           if (auto it = fastest_width_variants.find(shape.width); it != fastest_width_variants.end()) {
             fastest_width = it->second;
           } else {
-            FFTShape test = FFTShape(shape.width, 12, 256);
+            FFTShape test = FFTShape(FFT64, shape.width, 12, 256);
             double cost, min_cost = -1.0;
             for (u32 w = 0; w < N_VARIANT_W; w++) {
               if (w == 0 && !AMDGPU) continue;
@@ -1214,7 +1214,7 @@ skip_1K_256 = 0;
           if (auto it = fastest_height_variants.find(shape.height); it != fastest_height_variants.end()) {
             fastest_height = it->second;
           } else {
-            FFTShape test = FFTShape(shape.height, 12, shape.height);
+            FFTShape test = FFTShape(FFT64, shape.height, 12, shape.height);
             double cost, min_cost = -1.0;
             for (u32 h = 0; h < N_VARIANT_H; h++) {
               if (h == 0 && !AMDGPU) continue;

From 60a3b10988c949037aa5d9030749db5048669d81 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 11 Apr 2026 16:36:45 +0000
Subject: [PATCH 027/214] Implemented variant 2 width and height for FP32.
 Unfortunately, it was not faster on a nVidia 5070Ti mobile. For now, the new
 code is walled off with ENABLE_FP32_VARIANT_2.

---
 src/Gpu.cpp          |  18 ++--
 src/TrigBufCache.cpp | 120 ++++++++++++++++++++++
 src/TrigBufCache.h   |   6 +-
 src/cl/base.cl       |  22 ++++
 src/cl/fftbase.cl    | 237 +++++++++++++++++++++++++++++++++++++++++++
 src/cl/fftheight.cl  | 105 ++++++++++++++++++-
 src/cl/fftwidth.cl   | 145 +++++++++++++++++++++++++-
 src/cl/math.cl       |   4 +-
 src/cl/tailsquare.cl |  64 ++++++------
 9 files changed, 671 insertions(+), 50 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index a3983674..6012cfc7 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -114,17 +114,23 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
     vector<float> weightsIF32;
     // Inverse + Forward
     for (u32 thread = 0; thread < groupWidth; ++thread) {
-      auto iw = invWeight32(N, E, H, 0, thread, 0);
-      auto w = weight32(N, E, H, 0, thread, 0);
+      auto iw = invWeight32(N, E, H, 0, thread, 0) ;// * 17592186044416.0f;
+      auto w = weight32(N, E, H, 0, thread, 0) ;// * 0.0000002384185791015625f;
+      // Play with the weight so that optionalDouble and optionalHalve work
+      iw = 2.0f * boundUnderOne(iw);
+      w = 2.0f * w;
+      // Weights are scaled by 2^-24 and 2^48 so that multiplicaton by 1/epsilon does not generate infinty results (width and height variant 2).
+      iw = iw * 281474976710656.0f;
+      w = w * 0.000000059604644775390625f;
       // nVidia GPUs have a constant cache that only works on buffer sizes less than 64KB.  Create a smaller buffer
       // that is a copy of the first part of weightsIF.  There are several kernels that need the combined weightsIF
       // buffer, so there is an unfortunate duplication of these weights.
       if (!AmdGpu) {
-        weightsConstIF32.push_back(2 * boundUnderOne(iw));
-        weightsConstIF32.push_back(2 * w);
+        weightsConstIF32.push_back(iw);
+        weightsConstIF32.push_back(w);
       }
-      weightsIF32.push_back(2 * boundUnderOne(iw));
-      weightsIF32.push_back(2 * w);
+      weightsIF32.push_back(iw);
+      weightsIF32.push_back(w);
     }
 
     // the group order matches CarryA/M (not fftP/CarryFused).
diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index 0edb1f29..67c53d73 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -337,6 +337,58 @@ float2 root1FP32(u32 N, u32 k) {
   }
 }
 
+// Epsilon value, 2^-50, should have an exact representation as a float.  Used to avoid divide-by-zero in root1overFP32.
+const double epsilonFP32 = 8.8817841970012523233890533447266e-16;  // Protect against divide by zero
+
+// Returns the primitive root of unity of order N, to the power k.  Returned format is cosine, sine/cosine.
+float2 root1overFP32(u32 N, u32 k) {
+  assert(k < N);
+
+  double angle = M_PI * k / (N / 2);
+  double c = cos(angle);
+  double s = sin(angle);
+
+  if (c > -1.0e-15 && c < 1.0e-15) c = epsilonFP32;
+  s = s / c;
+  return {float(c), float(s)};
+}
+
+// Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value.
+float root1cosFP32(u32 N, u32 k) {
+  assert(k < N);
+
+  double angle = M_PI * k / (N / 2);
+  double c = cos(angle);
+
+  if (c > -1.0e-15 && c < 1.0e-15) c = epsilonFP32;
+  return float(c);
+}
+
+// Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value divided by another cosine value.
+float root1cosoverFP32(u32 N, u32 k, double over) {
+  assert(k < N);
+
+  double angle = M_PI * k / (N / 2);
+  double c = cos(angle);
+
+  if (c > -1.0e-15 && c < 1.0e-15) c = epsilonFP32;
+  return float(c / over);
+}
+
+// Interleave two lines of trig values so that AMD GPUs can use global_load_dwordx4 instructions
+void F2shuffle(u32 size, u32 radix, u32 line, vector<float> &tab) {
+  vector<float> line1, line2;
+  u32 line_size = size / radix;
+  for (u32 col = 0; col < line_size; ++col) {
+    line1.push_back(tab[line*line_size + col]);
+    line2.push_back(tab[(line+1)*line_size + col]);
+  }
+  for (u32 col = 0; col < line_size; ++col) {
+    tab[line*line_size + 2*col] = line1[col];
+    tab[line*line_size + 2*col + 1] = line2[col];
+  }
+}
+
 vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
   u32 WG = size / radix;
   vector<float2> tab;
@@ -348,6 +400,74 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
     }
   }
   tab.resize(size);
+
+// New fft_WIDTH and fft_HEIGHT
+// We need two versions of trig values.  One where we save one more mul and one where we don't.
+// In theory, we should always use save one more mul but the rocm optimizer is doing something weird in fft_WIDTH.
+
+  for (u32 save_one_more_mul = 0; save_one_more_mul <= 1; ++save_one_more_mul) {
+    vector<float> tab1;
+    if (save_one_more_mul) tab.resize(3*size);
+
+    // Sine/cosine values for first fft4 or fft8
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; ++col) {
+        float2 root = root1overFP32(size, col * line);
+        tab1.push_back(root.second);
+      }
+    }
+
+    // Sine/cosine values for later fft4 or fft8
+    for (u32 line = 0; line < radix; ++line) {
+      for (u32 col = 0; col < WG; col += radix) {
+        float2 root = root1overFP32(size, col * line);
+        tab1.push_back(root.second);
+      }
+    }
+
+    // Cosine values for first fft4 or fft8 (output in post-shufl order)
+    for (u32 grp = 0; grp < WG; ++grp) {
+      u32 line = grp / (WG/radix);  // Output "line" number, where each line multiplies a different u[i].  There are radix lines.  Each line has WG values.
+      for (u32 col = 0; col < radix; ++col) {
+        float divide_by = 1.0;
+        // Compute cosine3 / cosine1
+        if ((radix == 4 && line == 3) || (radix == 8 && save_one_more_mul && line == 3)) {
+          divide_by = root1cosFP32(size, col * (grp - 2*(WG/radix)));
+        }
+        // Compute cosine5 / cosine1, cosine6 / cosine2, cosine7 / cosine3
+        if (radix == 8 && ((save_one_more_mul && line == 5) || line == 6 || line == 7)) {
+          divide_by = root1cosFP32(size, col * (grp - 4*(WG/radix)));
+        }
+        tab1.push_back(root1cosoverFP32(size, col * grp, divide_by));
+      }
+    }
+
+    // Cosine values for later fft4 or fft8 (output in post-shufl order).  Similar to cosines above but output every radix-th value.
+    for (u32 grp = 0; grp < radix; ++grp) {
+      for (u32 col = 0; col < WG; col += radix) {
+        u32 line = col / (WG/radix);
+        double divide_by = 1.0;
+        // Compute cosine3 / cosine1
+        if ((radix == 4 && line == 3) || (radix == 8 && save_one_more_mul && line == 3)) {
+          divide_by = root1cosFP32(size, grp * (col - 2*(WG/radix)));
+        }
+        // Compute cosine5 / cosine1, cosine6 / cosine2, cosine7 / cosine3
+        if (radix == 8 && ((save_one_more_mul && line == 5) || line == 6 || line == 7)) {
+          divide_by = root1cosFP32(size, grp * (col - 4*(WG/radix)));
+        }
+        tab1.push_back(root1cosoverFP32(size, grp * col, divide_by));
+      }
+    }
+
+    // Interleave first fft4 or fft8 trig values for faster AMD GPU access
+    for (u32 i = 0; i < radix-2; i += 2) F2shuffle(size, radix, i, tab1);
+    for (u32 i = radix; i < 2*radix; i += 2) F2shuffle(size, radix, i, tab1);
+
+    // Convert to a vector of float2
+    for (u32 i = 0; i < tab1.size(); i += 2) tab.push_back({tab1[i], tab1[i+1]});
+  }
+
+  tab.resize(5*size);
   return tab;
 }
 
diff --git a/src/TrigBufCache.h b/src/TrigBufCache.h
index d5e5317a..1808b355 100644
--- a/src/TrigBufCache.h
+++ b/src/TrigBufCache.h
@@ -57,14 +57,14 @@ float2 root1FP32(u32 N, u32 k);
 uint2 root1GF31(u32 N, u32 k);
 ulong2 root1GF61(u32 N, u32 k);
 
-// Compute the size of the largest possible trig buffer given width, middle, height (in number of float2 values)
+// Compute the size of the largest possible trig buffer given width, middle, height (in number of double2 values)
 #define SMALLTRIG_FP64_SIZE(W,M,H,nH)           (W != H || H == 0 ? W * 5 : SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)) // See genSmallTrigFP64
 #define SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)      (H * 5 + (W * M / 2 + 1) * 2 * H / nH)                          // See genSmallTrigComboFP64
 #define MIDDLETRIG_FP64_SIZE(W,M,H)             (H + W + H)                                                     // See genMiddleTrigFP64
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of float2 values)
-#define SMALLTRIG_FP32_SIZE(W,M,H,nH)           (W != H || H == 0 ? W : SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH))     // See genSmallTrigFP32
-#define SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)      (H + (W * M / 2 + 1) * 2 * H / nH)                              // See genSmallTrigComboFP32
+#define SMALLTRIG_FP32_SIZE(W,M,H,nH)           (W != H || H == 0 ? W * 5 : SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)) // See genSmallTrigFP32
+#define SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)      (H * 5 + (W * M / 2 + 1) * 2 * H / nH)                          // See genSmallTrigComboFP32
 #define MIDDLETRIG_FP32_SIZE(W,M,H)             (H + W + H)                                                     // See genMiddleTrigFP32
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of uint2 values)
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 545dbb91..2fc32c06 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -268,12 +268,14 @@ ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2)
 typedef constant const T2* Trig;
 typedef constant const T* TrigSingle;
 typedef constant const F2* TrigFP32;
+typedef constant const F* TrigSingleFP32;
 typedef constant const GF31* TrigGF31;
 typedef constant const GF61* TrigGF61;
 #else
 typedef global const T2* Trig;
 typedef global const T* TrigSingle;
 typedef global const F2* TrigFP32;
+typedef global const F* TrigSingleFP32;
 typedef global const GF31* TrigGF31;
 typedef global const GF61* TrigGF61;
 #endif
@@ -334,6 +336,11 @@ F2 OVERLOAD L2LOAD(CP(F2) mem) {
   __asm("ld.global.cg.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
   return retval;
 }
+F OVERLOAD L2LOAD(TrigSingleFP32 mem) {
+  F retval;
+  __asm("ld.global.cg.f32  %0, [%1];" : "=f"(retval) : "l"(mem));
+  return retval;
+}
 i64 OVERLOAD L2LOAD(i64 *mem) {
   i64 retval;
   __asm("ld.global.cg.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
@@ -395,6 +402,11 @@ F2 OVERLOAD EFLOAD(CP(F2) mem) {
   __asm("ld.global.cs.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
   return retval;
 }
+F OVERLOAD EFLOAD(TrigSingleFP32 mem) {
+  F retval;
+  __asm("ld.global.cs.f32  %0, [%1];" : "=f"(retval) : "l"(mem));
+  return retval;
+}
 i64 OVERLOAD EFLOAD(i64 *mem) {
   i64 retval;
   __asm("ld.global.cs.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
@@ -456,6 +468,11 @@ F2 OVERLOAD LULOAD(TrigFP32 mem) {
   __asm("ld.global.lu.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
   return retval;
 }
+F OVERLOAD LULOAD(TrigSingleFP32 mem) {
+  F retval;
+  __asm("ld.global.lu.f32  %0, [%1];" : "=f"(retval) : "l"(mem));
+  return retval;
+}
 i64 OVERLOAD LULOAD(i64 *mem) {
   i64 retval;
   __asm("ld.global.lu.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
@@ -498,6 +515,11 @@ F2 OVERLOAD NCLOAD(TrigFP32 mem) {
   __asm("ld.global.nc.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
   return retval;
 }
+F OVERLOAD NCLOAD(TrigSingleFP32 mem) {
+  F retval;
+  __asm("ld.global.nc.f32  %0}, [%1];" : "=f"(retval) : "l"(mem));
+  return retval;
+}
 i64 OVERLOAD NCLOAD(i64 *mem) {
   i64 retval;
   __asm("ld.global.nc.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 88cd3380..7f581728 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -581,6 +581,243 @@ void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
   }
 }
 
+//************************************************************************************
+// New fft WIDTH and HEIGHT macros to support radix-4 FFTs with more FMA instructions
+//************************************************************************************
+
+// Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
+// We're trying to calculate u * U2(cosine,sine).
+// real = (u.x - u.y*sine_over_cosine) * cosine
+// imag = (u.x*sine_over_cosine + u.y) * cosine
+F2 partial_cmul(F2 u, F sine_over_cosine) {
+  return U2(fma(-u.y, sine_over_cosine, u.x), fma(u.x, sine_over_cosine, u.y));
+}
+
+// Copy of macro from fft4 and fft8 with FMAs added
+#define X2_via_FMA(a, c, b) { F2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
+
+// Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
+void preload_tabMul4_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+
+  // Read 3 lines of sine/cosine values for the first fft4.  Read two of the lines as a pair as AMD likes T2 global memory reads
+  TrigFP32 trig2 = (TrigFP32) trig1;
+  F2 sine_over_cosines = TFLOAD(&trig2[me]);
+  preloads[0] = sine_over_cosines.x;
+  preloads[1] = sine_over_cosines.y;
+  // Read 3rd line
+  preloads[2] = TFLOAD(&trig1[2*WG + me]);
+}
+
+// Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
+void partial_tabMul4(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
+  local F *lds1 = (local F *) lds;
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+  trig1 += 4*WG;                // Skip past sine_over_cosine values
+
+  // Use LDS memory to distribute preloaded trig values.
+  if (f > 1) {
+    bar(WG);
+    lds1[me] = preloads[4];     // Preloaded sine/cosine values
+    lds1[WG+me] = preloads[5];  // Preloaded cosine values
+  }
+
+  // Apply sine/cosines
+  bar(WG);
+  for (u32 i = 1; i < 4; ++i) {
+    F sine_over_cosine;
+    if (f == 1) sine_over_cosine = preloads[i-1];
+    else sine_over_cosine = lds1[i*(WG/4) + (me/f)*(f/4)];
+    u[i] = partial_cmul(u[i], sine_over_cosine);
+  }
+
+  // Preload cosines for finishing first tabMul (done after using up preloaded sine/cosine values).  Hopefully, shufl will hide the latency.
+  if (f == 1) {
+    // Read pairs of lines to make AMD happy with T2 global memory loads
+    for (u32 i = 0; i < 4; i += 2) {
+      TrigFP32 trig2 = (TrigFP32) (trig1 + i*WG);
+      F2 cosines = TFLOAD(&trig2[me]);
+      preloads[i] = cosines.x;
+      preloads[i+1] = cosines.y;
+    }
+  }
+  else {
+    // Load cosine1, cosine2, cosine3/cosine1
+    if (f < WG/4) preloads[0] = lds1[WG + ((me/f) & 3) * WG/4 + (0 * WG + me)/(4*f) * f/4];
+    preloads[2] = lds1[WG + ((me/f) & 3) * WG/4 + (2 * WG + me)/(4*f) * f/4];
+    preloads[3] = lds1[WG + ((me/f) & 3) * WG/4 + (3 * WG + me)/(4*f) * f/4];
+    preloads[1] = lds1[WG + ((me/f) & 3) * WG/4 + (1 * WG + me)/(4*f) * f/4];
+  }
+}
+
+// Finish off a partial tabMul while doing next fft4 making more use of FMA.
+void finish_tabMul4_fft4(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+
+  //
+  // Mimic a traditional fft4 but use FMA instructions to apply the cosine multiplies.
+  //
+
+  // Apply cosine0 to u[0]
+  if (f < WG/4) u[0] = u[0] * preloads[0];
+
+  // Apply cosine2, cosine3/cosine1 to u[2] and u[3] using FMA
+  X2_via_FMA(u[0], preloads[2], u[2]);
+  X2_via_FMA(u[1], preloads[3], u[3]);  u[3] = mul_t4(u[3]);
+
+  // Preload one line of sine/cosines and one line of cosines for later tabMuls.  We'll later broadcast these values as needed using LDS.
+  if (f == 1) {
+    preloads[4] = TFLOAD(&trig1[3*WG + me]);             // Sine/cosines for later tabMuls
+    preloads[5] = TFLOAD(&trig1[4*WG + 4*WG + me]);      // Cosines for later tabMuls
+  }
+
+  // Do the last level of fft4 applying cosine1
+  X2_via_FMA(u[0], preloads[1], u[1]);
+  X2_via_FMA(u[2], preloads[1], u[3]);
+
+  // revbin [0, 2, 1, 3] undo
+  SWAP(u[1], u[2]);
+}
+
+//************************************************************************************
+// New fft WIDTH and HEIGHT macros to support radix-8 FFTs with more FMA instructions
+//************************************************************************************
+
+// Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
+void preload_tabMul8_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+
+  // Read 7 lines of sine/cosine values for the first fft8.  Read six of the lines as pairs as AMD likes T2 global memory reads
+  for (u32 i = 1; i < 7; i += 2) {
+    TrigFP32 trig2 = (TrigFP32) (trig1 + (i-1)*WG);
+    F2 sine_over_cosines = TFLOAD(&trig2[me]);
+    preloads[i-1] = sine_over_cosines.x;
+    preloads[i] = sine_over_cosines.y;
+  }
+  // Read 7th line
+  preloads[6] = TFLOAD(&trig1[6*WG + me]);
+}
+
+// Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
+void partial_tabMul8(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
+  local F *lds1 = (local F *) lds;
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+  trig1 += 8*WG;                // Skip past sine_over_cosine values
+
+  // Use LDS memory to distribute preloaded trig values.
+  if (f > 1) {
+    bar(WG);
+    lds1[me] = preloads[8];     // Preloaded sine/cosine values
+    lds1[WG+me] = preloads[9];  // Preloaded cosine values
+  }
+
+  // Apply sine/cosines
+  bar(WG);
+  for (u32 i = 1; i < 8; ++i) {
+    F sine_over_cosine;
+    if (f == 1) sine_over_cosine = preloads[i-1];
+    else sine_over_cosine = lds1[i*(WG/8) + (me/f)*(f/8)];
+    u[i] = partial_cmul(u[i], sine_over_cosine);
+  }
+
+  // Preload cosines for finishing first tabMul (done after using up preloaded sine/cosine values).  Hopefully, shufl will hide the latency.
+  if (f == 1) {
+    // Read pairs of lines to make AMD happy with T2 global memory loads
+    for (u32 i = 0; i < 8; i += 2) {
+      TrigFP32 trig2 = (TrigFP32) (trig1 + i*WG);
+      F2 cosines = TFLOAD(&trig2[me]);
+      preloads[i] = cosines.x;
+      preloads[i+1] = cosines.y;
+    }
+  }
+  else {
+    // Load cosine4, cosine5/cosine1, cosine6/cosine2, cosine7/cosine3, cosine2, cosine3/cosine1, cosine1
+    // Load them in the order they will be used, though it probably won't matter.
+    if (f < WG/8) preloads[0] = lds1[WG + ((me/f) & 7) * WG/8 + (0 * WG + me)/(8*f) * f/8];
+    preloads[1] = lds1[WG + ((me/f) & 7) * WG/8 + (1 * WG + me)/(8*f) * f/8];
+    preloads[4] = lds1[WG + ((me/f) & 7) * WG/8 + (4 * WG + me)/(8*f) * f/8];
+    preloads[5] = lds1[WG + ((me/f) & 7) * WG/8 + (5 * WG + me)/(8*f) * f/8];
+    preloads[6] = lds1[WG + ((me/f) & 7) * WG/8 + (6 * WG + me)/(8*f) * f/8];
+    preloads[7] = lds1[WG + ((me/f) & 7) * WG/8 + (7 * WG + me)/(8*f) * f/8];
+    preloads[2] = lds1[WG + ((me/f) & 7) * WG/8 + (2 * WG + me)/(8*f) * f/8];
+    preloads[3] = lds1[WG + ((me/f) & 7) * WG/8 + (3 * WG + me)/(8*f) * f/8];
+  }
+}
+
+// Finish off a partial tabMul while doing next fft8 making more use of FMA.
+void finish_tabMul8_fft8(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+  TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
+
+  //
+  // Mimic a traditional fft8 but use FMA instructions to apply the cosine multiplies.
+  //
+
+  // Apply cosine0 to u[0]
+  if (f < WG/8) u[0] = u[0] * preloads[0];
+
+  if (save_one_more_mul) {   // This should always be the best option.  ROCm optimizer is doing something weird in new_fft_WIDTH case.
+
+    // Apply cosine4, cosine5/cosine1, cosine6/cosine2, cosine7/cosine3 to u[4] through u[7] using FMA
+    X2_via_FMA(u[0], preloads[4], u[4]);
+    X2_via_FMA(u[1], preloads[5], u[5]);  u[5] = mul_t8_delayed(u[5]);
+    X2_via_FMA(u[2], preloads[6], u[6]);  u[6] = mul_t4(u[6]);
+    X2_via_FMA(u[3], preloads[7], u[7]);  u[7] = mul_3t8_delayed(u[7]);
+
+    // Preload one line of sine/cosines and one line of cosines for second tabMul.  We'll later broadcast these values as needed using LDS.
+    if (f == 1) {
+      preloads[8] = TFLOAD(&trig1[7*WG + me]);             // Sine/cosines for second tabMul
+      preloads[9] = TFLOAD(&trig1[8*WG + 8*WG + me]);      // Cosines for second tabMul
+    }
+
+    // Do the fft4Core and fft4CoreSpecial applying cosine2, cosine3/cosine1
+    X2_via_FMA(u[0], preloads[2], u[2]);
+    X2_via_FMA(u[4], preloads[2], u[6]);
+    X2_via_FMA(u[1], preloads[3], u[3]);  u[3] = mul_t4(u[3]);
+    X2_via_FMA(u[5], preloads[3], u[7]);  u[7] = mul_t4(u[7]);
+
+    // Do last level of fft8 applying cosine1
+//TODO: Save this MUL by SQRT(1/2) by pre-computing cosine1*SQRTHALF
+    F cosine1_SQRT1_2 = preloads[1] * (float) M_SQRT1_2;
+    X2_via_FMA(u[0], preloads[1], u[1]);
+    X2_via_FMA(u[2], preloads[1], u[3]);
+    X2_via_FMA(u[4], cosine1_SQRT1_2, u[5]);
+    X2_via_FMA(u[6], cosine1_SQRT1_2, u[7]);
+
+  } else {
+
+    // Apply cosine to u[1]
+    u[1] = u[1] * preloads[1];
+
+    // Apply cosine4, cosine5, cosine6/cosine2, cosine7/cosine3 to u[4] through u[7] using FMA
+    X2_via_FMA(u[0], preloads[4], u[4]);
+    X2_via_FMA(u[1], preloads[5], u[5]);  u[5] = mul_t8_delayed(u[5]);
+    X2_via_FMA(u[2], preloads[6], u[6]);  u[6] = mul_t4(u[6]);
+    X2_via_FMA(u[3], preloads[7], u[7]);  u[7] = mul_3t8_delayed(u[7]);
+
+    // Preload one line of sine/cosines and one line of cosines for second tabMul.  We'll later broadcast these values as needed using LDS.
+    if (f == 1) {
+      preloads[8] = TFLOAD(&trig1[7*WG + me]);             // Sine/cosines for second tabMul
+      preloads[9] = TFLOAD(&trig1[8*WG + 8*WG + me]);      // Cosines for second tabMul
+    }
+
+    // Do the fft4Core and fft4CoreSpecial applying cosine2, cosine3
+    X2_via_FMA(u[0], preloads[2], u[2]);
+    X2_via_FMA(u[4], preloads[2], u[6]);
+    X2_via_FMA(u[1], preloads[3], u[3]);  u[3] = mul_t4(u[3]);
+    X2_via_FMA(u[5], preloads[3], u[7]);  u[7] = mul_t4(u[7]);
+
+    // Do last level of fft8
+    X2(u[0], u[1]);
+    X2(u[2], u[3]);
+    X2_apply_delay(u[4], u[5]);
+    X2_apply_delay(u[6], u[7]);
+  }
+
+  // revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+
 #endif
 
 
diff --git a/src/cl/fftheight.cl b/src/cl/fftheight.cl
index 49323782..80e148db 100644
--- a/src/cl/fftheight.cl
+++ b/src/cl/fftheight.cl
@@ -203,8 +203,109 @@ void OVERLOAD fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u
   fft_NH(u);
 }
 
-void new_fft_HEIGHT1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
-void new_fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+void OVERLOAD new_fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
+  u32 WG = SMALL_HEIGHT / NH;
+
+  // This line mimics shufl -- partition lds
+  local F2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * SMALL_HEIGHT * sb / sizeof(F2);
+
+// Custom code for various SMALL_HEIGHT values
+
+#if ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 256 && NH == 4 && FFT_VARIANT_H == 2
+
+// Custom code for SMALL_HEIGHT=256, NH=4
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
+
+  // Finish third tabMul and perform final fft4.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+
+#elif ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 512 && NH == 8 && FFT_VARIANT_H == 2
+
+// Custom code for SMALL_HEIGHT=512, NH=8
+
+  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8 + 2*WG*8;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NH, 8, numWG, sb, lowMe);
+
+  // Finish second tabMul and perform final fft8.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 1);
+
+#elif ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 1024 && NH == 4 && FFT_VARIANT_H == 2
+
+// Custom code for SMALL_HEIGHT=1024, NH=4
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
+
+  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NH, 64, numWG, sb, lowMe);
+
+  // Finish fourth tabMul and perform final fft4.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
+
+#else
+
+  // Old version
+  fft_HEIGHT(lds, u, trig, numWG, sb, lowMe);
+
+#endif
+}
+
+void new_fft_HEIGHT1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, numWG, sb, lowMe, 1); }
+void new_fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, numWG, sb, lowMe, 2); }
 
 #endif
 
diff --git a/src/cl/fftwidth.cl b/src/cl/fftwidth.cl
index 03935149..11c5d1cf 100644
--- a/src/cl/fftwidth.cl
+++ b/src/cl/fftwidth.cl
@@ -73,7 +73,7 @@ void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb
 // To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
 // The downside is sine/cosine cannot be computed with chained multiplies.
 
-void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowMe, const u32 sb, int callnum) {
+void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
   u32 WG = WIDTH / NW;
 
   // This line mimics shufl -- partition lds
@@ -203,8 +203,8 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowM
 }
 
 // There are two version of new_fft_WIDTH in case we want to try saving some trig values from new_fft_WIDTH1 in LDS memory for later use in new_fft_WIDTH2.
-void OVERLOAD new_fft_WIDTH1(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, lowMe, sb, 1); }
-void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, lowMe, sb, 2); }
+void OVERLOAD new_fft_WIDTH1(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 1); }
+void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 2); }
 
 #endif
 
@@ -239,8 +239,143 @@ void OVERLOAD fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u3
   fft_NW(u);
 }
 
-void OVERLOAD new_fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
-void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+// New fft_WIDTH that uses more FMA instructions than the old fft_WIDTH.
+// The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
+// To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
+// The downside is sine/cosine cannot be computed with chained multiplies.
+
+void OVERLOAD new_fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
+  u32 WG = WIDTH / NW;
+
+  // This line mimics shufl -- partition lds
+  local F2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * WIDTH * sb / sizeof(F2);
+
+// Custom code for various WIDTH values
+
+#if ENABLE_FP32_VARIANT_2 && WIDTH == 256 && NW == 4 && FFT_VARIANT_W == 2
+
+// Custom code for WIDTH=256, NW=4
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
+
+  // Finish third tabMul and perform final fft4.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+
+#elif ENABLE_FP32_VARIANT_2 && WIDTH == 512 && NW == 8 && FFT_VARIANT_W == 2
+
+// Custom code for WIDTH=512, NW=8
+
+  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8;               // Skip past old FFT_width trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
+
+  // Finish second tabMul and perform final fft8.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+
+#elif ENABLE_FP32_VARIANT_2 && WIDTH == 1024 && NW == 4 && FFT_VARIANT_W == 2
+
+// Custom code for WIDTH=1024, NW=4
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
+
+  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
+
+  // Finish fourth tabMul and perform final fft4.
+  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
+
+#elif ENABLE_FP32_VARIANT_2 && WIDTH == 4096 && NW == 8 && FFT_VARIANT_W == 2
+
+// Custom code for WIDTH=4K, NW=8
+
+  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
+
+  // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
+
+  // Finish third tabMul and perform final fft8.
+  finish_tabMul8_fft8(WG, trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+
+#else
+
+  // Old version
+  fft_WIDTH(lds, u, trig, numWG, sb, lowMe);
+
+#endif
+}
+
+// There are two version of new_fft_WIDTH in case we want to try saving some trig values from new_fft_WIDTH1 in LDS memory for later use in new_fft_WIDTH2.
+void OVERLOAD new_fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 1); }
+void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 2); }
 
 #endif
 
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 28401a7b..51829cb6 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -454,7 +454,7 @@ void cmul_a_by_fancyb_and_conjfancyb(F2 *res1, F2 *res2, F2 a, F2 b) {
 
 F2 OVERLOAD mul_t4(F2 a)  { return U2(-a.y, a.x); } // i.e. a * i
 
-F2 OVERLOAD mul_t8(F2 a)  { // mul(a, U2(1, 1)) * (T)(M_SQRT1_2); }
+F2 OVERLOAD mul_t8(F2 a)  { // mul(a, U2(1, 1)) * (F)(M_SQRT1_2); }
   // One mul, two FMAs
   F ay = a.y * (float) M_SQRT1_2;
   return U2(fma(a.x, (float) M_SQRT1_2, -ay), fma(a.x, (float) M_SQRT1_2, ay));
@@ -462,7 +462,7 @@ F2 OVERLOAD mul_t8(F2 a)  { // mul(a, U2(1, 1)) * (T)(M_SQRT1_2); }
 //  return U2(a.x - a.y, a.x + a.y) * M_SQRT1_2;
 }
 
-F2 OVERLOAD mul_3t8(F2 a) { // mul(a, U2(-1, 1)) * (T)(M_SQRT1_2); }
+F2 OVERLOAD mul_3t8(F2 a) { // mul(a, U2(-1, 1)) * (F)(M_SQRT1_2); }
   // One mul, two FMAs
   F ay = a.y * (float) M_SQRT1_2;
   return U2(fma(-a.x, (float) M_SQRT1_2, -ay), fma(a.x, (float) M_SQRT1_2, -ay));
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 29832a8b..48f49aa5 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -83,12 +83,12 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   T2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -127,8 +127,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds + zerohack, v, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, v, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS == 2
@@ -177,8 +177,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out, memline2, me);
   writeTailFusedLine(u, out, memline1, me);
@@ -367,12 +367,12 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -407,18 +407,18 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(inF2, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds + zerohack, v, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, v, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
 
-  // Compute trig values from scratch.  Good on GPUs with high DP throughput.
+  // Compute trig values from scratch.  Good on GPUs with high FP throughput.
 #if TAIL_TRIGS32 == 2
   F2 trig = slowTrig_N(line1 + me * H, ND / NH);
 
-  // Do a little bit of memory access and a little bit of DP math.  Good on a Radeon VII.
+  // Do a little bit of memory access and a little bit of FP math.
 #elif TAIL_TRIGS32 == 1
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
-  u32 height_trigs = SMALL_HEIGHT*1;
+  u32 height_trigs = SMALL_HEIGHT*5;
   // Read a hopefully cached line of data and one non-cached F2 per line
   F2 trig = TFLOAD(&smallTrigF2[height_trigs + me]);                    // Trig values for line zero, should be cached
   F2 mult = TSLOAD(&smallTrigF2[height_trigs + G_H + line1]);           // Line multiplier
@@ -428,7 +428,7 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
-  u32 height_trigs = SMALL_HEIGHT*1;
+  u32 height_trigs = SMALL_HEIGHT*5;
   // Read pre-computed trig values
   F2 trig = TOLOAD(&smallTrigF2[height_trigs + line1*G_H + me]);
 #endif
@@ -457,8 +457,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, outF2, memline2, me);
   writeTailFusedLine(u, outF2, memline1, me);
@@ -522,15 +522,15 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
   new_fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 2, SHUFL_BYTES_H, lowMe);
 
-  // Compute trig values from scratch.  Good on GPUs with high DP throughput.
+  // Compute trig values from scratch.  Good on GPUs with high FP throughput.
 #if TAIL_TRIGS32 == 2
   F2 trig = slowTrig_N(line + H * lowMe, ND / NH * 2);
 
-  // Do a little bit of memory access and a little bit of DP math.  Good on a Radeon VII.
+  // Do a little bit of memory access and a little bit of FP math.
 #elif TAIL_TRIGS32 == 1
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
-  u32 height_trigs = SMALL_HEIGHT*1;
+  u32 height_trigs = SMALL_HEIGHT*5;
   // Read a hopefully cached line of data and one non-cached F2 per line
   F2 trig = TFLOAD(&smallTrigF2[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
   F2 mult = TSLOAD(&smallTrigF2[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
@@ -540,7 +540,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #else
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
   // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
-  u32 height_trigs = SMALL_HEIGHT*1;
+  u32 height_trigs = SMALL_HEIGHT*5;
   // Read pre-computed trig values
   F2 trig = TOLOAD(&smallTrigF2[height_trigs + line_u*G_H*2 + me]);
 #endif
@@ -664,12 +664,12 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -704,8 +704,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in31, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds + zerohack, v, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, v, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS31 >= 1
@@ -750,8 +750,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out31, memline2, me);
   writeTailFusedLine(u, out31, memline1, me);
@@ -952,12 +952,12 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   reverse(G_H, lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
   reverse(G_H, lds, u + NH/2, !which);
 
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -992,8 +992,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in61, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  fft_HEIGHT(lds + zerohack, u, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds + zerohack, v, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT1(lds + zerohack, v, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS61 >= 1
@@ -1038,8 +1038,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
+  new_fft_HEIGHT2(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
 
   writeTailFusedLine(v, out61, memline2, me);
   writeTailFusedLine(u, out61, memline1, me);

From fef7c3adb9808edb034c6573de5977bf33cf1a1b Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 11 Apr 2026 20:44:10 +0000
Subject: [PATCH 028/214] If type 2 NTTs (GF31 + GF61), replaced two 64-bit
 shifts with one 64-bit shift and one 32-bit shift. It probably makes little
 speed difference.

---
 src/cl/carryutil.cl | 4 ++--
 src/cl/math.cl      | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 4e04812b..f31fdace 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -427,8 +427,8 @@ i96 weightAndCarryOne(Z31 u31, Z61 u61, u32 m31_invWeight, u32 m61_invWeight, bo
   *maxROE = max(*maxROE, roundoff);
 
   // Compute the value using i96 math
-  i64 vhi = n61 >> 33;
-  u64 vlo = ((u64)n61 << 31) | n31;
+  i64 vhi = n61 >> 1;
+  u32 vlo = ((u32)n61 << 31) | n31;
   i96 value = make_i96(vhi, vlo);                // (n61 << 31) + n31
   value = sub(value, n61);                       // n61 * M31 + n31
 
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 51829cb6..74f343e2 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -18,6 +18,7 @@ i32 OVERLOAD hi32(i64 x) { uint2 x2 = as_uint2(x); return (i32)x2.y; }
 typedef struct { i32 hi32; u32 mid32; u32 lo32; } i96;
 i96 OVERLOAD make_i96(i64 v) { i96 val; val.lo32 = lo32(v); val.mid32 = hi32(v); val.hi32 = (i32)val.mid32 >> 31; return val; }
 i96 OVERLOAD make_i96(i32 v) { i96 val; val.lo32 = v; val.mid32 = val.hi32 = (i32)val.lo32 >> 31; return val; }
+i96 OVERLOAD make_i96(i64 hi, u32 lo) { i96 val; val.hi32 = hi32(hi); val.mid32 = lo32(hi); val.lo32 = lo; return val; }
 i96 OVERLOAD make_i96(i64 hi, u64 lo) { i96 val; val.hi32 = hi; val.mid32 = hi32(lo); val.lo32 = lo32(lo); return val; }
 i96 OVERLOAD make_i96(i32 hi, u64 lo) { i96 val; val.hi32 = hi; val.mid32 = hi32(lo); val.lo32 = lo32(lo); return val; }
 u32 i96_hi32(i96 val) { return val.hi32; }

From f4bbd40e0a9c5c2364760c75b848ffa8e1df7374 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 13 Apr 2026 08:41:06 +0000
Subject: [PATCH 029/214] Cleaned up all code that dealt with splitting 64-bit
 values or combining 32-bit values. No more >> 32 or << 32 code.  This
 generates cleaner PTX code. Faster carry propagation in type-4 FFTs.

---
 src/cl/carryutil.cl        | 50 ++++++++++++++++++++++++--------------
 src/cl/math.cl             | 49 ++++++++++++++++++++++++++++++-------
 src/cuda/opencl_compat.cuh | 44 +++++++++------------------------
 3 files changed, 84 insertions(+), 59 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index f31fdace..5a77e511 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -285,7 +285,7 @@ i64 weightAndCarryOne(Z61 u, u32 invWeight, i64 inCarry, u32* maxROE) {
   i64 value = get_balanced_Z61(u);
 
   // Optionally calculate roundoff error as proximity to M61/2.  28 bits of accuracy should be sufficient.
-  u32 roundoff = (u32) abs((i32) (value >> 32));
+  u32 roundoff = (u32) abs((i32) hi32(value));
   *maxROE = max(*maxROE, roundoff);
 
   // Mul by 3 and add carry
@@ -375,9 +375,9 @@ i96 weightAndCarryOne(float uF2, Z61 u61, float F2_invWeight, u32 m61_invWeight,
   u61 = shr(u61, m61_invWeight);
   u64 n61 = get_Z61(u61);
 
-  // The final result must be n61 mod M61.  Use FP32 data to calculate this value.
-  float n61f = (float)((u32)(n61 >> 32)) * -4294967296.0f;                    // Conversion from u64 to float might be slow, this might be faster
-  uF2 = fma(uF2, F2_invWeight, n61f);                                         // This should be close to a multiple of M61
+  // The final result mod M61 must be n61.  Use FP32 data to calculate how many multiples of M61 need to be added to n61.
+  float n61f = (float)hi32(n61) * -4294967296.0f;                             // Estimate -n61 as a float.
+  uF2 = fma(uF2, F2_invWeight, n61f);                                         // This should be close to an integer multiple of M61
   float uF2int = fma(uF2, 4.3368086899420177360298112034798e-19f, RNDVAL);    // Divide by M61 and round to int
   i32 nF2 = RNDVALfloatToInt(uF2int);
 
@@ -423,7 +423,7 @@ i96 weightAndCarryOne(Z31 u31, Z61 u61, u32 m31_invWeight, u32 m61_invWeight, bo
   i64 n61 = get_balanced_Z61(u61);
 
   // Optionally calculate roundoff error as proximity to M61/2.  28 bits of accuracy should be sufficient.
-  u32 roundoff = (u32) abs((i32)(n61 >> 32));
+  u32 roundoff = (u32) abs((i32)hi32(n61));
   *maxROE = max(*maxROE, roundoff);
 
   // Compute the value using i96 math
@@ -458,20 +458,34 @@ i128 weightAndCarryOne(float uF2, Z31 u31, Z61 u61, float F2_invWeight, u32 m31_
   u61 = subq(u61, make_Z61(n31), 2);                 // u61 - u31
   u61 = add(u61, shl(u61, 31));                      // u61 + (u61 << 31)
   u64 n61 = get_Z61(u61);
+  // Let's call the 92-bit CRT result n3161.  At this point, n3161 = n61 * M31 + n31.
 
-  i128 n3161 = make_i128(n61 >> 33, (n61 << 31) | n31);  // n61 << 31 + n31
-  n3161 = sub(n3161, n61);                               // n61 * M31 + n31
-
-  // The final result must be n3161 mod M31*M61.  Use FP32 data to calculate this value.
-  float n3161f = (float)((u32)(n61 >> 32)) * -9223372036854775808.0f;        // Converting n3161 from i128 to float might be slow, this might be faster
-  uF2 = fma(uF2, F2_invWeight, n3161f);                                      // This should be close to a multiple of M31*M61
+  // The final result mod M31*M61 must be n3161.  Use FP32 data to calculate how many multiples of M31*M61 need to be added to n31n61.
+  float n3161f = (float)hi32(n61) * -9223372036854775808.0f;                 // Estimate -n3161 as a float.  -n61 << 31 should be close enough.
+  uF2 = fma(uF2, F2_invWeight, n3161f);                                      // This should be close to an integer multiple of M31*M61
   float uF2int = fma(uF2, 2.0194839183061857038255724444152e-28f, RNDVAL);   // Divide by M31*M61 and round to int
   i32 nF2 = RNDVALfloatToInt(uF2int);
 
-  i64 nF2m31 = ((i64)nF2 << 31) - nF2;                   // nF2 * M31
-  i128 v = make_i128(nF2m31 >> 3, (u64)nF2m31 << 61);    // nF2m31 << 61
-  v = sub(v, nF2m31);                                    // nF2m31 * M61
-  v = add(v, n3161);                                     // nF2m31 * M61 + n3161
+  // The final result will be nF2 * M31*M61 + n3161.  Rearranging to use as few 128-bit and 64-bit ops as possible:
+  // = nF2 * M61 * M31 + n61 * M31 + n31
+  // = (nF2 * M61 + n61) * M31 + n31
+  // = ((nF2 << 61) - nF2 + n61) * M31 + n31
+  // = (((nF2 << 61) - nF2 + n61) << 31) - ((nF2 << 61) - nF2 + n61) + n31
+  // = (nF2 << 92) + ((n61 - nF2) << 31) - (nF2 << 61) - (n61 - nF2) + n31
+  // = (nF2 << 92) - (nF2 << 61) + ((n61 - nF2) << 31) - (n61 - nF2) + n31
+  // = (((nF2 << 31) - nF2) << 61) + ((n61 - nF2) << 31) - (n61 - nF2) + n31
+  // = (((nF2 << 32) - nF2*2) << 60) + ((n61 - nF2) << 31) - (n61 - nF2) + n31
+
+  // Compute x = (n61 - nF2)
+  i64 x = (i64)n61 - nF2;
+  // Compute y = ((n61 - nF2) << 31) + n31
+  i128 y = make_i128(x >> 33, (x << 31) | n31);
+  // Compute z = ((nF2 << 32) - nF2*2) << 60
+  i64 tmp = make_i64(nF2, 0) - (i64)(nF2 + nF2);
+  i128 z = make_i128(tmp >> 4, tmp << 60);
+
+  // Put the parts together
+  i128 v = sub(add(z, y), x);
 
   // Optionally calculate roundoff error
   float roundoff = fabs(fma(uF2, 2.0194839183061857038255724444152e-28f, RNDVAL - uF2int));
@@ -538,7 +552,7 @@ Word OVERLOAD carryStep(i64 x, i64 *outCarry, bool isBigWord) {
 #elif EXP / NWORDS == 32
   i32 xhi = hi32(x);
   i64 w = lowBits(x, nBits);
-  xhi -= (i32)(w >> 32);
+  xhi -= (i32)hi32(w);
   *outCarry = xhi >> (nBits - 32);
   return w;
 #elif EXP / NWORDS == 31
@@ -717,7 +731,7 @@ Word OVERLOAD carryStepSignedSloppy(i64 x, i32 *outCarry, bool isBigWord) {
 #if EXP / NWORDS >= 32                                  // nBits is 32 or more
   u64 x_topbit = x & ((u64)1 << (bigwordBits - 1));
   i64 w = ulowFixedBits(x, bigwordBits - 1) - x_topbit;
-  i32 xhi = (i32)(x >> 32) + (i32)(x_topbit >> 32);
+  i32 xhi = (i32)hi32(x) + (i32)hi32(x_topbit);
   *outCarry = xhi >> (nBits - 32);
   return w;
 // nBits = 31 or 32, bigwordBits = 32 (or allowed to create 32-bit word for better performance).  For reasons I don't fully understand the sloppy
@@ -725,7 +739,7 @@ Word OVERLOAD carryStepSignedSloppy(i64 x, i32 *outCarry, bool isBigWord) {
 // Not a major concern as end users should avoid small BPW as there is probably a more efficient NTT that could be used.
 #elif EXP / NWORDS == 31 || (EXP / NWORDS >= 23 && SLOPPY_MAXBPW >= 3200)        
   i32 w = x;                                            // lowBits(x, bigwordBits = 32);
-  *outCarry = ((i32)(x >> 32) + (w < 0)) << (32 - nBits);
+  *outCarry = ((i32)hi32(x) + (w < 0)) << (32 - nBits);
   return w;
 #else                                                   // nBits less than 32         //GWBUG - is there a faster version?  Is this faster than plain old carryStep? No
 //  u32 x_topbit = (u32) x & (1 << (bigwordBits - 1));
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 74f343e2..b53fccbb 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -6,10 +6,13 @@
 
 // Access parts of a 64-bit value
 
-u32 OVERLOAD lo32(u64 x) { uint2 x2 = as_uint2(x); return (u32)x2.x; }
-u32 OVERLOAD hi32(u64 x) { uint2 x2 = as_uint2(x); return (u32)x2.y; }
-u32 OVERLOAD lo32(i64 x) { uint2 x2 = as_uint2(x); return (u32)x2.x; }
-i32 OVERLOAD hi32(i64 x) { uint2 x2 = as_uint2(x); return (i32)x2.y; }
+u32 OVERLOAD lo32(u64 x) { return (u32)x; }
+u32 OVERLOAD hi32(u64 x) { union { uint2 ui2; u64 ul; } u; u.ul = x; return u.ui2.y; }
+u32 OVERLOAD lo32(i64 x) { return (u32)x; }
+u32 OVERLOAD hi32(i64 x) { union { uint2 ui2; u64 ul; } u; u.ul = x; return u.ui2.y; }
+
+u64 OVERLOAD make_u64(u32 hi, u32 lo) { union { uint2 ui2; u64 ul; } u; u.ui2.x = lo; u.ui2.y = hi; return u.ul; }
+i64 OVERLOAD make_i64(i32 hi, u32 lo) { union { uint2 ui2; u64 ul; } u; u.ui2.x = lo; u.ui2.y = hi; return u.ul; }
 
 // A primitive partial implementation of an i96 integer type
 #if 1
@@ -65,7 +68,7 @@ i96 OVERLOAD make_i96(i32 v) { i96 val; val.x = v; return val; }
 i96 OVERLOAD make_i96(i64 hi, u64 lo) { i96 val; val.x = ((unsigned __int128)hi << 64) + lo; return val; }
 i96 OVERLOAD make_i96(i32 hi, u64 lo) { return make_i96((i64)hi, lo); }
 u32 i96_hi32(i96 val) { return (unsigned __int128)val.x >> 64; }
-u32 i96_mid32(i96 val) { return (u64)val.x >> 32; }
+u32 i96_mid32(i96 val) { return hi32((u64)val.x); }
 u32 i96_lo32(i96 val) { return val.x; }
 u64 i96_lo64(i96 val) { return val.x; }
 u64 i96_hi64(i96 val) { return (unsigned __int128)val.x >> 32; }
@@ -86,7 +89,7 @@ u32 i96_hi32(i96 val) { return val.hi32; }
 u32 i96_mid32(i96 val) { return hi32(val.lo64); }
 u32 i96_lo32(i96 val) { return val.lo64; }
 u64 i96_lo64(i96 val) { return val.lo64; }
-u64 i96_hi64(i96 val) { return ((u64) val.hi32 << 32) | i96_mid32(val); }
+u64 i96_hi64(i96 val) { return make_64(val.hi32, i96_mid32(val)); }
 i96 OVERLOAD add(i96 a, i96 b) { i96 val; val.lo64 = a.lo64 + b.lo64; val.hi32 = a.hi32 + b.hi32 + (val.lo64 < a.lo64); return val; }
 i96 OVERLOAD add(i96 a, i64 b) { return add(a, make_i96(b)); }
 i96 OVERLOAD sub(i96 a, i96 b) { i96 val; val.lo64 = a.lo64 - b.lo64; val.hi32 = a.hi32 - b.hi32 - (val.lo64 > a.lo64); return val; }
@@ -172,7 +175,7 @@ i32 optional_sub(i32 a, const i32 b) {
 
 // Optionally subtract a value if first arg is greater than value.
 i32 optional_mod(i32 a, const i32 b) {
-#if ENABLE_OPTIONAL_MOD && HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (not sure why)
+#if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (too small a gain to measure??)
   __asm("{.reg .pred %%p;\n\t"
         " setp.ge.s32 %%p, %0, %1;\n\t"   // a > b
         " @%%p sub.s32 %0, %0, %1;}"      // if (a > b) a = a - b
@@ -183,6 +186,34 @@ i32 optional_mod(i32 a, const i32 b) {
   return a;
 }
 
+#if 0  // These are not used because there is no asm constraint to indicate a 64-bit constant
+// Optionally subtract c from a if a >= b.
+u64 OVERLOAD optional_sub(u64 a, const u64 b, const u64 c) {
+#if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.ge.u64 %%p, %0, %1;\n\t"   // a >= b
+        " @%%p sub.u64 %0, %0, %2;}"      // if (a >= b) a = a - c
+        : "+l"(a) : "l"(b), "l"(c));
+#else
+  if (a >= b) a = a - c;
+#endif
+  return a;
+}
+
+// Optionally subtract c from a if hi32(a) >= b.
+u64 OVERLOAD optional_sub(u64 a, const u32 b, const u64 c) {
+#if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.ge.u32 %%p, %1, %2;\n\t"   // hi32(a) >= b
+        " @%%p sub.u64 %0, %0, %3;}"      // if (hi32(a) >= b) a = a - c
+        : "+l"(a) : "r"(hi32(a)), "n"(b), "l"(c));
+#else
+  if (hi32(a) >= b) a = a - c;
+#endif
+  return a;
+}
+#endif
+
 // Multiply and add primitives
 
 u64 OVERLOAD mad32(u32 a, u32 b, u32 c) {
@@ -912,8 +943,8 @@ void OVERLOAD X2s_conjb(GF61 *a, GF61 *b, u32 m61_count) { X2_conjb_internal(a,
 
 #elif 1   // Faster version that keeps results in the range 0 .. M61+epsilon
 
-u64 OVERLOAD get_Z61(Z61 a) { Z61 m = a - M61; return (m & 0x8000000000000000ULL) ? a : m; }  // Get value in range 0 to M61-1
-i64 OVERLOAD get_balanced_Z61(Z61 a) { return (a >= 0x1000000000000000ULL) ? (i64) a - (i64) M61 : (i64) a; }  // Get balanced value in range -M61/2 to M61/2
+u64 OVERLOAD get_Z61(Z61 a) { Z61 m = a - M61; return (m & 0x8000000000000000ULL) ? a : m; }        // Get value in range 0 to M61-1
+i64 OVERLOAD get_balanced_Z61(Z61 a) { return (hi32(a) >= 0x10000000) ? (i64)(a - M61) : (i64)a; }  // Get balanced value in range -M61/2 to M61/2
 
 // Internal routine to bring Z61 value into the range 0..M61+epsilon
 Z61 OVERLOAD modM61(Z61 a) { return (a & M61) + (a >> 61); }
diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
index 92b4dc21..b72ef5e4 100644
--- a/src/cuda/opencl_compat.cuh
+++ b/src/cuda/opencl_compat.cuh
@@ -176,48 +176,28 @@ __device__ __forceinline__ ulong2 operator*(ulong2 v, int s) { return {v.x*(ulon
 // Scalar ↔ vector bitwise reinterpretations (OpenCL as_type functions)
 
 // as_uint2: split 64-bit value into two 32-bit halves
-__device__ __forceinline__ uint2 as_uint2(double v) {
-  ulong bits = __double_as_longlong(v);
-  return make_uint2((uint)(bits), (uint)(bits >> 32));
-}
-__device__ __forceinline__ uint2 as_uint2(ulong v) {
-  return make_uint2((uint)(v), (uint)(v >> 32));
-}
-__device__ __forceinline__ uint2 as_uint2(i64 v) {
-  return make_uint2((uint)((ulong)v), (uint)((ulong)v >> 32));
-}
+__device__ __forceinline__ uint2 as_uint2(double v) { union { uint2 ui2; double d; } u; u.d = v; return u.ui2; }
+__device__ __forceinline__ uint2 as_uint2(ulong v) { union { uint2 ui2; ulong ul; } u; u.ul = v; return u.ui2; }
+__device__ __forceinline__ uint2 as_uint2(i64 v) { union { uint2 ui2; i64 l; } u; u.l = v; return u.ui2; }
 
 // as_int2: split 64-bit value into two signed 32-bit halves
-__device__ __forceinline__ int2 as_int2(double v) {
-  ulong bits = __double_as_longlong(v);
-  return make_int2((int)(uint)(bits), (int)(uint)(bits >> 32));
-}
-__device__ __forceinline__ int2 as_int2(i64 v) {
-  return make_int2((int)(uint)((ulong)v), (int)(uint)((ulong)v >> 32));
-}
+__device__ __forceinline__ int2 as_int2(double v) { union { int2 i2; double d; } u; u.d = v; return u.i2; }
+__device__ __forceinline__ int2 as_int2(i64 v) { union { int2 i2; i64 l; } u; u.l = v; return u.i2; }
 
 // as_double: reinterpret bits as double
-__device__ __forceinline__ double as_double(int2 v) {
-  ulong bits = ((ulong)(uint)v.y << 32) | (uint)v.x;
-  return __longlong_as_double(bits);
-}
-__device__ __forceinline__ double as_double(uint2 v) {
-  ulong bits = ((ulong)v.y << 32) | v.x;
-  return __longlong_as_double(bits);
-}
-__device__ __forceinline__ double as_double(ulong v) {
-  return __longlong_as_double(v);
-}
+__device__ __forceinline__ double as_double(int2 v) { union { int2 i2; double d; } u; u.i2 = v; return u.d; }
+__device__ __forceinline__ double as_double(uint2 v) { union { uint2 ui2; double d; } u; u.ui2 = v; return u.d; }
+__device__ __forceinline__ double as_double(ulong v) { return __longlong_as_double(v); }
 __device__ __forceinline__ double as_double(i64 v) { return __longlong_as_double(v); }
 
 // as_ulong: reinterpret as unsigned 64-bit
-__device__ __forceinline__ ulong as_ulong(uint2 v) { return (((ulong)v.y << 32) | v.x); }
-__device__ __forceinline__ ulong as_ulong(int2 v) { return (((ulong)(uint)v.y << 32) | (uint)v.x); }
+__device__ __forceinline__ ulong as_ulong(uint2 v) { union { uint2 ui2; ulong ul; } u; u.ui2 = v; return u.ul; }
+__device__ __forceinline__ ulong as_ulong(int2 v) { union { int2 i2; ulong ul; } u; u.i2 = v; return u.ul; }
 __device__ __forceinline__ ulong as_ulong(double v) { return (ulong)__double_as_longlong(v); }
 
 // as_long: reinterpret as signed 64-bit
-__device__ __forceinline__ i64 as_long(int2 v) { return (i64)(((ulong)(uint)v.y << 32) | (uint)v.x); }
-__device__ __forceinline__ i64 as_long(uint2 v) { return (i64)(((ulong)v.y << 32) | v.x); }
+__device__ __forceinline__ i64 as_long(int2 v) { union { int2 i2; i64 l; } u; u.i2 = v; return u.l; }
+__device__ __forceinline__ i64 as_long(uint2 v) { union { uint2 ui2; i64 l; } u; u.ui2 = v; return u.l; }
 __device__ __forceinline__ i64 as_long(double v) { return (i64)__double_as_longlong(v); }
 
 // as_float / as_int / as_uint: 32-bit reinterprets

From 3ec69b91465acdd98c185683188aa9a554cd11cd Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 14 Apr 2026 19:56:31 +0000
Subject: [PATCH 030/214] Improved "quick" routines in GF61 math.

---
 src/cl/carryutil.cl  |  4 +--
 src/cl/fft4.cl       | 47 +++++++++++++----------------
 src/cl/fft8.cl       | 66 +++++++++++++++++------------------------
 src/cl/math.cl       | 70 ++++++++++++++++----------------------------
 src/cl/tailmul.cl    |  8 +++--
 src/cl/tailsquare.cl | 43 +++++++++++++++++++--------
 6 files changed, 110 insertions(+), 128 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 5a77e511..2f9f7f65 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -414,7 +414,7 @@ i96 weightAndCarryOne(Z31 u31, Z61 u61, u32 m31_invWeight, u32 m61_invWeight, bo
 
   // Use chinese remainder theorem to create a 92-bit result.  Loosely copied from Yves Gallot's mersenne2 program.
   u32 n31 = get_Z31(u31);
-  u61 = subq(u61, make_Z61(n31), 2);             // u61 - u31
+  u61 += make_u64(hi32(M61), lo32(M61) - n31);   // u61 - u31
   u61 = add(u61, shl(u61, 31));                  // u61 + (u61 << 31)
 
   // The resulting value will be get_Z61(u61) * M31 + n31 and if larger than ~M31*M61/2 return a negative value by subtracting M31 * M61.
@@ -455,7 +455,7 @@ i128 weightAndCarryOne(float uF2, Z31 u31, Z61 u61, float F2_invWeight, u32 m31_
 
   // Use chinese remainder theorem to create a 92-bit result.  Loosely copied from Yves Gallot's mersenne2 program.
   u32 n31 = get_Z31(u31);
-  u61 = subq(u61, make_Z61(n31), 2);                 // u61 - u31
+  u61 += make_u64(hi32(M61), lo32(M61) - n31);       // u61 - u31
   u61 = add(u61, shl(u61, 31));                      // u61 + (u61 << 31)
   u64 n61 = get_Z61(u61);
   // Let's call the 92-bit CRT result n3161.  At this point, n3161 = n61 * M31 + n31.
diff --git a/src/cl/fft4.cl b/src/cl/fft4.cl
index 8b422ca9..1aafbb69 100644
--- a/src/cl/fft4.cl
+++ b/src/cl/fft4.cl
@@ -194,44 +194,37 @@ void OVERLOAD fft4(GF31 *u) { fft4by(u, 0, 1, 4); }
 
 #if NTT_GF61
 
-void OVERLOAD fft4Core(GF61 *u) {       // Starts with all u[i] having maximum values of M61+epsilon.
-  X2q(&u[0], &u[2], 2);                 // X2(u[0], u[2]);  No reductions mod M61.  Will require 3 M61s additions to make positives.
-  X2q_mul_t4(&u[1], &u[3], 2);          // X2(u[1], u[3]); u[3] = mul_t4(u[3]);
-  X2s(&u[0], &u[1], 3);
-  X2s(&u[2], &u[3], 3);
-}
-
 // 16 ADD
 void OVERLOAD fft4by(GF61 *u, u32 base, u32 step, u32 M) {
 
 #define A(k) u[(base + step * k) % M]
 
-  Z61 x0 = addq(A(0).x, A(2).x);             // Max value is 2*M61+epsilon
-  Z61 x2 = subq(A(0).x, A(2).x, 2);          // Max value is 3*M61+epsilon
-  Z61 y0 = addq(A(0).y, A(2).y);
-  Z61 y2 = subq(A(0).y, A(2).y, 2);
+  Z61 x0 = A(0).x + A(2).x;     // 0..2+
+  Z61 x2 = A(0).x - A(2).x;     // -1-..1+
+  Z61 y0 = A(0).y + A(2).y;     // 0..2+
+  Z61 y2 = A(0).y - A(2).y;     // -1-..1+
 
-  Z61 x1 = addq(A(1).x, A(3).x);
-  Z61 y3 = subq(A(1).x, A(3).x, 2);
-  Z61 y1 = addq(A(1).y, A(3).y);
-  Z61 x3 = subq(A(3).y, A(1).y, 2);
+  Z61 x1 = A(1).x + A(3).x;     // 0..2+
+  Z61 y3 = A(1).x - A(3).x;     // -1-..1+
+  Z61 y1 = A(1).y + A(3).y;     // 0..2+
+  Z61 x3 = A(3).y - A(1).y;     // -1-..1+
 
-  Z61 a0 = add(x0, x1);
-  Z61 a1 = subs(x0, x1, 3);
+  Z61 a0 = x0 + x1;             // 0..4+
+  Z61 a1 = x0 - x1;             // -2-..2+
 
-  Z61 b0 = add(y0, y1);
-  Z61 b1 = subs(y0, y1, 3);
+  Z61 b0 = y0 + y1;             // 0..4+
+  Z61 b1 = y0 - y1;             // -2-..2+
 
-  Z61 a2 = add(x2, x3);
-  Z61 a3 = subs(x2, x3, 4);
+  Z61 a2 = x2 + x3;             // -2-..2+
+  Z61 a3 = x2 - x3;             // -2-..2+
 
-  Z61 b2 = add(y2, y3);
-  Z61 b3 = subs(y2, y3, 4);
+  Z61 b2 = y2 + y3;             // -2-..2+
+  Z61 b3 = y2 - y3;             // -2-..2+
 
-  A(0) = U2(a0, b0);
-  A(1) = U2(a2, b2);
-  A(2) = U2(a1, b1);
-  A(3) = U2(a3, b3);
+  A(0) = modM61q(U2(a0, b0), 0);
+  A(1) = modM61q(U2(a2, b2), 3);
+  A(2) = modM61q(U2(a1, b1), 3);
+  A(3) = modM61q(U2(a3, b3), 3);
 
 #undef A
 
diff --git a/src/cl/fft8.cl b/src/cl/fft8.cl
index 56e2fc94..ec4fca48 100644
--- a/src/cl/fft8.cl
+++ b/src/cl/fft8.cl
@@ -108,47 +108,37 @@ void OVERLOAD fft8(GF31 *u) {
 
 #if NTT_GF61
 
-#if 0 // Working code.
-
-void OVERLOAD fft8Core(GF61 *u) {
-  X2(u[0], u[4]);                                               //GWBUG: Delay some mods using extra 3 bits of Z61
-  X2_mul_t8(u[1], u[5]);                                        // X2(u[1], u[5]);   u[5] = mul_t8(u[5]);
-  X2_mul_t4(u[2], u[6]);                                        // X2(u[2], u[6]);   u[6] = mul_t4(u[6]);
-  X2_mul_3t8(u[3], u[7]);                                       // X2(u[3], u[7]);   u[7] = mul_3t8(u[7]);
-  fft4Core(u);
-  fft4Core(u + 4);
-}
-
-void OVERLOAD fft8(GF61 *u) {
-  fft8Core(u);
-  // revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
-  SWAP(u[1], u[4]);
-  SWAP(u[3], u[6]);
-}
-
-#else   // Carefully track the size of numbers to reduce the number of mod M61 reductions
-
-void OVERLOAD fft4CoreSpecial1(GF61 *u) {         // Starts with u[0,1,2,3] having maximum values of (2,2,3,2)*M61+epsilon.
-  X2q(&u[0], &u[2], 4);                           // X2(u[0], u[2]);  No reductions mod M61.  u[0,2] max value is 5,6*M61+epsilon.
-  X2q_mul_t4(&u[1], &u[3], 3);                    // X2(u[1], u[3]); u[3] = mul_t4(u[3]);  u[1,3] max value is 5,4*M61+epsilon.
-  u[1] = modM61(u[1]); u[2] = modM61(u[2]);       // Reduce the worst offenders.  u[0,1,2,3] have maximum values of (5,1,1,4)*M61+epsilon.
-  X2s(&u[0], &u[1], 2);                           // u[0,1] max value before reduction is 6,7*M61+epsilon
-  X2s(&u[2], &u[3], 5);                           // u[2,3] max value before reduction is 5,6*M61+epsilon
+void OVERLOAD fft4CoreSpecial1(GF61 *u) {         // Starts with u[0,1,2,3] in range of 0..2*M61+epsilon.
+  X2q(&u[0], &u[2]);                              // X2(u[0], u[2]);  No reductions mod M61.  u[0,2] range is 0..4+, -2-..2+
+  X2q_mul_t4(&u[1], &u[3]);                       // X2(u[1], u[3]);  u[3] = mul_t4(u[3]);    u[1,3] range is 0..4+, -2-..2+
+  u[1] = optsubq(u[1], 2, 2);                     // Partially reduce.  If u[1] > 2*M61, sub 2*M61.  u[1] now has range 0..2+
+  u[3] = optsubq(u[3], 0, 2);                     // Partially reduce.  If u[3] > 0*M61, sub 2*M61.  u[3] now has range -2-..0+
+  X2q(&u[0], &u[1]);                              // X2(u[0], u[1]);  u[0,1] range is 0..6+, -2-..4+
+  X2q(&u[2], &u[3]);                              // X2(u[2], u[3]);  u[2,3] range is -4-..2+, -2-..4+
+  u[0] = modM61q(u[0], 0);
+  u[1] = modM61q(u[1], 3);
+  u[2] = modM61q(u[2], 5);
+  u[3] = modM61q(u[3], 3);
 }
 
-void OVERLOAD fft4CoreSpecial2(GF61 *u) {         // Similar to above.  Starts with u[0,1,2,3] having maximum values of (3,1,2,1)*M61+epsilon.
-  X2q(&u[0], &u[2], 3);                           // u[0,2] max value is 5,6*M61+epsilon.
-  X2q_mul_t4(&u[1], &u[3], 2);                    // X2(u[1], u[3]); u[3] = mul_t4(u[3]);  u[1,3] max value is 3,2*M61+epsilon.
-  u[0] = modM61(u[0]); u[2] = modM61(u[2]);       // Reduce the worst offenders  u[0,1,2,3] have maximum values of (1,3,1,2)*M61+epsilon.
-  X2s(&u[0], &u[1], 4);                           // u[0,1] max value before reduction is 4,5*M61+epsilon
-  X2s(&u[2], &u[3], 3);                           // u[2,3] max value before reduction is 3,4*M61+epsilon
+void OVERLOAD fft4CoreSpecial2(GF61 *u) {         // Bottom half of an fft8.  Starts with u[0,1,2,3] in range of -1*M61-epsilon..1*M61+epsilon
+  X2q(&u[0], &u[2]);                              // X2(u[0], u[2]);  No reductions mod M61.  u[0,2] range is -2-..2+, -2-..2+
+  u[1] = mul_t8q(u[1], 3);                        // Perform delayed mul_t8.  u[1] range is 0..1+
+  u[3] = mul_t8q(u[3], 3);                        // Perform delayed mul_t8.  u[3] range is 0..1+
+  X2q_mul_t4(&u[1], &u[3]);                       // X2(u[1], u[3]);  u[3] = mul_t4(u[3]);    u[1,3] range is 0..2+, -1-..1+
+  X2q(&u[0], &u[1]);                              // X2(u[0], u[1]);  u[0,1] range is -2-..4+, -4-..2+
+  X2q(&u[2], &u[3]);                              // X2(u[2], u[3]);  u[2,3] range is -3-..3+, -3-..3+
+  u[0] = modM61q(u[0], 3);
+  u[1] = modM61q(u[1], 5);
+  u[2] = modM61q(u[2], 4);
+  u[3] = modM61q(u[3], 4);
 }
 
-void OVERLOAD fft8Core(GF61 *u) {                 // Starts with all u[i] having maximum values of M61+epsilon.
-  X2q(&u[0], &u[4], 2);                           // X2(u[0], u[4]);  No reductions mod M61.  u[0,4] max value is 2,3*M61+epsilon.
-  X2q_mul_t8(&u[1], &u[5], 2);                    // X2(u[1], u[5]);  u[5] = mul_t8(u[5]); u[1,5] max value is 2,1*M61+epsilon.
-  X2q_mul_t4(&u[2], &u[6], 2);                    // X2(u[2], u[6]);  u[6] = mul_t4(u[6]); u[2,6] max value is 3,2*M61+epsilon.
-  X2q_mul_3t8(&u[3], &u[7], 2);                   // X2(u[3], u[7]);  u[7] = mul_3t8(u[7]); u[3,7] max value is 2,1*M61+epsilon.
+void OVERLOAD fft8Core(GF61 *u) {                 // Starts with all u[i] values in range of 0..M61+epsilon (shorthand notation is 0..1+)
+  X2q(&u[0], &u[4]);                              // X2(u[0], u[4]);  No reductions mod M61.  u[0,4] range is 0..2+, -1-..1+
+  X2q(&u[1], &u[5]);                              // X2(u[1], u[5]);  Delay mul_t8 on u[5].   u[1,5] range is 0..2+, -1-..1+
+  X2q_mul_t4(&u[2], &u[6]);                       // X2(u[2], u[6]);  u[6] = mul_t4(u[6]);    u[2,6] range is 0..2+, -1-..1+
+  X2q_mul_t4(&u[3], &u[7]);                       // X2(u[3], u[7]);  u[7] = mul_t4(u[7]);    u[3,7] range is 0..2+, -1-..1+   Delay mul_t8 on u[7].
   fft4CoreSpecial1(u);
   fft4CoreSpecial2(u + 4);
 }
@@ -161,5 +151,3 @@ void OVERLOAD fft8(GF61 *u) {
 }
 
 #endif
-
-#endif
diff --git a/src/cl/math.cl b/src/cl/math.cl
index b53fccbb..76ec9429 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -186,14 +186,13 @@ i32 optional_mod(i32 a, const i32 b) {
   return a;
 }
 
-#if 0  // These are not used because there is no asm constraint to indicate a 64-bit constant
 // Optionally subtract c from a if a >= b.
-u64 OVERLOAD optional_sub(u64 a, const u64 b, const u64 c) {
+i64 OVERLOAD optional_sub(i64 a, const i64 b, const i64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
-        " setp.ge.u64 %%p, %0, %1;\n\t"   // a >= b
-        " @%%p sub.u64 %0, %0, %2;}"      // if (a >= b) a = a - c
-        : "+l"(a) : "l"(b), "l"(c));
+        " setp.ge.s64 %%p, %0, %1;\n\t"   // a >= b
+        " @%%p sub.s64 %0, %0, %2;}"      // if (a >= b) a = a - c
+        : "+l"(a) : "l"(b), "l"(c));      // It would be nice if there was an asm constraint to indicate a 64-bit constant
 #else
   if (a >= b) a = a - c;
 #endif
@@ -201,18 +200,17 @@ u64 OVERLOAD optional_sub(u64 a, const u64 b, const u64 c) {
 }
 
 // Optionally subtract c from a if hi32(a) >= b.
-u64 OVERLOAD optional_sub(u64 a, const u32 b, const u64 c) {
+i64 OVERLOAD optional_sub(i64 a, const i32 b, const i64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
-        " setp.ge.u32 %%p, %1, %2;\n\t"   // hi32(a) >= b
-        " @%%p sub.u64 %0, %0, %3;}"      // if (hi32(a) >= b) a = a - c
-        : "+l"(a) : "r"(hi32(a)), "n"(b), "l"(c));
+        " setp.ge.s32 %%p, %1, %2;\n\t"   // hi32(a) >= b
+        " @%%p sub.s64 %0, %0, %3;}"      // if (hi32(a) >= b) a = a - c
+        : "+l"(a) : "r"((i32)hi32(a)), "n"(b), "l"(c));
 #else
-  if (hi32(a) >= b) a = a - c;
+  if ((i32)hi32(a) >= b) a = a - c;
 #endif
   return a;
 }
-#endif
 
 // Multiply and add primitives
 
@@ -918,27 +916,14 @@ Z61 OVERLOAD modM61(Z61 a) { return a; }
 GF61 OVERLOAD modM61(GF61 a) { return a; }
 Z61 OVERLOAD neg(Z61 a, u32 m61_count) { return neg(a); }
 GF61 OVERLOAD neg(GF61 a, u32 m61_count) { return neg(a); }
-Z61 OVERLOAD addq(Z61 a, Z61 b) { return add(a, b); }
-GF61 OVERLOAD addq(GF61 a, GF61 b) { return add(a, b); }
-Z61 OVERLOAD subq(Z61 a, Z61 b, u32 m61_count) { return sub(a, b); }
-GF61 OVERLOAD subq(GF61 a, GF61 b, u32 m61_count) { return sub(a, b); }
-Z61 OVERLOAD subs(Z61 a, Z61 b, u32 m61_count) { return sub(a, b); }
-GF61 OVERLOAD subs(GF61 a, GF61 b, u32 m61_count) { return sub(a, b); }
-void OVERLOAD X2q(GF61 *a, GF61 *b, u32 m61_count) { X2_internal(a, b); }
-void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b, u32 m61_count) { X2_mul_t4_internal(a, b); }
-void OVERLOAD X2s(GF61 *a, GF61 *b, u32 m61_count) { X2_internal(a, b); }
-void OVERLOAD X2s_conjb(GF61 *a, GF61 *b, u32 m61_count) { X2_conjb_internal(a, b); }
-
-
 
 
 // Philosophy: This Z61/GF61 implementation uses faster, sloppier mod M61 reduction where the end result is in the range 0..M61+epsilon.
 // This implementation also handles subtractions by adding enough M61s to make a value positive.  This allows us to always deal with positive
-// intermediate results.  The downside is that a caller using the sloppy/quick routines must keep track of how large unreduced values can get.
-// An alternative implementation is to have Z61 be an i64 (costs us a precious bit of precision) but is surprisingly slower (at least on TitanV) because
+// intermediate results.  An alternative implementation is to have Z61 be an i64 (costs us a precious bit of precision) and is surprisingly slower (at least on TitanV) because
 //      mod(a - b),             where the mod routinue uses a signed right shift is slower than
 //      mod(a + (M61*2 - b))    where the mod routine uses an unsigned shift right.
-// However, a long string of subtracts (example, fft8 does 3 subtracts before mod M61 might be better off using negative intermediate results.
+// However, a long string of subtracts (example, fft8 does 3 subtracts before mod M61 will be better off using the quick routines and negative intermediate results).
 // The mul routine (and obviously csq and cmul) must use only positive values as __int128 multiply is very slow.
 
 #elif 1   // Faster version that keeps results in the range 0 .. M61+epsilon
@@ -1092,28 +1077,25 @@ GF61 OVERLOAD addsub(GF61 a) { return U2(add(a.x, a.y), sub(a.x, a.y)); }
 GF61 OVERLOAD foo2(GF61 a, GF61 b) { a = addsub(a); b = addsub(b); return addsub(U2(mul(RE(a), RE(b)), mul(IM(a), IM(b)))); }
 GF61 OVERLOAD foo(GF61 a) { return foo2(a, a); }
 
-// The following routines can be used to reduce mod M61 operations.  Caller must track how many M61s need to be added to make positive
-// values for subtractions.  In function names, "q" stands for quick (no modM61), "s" stands for slow (i.e. does modM61).
-
-Z61 OVERLOAD addq(Z61 a, Z61 b) { return a + b; }
-GF61 OVERLOAD addq(GF61 a, GF61 b) { return U2(addq(a.x, b.x), addq(a.y, b.y)); }
-
-Z61 OVERLOAD subq(Z61 a, Z61 b, const u32 m61_count) { return a + neg(b, m61_count); }
-GF61 OVERLOAD subq(GF61 a, GF61 b, const u32 m61_count) { return U2(subq(a.x, b.x, m61_count), subq(a.y, b.y, m61_count)); }
+// The following routines can be used to reduce mod M61 operations by carefully tracking the range of intermediate results which can be negative.
+// This reduces the number of m61_count*M61 addition operations too.  By tracking ranges of intermediate results, the caller knows how many M61s
+// need to be added to make result positive prior to the final modM61.  In function names, "q" stands for quick (no modM61).
 
-Z61 OVERLOAD subs(Z61 a, Z61 b, const u32 m61_count) { return modM61(a + neg(b, m61_count)); }
-GF61 OVERLOAD subs(GF61 a, GF61 b, const u32 m61_count) { return U2(subs(a.x, b.x, m61_count), subs(a.y, b.y, m61_count)); }
+GF61 OVERLOAD addq(GF61 a, GF61 b) { return a + b; }
+GF61 OVERLOAD subq(GF61 a, GF61 b) { return a - b; }
+GF61 OVERLOAD addiq(GF61 a, GF61 b) { return U2(a.x - b.y, a.y + b.x); }
+GF61 OVERLOAD subiq(GF61 a, GF61 b) { return U2(a.x + b.y, a.y - b.x); }
 
-GF61 OVERLOAD addiq(GF61 a, GF61 b, const u32 m61_count) { return U2(subq(a.x, b.y, m61_count), addq(a.y, b.x)); }
-GF61 OVERLOAD subiq(GF61 a, GF61 b, const u32 m61_count) { return U2(addq(a.x, b.y), subq(a.y, b.x, m61_count)); }
+void OVERLOAD X2q(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; *b = t - *b; }
+void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; t.x = t.x - b->x; b->x = b->y - t.y; b->y = t.x; }
+void OVERLOAD X2q_conjb(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; b->x = t.x - b->x; b->y = b->y - t.y; }
 
-void OVERLOAD X2q(GF61 *a, GF61 *b, const u32 m61_count) { GF61 t = *a; *a = t + *b; *b = t + neg(*b, m61_count); }
-void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b, const u32 m61_count) { GF61 t = *a; *a = t + *b; t.x = t.x + neg(b->x, m61_count); b->x = b->y + neg(t.y, m61_count); b->y = t.x; }
-void OVERLOAD X2q_mul_t8(GF61 *a, GF61 *b, const u32 m61_count) { GF61 t = *a; *a = t + *b; t = *b + neg(t, m61_count); *b = shl(U2(t.x + neg(t.y, m61_count * 2), t.x + t.y), 30); }
-void OVERLOAD X2q_mul_3t8(GF61 *a, GF61 *b, const u32 m61_count) { GF61 t = *a; *a = t + *b; t = t + neg(*b, m61_count); *b = mul_3t8(t, m61_count * 2); }
+GF61 OVERLOAD mul_t8q(GF61 a, const u32 m61_count) { return shl(U2(m61_count * M61 + (a.y - a.x), m61_count * M61 - (a.x + a.y)), 30); }
 
-void OVERLOAD X2s(GF61 *a, GF61 *b, const u32 m61_count) { GF61 t = *a; *a = add(t, *b); *b = subs(t, *b, m61_count); }
-void OVERLOAD X2s_conjb(GF61 *a, GF61 *b, const u32 a_m61_count, const u32 b_m61_count) { GF61 t = *a; *a = add(t, *b); b->x = subs(t.x, b->x, b_m61_count); b->y = subs(b->y, t.y, a_m61_count); }
+Z61 OVERLOAD optsubq(Z61 a, const u32 m61_limit, const u32 m61_count) { return optional_sub((i64)a, (i32)(m61_limit << (61 - 32)), (i64)(m61_count * M61)); }
+GF61 OVERLOAD optsubq(GF61 a, const u32 m61_limit, const u32 m61_count) { return U2(optsubq(a.x, m61_limit, m61_count), optsubq(a.y, m61_limit, m61_count)); }
+GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count) { if (m61_count) { a.x += m61_count * M61; a.y += m61_count * M61; } return modM61(a); }
+GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count_x, const u32 m61_count_y) { if (m61_count_x) a.x += m61_count_x * M61; if (m61_count_y) a.y += m61_count_y * M61; return modM61(a); }
 
 #endif
 
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 03647fdb..b871021b 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -375,9 +375,11 @@ void OVERLOAD onePairMul(GF61* pa, GF61* pb, GF61* pc, GF61* pd, GF61 t_squared)
 
   X2conjb(a, b);
   X2conjb(c, d);
-  GF61 e = subq(cmul(a, c), cmul(cmul(b, d), t_squared), 2);    // Max value is 3*M61+epsilon
-  GF61 f = addq(cmul(b, c), cmul(a, d));                        // Max value is 2*M61+epsilon
-  X2s_conjb(&e, &f, 4, 3);
+  GF61 e = subq(cmul(a, c), cmul(cmul(b, d), t_squared));    // Range is -1-..1+
+  GF61 f = addq(cmul(b, c), cmul(a, d));                     // Range is 0..2+
+  X2q_conjb(&e, &f);                                         // e range is -1..3+,  f.x range is -3-..1+, f.y range is -1-..3+
+  e = modM61q(e, 2);
+  f = modM61q(f, 4, 2);
   *pa = SWAP_XY(e), *pb = SWAP_XY(f);
 }
 
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 48f49aa5..c727859c 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -870,19 +870,36 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_type) {
   GF61 a = *pa, b = *pb;
-  GF61 c, d;
-
-  X2conjb(a, b);
-  if (t_squared_type == 0)                             // mul t_squared by 1
-    c = subq(csqq(a, 2), cmul(csq(b), t_squared), 2);  // max c value is 4*M61+epsilon
-  if (t_squared_type == 1)                             // mul t_squared by i
-    c = subiq(csqq(a, 2), cmul(csq(b), t_squared), 2); // max c value is 4*M61+epsilon
-  if (t_squared_type == 2)                             // mul t_squared by -1
-    c = addq(csqq(a, 2), cmul(csq(b), t_squared));     // max c value is 3*M61+epsilon
-  if (t_squared_type == 3)                             // mul t_squared by -i
-    c = addiq(csqq(a, 2), cmul(csq(b), t_squared), 2); // max c value is 4*M61+epsilon
-  d = 2 * cmul(a, b);                                  // max d value is 2*M61+epsilon
-  X2s_conjb(&c, &d, 5, 3);
+  GF61 a2, b2t2, c, d;
+
+  X2conjb(a, b);                                // X2(a, conjugate(b))
+  a2 = csqq(a, 2);                              // a2 = a^2, a2.x range is 0..2+, a2.y range is 0..3+
+  b2t2 = cmul(csq(b), t_squared);               // b2t2 = b^2 * t_squared, b2t2 range is 0..1+
+  d = cmul(a, b); d = d + d;                    // d = 2ab, d range is 0..2+
+  if (t_squared_type == 0) {                    // mul t_squared by 1
+    c = subq(a2, b2t2);                         // c.x range is -1..2+, c.y range is -1-..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is -1-..5+, d.x range is -3-..2+, d.y range is -3-..3+
+    c = modM61q(c, 2);
+    d = modM61q(d, 4);
+  }
+  if (t_squared_type == 1) {                    // mul t_squared by i
+    c = subiq(a2, b2t2);                        // c.x range is 0..3+, c.y range is -1-..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is -1..5+, d.x range is -2-..3+, d.y range is -3-..3+
+    c = modM61q(c, 0, 2);
+    d = modM61q(d, 4);
+  }
+  if (t_squared_type == 2) {                    // mul t_squared by -1
+    c = addq(a2, b2t2);                         // c.x range is 0..3+, c.y range is 0..4+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is 0..6+, d.x range is -2-..3+, d.y range is -4-..2+
+    c = modM61q(c, 0);
+    d = modM61q(d, 3, 5);
+  }
+  if (t_squared_type == 3) {                    // mul t_squared by -i
+    c = addiq(a2, b2t2);                        // c.x range is -1-..2+, c.y range is 0..4+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is 0..6+, d.x range is -3-..2+, d.y range is -4-..2+
+    c = modM61q(c, 2, 0);
+    d = modM61q(d, 4, 5);
+  }
   *pa = SWAP_XY(c), *pb = SWAP_XY(d);
 }
 

From df98f93c813f49ffeffcf9242ad9941e6c8ada1f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 15 Apr 2026 04:03:40 +0000
Subject: [PATCH 031/214] Allow "PRP=1,2,n,-1" in worktodo.txt without the
 no-factor-to-bits value. There is probably a more elegant fix.  I'm not sure
 mine work in Windows.

---
 src/Worktodo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 1628a391..0801ffec 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -58,7 +58,7 @@ std::optional<Task> parse(const std::string& line) {
       parts.erase(parts.begin());
     }
 
-    string s = (parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && parts[3] == "-1") ? parts[2]
+    string s = (parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && (parts[3] == "-1" || parts[3] == "-1\n")) ? parts[2]
       : (!parts.empty() ? parts[0] : "");
 
     const char *end = s.c_str() + s.size();

From 279cc83db057c2d8b4bb39725fbaffea2485fec0 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 15 Apr 2026 19:53:32 +0000
Subject: [PATCH 032/214] Sanity check a user-supplied FFT spec.

---
 src/FFTConfig.cpp | 23 +++++++++++++++++++++++
 src/Task.cpp      |  2 +-
 2 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index c1009845..2e45afd0 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -208,6 +208,29 @@ FFTConfig::FFTConfig(const string& spec) {
     v.resize(v.size() - 1);
   }
 
+  // Sanity check the spec
+  if (v.size() >= 3) {
+    u32 w = parseInt(v[0]);
+    u32 m = parseInt(v[1]);
+    u32 h = parseInt(v[2]);
+    if (w != 256 && w != 512 && w != 1024 && w != 4096) {
+      log("Width must be 256, 512, 1024, or 4096.\n");
+      throw "Invalid FFT spec";
+    }
+    if (m < 2 || m > 16) {
+      log("Middle must be between 1 and 16.\n");
+      throw "Invalid FFT spec";
+    }
+    if (h != 256 && h != 512 && h != 1024) {
+      log("Height must be 256, 512, 1024.\n");
+      throw "Invalid FFT spec";
+    }
+    if (fft_type != FFT64 && fft_type != FFT32 && (m & (m - 1))) {
+      log("NTT middle must be a power of two.\n");
+      throw "Invalid FFT spec";
+    }
+  }
+  
   if (v.size() == 1) {
     *this = {FFTShape::multiSpec(spec).front(), LAST_VARIANT, CARRY_AUTO};
   } if (v.size() == 3) {
diff --git a/src/Task.cpp b/src/Task.cpp
index 9a49654f..95c23e98 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -215,7 +215,7 @@ void Task::execute(GpuCommon shared, Queue *q, u32 instance) {
   assert(exponent);
 
   // Testing exponent 140000001 using FFT 512:15:512 fails with severe round off errors.
-  // I'm guessing this is because bot the exponent and FFT size are divisible by 3.
+  // I'm guessing this is because both the exponent and FFT size are divisible by 3.
   // Here we make sure the exponent is prime.  If not we do not raise an error because it
   // is very common to use command line argument "-prp some-random-exponent" to get a quick
   // timing.  Instead, we output a warning and test a smaller prime exponent.

From 14021aba733f20fda5da6fd8d37b78c71339d398 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 16 Apr 2026 02:09:53 +0000
Subject: [PATCH 033/214] Minor tweaks to calculating weights

---
 src/Gpu.cpp | 29 +++++++++++++++++++----------
 src/Gpu.h   |  1 -
 2 files changed, 19 insertions(+), 11 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 6012cfc7..1c743c70 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -37,6 +37,14 @@
 #define M_PI 3.141592653589793238462643383279502884
 #endif
 
+#ifndef M_LN2l
+#define M_LN2l 0.69314718055994530941723212145818L
+#endif
+
+#ifndef M_LN2
+#define M_LN2 0.69314718055994530941723212145818
+#endif
+
 #define CARRY_LEN 8
 
 namespace {
@@ -51,12 +59,13 @@ double invWeight(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return exp2l(-(long double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
+// MSVC does not truly support long double.  Use expm1 rather than exp2 and subtracting one.
 double weightM1(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2l((long double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
+  return expm1l(M_LN2l * (long double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
 double invWeightM1(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2l(- (long double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
+  return expm1l(M_LN2l * - (long double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
 double boundUnderOne(double x) { return std::min(x, nexttoward(1, 0)); }
@@ -70,16 +79,16 @@ float invWeight32(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
 }
 
 float weightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2((double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
+  return expm1(M_LN2 * (double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
 float invWeightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2(- (double)(extra(N, E, kAt(H, line, col) + rep)) / N) - 1;
+  return expm1(M_LN2 * - (double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
 float boundUnderOne(float x) { return std::min(x, nexttowardf(1, 0)); }
 
-Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
+Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
   u32 N = 2u * W * H;
   u32 groupWidth = W / nW;
 
@@ -94,7 +103,7 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
       // nVidia GPUs have a constant cache that only works on buffer sizes less than 64KB.  Create a smaller buffer
       // that is a copy of the first part of weightsIF.  There are several kernels that need the combined weightsIF
       // buffer, so there is an unfortunate duplication of these weights.
-      if (!AmdGpu) {
+      if (nvidiaGpu) {
         weightsConstIF.push_back(2 * boundUnderOne(iw));
         weightsConstIF.push_back(2 * w);
       }
@@ -114,8 +123,8 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
     vector<float> weightsIF32;
     // Inverse + Forward
     for (u32 thread = 0; thread < groupWidth; ++thread) {
-      auto iw = invWeight32(N, E, H, 0, thread, 0) ;// * 17592186044416.0f;
-      auto w = weight32(N, E, H, 0, thread, 0) ;// * 0.0000002384185791015625f;
+      auto iw = invWeight32(N, E, H, 0, thread, 0) ;
+      auto w = weight32(N, E, H, 0, thread, 0) ;
       // Play with the weight so that optionalDouble and optionalHalve work
       iw = 2.0f * boundUnderOne(iw);
       w = 2.0f * w;
@@ -125,7 +134,7 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool AmdGpu) {
       // nVidia GPUs have a constant cache that only works on buffer sizes less than 64KB.  Create a smaller buffer
       // that is a copy of the first part of weightsIF.  There are several kernels that need the combined weightsIF
       // buffer, so there is an unfortunate duplication of these weights.
-      if (!AmdGpu) {
+      if (nvidiaGpu) {
         weightsConstIF32.push_back(iw);
         weightsConstIF32.push_back(w);
       }
@@ -761,7 +770,7 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   bufTrigM{shared.bufCache->middleTrig(shared.args, fft, SMALL_H, BIG_H / SMALL_H, WIDTH)},
   bufTrigW{shared.bufCache->smallTrig(shared.args, fft, WIDTH, nW, fft.shape.middle, SMALL_H, nH, tail_single_wide)},
 
-  weights{genWeights(fft, E, WIDTH, BIG_H, nW, isAmdGpu(q->context->deviceId()))},
+  weights{genWeights(fft, E, WIDTH, BIG_H, nW, isNvidiaGpu(q->context->deviceId()))},
   bufConstWeights{q->context, std::move(weights.weightsConstIF)},
   bufWeights{q->context,      std::move(weights.weightsIF)},
 
diff --git a/src/Gpu.h b/src/Gpu.h
index 09b6aa16..2c0554a0 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -80,7 +80,6 @@ class RoeInfo {
 struct Weights {
   vector<double> weightsConstIF;
   vector<double> weightsIF;
-  vector<u32> bitsCF;
 };
 
 class Gpu {

From a9c34396f7f3e9ed852b51c0b75e21b2c407b823 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 18 Apr 2026 00:50:02 +0000
Subject: [PATCH 034/214] Worked on CONST_THREAD_WEIGHTS.  __constant__ can be
 implemented in a CUDA build but it is a bit klunky and the benefit is iffy. 
 I did change the way OpenCL's CONST_THREAD_WEIGHTS are used which is more in
 line with nVidia documentation of how constant should be used.

---
 src/Gpu.cpp          | 44 ++++++++++++++++++++++++++++----------------
 src/cl/carryfused.cl | 18 ++++++++++++------
 2 files changed, 40 insertions(+), 22 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 1c743c70..197b13a8 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -100,13 +100,6 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
     for (u32 thread = 0; thread < groupWidth; ++thread) {
       auto iw = invWeight(N, E, H, 0, thread, 0);
       auto w = weight(N, E, H, 0, thread, 0);
-      // nVidia GPUs have a constant cache that only works on buffer sizes less than 64KB.  Create a smaller buffer
-      // that is a copy of the first part of weightsIF.  There are several kernels that need the combined weightsIF
-      // buffer, so there is an unfortunate duplication of these weights.
-      if (nvidiaGpu) {
-        weightsConstIF.push_back(2 * boundUnderOne(iw));
-        weightsConstIF.push_back(2 * w);
-      }
       weightsIF.push_back(2 * boundUnderOne(iw));
       weightsIF.push_back(2 * w);
     }
@@ -116,6 +109,19 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
       weightsIF.push_back(invWeightM1(N, E, H, gy, 0, 0));
       weightsIF.push_back(weightM1(N, E, H, gy, 0, 0));
     }
+
+    // nVidia GPUs have a fast constant cache that only works on buffer sizes less than 64KB.  Create two smaller buffers
+    // that can be used to create the large group order buffer with a single multiply.
+    if (nvidiaGpu) {
+      for (u32 gy = 0; gy < 64; ++gy) {
+        weightsConstIF.push_back(invWeightM1(N, E, H, gy, 0, 0));
+        weightsConstIF.push_back(weightM1(N, E, H, gy, 0, 0));
+      }
+      for (u32 gy = 0; gy < H; gy += 64) {
+        weightsConstIF.push_back(invWeightM1(N, E, H, gy, 0, 0));
+        weightsConstIF.push_back(weightM1(N, E, H, gy, 0, 0));
+      }
+    }
   }
 
   else if (fft.FFT_FP32) {
@@ -131,13 +137,6 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
       // Weights are scaled by 2^-24 and 2^48 so that multiplicaton by 1/epsilon does not generate infinty results (width and height variant 2).
       iw = iw * 281474976710656.0f;
       w = w * 0.000000059604644775390625f;
-      // nVidia GPUs have a constant cache that only works on buffer sizes less than 64KB.  Create a smaller buffer
-      // that is a copy of the first part of weightsIF.  There are several kernels that need the combined weightsIF
-      // buffer, so there is an unfortunate duplication of these weights.
-      if (nvidiaGpu) {
-        weightsConstIF32.push_back(iw);
-        weightsConstIF32.push_back(w);
-      }
       weightsIF32.push_back(iw);
       weightsIF32.push_back(w);
     }
@@ -148,11 +147,24 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
       weightsIF32.push_back(weightM132(N, E, H, gy, 0, 0));
     }
 
+    // nVidia GPUs have a fast constant cache that only works on buffer sizes less than 64KB.  Create two smaller buffers
+    // that can be used to create the large group order buffer with a single multiply.
+    if (nvidiaGpu) {
+      for (u32 gy = 0; gy < 64; ++gy) {
+        weightsConstIF32.push_back(invWeightM132(N, E, H, gy, 0, 0));
+        weightsConstIF32.push_back(weightM132(N, E, H, gy, 0, 0));
+      }
+      for (u32 gy = 0; gy < H; gy += 64) {
+        weightsConstIF32.push_back(invWeightM132(N, E, H, gy, 0, 0));
+        weightsConstIF32.push_back(weightM132(N, E, H, gy, 0, 0));
+      }
+    }
+
     // Copy the float vectors to the double vectors
-    weightsConstIF.resize(weightsConstIF32.size() / 2);
-    memcpy((double *) weightsConstIF.data(), weightsConstIF32.data(), weightsConstIF32.size() * sizeof(float));
     weightsIF.resize(weightsIF32.size() / 2);
     memcpy((double *) weightsIF.data(), weightsIF32.data(), weightsIF32.size() * sizeof(float));
+    weightsConstIF.resize(weightsConstIF32.size() / 2);
+    memcpy((double *) weightsConstIF.data(), weightsConstIF32.data(), weightsConstIF32.size() * sizeof(float));
   }
 
   return Weights{weightsConstIF, weightsIF};
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index dff9bb08..90892cb8 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -141,10 +141,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  T2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  T2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  T2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
 #if MUL3
@@ -332,10 +335,13 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
   P(CFcarry) carryShuttlePtr = (P(CFcarry)) carryShuttle;

From 2da665d3d1f6ee1f3b312046567993b1370527a2 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 18 Apr 2026 17:11:59 +0000
Subject: [PATCH 035/214] Fixed rare bug in GF61 fft8 code committed last week.

---
 src/cl/fft8.cl |  4 ++--
 src/cl/math.cl | 28 ++++++++++++++++++++++++++--
 2 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/src/cl/fft8.cl b/src/cl/fft8.cl
index ec4fca48..99ffa23c 100644
--- a/src/cl/fft8.cl
+++ b/src/cl/fft8.cl
@@ -111,8 +111,8 @@ void OVERLOAD fft8(GF31 *u) {
 void OVERLOAD fft4CoreSpecial1(GF61 *u) {         // Starts with u[0,1,2,3] in range of 0..2*M61+epsilon.
   X2q(&u[0], &u[2]);                              // X2(u[0], u[2]);  No reductions mod M61.  u[0,2] range is 0..4+, -2-..2+
   X2q_mul_t4(&u[1], &u[3]);                       // X2(u[1], u[3]);  u[3] = mul_t4(u[3]);    u[1,3] range is 0..4+, -2-..2+
-  u[1] = optsubq(u[1], 2, 2);                     // Partially reduce.  If u[1] > 2*M61, sub 2*M61.  u[1] now has range 0..2+
-  u[3] = optsubq(u[3], 0, 2);                     // Partially reduce.  If u[3] > 0*M61, sub 2*M61.  u[3] now has range -2-..0+
+  u[1] = optsubqu(u[1], 2, 2);                    // Partially reduce.  If u[1] > 2*M61, sub 2*M61.  u[1] now has range 0..2+
+  u[3] = optsubqs(u[3], 0, 2);                    // Partially reduce.  If u[3] > 0*M61, sub 2*M61.  u[3] now has range -2-..0+
   X2q(&u[0], &u[1]);                              // X2(u[0], u[1]);  u[0,1] range is 0..6+, -2-..4+
   X2q(&u[2], &u[3]);                              // X2(u[2], u[3]);  u[2,3] range is -4-..2+, -2-..4+
   u[0] = modM61q(u[0], 0);
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 76ec9429..e1530762 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -187,6 +187,17 @@ i32 optional_mod(i32 a, const i32 b) {
 }
 
 // Optionally subtract c from a if a >= b.
+u64 OVERLOAD optional_sub(u64 a, const u64 b, const u64 c) {
+#if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.ge.u64 %%p, %0, %1;\n\t"   // a >= b
+        " @%%p sub.u64 %0, %0, %2;}"      // if (a >= b) a = a - c
+        : "+l"(a) : "l"(b), "l"(c));      // It would be nice if there was an asm constraint to indicate a 64-bit constant
+#else
+  if (a >= b) a = a - c;
+#endif
+  return a;
+}
 i64 OVERLOAD optional_sub(i64 a, const i64 b, const i64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -200,6 +211,17 @@ i64 OVERLOAD optional_sub(i64 a, const i64 b, const i64 c) {
 }
 
 // Optionally subtract c from a if hi32(a) >= b.
+u64 OVERLOAD optional_sub(u64 a, const u32 b, const u64 c) {
+#if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.ge.u32 %%p, %1, %2;\n\t"   // hi32(a) >= b
+        " @%%p sub.u64 %0, %0, %3;}"      // if (hi32(a) >= b) a = a - c
+        : "+l"(a) : "r"((u32)hi32(a)), "n"(b), "l"(c));
+#else
+  if ((u32)hi32(a) >= b) a = a - c;
+#endif
+  return a;
+}
 i64 OVERLOAD optional_sub(i64 a, const i32 b, const i64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -1092,8 +1114,10 @@ void OVERLOAD X2q_conjb(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; b->x = t.x
 
 GF61 OVERLOAD mul_t8q(GF61 a, const u32 m61_count) { return shl(U2(m61_count * M61 + (a.y - a.x), m61_count * M61 - (a.x + a.y)), 30); }
 
-Z61 OVERLOAD optsubq(Z61 a, const u32 m61_limit, const u32 m61_count) { return optional_sub((i64)a, (i32)(m61_limit << (61 - 32)), (i64)(m61_count * M61)); }
-GF61 OVERLOAD optsubq(GF61 a, const u32 m61_limit, const u32 m61_count) { return U2(optsubq(a.x, m61_limit, m61_count), optsubq(a.y, m61_limit, m61_count)); }
+Z61 OVERLOAD optsubqu(Z61 a, const u32 m61_limit, const u32 m61_count) { return optional_sub((u64)a, (u32)(m61_limit << (61 - 32)), (u64)(m61_count * M61)); }
+GF61 OVERLOAD optsubqu(GF61 a, const u32 m61_limit, const u32 m61_count) { return U2(optsubqu(a.x, m61_limit, m61_count), optsubqu(a.y, m61_limit, m61_count)); }
+Z61 OVERLOAD optsubqs(Z61 a, const u32 m61_limit, const u32 m61_count) { return optional_sub((i64)a, (i32)(m61_limit << (61 - 32)), (i64)(m61_count * M61)); }
+GF61 OVERLOAD optsubqs(GF61 a, const u32 m61_limit, const u32 m61_count) { return U2(optsubqs(a.x, m61_limit, m61_count), optsubqs(a.y, m61_limit, m61_count)); }
 GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count) { if (m61_count) { a.x += m61_count * M61; a.y += m61_count * M61; } return modM61(a); }
 GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count_x, const u32 m61_count_y) { if (m61_count_x) a.x += m61_count_x * M61; if (m61_count_y) a.y += m61_count_y * M61; return modM61(a); }
 

From 2bbb6918fd989206f4fca23353f857e7c5685f0e Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 18 Apr 2026 18:09:38 +0000
Subject: [PATCH 036/214] Micro-optimization.  Eliminated a modulo when MIDDLE
 is not a power of 2.

---
 src/cl/carryfused.cl | 45 ++++++++++++++++++++++++++------------------
 1 file changed, 27 insertions(+), 18 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 90892cb8..0b1b5f3b 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -120,11 +120,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
 #if HAS_ASM
   __asm("s_setprio 3");
@@ -314,11 +315,12 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
 #if HAS_ASM
   __asm("s_setprio 3");
@@ -502,11 +504,12 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
 #if HAS_ASM
   __asm("s_setprio 3");
@@ -713,11 +716,12 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
 #if HAS_ASM
   __asm("s_setprio 3");
@@ -933,11 +937,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -1174,11 +1179,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -1418,11 +1424,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -1661,11 +1668,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -1915,11 +1923,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 H = BIG_HEIGHT;
 #if WMUL == 1
   u32 lowMe = me;
-  u32 line = gr % H;
+  u32 line = gr;
 #else
   u32 lowMe = me % G_W;           // lane-id in one of the WMUL sub-workgroups.
-  u32 line = (gr * WMUL + me / G_W) % H;
+  u32 line = gr * WMUL + me / G_W;
 #endif
+  if (line >= H) line -= H;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;

From e5f5e18cb000ac1b6ac9c32349f023eceacd34d5 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 19 Apr 2026 00:29:11 +0000
Subject: [PATCH 037/214] Fixed the remaining CONST_THREAD_WEIGHTS that were
 overlooked in last CONST_THREAD_WEIGHTS change

---
 src/cl/carryfused.cl | 36 ++++++++++++++++++++++++------------
 1 file changed, 24 insertions(+), 12 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 0b1b5f3b..b28d5de2 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -966,10 +966,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  T2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  T2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  T2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  T2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
@@ -1211,10 +1214,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
   P(i32) carryShuttlePtr = (P(i32)) carryShuttle;
@@ -1456,10 +1462,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
@@ -1961,10 +1970,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
 
   Word2 wu[NW];
-#if AMDGPU
-  F2 weights = fancyMul(THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);
+#if !NVIDIAGPU || CUDA_BACKEND
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
 #else
-  F2 weights = fancyMul(CONST_THREAD_WEIGHTS[lowMe], THREAD_WEIGHTS[G_W + line]);            // On nVidia, don't pollute the constant cache with line weights
+  F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
+  weights.x = optionalDouble(weights.x);
+  weights.y = optionalHalve(weights.y);
+  weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
 #endif
 
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;

From 83b36feda37d674b4185ee2ade4f8e90139a14cf Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 19 Apr 2026 05:11:18 +0000
Subject: [PATCH 038/214] Slightly simpler make_Z31(i64)

---
 src/cl/math.cl | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index e1530762..09b45c5b 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -675,21 +675,6 @@ Z31 OVERLOAD modM31(i64 a) {                                          // abs(a)
   u32 ahi = a >> 62;                                                  // Sign extend the top bits
   return modM31(ahi + amid + alo);                                    // This is where caller must assure a 32-bit overflow does not occur
 }
-Z31 OVERLOAD modM31q(u64 a) {                                         // Quick version, a < 2^62
-  u32 alo = a & M31;
-  u32 ahi = a >> 31;
-  return modM31(ahi + alo);
-}
-#if 0                                           // GWBUG - which is faster?
-Z31 OVERLOAD modM31q(i64 a) {                                         // Quick version, abs(a) must be 61 bits
-  u32 alo = a & M31;
-  i32 ahi = a >> 31;                                                  // Sign extend the top bits
-  if (ahi < 0) ahi = ahi + M31;
-  return modM31((u32) ahi + alo);
-}
-#else
-Z31 OVERLOAD modM31q(i64 a) { return modM31(a); }                     // Quick version, abs(a) must be 61 bits
-#endif
 
 Z31 OVERLOAD neg(Z31 a) { return M31 - a; }                           // GWBUG: Examine all callers to see if neg call can be avoided
 GF31 OVERLOAD neg(GF31 a) { return U2(neg(a.x), neg(a.y)); }
@@ -702,7 +687,12 @@ GF31 OVERLOAD sub(GF31 a, GF31 b) { return U2(sub(a.x, b.x), sub(a.y, b.y)); }
 
 Z31 OVERLOAD make_Z31(i32 a) { return (Z31) (a < 0 ? a + M31 : a); }    // Handles signed values of a
 Z31 OVERLOAD make_Z31(u32 a) { return (Z31) (a); }                      // a must be in range of 0 .. M31-1
-Z31 OVERLOAD make_Z31(i64 a) { return modM31q(a); }                     // Handles range -2^61..2^61
+Z31 OVERLOAD make_Z31(i64 a) {                                          // Handles range -2^61..2^61
+  u32 alo = (u32)a & M31;
+  i32 ahi = (i32)((u64)a >> 31);                                        // Unsigned shift might be faster than signed shift
+  ahi = optional_add(ahi, M31);                                         // Make ahi positive
+  return modM31((u32)ahi + alo);
+}
 
 u32 get_Z31(Z31 a) { return a == M31 ? 0 : a; }                         // Get value in range 0 to M31-1
 i32 get_balanced_Z31(Z31 a) { return (a & 0xC0000000) ? (i32) a - M31 : (i32) a; }  // Get balanced value in range -M31/2 to M31/2

From a6530f51e272f9047230ef5faa519587d08d93c2 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 19 Apr 2026 10:52:25 +0000
Subject: [PATCH 039/214] Explicitly calll Z61's modM61 rather than assuming
 add() will.  The add routine does not expect inputs out of the range
 0..M61+epsilon.

---
 src/cl/carryutil.cl | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 2f9f7f65..dfaf3ee3 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -415,12 +415,12 @@ i96 weightAndCarryOne(Z31 u31, Z61 u61, u32 m31_invWeight, u32 m61_invWeight, bo
   // Use chinese remainder theorem to create a 92-bit result.  Loosely copied from Yves Gallot's mersenne2 program.
   u32 n31 = get_Z31(u31);
   u61 += make_u64(hi32(M61), lo32(M61) - n31);   // u61 - u31
-  u61 = add(u61, shl(u61, 31));                  // u61 + (u61 << 31)
+  u61 += shl(u61, 31);                           // u61 + (u61 << 31)
 
   // The resulting value will be get_Z61(u61) * M31 + n31 and if larger than ~M31*M61/2 return a negative value by subtracting M31 * M61.
   // We can save a little work by determining if the result will be large using just u61 and returning (get_Z61(u61) - M61) * M31 + n31.
   // This simplifies to get_balanced_Z61(u61) * M31 + n31.
-  i64 n61 = get_balanced_Z61(u61);
+  i64 n61 = get_balanced_Z61(modM61(u61));
 
   // Optionally calculate roundoff error as proximity to M61/2.  28 bits of accuracy should be sufficient.
   u32 roundoff = (u32) abs((i32)hi32(n61));
@@ -452,15 +452,14 @@ i128 weightAndCarryOne(float uF2, Z31 u31, Z61 u61, float F2_invWeight, u32 m31_
   // Apply inverse weights
   u31 = shr(u31, m31_invWeight);
   u61 = shr(u61, m61_invWeight);
-
   // Use chinese remainder theorem to create a 92-bit result.  Loosely copied from Yves Gallot's mersenne2 program.
   u32 n31 = get_Z31(u31);
   u61 += make_u64(hi32(M61), lo32(M61) - n31);       // u61 - u31
-  u61 = add(u61, shl(u61, 31));                      // u61 + (u61 << 31)
-  u64 n61 = get_Z61(u61);
+  u61 += shl(u61, 31);                               // u61 + (u61 << 31)
+  u64 n61 = get_Z61(modM61(u61));
   // Let's call the 92-bit CRT result n3161.  At this point, n3161 = n61 * M31 + n31.
 
-  // The final result mod M31*M61 must be n3161.  Use FP32 data to calculate how many multiples of M31*M61 need to be added to n31n61.
+  // The final result mod M31*M61 must be n3161.  Use FP32 data to calculate how many multiples of M31*M61 need to be added to n3161.
   float n3161f = (float)hi32(n61) * -9223372036854775808.0f;                 // Estimate -n3161 as a float.  -n61 << 31 should be close enough.
   uF2 = fma(uF2, F2_invWeight, n3161f);                                      // This should be close to an integer multiple of M31*M61
   float uF2int = fma(uF2, 2.0194839183061857038255724444152e-28f, RNDVAL);   // Divide by M31*M61 and round to int

From 036061ea1a54e1c54e740e6de4d2be5f419c7f89 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Apr 2026 01:58:02 +0000
Subject: [PATCH 040/214] Added shufl code to eliminate LDS bank conflicts
 using either padding or swizzling. Padding seems better than swizzling in all
 tests.  Both add to register pressure, swizzling more than padding. Benefit
 ranges from 0% to ~2%.  Oddly Radeon VII benefits, but only in fftheight. 
 The padding code has apparently makes the rocm optimizer unhappy with
 carryfused. Also started reorganization to allow moving more code from
 fftheight and fftwidth to fftbase.

---
 src/Gpu.cpp            |  12 +-
 src/cl/base.cl         |   9 +
 src/cl/carry.cl        |   3 +
 src/cl/carryb.cl       |   2 +
 src/cl/carryfused.cl   |   8 +-
 src/cl/carryutil.cl    |   3 -
 src/cl/fft-middle.cl   |   1 +
 src/cl/fft7.cl         |   2 -
 src/cl/fftbase.cl      | 439 ++++++++++++++++++++++++++++++++++++++---
 src/cl/fftheight.cl    |  16 +-
 src/cl/ffthin.cl       |   4 -
 src/cl/fftmiddlein.cl  |   1 -
 src/cl/fftmiddleout.cl |   1 -
 src/cl/fftp.cl         |  21 +-
 src/cl/fftw.cl         |   9 +-
 src/cl/fftwidth.cl     |  14 +-
 src/cl/math.cl         |   2 -
 src/cl/tailmul.cl      |   7 +-
 src/cl/tailsquare.cl   |   8 +-
 src/cl/tailutil.cl     |  20 +-
 src/cl/trig.cl         |   2 -
 21 files changed, 489 insertions(+), 95 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 197b13a8..446b9638 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -550,15 +550,15 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
   case CARRYFUSED:         // Register usage depends on NW, the FFT/NTT type, and perhaps the long carry setting
     switch (fft.shape.fft_type) {
     case FFT64:
-      regs = nW == 8 ? 72 : 64;
+      regs = nW == 8 ? 80 : 64;
       use_override = "REGCF64";
       break;
     case FFT3161:
-      regs = nW == 8 ? 96 : 56;
+      regs = nW == 8 ? 96 : 64;
       use_override = "REGCF3161";
       break;
     case FFT3261:
-      regs = nW == 8 ? 96 : 56;
+      regs = nW == 8 ? 96 : 64;
       use_override = "REGCF3261";
       break;
     case FFT61:
@@ -566,7 +566,7 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
       use_override = "REGCF61";
       break;
     case FFT323161:
-      regs = nW == 8 ? 128 : 72;
+      regs = nW == 8 ? 128 : 80;
       use_override = "REGCF323161";
       break;
     case FFT3231:
@@ -622,7 +622,7 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
     break;
   case TAIL:               // Register usage depends on NH and the FP32/FP64 (assumes double-wide kernel)
     if (fft.FFT_FP64) {
-      regs = nH == 8 ? 80 : 64;
+      regs = nH == 8 ? 88 : 64;
       use_override = "REGTS64";
     } else {
       regs = nH == 8 ? 64 : 48;
@@ -630,7 +630,7 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
     }
     break;
   case TAIL31:             // Register usage depends on NH (assumes double-wide kernel)
-    regs = nH == 8 ? 56 : 48;
+    regs = nH == 8 ? 64 : 48;
     use_override = "REGTS31";
     break;
   case TAIL61:             // Register usage depends on NH (assumes double-wide kernel)
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 2fc32c06..0b1feb02 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -145,6 +145,15 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define SHUFL_BYTES_H 8
 #endif
 
+// Shufl can pad (or swizzle) to avoid LDS bank conflicts.  See fftbase.cl.  You would think this option would be good (or bad)
+// for both fft_width and fft_height, but the rocm optimizer is super-finicky.  Default to using LDS padding.
+#if !defined(LDSPAD_W)
+#define LDSPAD_W 1
+#endif
+#if !defined(LDSPAD_H)
+#define LDSPAD_H 1
+#endif
+
 #if !defined(TABMUL_CHAIN)
 #define TABMUL_CHAIN 0
 #endif
diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index 28863dd8..88a0b2b2 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -1,5 +1,8 @@
 // Copyright (C) Mihai Preda
 
+#include "base.cl"
+#include "math.cl"
+#include "trig.cl"
 #include "carryutil.cl"
 #include "weight.cl"
 
diff --git a/src/cl/carryb.cl b/src/cl/carryb.cl
index d6033e19..c08004cd 100644
--- a/src/cl/carryb.cl
+++ b/src/cl/carryb.cl
@@ -1,5 +1,7 @@
 // Copyright (C) Mihai Preda
 
+#include "base.cl"
+#include "math.cl"
 #include "carryutil.cl"
 
 KERNEL(G_W) carryB(P(Word2) io, CP(CarryABM) carryIn) {
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index b28d5de2..1d1feaca 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -1,8 +1,9 @@
 // Copyright (C) Mihai Preda
 
+#include "base.cl"
+#include "fftwidth.cl"
 #include "carryutil.cl"
 #include "weight.cl"
-#include "fftwidth.cl"
 #include "middle.cl"
 
 void spin() {
@@ -16,10 +17,7 @@ void spin() {
 #endif
 }
 
-// LDS bytes used by shufl for each line processed in fft_WIDTH
-#define LDS_BYTES  (WIDTH * SHUFL_BYTES_W)
-
-// Increasing WMUL to 2 will reduce carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
+// Increasing WMUL to 2 reduces carryShuttle activity.  This led to a 1% speedup on Titan V.  Testing on other GPUs is needed.
 #ifndef WMUL
 #define WMUL 2
 #endif
diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index dfaf3ee3..4ae4b576 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -1,8 +1,5 @@
 // Copyright (C) Mihai Preda
 
-#include "base.cl"
-#include "math.cl"
-
 #if CARRY64
 typedef i64 CFcarry;
 #else
diff --git a/src/cl/fft-middle.cl b/src/cl/fft-middle.cl
index 2f75478c..c0d96ad5 100644
--- a/src/cl/fft-middle.cl
+++ b/src/cl/fft-middle.cl
@@ -1,5 +1,6 @@
 // Copyright (C) Mihai Preda
 
+#include "math.cl"
 #include "trig.cl"
 
 #if MIDDLE == 3
diff --git a/src/cl/fft7.cl b/src/cl/fft7.cl
index 450cfa7d..96e2827e 100644
--- a/src/cl/fft7.cl
+++ b/src/cl/fft7.cl
@@ -2,8 +2,6 @@
 
 #pragma once
 
-#include "base.cl"
-
 #if FFT_FP64
 
 #define A(i) u[(base + i * step) % M]
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 7f581728..dd0d5449 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -2,44 +2,310 @@
 
 #include "fft4.cl"
 #include "fft8.cl"
-#include "trig.cl"
-// #include "math.cl"
 
+// Calculate the LDS bytes used by shufl
+#if LDSPAD && SHUFL_BYTES == 16 && RADIX == 8
+#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 72 / 64)
+#elif LDSPAD && SHUFL_BYTES == 16 && RADIX == 4
+#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 20 / 16)
+#elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 8
+#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 72 / 64)
+#elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 4
+#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 20 / 16)
+#else
+#define LDS_BYTES     (WGSZ * RADIX * SHUFL_BYTES)
+#endif
 
 #if FFT_FP64 | NTT_GF61
 
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values.  Each WG uses WG * sb bytes of LDS memory.
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
 // Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
 // even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
 // WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
 // n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
-// sb = The number of bytes to write to LDS memory at a time.  SHUFL_BYTES_W or SHUFL_BYTES_H
 // numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
 // lowMe = me % WG
 // NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
 // before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
 // only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
-// minor optimization would be to spedial case the first shufl call.
-void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+// minor optimization would be to special case the first shufl call.
+void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
 
-  if (sb == 16) {
+  int force_default = 0;
+#if NOWG2                       // For timing tests only.  Option to not turn off LDS bank conflict code when numWG > 1.  I've not found a GPU where this is beneficial.
+  if (numWG > 1) force_default = 1;
+#endif
+#if NOLDS2                      // For timing tests only.  Option to not turn off LDS bank for second shufl calls.  I've not found a GPU where this is beneficial.
+  if (f != 1) force_default = 1;
+#endif
+
+  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES == 16) {
     local T2* lds = ((local T2*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(T2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
+
+#if LDSPAD
+    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Pad after every 8th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe * 9 + i] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // No padding of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
+    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
+    // We can however save a bar() by writing to same locations that previous shufl wrote to.
+    if (!force_default && f == 8 && n == 8) {
+      for (u32 i = 0; i < n; ++i) { lds[(i * WG + lowMe) * 9 / 8] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[((lowMe & ~7) + i) * 9 + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Pad after every 8th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 9 / 8] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
+      return;
+    }
 
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
+    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
+    // We can however save a bar() by writing to same locations that previous shufl wrote to.
+    if (!force_default && f == 8 && n == 8) {
+      for (u32 i = 0; i < n; ++i) { lds[i * WG + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code
     bar(WG);
     for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
     bar(WG);
     for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
   }
 
-  else if (sb == 8) {
-    // Accessing lds memory as doubles is faster than T2 accesses on Radeon VII (halving LDS memory requirements)
+  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
+  else if (SHUFL_BYTES == 8) {
     local T* lds = ((local T*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(T);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T);
+
+#if LDSPAD
+    // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Pad after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (!force_default && f == 8 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i].x = lds[idx + idx / 64 * 8]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i].y = lds[idx + idx / 64 * 8]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Pad after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i].x = lds[idx + idx / 16 * 4]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i].y = lds[idx + idx / 16 * 4]; }
+      return;
+    }
+#endif
 
+#if LDSSWIZ
+    // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
+    if (!force_default && f == 8 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
+
+    // Execute the original shufl code
     bar(WG);
     for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
     bar(WG);
@@ -50,12 +316,14 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, co
     for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + lowMe]; }
   }
 
-  else if (sb == 4) {
+  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
+  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  else if (SHUFL_BYTES == 4) {
     // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
     // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
     // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
     local int* lds = (local int*) lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(int);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
 
     bar(WG);
     for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).x; }
@@ -82,27 +350,146 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, co
 #if FFT_FP32 | NTT_GF31
 
 // Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats.
-void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
+void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
 
-  //GW - would a 16 byte implementation be useful?
+  //GW - would a 16 byte implementation be useful?  Less LDS conflict work?
+
+  int force_default = 0;
+#if NOWG2
+  if (numWG > 1) force_default = 1;
+#endif
+#if NOLDS2
+  if (f != 1) force_default = 1;
+#endif
 
-  if (sb >= 8) {
+  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES >= 8) {
     local F2* lds = ((local F2*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(F2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
+
+#if LDSPAD
+    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Pad after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (!force_default && f == 8 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i] = lds[idx + idx / 64 * 8]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Pad after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
+    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
+    if (!force_default && f == 1 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
+    if (!force_default && f == 8 && n == 8) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (!force_default && f == 1 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (!force_default && f == 4 && n == 4) {
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
 
+    // Execute the original shufl code
     bar(WG);
     for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
     bar(WG);
     for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
   }
 
-  else if (sb == 4) {
+  // If SHUFL_BYTES is 4 we split the F2 values into 2 int values.  These are written to LDS memory using two instructions.
+  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  else if (SHUFL_BYTES == 4) {
     // Accessing lds memory as ints might be faster than F2 accesses (halving LDS memory requirements)
     local F* lds = ((local F*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * n * WG * sb / sizeof(F);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F);
 
     bar(WG);
     for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
@@ -220,7 +607,7 @@ T2 bcast(T2 src, u32 span) {
 #endif
 
 void OVERLOAD shufl(u32 WG, local T2 *lds, T2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl64(WG, lds, u, n, f, numWG, sb, lowMe);
+  shufl64(WG, lds, u, n, f, numWG, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
@@ -530,7 +917,7 @@ void OVERLOAD chainMul4(F2 *u, F2 w) {
 
 void OVERLOAD chainMul8(F2 *u, F2 w, u32 tailSquareBcast) {
   u[1] = cmulFancy(u[1], w);
-						  //GWBUG - see FP64 version for many possible optimizations
+                                                  //GWBUG - see FP64 version for many possible optimizations
   F2 w2 = csqTrigFancy(w);
   u[2] = cmulFancy(u[2], w2);
 
@@ -553,7 +940,7 @@ void OVERLOAD chainMul(u32 len, F2 *u, F2 w, u32 tailSquareBcast) {
 }
 
 void OVERLOAD shufl(u32 WG, local F2 *lds, F2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl32(WG, lds, u, n, f, numWG, sb, lowMe);
+  shufl32(WG, lds, u, n, f, numWG, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
@@ -858,7 +1245,7 @@ void OVERLOAD chainMul(u32 len, GF31 *u, GF31 w) {
 }
 
 void OVERLOAD shufl(u32 WG, local GF31 *lds, GF31 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl32(WG, (local F2 *) lds, (local F2 *) u, n, f, numWG, sb, lowMe);
+  shufl32(WG, (local F2 *) lds, (local F2 *) u, n, f, numWG, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
@@ -896,7 +1283,7 @@ void OVERLOAD chainMul4(GF61 *u, GF61 w) {
   GF61 base = csq(w);
   u[2] = cmul(u[2], base);
 
-  base = cmul(base, w);			//GWBUG - see FP64 version for possible optimization
+  base = cmul(base, w);                 //GWBUG - see FP64 version for possible optimization
   u[3] = cmul(u[3], base);
 }
 
@@ -906,7 +1293,7 @@ void OVERLOAD chainMul8(GF61 *u, GF61 w, u32 tailSquareBcast) {
   GF61 w2 = csq(w);
   u[2] = cmul(u[2], w2);
 
-  GF61 base = cmul(w2, w);		//GWBUG - see FP64 version for many possible optimizations
+  GF61 base = cmul(w2, w);              //GWBUG - see FP64 version for many possible optimizations
   for (int i = 3; i < 8; ++i) {
     u[i] = cmul(u[i], base);
     base = cmul(base, w);
@@ -921,7 +1308,7 @@ void OVERLOAD chainMul(u32 len, GF61 *u, GF61 w, u32 tailSquareBcast) {
 }
 
 void OVERLOAD shufl(u32 WG, local GF61 *lds, GF61 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl64(WG, (local T2 *) lds, (T2 *) u, n, f, numWG, sb, lowMe);
+  shufl64(WG, (local T2 *) lds, (T2 *) u, n, f, numWG, lowMe);
 }
 
 void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
diff --git a/src/cl/fftheight.cl b/src/cl/fftheight.cl
index 80e148db..a528bf5e 100644
--- a/src/cl/fftheight.cl
+++ b/src/cl/fftheight.cl
@@ -1,8 +1,16 @@
 // Copyright (C) Mihai Preda
 
-#include "base.cl"
+// #defines that allow fft_height and fft_width share common code in fftbase.cl
+#define VARIANT       FFT_VARIANT_H
+#define LDSPAD        LDSPAD_H
+#define LDSSWIZ       LDSSWIZ_H
+#define SHUFL_BYTES   SHUFL_BYTES_H
+#define WGSZ          G_H                           // Change this to WG!!!
+#define RADIX         NH
+
+#include "math.cl"
+#include "trig.cl"
 #include "fftbase.cl"
-#include "middle.cl"
 
 #if SMALL_HEIGHT != 256 && SMALL_HEIGHT != 512 && SMALL_HEIGHT != 1024 && SMALL_HEIGHT != 4096
 #error SMALL_HEIGHT must be one of: 256, 512, 1024, 4096
@@ -71,7 +79,7 @@ void OVERLOAD new_fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, c
 
   // This line mimics shufl -- partition lds
   local T2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * SMALL_HEIGHT * sb / sizeof(T2);
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
 
 // Custom code for various SMALL_HEIGHT values
 
@@ -208,7 +216,7 @@ void OVERLOAD new_fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, con
 
   // This line mimics shufl -- partition lds
   local F2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * SMALL_HEIGHT * sb / sizeof(F2);
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
 
 // Custom code for various SMALL_HEIGHT values
 
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index 233aa92f..d9af5c5b 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -1,12 +1,8 @@
 // Copyright (C) Mihai Preda
 
 #include "base.cl"
-#include "math.cl"
 #include "fftheight.cl"
 
-// LDS bytes used by shufl for each line processed in fft_HEIGHT
-#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
-
 #if FFT_FP64
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
diff --git a/src/cl/fftmiddlein.cl b/src/cl/fftmiddlein.cl
index 14b43013..1c97e612 100644
--- a/src/cl/fftmiddlein.cl
+++ b/src/cl/fftmiddlein.cl
@@ -1,7 +1,6 @@
 // Copyright (C) Mihai Preda and George Woltman
 
 #include "base.cl"
-#include "math.cl"
 #include "fft-middle.cl"
 #include "middle.cl"
 
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index 9249c8c3..6e05b712 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -1,7 +1,6 @@
 // Copyright (C) Mihai Preda and George Woltman
 
 #include "base.cl"
-#include "math.cl"
 #include "fft-middle.cl"
 #include "middle.cl"
 
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index 21cacf77..e7cdbd35 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -1,16 +1,15 @@
 // Copyright (C) Mihai Preda
 
 #include "base.cl"
-#include "math.cl"
-#include "weight.cl"
 #include "fftwidth.cl"
+#include "weight.cl"
 #include "middle.cl"
 
 #if FFT_TYPE == FFT64
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
   T2 u[NW];
 
   u32 g = get_group_id(0);
@@ -41,7 +40,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 lds[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
   F2 u[NW];
 
   u32 g = get_group_id(0);
@@ -72,7 +71,7 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
-  local GF31 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
   GF31 u[NW];
 
   u32 g = get_group_id(0);
@@ -127,7 +126,7 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
-  local GF61 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
   GF61 u[NW];
 
   u32 g = get_group_id(0);
@@ -184,7 +183,7 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
   T2 u[NW];
   GF31 u31[NW];
@@ -252,7 +251,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 ldsF2[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
+  local F2 ldsF2[LDS_BYTES / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
   F2 uF2[NW];
   GF31 u31[NW];
@@ -322,7 +321,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   F2 uF2[NW];
   GF61 u61[NW];
@@ -392,7 +391,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
-  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
   GF31 u31[NW];
   GF61 u61[NW];
@@ -475,7 +474,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
   F2 uF2[NW];
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index 789a707d..6b54faf7 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -1,7 +1,6 @@
 // Copyright (C) Mihai Preda
 
 #include "base.cl"
-#include "math.cl"
 #include "fftwidth.cl"
 #include "middle.cl"
 
@@ -9,7 +8,7 @@
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[WIDTH * SHUFL_BYTES_W / sizeof(T2)];
+  local T2 lds[LDS_BYTES / sizeof(T2)];
 
   T2 u[NW];
   u32 g = get_group_id(0);
@@ -34,7 +33,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[WIDTH * SHUFL_BYTES_W / sizeof(F2)];
+  local F2 lds[LDS_BYTES / sizeof(F2)];
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -62,7 +61,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF31
 
 KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -90,7 +89,7 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF61
 
 KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[WIDTH * SHUFL_BYTES_W / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
diff --git a/src/cl/fftwidth.cl b/src/cl/fftwidth.cl
index 11c5d1cf..e5ef26e0 100644
--- a/src/cl/fftwidth.cl
+++ b/src/cl/fftwidth.cl
@@ -1,5 +1,15 @@
 // Copyright (C) Mihai Preda
 
+// #defines that allow fft_height and fft_width share common code in fftbase.cl
+#define VARIANT       FFT_VARIANT_W
+#define LDSPAD        LDSPAD_W
+#define LDSSWIZ       LDSSWIZ_W
+#define SHUFL_BYTES   SHUFL_BYTES_W
+#define WGSZ          G_W                           // Change this to WG!!!
+#define RADIX         NW
+
+#include "math.cl"
+#include "trig.cl"
 #include "fftbase.cl"
 
 #if WIDTH != 256 && WIDTH != 512 && WIDTH != 1024 && WIDTH != 4096 && WIDTH != 625
@@ -78,7 +88,7 @@ void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u3
 
   // This line mimics shufl -- partition lds
   local T2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * WIDTH * sb / sizeof(T2);
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
 
 // Custom code for various WIDTH values
 
@@ -249,7 +259,7 @@ void OVERLOAD new_fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, cons
 
   // This line mimics shufl -- partition lds
   local F2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * WIDTH * sb / sizeof(F2);
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
 
 // Custom code for various WIDTH values
 
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 09b45c5b..8408f397 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -2,8 +2,6 @@
 
 #pragma once
 
-#include "base.cl"
-
 // Access parts of a 64-bit value
 
 u32 OVERLOAD lo32(u64 x) { return (u32)x; }
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index b871021b..9728edc7 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -1,12 +1,9 @@
 // Copyright (C) Mihai Preda and George Woltman
 
 #include "base.cl"
-#include "tailutil.cl"
-#include "trig.cl"
 #include "fftheight.cl"
-
-// LDS bytes used by shufl for each line processed in fft_HEIGHT
-#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+#include "tailutil.cl"
+#include "middle.cl"
 
 #if FFT_FP64
 
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index c727859c..970baa32 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -1,11 +1,9 @@
 // Copyright (C) Mihai Preda and George Woltman
 
-#include "tailutil.cl"
-#include "trig.cl"
+#include "base.cl"
 #include "fftheight.cl"
-
-// LDS bytes used by shufl for each line processed in fft_HEIGHT
-#define LDS_BYTES  (SMALL_HEIGHT * SHUFL_BYTES_H)
+#include "tailutil.cl"
+#include "middle.cl"
 
 #if FFT_FP64
 
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index 9234f858..43604852 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -1,7 +1,5 @@
 // Copyright (C) Mihai Preda
 
-#include "math.cl"
-
 // TAIL_TRIGS setting:
 //      2 = No memory accesses, trig values computed from scratch.  Good for excellent DP GPUs such as Titan V or Radeon VII Pro.
 //      1 = Limited memory accesses and some DP computation.  Tuned for Radeon VII a GPU with good DP performance.
@@ -141,7 +139,7 @@ void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
 
   if (SHUFL_BYTES_H >= 8) {
     local T2 *lds = lds2;
-    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);
+    if (me >= G_H) lds += LDS_BYTES / sizeof(T2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
@@ -158,7 +156,7 @@ void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
 
   else if (SHUFL_BYTES_H == 4) {
     local T *lds = (local T *) lds2;
-    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
+    if (me >= G_H) lds += LDS_BYTES / sizeof(T);
     bar(G_H);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i].x; }
     bar(G_H);
@@ -179,8 +177,8 @@ void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
   if (SHUFL_BYTES_H >= 8) {
     local T2 *ldsOut = lds2;
     local T2 *ldsIn = lds2;
-    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);     // Crossing LDS halves
-    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T2);               // Staying within LDS halves (just like shufl)
+    if (me < G_H) ldsOut += LDS_BYTES / sizeof(T2);     // Crossing LDS halves
+    else ldsIn += LDS_BYTES / sizeof(T2);               // Staying within LDS halves (just like shufl)
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
@@ -190,8 +188,8 @@ void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
   else if (SHUFL_BYTES_H == 4) {
     local T *ldsOut = (local T *) lds2;
     local T *ldsIn = (local T *) lds2;
-    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
-    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(T);
+    if (me < G_H) ldsOut += LDS_BYTES / sizeof(T);
+    else ldsIn += LDS_BYTES / sizeof(T);
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
     bar();   // we need a full bar because we just crossed halves
@@ -353,7 +351,7 @@ void OVERLOAD reverse2(local F2 *lds, F2 *u) {
   u32 lowMe = me % G_H;
 
   if (SHUFL_BYTES_H >= 4) {
-    if (me >= G_H) lds += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
+    if (me >= G_H) lds += LDS_BYTES / sizeof(F2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
@@ -378,8 +376,8 @@ void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
   if (SHUFL_BYTES_H >= 4) {
     local F2 *ldsOut = lds2;
     local F2 *ldsIn = lds2;
-    if (me < G_H) ldsOut += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
-    else ldsIn += SMALL_HEIGHT * SHUFL_BYTES_H / sizeof(F2);
+    if (me < G_H) ldsOut += LDS_BYTES / sizeof(F2);
+    else ldsIn += LDS_BYTES / sizeof(F2);
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
diff --git a/src/cl/trig.cl b/src/cl/trig.cl
index ebdd2af9..c03b544e 100644
--- a/src/cl/trig.cl
+++ b/src/cl/trig.cl
@@ -2,8 +2,6 @@
 
 #pragma once
 
-#include "math.cl"
-
 #if FFT_FP64
 
 T2 reducedCosSin(int k, double cosBase) {

From 8592e36dbbcc820bf899147c9aad5764ad8943eb Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Apr 2026 14:57:15 +0000
Subject: [PATCH 041/214] From last commit, repaired a missing include file.

---
 src/cl/ffthin.cl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index d9af5c5b..faea14dd 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -2,6 +2,7 @@
 
 #include "base.cl"
 #include "fftheight.cl"
+#include "middle.cl"
 
 #if FFT_FP64
 

From 16361e928533f9b0a0594d8662b3a0f3746abdaf Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Apr 2026 17:48:26 +0000
Subject: [PATCH 042/214] Moved lots of common code from fftwith.cl and
 fftheight.cl into fftbase.cl.  Much cleaner.

---
 src/cl/base.cl       |   2 +
 src/cl/carryfused.cl |  60 ++--
 src/cl/fftbase.cl    | 747 ++++++++++++++++++++++++++++++++-----------
 src/cl/fftheight.cl  | 360 ++-------------------
 src/cl/ffthin.cl     |   8 +-
 src/cl/fftp.cl       |  30 +-
 src/cl/fftw.cl       |   8 +-
 src/cl/fftwidth.cl   | 434 ++-----------------------
 src/cl/selftest.cl   |   1 +
 src/cl/tailmul.cl    | 136 ++++----
 src/cl/tailsquare.cl | 128 ++++----
 src/cl/tailutil.cl   | 222 ++++++-------
 12 files changed, 903 insertions(+), 1233 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 0b1feb02..e0168f8d 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -34,6 +34,8 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define STR(x) XSTR(x)
 #define XSTR(x) #x
 
+#pragma clang diagnostic ignored "-Wconstant-logical-operand"
+
 #define OVERLOAD __attribute__((overloadable))
 
 #pragma OPENCL FP_CONTRACT ON
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 1d1feaca..5d169d41 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -137,7 +137,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -288,7 +288,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP64
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds, u, smallTrig, WMUL, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -332,7 +332,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -478,7 +478,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds, u, smallTrig, WMUL, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -521,7 +521,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 
@@ -690,7 +690,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 
   dependentLaunch();   // Next kernel will be fftMiddleInGF31
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds, u, smallTrig, WMUL, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -733,7 +733,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 // common sub-expressions to re-use in the second fft_WIDTH call.  Re-using this data requires dozens of VGPRs
 // which causes a terrible reduction in occupancy.
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 
@@ -908,7 +908,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 
   dependentLaunch();   // Next kernel will be fftMiddleInGF61
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds, u, smallTrig, WMUL, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 }
 
@@ -956,12 +956,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
 
   readCarryFusedLine(in, u, line, lowMe);
-  new_fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   dependentLaunchWait();   // Previous kernel was fftMiddleOutGF31
 
   readCarryFusedLine(in31, u31, line, lowMe);
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -1148,12 +1148,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  new_fft_WIDTH2(lds, u, smallTrig, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds, u, smallTrig, WMUL, lowMe);
   writeCarryFusedLine(u, out, line, lowMe);
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
-  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds31, u31, smallTrig31, WMUL, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 }
 
@@ -1204,12 +1204,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
 
   readCarryFusedLine(inF2, uF2, line, lowMe);
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, lowMe);
 
   dependentLaunchWait();   // Previous kernel was fftMiddleOutGF31
 
   readCarryFusedLine(in31, u31, line, lowMe);
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -1396,12 +1396,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
-  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds31, u31, smallTrig31, WMUL, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 }
 
@@ -1452,12 +1452,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
 
   readCarryFusedLine(inF2, uF2, line, lowMe);
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, lowMe);
 
   dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
 
   readCarryFusedLine(in61, u61, line, lowMe);
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -1644,12 +1644,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
-  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds61, u61, smallTrig61, WMUL, lowMe);
   writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
@@ -1699,12 +1699,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
 
   readCarryFusedLine(in31, u31, line, lowMe);
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, lowMe);
 
   dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
 
   readCarryFusedLine(in61, u61, line, lowMe);
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 
@@ -1896,12 +1896,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds31, u31, smallTrig31, WMUL, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 
   dependentLaunch();   // Next kernel will be fftMiddleInGF31
 
-  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds61, u61, smallTrig61, WMUL, lowMe);
   writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
@@ -1957,15 +1957,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 zerohack = ZEROHACK_W * (u32) get_group_id(0) / 131072;
 
   readCarryFusedLine(inF2, uF2, line, lowMe);
-  new_fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(ldsF2 + zerohack, uF2, smallTrigF2 + zerohack, WMUL, lowMe);
 
   readCarryFusedLine(in31, u31, line, lowMe);
-  new_fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, lowMe);
 
   dependentLaunchWait();   // Previous kernel was fftMiddleOutGF61
 
   readCarryFusedLine(in61, u61, line, lowMe);
-  new_fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
 #if !NVIDIAGPU || CUDA_BACKEND
@@ -2176,15 +2176,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  new_fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(ldsF2, uF2, smallTrigF2, WMUL, lowMe);
   writeCarryFusedLine(uF2, outF2, line, lowMe);
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
 
-  new_fft_WIDTH2(lds31, u31, smallTrig31, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds31, u31, smallTrig31, WMUL, lowMe);
   writeCarryFusedLine(u31, out31, line, lowMe);
 
-  new_fft_WIDTH2(lds61, u61, smallTrig61, WMUL, SHUFL_BYTES_W, lowMe);
+  fft_WIDTH2(lds61, u61, smallTrig61, WMUL, lowMe);
   writeCarryFusedLine(u61, out61, line, lowMe);
 }
 
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index dd0d5449..498d18f0 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -5,15 +5,15 @@
 
 // Calculate the LDS bytes used by shufl
 #if LDSPAD && SHUFL_BYTES == 16 && RADIX == 8
-#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 72 / 64)
+#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 72 / 64)
 #elif LDSPAD && SHUFL_BYTES == 16 && RADIX == 4
-#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 20 / 16)
+#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 20 / 16)
 #elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 8
-#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 72 / 64)
+#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 72 / 64)
 #elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 4
-#define LDS_BYTES     ((WGSZ * RADIX * SHUFL_BYTES) * 20 / 16)
+#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 20 / 16)
 #else
-#define LDS_BYTES     (WGSZ * RADIX * SHUFL_BYTES)
+#define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
 #endif
 
 #if FFT_FP64 | NTT_GF61
@@ -29,7 +29,7 @@
 // before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
 // only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
 // minor optimization would be to special case the first shufl call.
-void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u32 lowMe) {
+void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -52,11 +52,11 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Pad after every 8th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe * 9 + i] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe * 9 + i] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
       return;
     }
 
@@ -66,10 +66,10 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // No padding of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
     // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
     // We can however save a bar() by writing to same locations that previous shufl wrote to.
-    if (!force_default && f == 8 && n == 8) {
-      for (u32 i = 0; i < n; ++i) { lds[(i * WG + lowMe) * 9 / 8] = u[i]; }
+    if (!force_default && f == 8 && RADIX == 8) {
+      for (u32 i = 0; i < RADIX; ++i) { lds[(i * WG + lowMe) * 9 / 8] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[((lowMe & ~7) + i) * 9 + (lowMe & 7)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[((lowMe & ~7) + i) * 9 + (lowMe & 7)]; }
       return;
     }
 
@@ -77,11 +77,11 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Pad after every 8th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 9 / 8] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 9 / 8] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
       return;
     }
 
@@ -89,11 +89,11 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
     // Pad 4 values after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
       return;
     }
 #endif
@@ -103,11 +103,11 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
       return;
     }
 
@@ -117,10 +117,10 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
     // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
     // We can however save a bar() by writing to same locations that previous shufl wrote to.
-    if (!force_default && f == 8 && n == 8) {
-      for (u32 i = 0; i < n; ++i) { lds[i * WG + lowMe] = u[i]; }
+    if (!force_default && f == 8 && RADIX == 8) {
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
       return;
     }
 
@@ -131,9 +131,9 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
     if (!force_default && f == 1 && n == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
       return;
     }
 
@@ -142,20 +142,20 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
       return;
     }
 #endif
 
     // Otherwise, execute the original shufl code
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
   }
 
   // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
@@ -168,15 +168,15 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Pad after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
       return;
     }
 
@@ -184,17 +184,17 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && n == 8) {
+    if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].x; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i].x = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i].x = lds[idx + idx / 64 * 8]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].y; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i].y = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i].y = lds[idx + idx / 64 * 8]; }
       return;
     }
 
@@ -202,15 +202,15 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Pad after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
       return;
     }
 
@@ -218,15 +218,15 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
     // Pad 4 values after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i].x = lds[idx + idx / 16 * 4]; }
+      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i].x = lds[idx + idx / 16 * 4]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i].y = lds[idx + idx / 16 * 4]; }
+      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i].y = lds[idx + idx / 16 * 4]; }
       return;
     }
 #endif
@@ -237,17 +237,17 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
       return;
     }
 
@@ -256,17 +256,17 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
-    if (!force_default && f == 8 && n == 8) {
+    if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
       return;
     }
 
@@ -275,15 +275,15 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
       return;
     }
 
@@ -292,28 +292,28 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && n == RADIX) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
       return;
     }
 #endif
 
     // Execute the original shufl code
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].y; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
   }
 
   // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
@@ -326,21 +326,21 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
     if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
 
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).x; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).y; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).z; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = as_int4(u[i]).w; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
   }
 }
 
@@ -350,7 +350,7 @@ void OVERLOAD shufl64(u32 WG, local T2 *lds2, T2 *u, u32 n, u32 f, u32 numWG, u3
 #if FFT_FP32 | NTT_GF31
 
 // Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats.
-void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u32 lowMe) {
+void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -375,11 +375,11 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Pad after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
       return;
     }
 
@@ -387,12 +387,12 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && n == 8) {
+    if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < n; ++i) { u32 idx = (i * WG + lowMe); u[i] = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 72 + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i] = lds[idx + idx / 64 * 8]; }
       return;
     }
 
@@ -400,11 +400,11 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Pad after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
       return;
     }
 
@@ -412,11 +412,11 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
     // Pad 4 values after every 16th value to eliminate bank conflicts.
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
       return;
     }
 #endif
@@ -427,12 +427,12 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
-    if (!force_default && f == 1 && n == 8) {
+    if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
       return;
     }
 
@@ -441,12 +441,12 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
-    if (!force_default && f == 8 && n == 8) {
+    if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
       return;
     }
 
@@ -455,11 +455,11 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
       return;
     }
 
@@ -468,20 +468,20 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && n == 4) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < n; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
       return;
     }
 #endif
 
     // Execute the original shufl code
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i]; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i] = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
   }
 
   // If SHUFL_BYTES is 4 we split the F2 values into 2 int values.  These are written to LDS memory using two instructions.
@@ -492,13 +492,13 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
     if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F);
 
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].x; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { lds[i * f + (lowMe & ~mask) * n + (lowMe & mask)] = u[i].y; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
     bar(WG);
-    for (u32 i = 0; i < n; ++i) { u[i].y = lds[i * WG + lowMe]; }
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
   }
 }
 
@@ -507,6 +507,10 @@ void OVERLOAD shufl32(u32 WG, local F2 *lds2, F2 *u, u32 n, u32 f, u32 numWG, u3
 
 #if FFT_FP64
 
+void OVERLOAD shufl(local T2 *lds, T2 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl64(lds, u, f, numWG, lowMe);
+}
+
 void OVERLOAD chainMul4(T2 *u, T2 w) {
   u[1] = cmul(u[1], w);
 
@@ -521,12 +525,12 @@ void OVERLOAD chainMul4(T2 *u, T2 w) {
 #if 1
 // This version of chainMul8 tries to minimize roundoff error even if more F64 ops are used.
 // Trial and error looking at Z values on a WIDTH=512 FFT was used to determine when to switch from fancy to non-fancy powers of w.
-void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul8(T2 *u, T2 w) {
   u[1] = cmulFancy(u[1], w);
 
   T2 w2;
-  // Rocm optimizer behaves weirdly. Using multiple mul2s instead of one mul2 in csqTrigFancy makes double-wide single-kernel tailSquare inexplicably slower
-  if (!tailSquareBcast) {
+  // Rocm optimizer behaves weirdly. Using multiple mul2s instead of one mul2 in csqTrigFancy makes double-wide single-kernel variant 0 tailSquare inexplicably slower
+  if (DOING_WIDTH || VARIANT != 0) {
     w2 = csqTrigFancy(w);
   } else {
     w2 = U2(mulminus2(w.y) * w.y, mul2(fma(w.x, w.y, w.y)));
@@ -536,7 +540,7 @@ void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
   T2 w3;
   // Rocm optimizer behaves weirdly yet again. Using mul2 instead of 2.0* makes double-wide single-kernel tailSquare inexplicably slower
   // even though it is one fewer F64 op.
-  if (!tailSquareBcast) {
+  if (DOING_WIDTH || VARIANT != 0) {
     w3 = ccubeTrigFancy(w2, w);
   } else {
     double a = 2*w2.y;
@@ -554,12 +558,12 @@ void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
 
 #else
 // This version of chainMul8 minimizes F64 ops even if that increases roundoff error.
-// This version is faster on a Radeon 7 with worse roundoff.  However, new_FFT_width is even faster with better roundoff.
+// This version is faster on a Radeon 7 with worse roundoff.  However, FFT_width is even faster with better roundoff.
 // This version is the same speed on a TitanV probably due to its great F64 throughput.
 // This version is slower on R7Pro due to a rocm optimizer issue in double-wide single-kernel tailSquare using BCAST.  I could not find a work-around.
 // Other GPUs???  This version might be useful.  If we decide to make this available, it will need a new width and height fft spec number.
 // Consequently, an increase in the BPW table and increase work for -ztune and -tune.
-void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul8(T2 *u, T2 w) {
   u[1] = cmulFancy(u[1], w);
 
   T2 w2 = csqTrigFancy(w);
@@ -579,15 +583,15 @@ void OVERLOAD chainMul8(T2 *u, T2 w, u32 tailSquareBcast) {
 }
 #endif
 
-void OVERLOAD chainMul(u32 len, T2 *u, T2 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul(T2 *u, T2 w) {
   // Do a length 4 chain mul, w must not be in Fancy format
-  if (len == 4) chainMul4(u, w);
+  if (RADIX == 4) chainMul4(u, w);
   // Do a length 8 chain mul, w must be in Fancy format
-  if (len == 8) chainMul8(u, w, tailSquareBcast);
+  if (RADIX == 8) chainMul8(u, w);
 }
 
 
-#if AMDGPU && (FFT_VARIANT_W == 0 || FFT_VARIANT_H == 0)
+#if AMDGPU && VARIANT == 0
 
 int bcast4(int x)  { return __builtin_amdgcn_mov_dpp(x, 0, 0xf, 0xf, false); }
 int bcast8(int x)  { return __builtin_amdgcn_ds_swizzle(x, 0x0018); }
@@ -606,11 +610,19 @@ T2 bcast(T2 src, u32 span) {
 
 #endif
 
-void OVERLOAD shufl(u32 WG, local T2 *lds, T2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl64(WG, lds, u, n, f, numWG, lowMe);
+void OVERLOAD fft_RADIX(T2 *u) {
+#if RADIX == 4
+  fft4(u);
+#elif RADIX == 5
+  fft5(u);
+#elif RADIX == 8
+  fft8(u);
+#else
+#error RADIX
+#endif
 }
 
-void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
+void OVERLOAD tabMul(Trig trig, T2 *u, u32 f, u32 me) {
 #if 0
   u32 p = me / f * f;
 #else
@@ -619,9 +631,9 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
 
 // Compute trigs from scratch every time.  This can't possibly be a good idea on any GPUs.
 #if 0
-  T2 w = slowTrig_N(ND / n / WG * p, ND / n);
+  T2 w = slowTrig_N(ND / RADIX / WG * p, ND / RADIX);
   T2 base = w;
-  for (int i = 1; i < n; ++i) {
+  for (int i = 1; i < RADIX; ++i) {
     u[i] = cmul(u[i], w);
     w = cmul(w, base);
   }
@@ -634,7 +646,7 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
 
   if (TABMUL_CHAIN) {
     T2 w = TFLOAD(&trig[p]);
-    chainMul(n, u, w, 0);
+    chainMul(u, w);
     return;
   }
 
@@ -644,20 +656,19 @@ void OVERLOAD tabMul(u32 WG, Trig trig, T2 *u, u32 n, u32 f, u32 me) {
   if (!TABMUL_CHAIN) {
     T2 w = TFLOAD(&trig[p]);
 
-    if (n >= 8) {
+    if (RADIX >= 8) {
       u[1] = cmulFancy(u[1], w);
     } else {
       u[1] = cmul(u[1], w);
     }
 
-    for (u32 i = 2; i < n; ++i) {
+    for (u32 i = 2; i < RADIX; ++i) {
       u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
 }
 
-
 //************************************************************************************
 // New fft WIDTH and HEIGHT macros to support radix-4 FFTs with more FMA instructions
 //************************************************************************************
@@ -674,7 +685,7 @@ T2 partial_cmul(T2 u, T sine_over_cosine) {
 #define X2_via_FMA(a, c, b) { T2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
+void preload_tabMul4_trig(Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   // Read 3 lines of sine/cosine values for the first fft4.  Read two of the lines as a pair as AMD likes T2 global memory reads
@@ -687,7 +698,7 @@ void preload_tabMul4_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
+void partial_tabMul4(local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
   local T *lds1 = (local T *) lds;
   TrigSingle trig1 = (TrigSingle) trig;
   trig1 += 4*WG;                // Skip past sine_over_cosine values
@@ -728,7 +739,7 @@ void partial_tabMul4(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
 }
 
 // Finish off a partial tabMul while doing next fft4 making more use of FMA.
-void finish_tabMul4_fft4(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+void finish_tabMul4_fft4(Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   //
@@ -761,7 +772,7 @@ void finish_tabMul4_fft4(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
 //************************************************************************************
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
+void preload_tabMul8_trig(Trig trig, T *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   // Read 7 lines of sine/cosine values for the first fft8.  Read six of the lines as pairs as AMD likes T2 global memory reads
@@ -776,7 +787,7 @@ void preload_tabMul8_trig(u32 WG, Trig trig, T *preloads, u32 f, u32 numWG, u32
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
+void partial_tabMul8(local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me) {
   local T *lds1 = (local T *) lds;
   TrigSingle trig1 = (TrigSingle) trig;
   trig1 += 8*WG;                // Skip past sine_over_cosine values
@@ -822,7 +833,7 @@ void partial_tabMul8(u32 WG, local T2 *lds, Trig trig, T *preloads, T2 *u, u32 f
 }
 
 // Finish off a partial tabMul while doing next fft8 making more use of FMA.
-void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+void finish_tabMul8_fft8(Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingle trig1 = (TrigSingle) trig;
 
   //
@@ -832,7 +843,7 @@ void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
   // Apply cosine0 to u[0]
   if (f < WG/8) u[0] = u[0] * preloads[0];
 
-  if (save_one_more_mul) {   // This should always be the best option.  ROCm optimizer is doing something weird in new_fft_WIDTH case.
+  if (save_one_more_mul) {   // This should always be the best option.  ROCm optimizer is doing something weird in fft_WIDTH case.
 
     // Apply cosine4, cosine5/cosine1, cosine6/cosine2, cosine7/cosine3 to u[4] through u[7] using FMA
     X2_via_FMA(u[0], preloads[4], u[4]);
@@ -895,6 +906,172 @@ void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
   SWAP(u[3], u[6]);
 }
 
+
+void OVERLOAD fft_common(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 lowMe, int callnum) {
+
+  // This line mimics shufl -- partition lds for variant 2
+  local T2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
+
+// Variant 0 uses broadcast instructions.  Only available on AMD GPUs.
+
+#if VARIANT == 0
+
+#if WG * RADIX > 1024
+#error VARIANT == 0 only supported for FFT size <= 1024
+#endif
+#if !AMDGPU
+#error VARIANT == 0 only supported by AMD GPUs
+#endif
+
+// There is a slight difference between fft_WIDTH and fft_HEIGHT.  Tail square computes the trig values
+// to be broadcast, while fft_WIDTH does not.  Compute the trig values now for fft_WIDTH,
+#if DOING_WIDTH
+#if RADIX == 8
+  w = fancyTrig_N(ND / (WG * RADIX) * lowMe);
+#else
+  w = slowTrig_N(ND / (WG * RADIX) * lowMe, ND / RADIX);
+#endif
+#endif
+
+  for (u32 s = 1; s < WG; s *= RADIX) {
+    fft_RADIX(u);
+    w = bcast(w, s);
+    chainMul(u, w);
+    shufl(lds, u, s, numWG, lowMe);
+  }
+  fft_RADIX(u);
+
+// Variant 2 uses more FMA instructions than the original FFT code.
+// The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
+// To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
+// The downside is sine/cosine cannot be computed with chained multiplies.
+
+// Variant 2 code for SIZE=256, RADIX=4
+#elif WG == 64 && RADIX == 4 && VARIANT == 2
+
+  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(lds, u, 16, numWG, lowMe);
+
+  // Finish third tabMul and perform final fft4.
+  finish_tabMul4_fft4(trig, preloads, u, 16, numWG, lowMe, 1);
+
+// Variant 2 code for SIZE=512, RADIX=8
+#elif WG == 64 && RADIX == 8 && VARIANT == 2
+
+  T preloads[10];                       // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8 + SAVE_ONE_MUL*2*WG*8;   // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 1, numWG, lowMe, SAVE_ONE_MUL);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(lds, u, 8, numWG, lowMe);
+
+  // Finish second tabMul and perform final fft8.
+  finish_tabMul8_fft8(trig, preloads, u, 8, numWG, lowMe, SAVE_ONE_MUL);  // We'd rather set save_one_more_mul to 1
+
+// Variant 2 code for SIZE=1024, RADIX=4
+#elif WG == 256 && RADIX == 4 && VARIANT == 2
+
+  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(lds, u, 16, numWG, lowMe);
+
+  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(lds, u, 64, numWG, lowMe);
+
+  // Finish fourth tabMul and perform final fft4.
+  finish_tabMul4_fft4(trig, preloads, u, 64, numWG, lowMe, 1);
+
+// Custom code for SIZE=4K, RADIX=8
+#elif WG == 512 && RADIX == 8 && VARIANT == 2
+
+  T preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(lds, u, 8, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(lds, u, 64, numWG, lowMe);
+
+  // Finish third tabMul and perform final fft8.
+  finish_tabMul8_fft8(trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+
+#else
+
+  // Old / original version
+
+#if !UNROLL
+  __attribute__((opencl_unroll_hint(1)))
+#endif
+  for (u32 s = 1; s < WG; s *= RADIX) {
+    fft_RADIX(u);
+    tabMul(trig, u, s, lowMe);
+    shufl(lds, u, s, numWG, lowMe);
+  }
+  fft_RADIX(u);
+
+#endif
+}
+
 #endif
 
 
@@ -904,6 +1081,20 @@ void finish_tabMul8_fft8(u32 WG, Trig trig, T *preloads, T2 *u, u32 f, u32 numWG
 
 #if FFT_FP32
 
+void OVERLOAD shufl(local F2 *lds, F2 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl32(lds, u, f, numWG, lowMe);
+}
+
+void OVERLOAD fft_RADIX(F2 *u) {
+#if RADIX == 4
+  fft4(u);
+#elif RADIX == 8
+  fft8(u);
+#else
+#error RADIX
+#endif
+}
+
 void OVERLOAD chainMul4(F2 *u, F2 w) {
   u[1] = cmul(u[1], w);
 
@@ -915,7 +1106,7 @@ void OVERLOAD chainMul4(F2 *u, F2 w) {
   u[3] = cmul(u[3], base);
 }
 
-void OVERLOAD chainMul8(F2 *u, F2 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul8(F2 *u, F2 w) {
   u[1] = cmulFancy(u[1], w);
                                                   //GWBUG - see FP64 version for many possible optimizations
   F2 w2 = csqTrigFancy(w);
@@ -932,36 +1123,32 @@ void OVERLOAD chainMul8(F2 *u, F2 w, u32 tailSquareBcast) {
   }
 }
 
-void OVERLOAD chainMul(u32 len, F2 *u, F2 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul(F2 *u, F2 w) {
   // Do a length 4 chain mul
-  if (len == 4) chainMul4(u, w);
+  if (RADIX == 4) chainMul4(u, w);
   // Do a length 8 chain mul
-  if (len == 8) chainMul8(u, w, tailSquareBcast);
+  if (RADIX == 8) chainMul8(u, w);
 }
 
-void OVERLOAD shufl(u32 WG, local F2 *lds, F2 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl32(WG, lds, u, n, f, numWG, lowMe);
-}
-
-void OVERLOAD tabMul(u32 WG, TrigFP32 trig, F2 *u, u32 n, u32 f, u32 me) {
+void OVERLOAD tabMul(TrigFP32 trig, F2 *u, u32 f, u32 me) {
   u32 p = me & ~(f - 1);
 
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN32) {
-    chainMul(n, u, TFLOAD(&trig[p]), 0);
+    chainMul(u, TFLOAD(&trig[p]));
     return;
   }
 
 // Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
 
   if (!TABMUL_CHAIN32) {
-    if (n >= 8) {
+    if (RADIX >= 8) {
       u[1] = cmulFancy(u[1], TFLOAD(&trig[p]));
     } else {
       u[1] = cmul(u[1], TFLOAD(&trig[p]));
     }
-    for (u32 i = 2; i < n; ++i) {
+    for (u32 i = 2; i < RADIX; ++i) {
       u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
@@ -984,7 +1171,7 @@ F2 partial_cmul(F2 u, F sine_over_cosine) {
 #define X2_via_FMA(a, c, b) { F2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul4_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
+void preload_tabMul4_trig(TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
 
   // Read 3 lines of sine/cosine values for the first fft4.  Read two of the lines as a pair as AMD likes T2 global memory reads
@@ -997,7 +1184,7 @@ void preload_tabMul4_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG,
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul4(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
+void partial_tabMul4(local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
   local F *lds1 = (local F *) lds;
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
   trig1 += 4*WG;                // Skip past sine_over_cosine values
@@ -1038,7 +1225,7 @@ void partial_tabMul4(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u
 }
 
 // Finish off a partial tabMul while doing next fft4 making more use of FMA.
-void finish_tabMul4_fft4(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+void finish_tabMul4_fft4(TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
 
   //
@@ -1071,7 +1258,7 @@ void finish_tabMul4_fft4(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 n
 //************************************************************************************
 
 // Preload trig values for the first partial tabMul.  We load the sine/cosine values early so that F64 ops can hide the read latency.
-void preload_tabMul8_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
+void preload_tabMul8_trig(TrigFP32 trig, F *preloads, u32 f, u32 numWG, u32 me) {
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
 
   // Read 7 lines of sine/cosine values for the first fft8.  Read six of the lines as pairs as AMD likes T2 global memory reads
@@ -1086,7 +1273,7 @@ void preload_tabMul8_trig(u32 WG, TrigFP32 trig, F *preloads, u32 f, u32 numWG,
 }
 
 // Do a partial tabMul.  Save the mul-by-cosine for later FMA instructions.
-void partial_tabMul8(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
+void partial_tabMul8(local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me) {
   local F *lds1 = (local F *) lds;
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
   trig1 += 8*WG;                // Skip past sine_over_cosine values
@@ -1132,7 +1319,7 @@ void partial_tabMul8(u32 WG, local F2 *lds, TrigFP32 trig, F *preloads, F2 *u, u
 }
 
 // Finish off a partial tabMul while doing next fft8 making more use of FMA.
-void finish_tabMul8_fft8(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
+void finish_tabMul8_fft8(TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u32 me, u32 save_one_more_mul) {
   TrigSingleFP32 trig1 = (TrigSingleFP32) trig;
 
   //
@@ -1142,7 +1329,7 @@ void finish_tabMul8_fft8(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 n
   // Apply cosine0 to u[0]
   if (f < WG/8) u[0] = u[0] * preloads[0];
 
-  if (save_one_more_mul) {   // This should always be the best option.  ROCm optimizer is doing something weird in new_fft_WIDTH case.
+  if (save_one_more_mul) {   // This should always be the best option.  ROCm optimizer is doing something weird in fft_WIDTH case.
 
     // Apply cosine4, cosine5/cosine1, cosine6/cosine2, cosine7/cosine3 to u[4] through u[7] using FMA
     X2_via_FMA(u[0], preloads[4], u[4]);
@@ -1205,6 +1392,142 @@ void finish_tabMul8_fft8(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 n
   SWAP(u[3], u[6]);
 }
 
+// Variant 2 code uses more FMA instructions than the original fft version.
+// The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
+// To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
+// The downside is sine/cosine cannot be computed with chained multiplies.
+
+void OVERLOAD fft_common(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe, int callnum) {
+
+  // This line mimics shufl -- partition lds
+  local F2* partitioned_lds = lds;
+  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
+
+// Variant 2 code for SIZE=256, RADIX=4
+#if ENABLE_FP32_VARIANT_2 && WG == 64 && RADIX == 4 && VARIANT == 2
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(lds, u, 16, numWG, lowMe);
+
+  // Finish third tabMul and perform final fft4.
+  finish_tabMul4_fft4(trig, preloads, u, 16, numWG, lowMe, 1);
+
+// Variant 2 code for SIZE=512, RADIX=8
+#elif ENABLE_FP32_VARIANT_2 && WG == 64 && RADIX == 8 && VARIANT == 2
+
+  F preloads[10];                        // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8 + SAVE_ONE_MUL*2*WG*8;    // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 1, numWG, lowMe, SAVE_ONE_MUL);
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(lds, u, 8, numWG, lowMe);
+
+  // Finish second tabMul and perform final fft8.
+  finish_tabMul8_fft8(trig, preloads, u, 8, numWG, lowMe, SAVE_ONE_MUL);
+
+// Variant 2 code for SIZE=1024, RADIX=4
+#elif ENABLE_FP32_VARIANT_2 && WG == 256 && RADIX == 4 && VARIANT == 2
+
+  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul4_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft4, partial tabMul, and shufl.
+  fft4(u);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 1, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 4, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
+  shufl(lds, u, 16, numWG, lowMe);
+
+  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
+  finish_tabMul4_fft4(trig, preloads, u, 16, numWG, lowMe, 1);
+  partial_tabMul4(partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(lds, u, 64, numWG, lowMe);
+
+  // Finish fourth tabMul and perform final fft4.
+  finish_tabMul4_fft4(trig, preloads, u, 64, numWG, lowMe, 1);
+
+// Variant 2 code for SIZE=4K, RADIX=8
+#elif ENABLE_FP32_VARIANT_2 && WG == 512 && RADIX == 8 && VARIANT == 2
+
+  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
+  trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
+
+  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
+  preload_tabMul8_trig(trig, preloads, 1, numWG, lowMe);
+
+  // Do first fft8, partial tabMul, and shufl.
+  fft8(u);
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
+  shufl(lds, u, 8, numWG, lowMe);
+
+  // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
+  finish_tabMul8_fft8(trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+  partial_tabMul8(partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
+  shufl(lds, u, 64, numWG, lowMe);
+
+  // Finish third tabMul and perform final fft8.
+  finish_tabMul8_fft8(trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
+
+#else
+
+  // Old / original version
+
+#if !UNROLL
+  __attribute__((opencl_unroll_hint(1)))
+#endif
+  for (u32 s = 1; s < WG; s *= RADIX) {
+    fft_RADIX(u);
+    tabMul(trig, u, s, lowMe);
+    shufl(lds, u, s, numWG, lowMe);
+  }
+  fft_RADIX(u);
+
+#endif
+}
+
 #endif
 
 
@@ -1214,6 +1537,20 @@ void finish_tabMul8_fft8(u32 WG, TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 n
 
 #if NTT_GF31
 
+void OVERLOAD shufl(local GF31 *lds, GF31 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl32((local F2 *) lds, (local F2 *) u, f, numWG, lowMe);
+}
+
+void OVERLOAD fft_RADIX(GF31 *u) {
+#if RADIX == 4
+  fft4(u);
+#elif RADIX == 8
+  fft8(u);
+#else
+#error RADIX
+#endif
+}
+
 void OVERLOAD chainMul4(GF31 *u, GF31 w) {
   u[1] = cmul(u[1], w);
 
@@ -1237,37 +1574,46 @@ void OVERLOAD chainMul8(GF31 *u, GF31 w) {
   }
 }
 
-void OVERLOAD chainMul(u32 len, GF31 *u, GF31 w) {
+void OVERLOAD chainMul(GF31 *u, GF31 w) {
   // Do a length 4 chain mul
-  if (len == 4) chainMul4(u, w);
+  if (RADIX == 4) chainMul4(u, w);
   // Do a length 8 chain mul
-  if (len == 8) chainMul8(u, w);
-}
-
-void OVERLOAD shufl(u32 WG, local GF31 *lds, GF31 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl32(WG, (local F2 *) lds, (local F2 *) u, n, f, numWG, lowMe);
+  if (RADIX == 8) chainMul8(u, w);
 }
 
-void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
+void OVERLOAD tabMul(TrigGF31 trig, GF31 *u, u32 f, u32 me) {
   u32 p = me & ~(f - 1);
 
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN31) {
-    chainMul(n, u, TFLOAD(&trig[p]));
+    chainMul(u, TFLOAD(&trig[p]));
     return;
   }
 
 // Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
 
   if (!TABMUL_CHAIN31) {
-    for (u32 i = 1; i < n; ++i) {
+    for (u32 i = 1; i < RADIX; ++i) {
       u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
 }
 
+void OVERLOAD fft_common(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) {
+
+#if !UNROLL
+  __attribute__((opencl_unroll_hint(1)))
+#endif
+  for (u32 s = 1; s < WG; s *= RADIX) {
+    fft_RADIX(u);
+    tabMul(trig, u, s, lowMe);
+    shufl(lds, u, s, numWG, lowMe);
+  }
+  fft_RADIX(u);
+}
+
 #endif
 
 
@@ -1277,6 +1623,20 @@ void OVERLOAD tabMul(u32 WG, TrigGF31 trig, GF31 *u, u32 n, u32 f, u32 me) {
 
 #if NTT_GF61
 
+void OVERLOAD shufl(local GF61 *lds, GF61 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl64((local T2 *) lds, (T2 *) u, f, numWG, lowMe);
+}
+
+void OVERLOAD fft_RADIX(GF61 *u) {
+#if RADIX == 4
+  fft4(u);
+#elif RADIX == 8
+  fft8(u);
+#else
+#error RADIX
+#endif
+}
+
 void OVERLOAD chainMul4(GF61 *u, GF61 w) {
   u[1] = cmul(u[1], w);
 
@@ -1287,7 +1647,7 @@ void OVERLOAD chainMul4(GF61 *u, GF61 w) {
   u[3] = cmul(u[3], base);
 }
 
-void OVERLOAD chainMul8(GF61 *u, GF61 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul8(GF61 *u, GF61 w) {
   u[1] = cmul(u[1], w);
 
   GF61 w2 = csq(w);
@@ -1300,35 +1660,44 @@ void OVERLOAD chainMul8(GF61 *u, GF61 w, u32 tailSquareBcast) {
   }
 }
 
-void OVERLOAD chainMul(u32 len, GF61 *u, GF61 w, u32 tailSquareBcast) {
+void OVERLOAD chainMul(GF61 *u, GF61 w) {
   // Do a length 4 chain mul
-  if (len == 4) chainMul4(u, w);
+  if (RADIX == 4) chainMul4(u, w);
   // Do a length 8 chain mul
-  if (len == 8) chainMul8(u, w, tailSquareBcast);
-}
-
-void OVERLOAD shufl(u32 WG, local GF61 *lds, GF61 *u, u32 n, u32 f, u32 numWG, const u32 sb, u32 lowMe) {
-  shufl64(WG, (local T2 *) lds, (T2 *) u, n, f, numWG, lowMe);
+  if (RADIX == 8) chainMul8(u, w);
 }
 
-void OVERLOAD tabMul(u32 WG, TrigGF61 trig, GF61 *u, u32 n, u32 f, u32 me) {
+void OVERLOAD tabMul(TrigGF61 trig, GF61 *u, u32 f, u32 me) {
   u32 p = me & ~(f - 1);
 
 // This code uses chained complex multiplies which could be faster on GPUs with great mul throughput or poor memory bandwidth or caching.
 
   if (TABMUL_CHAIN61) {
-    chainMul(n, u, TFLOAD(&trig[p]), 0);
+    chainMul(u, TFLOAD(&trig[p]));
     return;
   }
 
 // Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
 
   if (!TABMUL_CHAIN61) {
-    for (u32 i = 1; i < n; ++i) {
+    for (u32 i = 1; i < RADIX; ++i) {
       u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*WG + p]));
     }
     return;
   }
 }
 
+void OVERLOAD fft_common(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) {
+
+#if !UNROLL
+  __attribute__((opencl_unroll_hint(1)))
+#endif
+  for (u32 s = 1; s < WG; s *= RADIX) {
+    fft_RADIX(u);
+    tabMul(trig, u, s, lowMe);
+    shufl(lds, u, s, numWG, lowMe);
+  }
+  fft_RADIX(u);
+}
+
 #endif
diff --git a/src/cl/fftheight.cl b/src/cl/fftheight.cl
index a528bf5e..7d835b41 100644
--- a/src/cl/fftheight.cl
+++ b/src/cl/fftheight.cl
@@ -1,19 +1,23 @@
 // Copyright (C) Mihai Preda
 
 // #defines that allow fft_height and fft_width share common code in fftbase.cl
+#define WG            G_H
+#define RADIX         NH
 #define VARIANT       FFT_VARIANT_H
 #define LDSPAD        LDSPAD_H
 #define LDSSWIZ       LDSSWIZ_H
 #define SHUFL_BYTES   SHUFL_BYTES_H
-#define WGSZ          G_H                           // Change this to WG!!!
-#define RADIX         NH
+#define UNROLL        UNROLL_H
+#define SAVE_ONE_MUL  1          // Radeon VII weirdness where saving one mul was slower (needs retesting!)
+#define DOING_HEIGHT  1          // Flags to work around any optimizer weirdness where common code performs better in fft_WIDTH and worse in fft_HEIGHT or vice versa
+#define DOING_WIDTH   0
 
 #include "math.cl"
 #include "trig.cl"
 #include "fftbase.cl"
 
-#if SMALL_HEIGHT != 256 && SMALL_HEIGHT != 512 && SMALL_HEIGHT != 1024 && SMALL_HEIGHT != 4096
-#error SMALL_HEIGHT must be one of: 256, 512, 1024, 4096
+#if SMALL_HEIGHT != 256 && SMALL_HEIGHT != 512 && SMALL_HEIGHT != 1024
+#error SMALL_HEIGHT must be one of: 256, 512, 1024
 #endif
 
 #if !INPLACE
@@ -24,159 +28,10 @@ u32 transPos(u32 k, u32 middle, u32 width) { return k; }
 
 #if FFT_FP64
 
-void OVERLOAD fft_NH(T2 *u) {
-#if NH == 4
-  fft4(u);
-#elif NH == 8
-  fft8(u);
-#else
-#error NH
-#endif
-}
-
-#if FFT_VARIANT_H == 0
-
-#if HEIGHT > 1024
-#error FFT_VARIANT_H == 0 only supports HEIGHT <= 1024
-#endif
-#if !AMDGPU
-#error FFT_VARIANT_H == 0 only supported by AMD GPUs
-#endif
-
-void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = SMALL_HEIGHT / NH;
-  for (u32 s = 1; s < WG; s *= NH) {
-    fft_NH(u);
-    w = bcast(w, s);
-
-    chainMul(NH, u, w, 1);
-
-    shufl(WG, lds,  u, NH, s, numWG, sb, lowMe);
-  }
-  fft_NH(u);
-}
-
-#else
-
-void OVERLOAD fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NH) {
-    fft_NH(u);
-    tabMul(WG, trig, u, NH, s, lowMe);
-    shufl(WG, lds,  u, NH, s, numWG, sb, lowMe);
-  }
-  fft_NH(u);
-}
-
-#endif
-
-void OVERLOAD new_fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-  // This line mimics shufl -- partition lds
-  local T2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
-
-// Custom code for various SMALL_HEIGHT values
-
-#if SMALL_HEIGHT == 256 && NH == 4 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=256, NH=4
-
-  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-
-#elif SMALL_HEIGHT == 512 && NH == 8 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=512, NH=8
-
-  T preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8 + 2*WG*8;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NH, 8, numWG, sb, lowMe);
-
-  // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 1);
-
-#elif SMALL_HEIGHT == 1024 && NH == 4 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=1024, NH=4
-
-  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
-
-  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NH, 64, numWG, sb, lowMe);
-
-  // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
-
-#else
-
-  // Old version
-  fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe);
-
-#endif
-}
-
-void new_fft_HEIGHT1(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe, 1); }
-void new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, w, numWG, sb, lowMe, 2); }
+// Three versions.  fft_HEIGHT1 and fft_HEIGHT2 are for the two tailSquare calls where a future version might save some data from call 1 for use in call 2.
+void fft_HEIGHT(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, w, numWG, lowMe, 0); }
+void fft_HEIGHT1(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, w, numWG, lowMe, 1); }
+void fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, w, numWG, lowMe, 2); }
 
 #endif
 
@@ -187,133 +42,10 @@ void new_fft_HEIGHT2(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, const u32
 
 #if FFT_FP32
 
-void OVERLOAD fft_NH(F2 *u) {
-#if NH == 4
-  fft4(u);
-#elif NH == 8
-  fft8(u);
-#else
-#error NH
-#endif
-}
-
-void OVERLOAD fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NH) {
-    fft_NH(u);
-    tabMul(WG, trig, u, NH, s, lowMe);
-    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD new_fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-  // This line mimics shufl -- partition lds
-  local F2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
-
-// Custom code for various SMALL_HEIGHT values
-
-#if ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 256 && NH == 4 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=256, NH=4
-
-  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-
-#elif ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 512 && NH == 8 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=512, NH=8
-
-  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8 + 2*WG*8;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NH, 8, numWG, sb, lowMe);
-
-  // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 1);
-
-#elif ENABLE_FP32_VARIANT_2 && SMALL_HEIGHT == 1024 && NH == 4 && FFT_VARIANT_H == 2
-
-// Custom code for SMALL_HEIGHT=1024, NH=4
-
-  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NH, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NH, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NH, 16, numWG, sb, lowMe);
-
-  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NH, 64, numWG, sb, lowMe);
-
-  // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
-
-#else
-
-  // Old version
-  fft_HEIGHT(lds, u, trig, numWG, sb, lowMe);
-
-#endif
-}
-
-void new_fft_HEIGHT1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, numWG, sb, lowMe, 1); }
-void new_fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe)  { new_fft_HEIGHT(lds, u, trig, numWG, sb, lowMe, 2); }
+// Three versions.  fft_HEIGHT1 and fft_HEIGHT2 are for the two tailSquare calls where a future version might save some data from call 1 for use in call 2.
+void fft_HEIGHT(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe, 0); }
+void fft_HEIGHT1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe, 1); }
+void fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe, 2); }
 
 #endif
 
@@ -324,32 +56,10 @@ void new_fft_HEIGHT2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 s
 
 #if NTT_GF31
 
-void OVERLOAD fft_NH(GF31 *u) {
-#if NH == 4
-  fft4(u);
-#elif NH == 8
-  fft8(u);
-#else
-#error NH
-#endif
-}
-
-void OVERLOAD fft_HEIGHT(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NH) {
-    fft_NH(u);
-    tabMul(WG, trig, u, NH, s, lowMe);
-    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD new_fft_HEIGHT1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
-void OVERLOAD new_fft_HEIGHT2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+// Three versions.  fft_HEIGHT1 and fft_HEIGHT2 are for the two tailSquare calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_HEIGHT(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_HEIGHT1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_HEIGHT2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
 
 #endif
 
@@ -360,31 +70,9 @@ void OVERLOAD new_fft_HEIGHT2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG
 
 #if NTT_GF61
 
-void OVERLOAD fft_NH(GF61 *u) {
-#if NH == 4
-  fft4(u);
-#elif NH == 8
-  fft8(u);
-#else
-#error NH
-#endif
-}
-
-void OVERLOAD fft_HEIGHT(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = SMALL_HEIGHT / NH;
-
-#if !UNROLL_H
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NH) {
-    fft_NH(u);
-    tabMul(WG, trig, u, NH, s, lowMe);
-    shufl(WG, lds, u, NH, s, numWG, sb, lowMe);
-  }
-  fft_NH(u);
-}
-
-void OVERLOAD new_fft_HEIGHT1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
-void OVERLOAD new_fft_HEIGHT2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe)  { fft_HEIGHT(lds, u, trig, numWG, sb, lowMe); }
+// Three versions.  fft_HEIGHT1 and fft_HEIGHT2 are for the two tailSquare calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_HEIGHT(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_HEIGHT1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_HEIGHT2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
 
 #endif
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index faea14dd..02d388d3 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -22,7 +22,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
   T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
 #endif
 
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig, w, 1, me);
 
   write(G_H, NH, u, out, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -56,7 +56,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
   F2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
 #endif
 
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrigF2, 1, me);
 
   write(G_H, NH, u, outF2, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -84,7 +84,7 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   readTailFusedLine(in31, u, g, me);
 
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig31, 1, me);
 
   write(G_H, NH, u, out31, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
@@ -112,7 +112,7 @@ KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   readTailFusedLine(in61, u, g, me);
 
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT(lds, u, smallTrig61, 1, me);
 
   write(G_H, NH, u, out61, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
 }
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index e7cdbd35..b263d8ab 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -26,7 +26,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
     u[i] = U2(in[p].x * w1, in[p].y * w2);
   }
 
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
 
   writeCarryFusedLine(u, out, g, me);
 }
@@ -57,7 +57,7 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
     u[i] = U2(in[p].x * w1, in[p].y * w2);
   }
 
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
 
   writeCarryFusedLine(u, out, g, me);
 }
@@ -112,7 +112,7 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
 
   writeCarryFusedLine(u, out, g, me);
 }
@@ -169,7 +169,7 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
 
   writeCarryFusedLine(u, out, g, me);
 }
@@ -235,10 +235,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
   writeCarryFusedLine(u, out, g, me);
 
-  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds31, u31, smallTrig31, 1, me);
   writeCarryFusedLine(u31, out31, g, me);
 }
 
@@ -305,10 +305,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     if (weight_shift > 31) weight_shift -= 31;
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, me);
   writeCarryFusedLine(uF2, outF2, g, me);
 
-  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds31, u31, smallTrig31, 1, me);
   writeCarryFusedLine(u31, out31, g, me);
 }
 
@@ -375,10 +375,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     if (weight_shift > 61) weight_shift -= 61;
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, me);
   writeCarryFusedLine(uF2, outF2, g, me);
 
-  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds61, u61, smallTrig61, 1, me);
   writeCarryFusedLine(u61, out61, g, me);
 }
 
@@ -458,10 +458,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds31, u31, smallTrig31, 1, me);
   writeCarryFusedLine(u31, out31, g, me);
 
-  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds61, u61, smallTrig61, 1, me);
   writeCarryFusedLine(u61, out61, g, me);
 }
 
@@ -550,13 +550,13 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     m61_weight_shift = adjust_m61_weight_shift(m61_weight_shift);
   }
 
-  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(ldsF2, uF2, smallTrigF2, 1, me);
   writeCarryFusedLine(uF2, outF2, g, me);
 
-  fft_WIDTH(lds31, u31, smallTrig31, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds31, u31, smallTrig31, 1, me);
   writeCarryFusedLine(u31, out31, g, me);
 
-  fft_WIDTH(lds61, u61, smallTrig61, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds61, u61, smallTrig61, 1, me);
   writeCarryFusedLine(u61, out61, g, me);
 }
 
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index 6b54faf7..72fe1ea8 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -17,7 +17,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
   dependentLaunchWait();   // Previous kernel was fftMiddleOut
 
   readCarryFusedLine(in, u, g, me);
-  fft_WIDTH(lds, u, smallTrig, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig, 1, me);
   out += WIDTH * g;
   write(G_W, NW, u, out, 0);
 }
@@ -46,7 +46,7 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
   dependentLaunchWait();   // Previous kernel was fftMiddleOut
 
   readCarryFusedLine(inF2, u, g, me);
-  fft_WIDTH(lds, u, smallTrigF2, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrigF2, 1, me);
   outF2 += WIDTH * g;
   write(G_W, NW, u, outF2, 0);
 }
@@ -74,7 +74,7 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   dependentLaunchWait();   // Previous kernel was fftMiddleOut
 
   readCarryFusedLine(in31, u, g, me);
-  fft_WIDTH(lds, u, smallTrig31, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig31, 1, me);
   out31 += WIDTH * g;
   write(G_W, NW, u, out31, 0);
 }
@@ -102,7 +102,7 @@ KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   dependentLaunchWait();   // Previous kernel was fftMiddleOut
 
   readCarryFusedLine(in61, u, g, me);
-  fft_WIDTH(lds, u, smallTrig61, 1, SHUFL_BYTES_W, me);
+  fft_WIDTH(lds, u, smallTrig61, 1, me);
   out61 += WIDTH * g;
   write(G_W, NW, u, out61, 0);
 }
diff --git a/src/cl/fftwidth.cl b/src/cl/fftwidth.cl
index e5ef26e0..f1c65c0e 100644
--- a/src/cl/fftwidth.cl
+++ b/src/cl/fftwidth.cl
@@ -1,12 +1,16 @@
 // Copyright (C) Mihai Preda
 
 // #defines that allow fft_height and fft_width share common code in fftbase.cl
+#define WG            G_W
+#define RADIX         NW
 #define VARIANT       FFT_VARIANT_W
 #define LDSPAD        LDSPAD_W
 #define LDSSWIZ       LDSSWIZ_W
 #define SHUFL_BYTES   SHUFL_BYTES_W
-#define WGSZ          G_W                           // Change this to WG!!!
-#define RADIX         NW
+#define UNROLL        UNROLL_W
+#define SAVE_ONE_MUL  0          // Radeon VII weirdness where saving one mul in width variant 2 was slower
+#define DOING_HEIGHT  0          // Flags to work around any optimizer weirdness where common code performs better in fft_WIDTH and worse in fft_HEIGHT or vice versa
+#define DOING_WIDTH   1
 
 #include "math.cl"
 #include "trig.cl"
@@ -18,203 +22,10 @@
 
 #if FFT_FP64
 
-void OVERLOAD fft_NW(T2 *u) {
-#if NW == 4
-  fft4(u);
-#elif NW == 5
-  fft5(u);
-#elif NW == 8
-  fft8(u);
-#else
-#error NW
-#endif
-}
-
-#if FFT_VARIANT_W == 0
-
-#if WIDTH > 1024
-#error FFT_VARIANT_W == 0 only supports WIDTH <= 1024
-#endif
-#if !AMDGPU
-#error FFT_VARIANT_W == 0 only supported by AMD GPUs
-#endif
-
-void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = WIDTH / NW;
-
-#if NW == 8
-  T2 w = fancyTrig_N(ND / WIDTH * lowMe);
-#else
-  T2 w = slowTrig_N(ND / WIDTH * lowMe, ND / NW);
-#endif
-
-  for (u32 s = 1; s < WG; s *= NW) {
-    fft_NW(u);
-    w = bcast(w, s);
-
-    chainMul(NW, u, w, 0);
-
-    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
-  }
-  fft_NW(u);
-}
-
-#else
-
-void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = WIDTH / NW;
-
-#if !UNROLL_W
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NW) {
-    fft_NW(u);
-    tabMul(WG, trig, u, NW, s, lowMe);
-    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
-  }
-  fft_NW(u);
-}
-
-#endif
-
-
-// New fft_WIDTH that uses more FMA instructions than the old fft_WIDTH.
-// The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
-// To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
-// The downside is sine/cosine cannot be computed with chained multiplies.
-
-void OVERLOAD new_fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
-  u32 WG = WIDTH / NW;
-
-  // This line mimics shufl -- partition lds
-  local T2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
-
-// Custom code for various WIDTH values
-
-#if WIDTH == 256 && NW == 4 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=256, NW=4
-
-  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-
-#elif WIDTH == 512 && NW == 8 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=512, NW=8
-
-  T preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8;               // Skip past old FFT_width trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
-
-  // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-
-#elif WIDTH == 1024 && NW == 4 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=1024, NW=4
-
-  T preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
-
-  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
-
-  // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
-
-#elif WIDTH == 4096 && NW == 8 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=4K, NW=8
-
-  T preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-
-#else
-
-  // Old version
-  fft_WIDTH(lds, u, trig, numWG, sb, lowMe);
-
-#endif
-}
-
-// There are two version of new_fft_WIDTH in case we want to try saving some trig values from new_fft_WIDTH1 in LDS memory for later use in new_fft_WIDTH2.
-void OVERLOAD new_fft_WIDTH1(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 1); }
-void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 2); }
+// Three versions.  fft_WIDTH1 and fft_WIDTH2 are for the two carryFused calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_WIDTH(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowMe) { T2 dummy; fft_common(lds, u, trig, dummy, numWG, lowMe, 0); }
+void OVERLOAD fft_WIDTH1(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowMe) { T2 dummy; fft_common(lds, u, trig, dummy, numWG, lowMe, 1); }
+void OVERLOAD fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, u32 lowMe) { T2 dummy; fft_common(lds, u, trig, dummy, numWG, lowMe, 2); }
 
 #endif
 
@@ -225,167 +36,10 @@ void OVERLOAD new_fft_WIDTH2(local T2 *lds, T2 *u, Trig trig, u32 numWG, const u
 
 #if FFT_FP32
 
-void OVERLOAD fft_NW(F2 *u) {
-#if NW == 4
-  fft4(u);
-#elif NW == 8
-  fft8(u);
-#else
-#error NW
-#endif
-}
-
-void OVERLOAD fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = WIDTH / NW;
-
-#if !UNROLL_W
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NW) {
-    fft_NW(u);
-    tabMul(WG, trig, u, NW, s, lowMe);
-    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
-  }
-  fft_NW(u);
-}
-
-// New fft_WIDTH that uses more FMA instructions than the old fft_WIDTH.
-// The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
-// To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.
-// The downside is sine/cosine cannot be computed with chained multiplies.
-
-void OVERLOAD new_fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe, int callnum) {
-  u32 WG = WIDTH / NW;
-
-  // This line mimics shufl -- partition lds
-  local F2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
-
-// Custom code for various WIDTH values
-
-#if ENABLE_FP32_VARIANT_2 && WIDTH == 256 && NW == 4 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=256, NW=4
-
-  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-
-#elif ENABLE_FP32_VARIANT_2 && WIDTH == 512 && NW == 8 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=512, NW=8
-
-  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8;               // Skip past old FFT_width trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
-
-  // Finish second tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-
-#elif ENABLE_FP32_VARIANT_2 && WIDTH == 1024 && NW == 4 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=1024, NW=4
-
-  F preloads[6];              // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*4 + 2*WG*4;      // Skip past old FFT_width trig values.  Also skip past !save_one_more_mul trig values.
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul4_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft4, partial tabMul, and shufl.
-  fft4(u);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft4.  Do second partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 1, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 4, numWG, lowMe);
-  shufl(WG, lds, u, NW, 4, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft4.  Do third partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 4, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 16, numWG, lowMe);
-  shufl(WG, lds, u, NW, 16, numWG, sb, lowMe);
-
-  // Finish the third tabMul and perform fourth fft4.  Do fourth partial tabMul and shufl.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 16, numWG, lowMe, 1);
-  partial_tabMul4(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
-
-  // Finish fourth tabMul and perform final fft4.
-  finish_tabMul4_fft4(WG, trig, preloads, u, 64, numWG, lowMe, 1);
-
-#elif ENABLE_FP32_VARIANT_2 && WIDTH == 4096 && NW == 8 && FFT_VARIANT_W == 2
-
-// Custom code for WIDTH=4K, NW=8
-
-  F preloads[10];             // Place to store preloaded trig values.  We want F64 ops to hide load latencies without creating register pressure.
-  trig += WG*8;               // Skip past old FFT_width trig values to the !save_one_more_mul trig values
-
-  // Preload trig values to hide global memory latencies.  As the preloads are used, the next set of trig values are preloaded.
-  preload_tabMul8_trig(WG, trig, preloads, 1, numWG, lowMe);
-
-  // Do first fft8, partial tabMul, and shufl.
-  fft8(u);
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 1, numWG, lowMe);
-  shufl(WG, lds, u, NW, 1, numWG, sb, lowMe);
-
-  // Finish the first tabMul and perform second fft8.  Do second partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 1, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 8, numWG, lowMe);
-  shufl(WG, lds, u, NW, 8, numWG, sb, lowMe);
-
-  // Finish the second tabMul and perform third fft8.  Do third partial tabMul and shufl.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 8, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-  partial_tabMul8(WG, partitioned_lds, trig, preloads, u, 64, numWG, lowMe);
-  shufl(WG, lds, u, NW, 64, numWG, sb, lowMe);
-
-  // Finish third tabMul and perform final fft8.
-  finish_tabMul8_fft8(WG, trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
-
-#else
-
-  // Old version
-  fft_WIDTH(lds, u, trig, numWG, sb, lowMe);
-
-#endif
-}
-
-// There are two version of new_fft_WIDTH in case we want to try saving some trig values from new_fft_WIDTH1 in LDS memory for later use in new_fft_WIDTH2.
-void OVERLOAD new_fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 1); }
-void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, const u32 sb, u32 lowMe) { new_fft_WIDTH(lds, u, trig, numWG, sb, lowMe, 2); }
+// Three versions.  fft_WIDTH1 and fft_WIDTH2 are for the two carryFused calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_WIDTH(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds , u, trig, numWG, lowMe, 0); }
+void OVERLOAD fft_WIDTH1(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe, 1); }
+void OVERLOAD fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe, 2); }
 
 #endif
 
@@ -396,32 +50,10 @@ void OVERLOAD new_fft_WIDTH2(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, con
 
 #if NTT_GF31
 
-void OVERLOAD fft_NW(GF31 *u) {
-#if NW == 4
-  fft4(u);
-#elif NW == 8
-  fft8(u);
-#else
-#error NW
-#endif
-}
-
-void OVERLOAD fft_WIDTH(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = WIDTH / NW;
-
-#if !UNROLL_W
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NW) {
-    fft_NW(u);
-    tabMul(WG, trig, u, NW, s, lowMe);
-    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
-  }
-  fft_NW(u);
-}
-
-void OVERLOAD new_fft_WIDTH1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
-void OVERLOAD new_fft_WIDTH2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+// Three versions.  fft_WIDTH1 and fft_WIDTH2 are for the two carryFused calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_WIDTH(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_WIDTH1(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_WIDTH2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
 
 #endif
 
@@ -432,31 +64,9 @@ void OVERLOAD new_fft_WIDTH2(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG,
 
 #if NTT_GF61
 
-void OVERLOAD fft_NW(GF61 *u) {
-#if NW == 4
-  fft4(u);
-#elif NW == 8
-  fft8(u);
-#else
-#error NW
-#endif
-}
-
-void OVERLOAD fft_WIDTH(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) {
-  u32 WG = WIDTH / NW;
-
-#if !UNROLL_W
-  __attribute__((opencl_unroll_hint(1)))
-#endif
-  for (u32 s = 1; s < WG; s *= NW) {
-    fft_NW(u);
-    tabMul(WG, trig, u, NW, s, lowMe);
-    shufl(WG, lds,  u, NW, s, numWG, sb, lowMe);
-  }
-  fft_NW(u);
-}
-
-void OVERLOAD new_fft_WIDTH1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
-void OVERLOAD new_fft_WIDTH2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, const u32 sb, u32 lowMe) { fft_WIDTH(lds, u, trig, numWG, sb, lowMe); }
+// Three versions.  fft_WIDTH1 and fft_WIDTH2 are for the two carryFused calls where a future version might save some data from call 1 for use in call 2.
+void OVERLOAD fft_WIDTH(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_WIDTH1(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
+void OVERLOAD fft_WIDTH2(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) { fft_common(lds, u, trig, numWG, lowMe); }
 
 #endif
diff --git a/src/cl/selftest.cl b/src/cl/selftest.cl
index 3564f131..ecf5f063 100644
--- a/src/cl/selftest.cl
+++ b/src/cl/selftest.cl
@@ -1,6 +1,7 @@
 // Copyright (C) Mihai Preda
 
 #include "base.cl"
+#include "math.cl"
 #include "trig.cl"
 #include "fft3.cl"
 #include "fft4.cl"
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 9728edc7..0b308fa0 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -78,41 +78,41 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig, w, 1, me);
 #else
   readTailFusedLine(a, p, line1, me);
   readTailFusedLine(a, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, p, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, q, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig, w, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig, w, 1, me);
+  fft_HEIGHT1(lds, q, smallTrig, w, 1, me);
 #endif
 
   T2 trig = slowTrig_N(line1 + me * H, ND / NH);
 
   if (line1 == 0) {
-    reverse(G_H, lds, u + NH/2, true);
-    reverse(G_H, lds, p + NH/2, true);
+    reverse(lds, u + NH/2, true);
+    reverse(lds, p + NH/2, true);
     pairMul(NH/2, u,  u + NH/2, p, p + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     T2 trig2 = cmulFancy(trig, TAILT);
-    reverse(G_H, lds, v + NH/2, false);
-    reverse(G_H, lds, q + NH/2, false);
+    reverse(lds, v + NH/2, false);
+    reverse(lds, q + NH/2, false);
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   } else {
-    reverseLine(G_H, lds, v);
-    reverseLine(G_H, lds, q);
+    reverseLine(lds, v);
+    reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig, w, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig, w, 1, me);
   writeTailFusedLine(v, out, memline2, me);
   writeTailFusedLine(u, out, memline1, me);
 }
@@ -190,41 +190,41 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, aF2, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, aF2, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+  fft_HEIGHT1(lds, v, smallTrigF2, 1, me);
 #else
   readTailFusedLine(aF2, p, line1, me);
   readTailFusedLine(aF2, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, p, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, q, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+  fft_HEIGHT1(lds, v, smallTrigF2, 1, me);
+  fft_HEIGHT1(lds, p, smallTrigF2, 1, me);
+  fft_HEIGHT1(lds, q, smallTrigF2, 1, me);
 #endif
 
   F2 trig = slowTrig_N(line1 + me * H, ND / NH);
 
   if (line1 == 0) {
-    reverse(G_H, lds, u + NH/2, true);
-    reverse(G_H, lds, p + NH/2, true);
+    reverse(lds, u + NH/2, true);
+    reverse(lds, p + NH/2, true);
     pairMul(NH/2, u,  u + NH/2, p, p + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     F2 trig2 = cmulFancy(trig, TAILT);
-    reverse(G_H, lds, v + NH/2, false);
-    reverse(G_H, lds, q + NH/2, false);
+    reverse(lds, v + NH/2, false);
+    reverse(lds, q + NH/2, false);
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   } else {
-    reverseLine(G_H, lds, v);
-    reverseLine(G_H, lds, q);
+    reverseLine(lds, v);
+    reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrigF2, 1, me);
+  fft_HEIGHT2(lds, u, smallTrigF2, 1, me);
   writeTailFusedLine(v, outF2, memline2, me);
   writeTailFusedLine(u, outF2, memline1, me);
 }
@@ -302,15 +302,15 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a31, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a31, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig31, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig31, 1, me);
 #else
   readTailFusedLine(a31, p, line1, me);
   readTailFusedLine(a31, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, p, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, q, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig31, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig31, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig31, 1, me);
+  fft_HEIGHT1(lds, q, smallTrig31, 1, me);
 #endif
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -333,27 +333,27 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #endif
 
   if (line1 == 0) {
-    reverse(G_H, lds, u + NH/2, true);
-    reverse(G_H, lds, p + NH/2, true);
+    reverse(lds, u + NH/2, true);
+    reverse(lds, p + NH/2, true);
     pairMul(NH/2, u,  u + NH/2, p, p + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     GF31 trig2 = cmul(trig, TAILTGF31);
-    reverse(G_H, lds, v + NH/2, false);
-    reverse(G_H, lds, q + NH/2, false);
+    reverse(lds, v + NH/2, false);
+    reverse(lds, q + NH/2, false);
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   } else {
-    reverseLine(G_H, lds, v);
-    reverseLine(G_H, lds, q);
+    reverseLine(lds, v);
+    reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig31, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig31, 1, me);
   writeTailFusedLine(v, out31, memline2, me);
   writeTailFusedLine(u, out31, memline1, me);
 }
@@ -431,15 +431,15 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if MUL_LOW
   read(G_H, NH, p, a61, memline1 * SMALL_HEIGHT);
   read(G_H, NH, q, a61, memline2 * SMALL_HEIGHT);
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig61, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig61, 1, me);
 #else
   readTailFusedLine(a61, p, line1, me);
   readTailFusedLine(a61, q, line2, me);
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, p, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, q, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig61, 1, me);
+  fft_HEIGHT1(lds, v, smallTrig61, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig61, 1, me);
+  fft_HEIGHT1(lds, q, smallTrig61, 1, me);
 #endif
 
   // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
@@ -462,27 +462,27 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #endif
 
   if (line1 == 0) {
-    reverse(G_H, lds, u + NH/2, true);
-    reverse(G_H, lds, p + NH/2, true);
+    reverse(lds, u + NH/2, true);
+    reverse(lds, p + NH/2, true);
     pairMul(NH/2, u,  u + NH/2, p, p + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     GF61 trig2 = cmul(trig, TAILTGF61);
-    reverse(G_H, lds, v + NH/2, false);
-    reverse(G_H, lds, q + NH/2, false);
+    reverse(lds, v + NH/2, false);
+    reverse(lds, q + NH/2, false);
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   } else {
-    reverseLine(G_H, lds, v);
-    reverseLine(G_H, lds, q);
+    reverseLine(lds, v);
+    reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
 
-  fft_HEIGHT(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
-  fft_HEIGHT(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig61, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig61, 1, me);
   writeTailFusedLine(v, out61, memline2, me);
   writeTailFusedLine(u, out61, memline1, me);
 }
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 970baa32..f4b91df3 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -81,12 +81,12 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   T2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  new_fft_HEIGHT1(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  reverse(G_H, lds, u + NH/2, !which);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+  reverse(lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
-  reverse(G_H, lds, u + NH/2, !which);
+  reverse(lds, u + NH/2, !which);
 
-  new_fft_HEIGHT1(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -125,8 +125,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT1(lds + zerohack, v, smallTrig + zerohack, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 1, me);
+  fft_HEIGHT1(lds + zerohack, v, smallTrig + zerohack, w, 1, me);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS == 2
@@ -154,29 +154,29 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_KERNEL
   if (line1 == 0) {
     // Line 0 is special: it pairs with itself, offseted by 1.
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
     pairSq(NH/2, u,   u + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     // Line H/2 also pairs with itself (but without offset).
     T2 trig2 = cmulFancy(trig, TAILT);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
     pairSq(NH/2, v,   v + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   }
   else {
 #else
   if (1) {
 #endif
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
     pairSq(NH, u, v, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, v, smallTrig, w, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT2(lds, u, smallTrig, w, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig, w, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig, w, 1, me);
 
   writeTailFusedLine(v, out, memline2, me);
   writeTailFusedLine(u, out, memline1, me);
@@ -242,7 +242,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig + zerohack, w, 2, lowMe);
 
   // Compute trig values from scratch.  Good on GPUs with high DP throughput.
 #if TAIL_TRIGS == 2
@@ -285,7 +285,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, u, smallTrig, w, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT2(lds, u, smallTrig, w, 2, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -365,12 +365,12 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 trig = slowTrig_N(line + me * H, ND / NH);
 
-  new_fft_HEIGHT1(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  reverse(G_H, lds, u + NH/2, !which);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+  reverse(lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
-  reverse(G_H, lds, u + NH/2, !which);
+  reverse(lds, u + NH/2, !which);
 
-  new_fft_HEIGHT1(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -405,8 +405,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(inF2, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT1(lds + zerohack, v, smallTrigF2 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 1, me);
+  fft_HEIGHT1(lds + zerohack, v, smallTrigF2 + zerohack, 1, me);
 
   // Compute trig values from scratch.  Good on GPUs with high FP throughput.
 #if TAIL_TRIGS32 == 2
@@ -434,29 +434,29 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_KERNEL
   if (line1 == 0) {
     // Line 0 is special: it pairs with itself, offseted by 1.
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
     pairSq(NH/2, u,   u + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     // Line H/2 also pairs with itself (but without offset).
     F2 trig2 = cmulFancy(trig, TAILT);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
     pairSq(NH/2, v,   v + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   }
   else {
 #else
   if (1) {
 #endif
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
     pairSq(NH, u, v, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, v, smallTrigF2, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT2(lds, u, smallTrigF2, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrigF2, 1, me);
+  fft_HEIGHT2(lds, u, smallTrigF2, 1, me);
 
   writeTailFusedLine(v, outF2, memline2, me);
   writeTailFusedLine(u, outF2, memline1, me);
@@ -518,7 +518,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(inF2, u, line, lowMe);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT1(lds + zerohack, u, smallTrigF2 + zerohack, 2, lowMe);
 
   // Compute trig values from scratch.  Good on GPUs with high FP throughput.
 #if TAIL_TRIGS32 == 2
@@ -561,7 +561,7 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, u, smallTrigF2, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT2(lds, u, smallTrigF2, 2, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -662,12 +662,12 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  new_fft_HEIGHT1(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
-  reverse(G_H, lds, u + NH/2, !which);
+  fft_HEIGHT1(lds, u, smallTrig31, 1, me);
+  reverse(lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
-  reverse(G_H, lds, u + NH/2, !which);
+  reverse(lds, u + NH/2, !which);
 
-  new_fft_HEIGHT2(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, u, smallTrig31, 1, me);
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -702,8 +702,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in31, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT1(lds + zerohack, v, smallTrig31 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 1, me);
+  fft_HEIGHT1(lds + zerohack, v, smallTrig31 + zerohack, 1, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS31 >= 1
@@ -727,29 +727,29 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_KERNEL
   if (line1 == 0) {
     // Line 0 is special: it pairs with itself, offseted by 1.
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
     pairSq(NH/2, u,   u + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     // Line H/2 also pairs with itself (but without offset).
     GF31 trig2 = cmul(trig, TAILTGF31);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
     pairSq(NH/2, v,   v + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   }
   else {
 #else
   if (1) {
 #endif
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
     pairSq(NH, u, v, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, v, smallTrig31, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT2(lds, u, smallTrig31, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig31, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig31, 1, me);
 
   writeTailFusedLine(v, out31, memline2, me);
   writeTailFusedLine(u, out31, memline1, me);
@@ -810,7 +810,7 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in31, u, line, lowMe);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig31 + zerohack, 2, lowMe);
 
   // Do a little bit of memory access and a little bit of math.  Good on a Radeon VII.
 #if TAIL_TRIGS31 >= 1
@@ -849,7 +849,7 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, u, smallTrig31, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT2(lds, u, smallTrig31, 2, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), lowMe);
@@ -967,12 +967,12 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #endif
 #endif
 
-  new_fft_HEIGHT1(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
-  reverse(G_H, lds, u + NH/2, !which);
+  fft_HEIGHT1(lds, u, smallTrig61, 1, me);
+  reverse(lds, u + NH/2, !which);
   pairSq(NH/2, u,   u + NH/2, trig, !which);
-  reverse(G_H, lds, u + NH/2, !which);
+  reverse(lds, u + NH/2, !which);
 
-  new_fft_HEIGHT2(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, u, smallTrig61, 1, me);
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), me);
 }
 
@@ -1007,8 +1007,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in61, v, line2, me);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT1(lds + zerohack, v, smallTrig61 + zerohack, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 1, me);
+  fft_HEIGHT1(lds + zerohack, v, smallTrig61 + zerohack, 1, me);
 
   // Do a little bit of memory access and a little bit of math.
 #if TAIL_TRIGS61 >= 1
@@ -1032,29 +1032,29 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_KERNEL
   if (line1 == 0) {
     // Line 0 is special: it pairs with itself, offseted by 1.
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
     pairSq(NH/2, u,   u + NH/2, trig, true);
-    reverse(G_H, lds, u + NH/2, true);
+    reverse(lds, u + NH/2, true);
 
     // Line H/2 also pairs with itself (but without offset).
     GF61 trig2 = cmul(trig, TAILTGF61);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
     pairSq(NH/2, v,   v + NH/2, trig2, false);
-    reverse(G_H, lds, v + NH/2, false);
+    reverse(lds, v + NH/2, false);
   }
   else {
 #else
   if (1) {
 #endif
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
     pairSq(NH, u, v, trig, false);
-    reverseLine(G_H, lds, v);
+    reverseLine(lds, v);
   }
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, v, smallTrig61, 1, SHUFL_BYTES_H, me);
-  new_fft_HEIGHT2(lds, u, smallTrig61, 1, SHUFL_BYTES_H, me);
+  fft_HEIGHT2(lds, v, smallTrig61, 1, me);
+  fft_HEIGHT2(lds, u, smallTrig61, 1, me);
 
   writeTailFusedLine(v, out61, memline2, me);
   writeTailFusedLine(u, out61, memline1, me);
@@ -1115,7 +1115,7 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   readTailFusedLine(in61, u, line, lowMe);
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
-  new_fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT1(lds + zerohack, u, smallTrig61 + zerohack, 2, lowMe);
 
   // Do a little bit of memory access and a little bit of math.  Good on a Radeon VII.
 #if TAIL_TRIGS61 >= 1
@@ -1154,7 +1154,7 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
 
-  new_fft_HEIGHT2(lds, u, smallTrig61, 2, SHUFL_BYTES_H, lowMe);
+  fft_HEIGHT2(lds, u, smallTrig61, 2, lowMe);
 
   // Write lines u and v
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), lowMe);
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index 43604852..5fd12dbf 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -32,7 +32,7 @@
 
 #if FFT_FP64 | NTT_GF61
 
-void OVERLOAD reverse(u32 WG, local T2 *lds2, T2 *u, bool bump) {
+void OVERLOAD reverse(local T2 *lds2, T2 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
@@ -81,7 +81,7 @@ void OVERLOAD reverse(u32 WG, local T2 *lds2, T2 *u, bool bump) {
   }
 }
 
-void OVERLOAD reverseLine(u32 WG, local T2 *lds, T2 *u) {
+void OVERLOAD reverseLine(local T2 *lds, T2 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
@@ -135,76 +135,76 @@ void OVERLOAD reverseLine(u32 WG, local T2 *lds, T2 *u) {
 
 void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
   u32 me = get_local_id(0);
-  u32 lowMe = me % G_H;
+  u32 lowMe = me % WG;
 
   if (SHUFL_BYTES_H >= 8) {
     local T2 *lds = lds2;
-    if (me >= G_H) lds += LDS_BYTES / sizeof(T2);
+    if (me >= WG) lds += LDS_BYTES / sizeof(T2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i]; }
     // For NH=8, read from lds into u[i]:
     //  u[4] =   u[7]rev   v[7]rev
     //  u[5] =   u[6]rev   v[6]rev
     //  u[6] =   u[5]rev   v[5]rev
     //  u[7] =   u[4]rev   v[4]rev
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * G_H + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * WG + lowMe]; }
   }
 
   else if (SHUFL_BYTES_H == 4) {
     local T *lds = (local T *) lds2;
-    if (me >= G_H) lds += LDS_BYTES / sizeof(T);
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i].x; }
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].x = lds[i * G_H + lowMe]; }
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i].y; }
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].y = lds[i * G_H + lowMe]; }
+    if (me >= WG) lds += LDS_BYTES / sizeof(T);
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i].x; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i].y; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].y = lds[i * WG + lowMe]; }
   }
 }
 
 // This is used to reverse the second part of a line, and cross the reversed parts between the halves.
 void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
   u32 me = get_local_id(0);
-  u32 lowMe = me % G_H;
-  u32 revLowMe = G_H - 1 - lowMe;
+  u32 lowMe = me % WG;
+  u32 revLowMe = WG - 1 - lowMe;
 
   if (SHUFL_BYTES_H >= 8) {
     local T2 *ldsOut = lds2;
     local T2 *ldsIn = lds2;
-    if (me < G_H) ldsOut += LDS_BYTES / sizeof(T2);     // Crossing LDS halves
+    if (me < WG) ldsOut += LDS_BYTES / sizeof(T2);     // Crossing LDS halves
     else ldsIn += LDS_BYTES / sizeof(T2);               // Staying within LDS halves (just like shufl)
     bar();   // we need a full bar because we're crossing halves
-    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
-    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[G_H * i + lowMe]; }
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[WG * i + lowMe]; }
   }
 
   else if (SHUFL_BYTES_H == 4) {
     local T *ldsOut = (local T *) lds2;
     local T *ldsIn = (local T *) lds2;
-    if (me < G_H) ldsOut += LDS_BYTES / sizeof(T);
+    if (me < WG) ldsOut += LDS_BYTES / sizeof(T);
     else ldsIn += LDS_BYTES / sizeof(T);
     bar();   // we need a full bar because we're crossing halves
-    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
     bar();   // we need a full bar because we just crossed halves
-    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].x = ldsIn[G_H * i + lowMe]; }
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].x = ldsIn[WG * i + lowMe]; }
     bar();   // we need a full bar because we're crossing halves
-    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].y; }
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].y; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
-    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].y = ldsIn[G_H * i + lowMe]; }
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].y = ldsIn[WG * i + lowMe]; }
   }
 }
 
 #if 0    // Unused
 
 // Somewhat similar to reverseLine.
-// The u values are in threads < G_H, the v values to reverse in threads >= G_H.
+// The u values are in threads < WG, the v values to reverse in threads >= WG.
 // Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
 // so that pairSq2 can easily operate on pairs.  This means for NH = 4, web output:
 //      u[0]    u[1]            // Returned in u[0]
@@ -218,31 +218,31 @@ void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
 // unqualified bar() call here.  Specifically, the u values are stored in the upper half of lds memory (SMALL_HEIGHT T2 values).
 // The v values are stored in the lower half of lds memory (the next SMALL_HEIGHT T2 values).
 
-  if (G_H > WAVEFRONT) bar();
+  if (WG > WAVEFRONT) bar();
 
 // For NH=4, the lds indices (where to write each incoming u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-// That means saving to lds using index: me < G_H ? me % G_H + i * G_H : 8*G_H-1 - me % G_H - i * G_H
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+// That means saving to lds using index: me < WG ? me % WG + i * WG : 8*WG-1 - me % WG - i * WG
 
 #if 1
-  local T2 *ldsOut = lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
+  local T2 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
 
   lds += me;
   bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*G_H]; }
+  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*WG]; }
 #else
-  local T *ldsOut = (local T *) lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*G_H] = u[i].y; }
+  local T *ldsOut = (local T *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsOutInc = (me < WG) ? WG : -WG;
+  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*WG] = u[i].y; }
 
   local T *ldsIn = (local T *) lds + me;
   bar();
-  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*G_H]; u[i].y = ldsIn[NH*2*G_H + i * 2*G_H]; }
+  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*WG]; u[i].y = ldsIn[NH*2*WG + i * 2*WG]; }
 #endif
 }
 
@@ -250,37 +250,37 @@ void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
 void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
   u32 me = get_local_id(0);
 
-// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl2.  By initially
+// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl.  By initially
 // writing to the lds locations that reverseLine2 read from we do not need an initial bar() call here.  Also, by reading
-// from the lds locations that shufl2 will use (u values in the upper half of lds memory, v values in the lower half of
+// from the lds locations that shufl will use (u values in the upper half of lds memory, v values in the lower half of
 // lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
 
 #if 1
   local T2 *ldsOut = lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i]; }
+  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i]; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  lds += (me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H;
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+  lds += (me < WG) ? me % WG : (NH*2)*WG-1 - me % WG;
+  i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
   for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
 #else
   local T *ldsOut = (local T *) lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i].x; ldsOut[NH*2*G_H + i * 2*G_H] = u[i].y; }
+  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i].x; ldsOut[NH*2*WG + i * 2*WG] = u[i].y; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  local T *ldsIn = (local T *) lds + ((me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+  local T *ldsIn = (local T *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
-  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*G_H]; }
+  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*WG]; }
 #endif
 }
 
@@ -295,7 +295,7 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
 
 #if FFT_FP32 | NTT_GF31
 
-void OVERLOAD reverse(u32 WG, local F2 *lds, F2 *u, bool bump) {
+void OVERLOAD reverse(local F2 *lds, F2 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
@@ -315,7 +315,7 @@ void OVERLOAD reverse(u32 WG, local F2 *lds, F2 *u, bool bump) {
   }
 }
 
-void OVERLOAD reverseLine(u32 WG, local F2 *lds, F2 *u) {
+void OVERLOAD reverseLine(local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
@@ -348,47 +348,47 @@ void OVERLOAD reverseLine(u32 WG, local F2 *lds, F2 *u) {
 
 void OVERLOAD reverse2(local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
-  u32 lowMe = me % G_H;
+  u32 lowMe = me % WG;
 
   if (SHUFL_BYTES_H >= 4) {
-    if (me >= G_H) lds += LDS_BYTES / sizeof(F2);
+    if (me >= WG) lds += LDS_BYTES / sizeof(F2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * G_H - (me >= G_H ? 1 : 0) - lowMe) % (NH/2 * G_H)] = u[NH/2 + i]; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i]; }
     // For NH=8, read from lds into u[i]:
     //  u[4] =   u[7]rev   v[7]rev
     //  u[5] =   u[6]rev   v[6]rev
     //  u[6] =   u[5]rev   v[5]rev
     //  u[7] =   u[4]rev   v[4]rev
-    bar(G_H);
-    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * G_H + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * WG + lowMe]; }
   }
 }
 
 // This is used to reverse the second part of a line, and cross the reversed parts between the halves.
 void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
   u32 me = get_local_id(0);
-  u32 lowMe = me % G_H;
-  u32 revLowMe = G_H - 1 - lowMe;
+  u32 lowMe = me % WG;
+  u32 revLowMe = WG - 1 - lowMe;
 
   if (SHUFL_BYTES_H >= 4) {
     local F2 *ldsOut = lds2;
     local F2 *ldsIn = lds2;
-    if (me < G_H) ldsOut += LDS_BYTES / sizeof(F2);
+    if (me < WG) ldsOut += LDS_BYTES / sizeof(F2);
     else ldsIn += LDS_BYTES / sizeof(F2);
     bar();   // we need a full bar because we're crossing halves
-    for (u32 i = 0; i < NH/2; ++i) { ldsOut[G_H * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
+    for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
-    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[G_H * i + lowMe]; }
+    for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[WG * i + lowMe]; }
   }
 }
 
 #if 0    // Unused
 
 // Somewhat similar to reverseLine.
-// The u values are in threads < G_H, the v values to reverse in threads >= G_H.
+// The u values are in threads < WG, the v values to reverse in threads >= WG.
 // Whereas reverseLine leaves u values alone.  This reverseLine moves u values around
 // so that pairSq2 can easily operate on pairs.  This means for NH = 4, web output:
 //      u[0]    u[1]            // Returned in u[0]
@@ -398,35 +398,35 @@ void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
 void OVERLOAD reverseLine2(local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
 
-// NOTE:  It is important that this routine use lds memory in coordination with shufl2.  Failure to do so would require an
+// NOTE:  It is important that this routine use lds memory in coordination with shufl.  Failure to do so would require an
 // unqualified bar() call here.  Specifically, the u values are stored in the upper half of lds memory (SMALL_HEIGHT F2 values).
 // The v values are stored in the lower half of lds memory (the next SMALL_HEIGHT F2 values).
 
-  if (G_H > WAVEFRONT) bar();
+  if (WG > WAVEFRONT) bar();
 
 // For NH=4, the lds indices (where to write each incoming u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-// That means saving to lds using index: me < G_H ? me % G_H + i * G_H : 8*G_H-1 - me % G_H - i * G_H
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+// That means saving to lds using index: me < WG ? me % WG + i * WG : 8*WG-1 - me % WG - i * WG
 
 #if 1
-  local F2 *ldsOut = lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
+  local F2 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
 
   lds += me;
   bar();
-  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*G_H]; }
+  for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*WG]; }
 #else
-  local F *ldsOut = (local F *) lds + (me < G_H ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsOutInc = (me < G_H) ? G_H : -G_H;
-  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*G_H] = u[i].y; }
+  local F *ldsOut = (local F *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsOutInc = (me < WG) ? WG : -WG;
+  for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*WG] = u[i].y; }
 
   local F *ldsIn = (local F *) lds + me;
   bar();
-  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*G_H]; u[i].y = ldsIn[NH*2*G_H + i * 2*G_H]; }
+  for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*WG]; u[i].y = ldsIn[NH*2*WG + i * 2*WG]; }
 #endif
 }
 
@@ -434,37 +434,37 @@ void OVERLOAD reverseLine2(local F2 *lds, F2 *u) {
 void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
   u32 me = get_local_id(0);
 
-// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl2.  By initially
+// NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl.  By initially
 // writing to the lds locations that reverseLine2 read from we do not need an initial bar() call here.  Also, by reading
-// from the lds locations that shufl2 will use (u values in the upper half of lds memory, v values in the lower half of
+// from the lds locations that shufl will use (u values in the upper half of lds memory, v values in the lower half of
 // lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
 
 #if 1
   local F2 *ldsOut = lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i]; }
+  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i]; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  lds += (me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H;
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+  lds += (me < WG) ? me % WG : (NH*2)*WG-1 - me % WG;
+  i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
   for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
 #else
   local F *ldsOut = (local F *) lds + me;
-  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*G_H] = u[i].x; ldsOut[NH*2*G_H + i * 2*G_H] = u[i].y; }
+  for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i].x; ldsOut[NH*2*WG + i * 2*WG] = u[i].y; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
-// 0..GH-1 +0*G_H    GH-1..0 +7*G_H
-// 0..GH-1 +1*G_H    GH-1..0 +6*G_H
-// 0..GH-1 +2*G_H    GH-1..0 +5*G_H
-// 0..GH-1 +3*G_H    GH-1..0 +4*G_H
-  local F *ldsIn = (local F *) lds + ((me < G_H) ? me % G_H : (NH*2)*G_H-1 - me % G_H);
-  i32 ldsInc = (me < G_H) ? G_H : -G_H;
+// 0..GH-1 +0*WG    GH-1..0 +7*WG
+// 0..GH-1 +1*WG    GH-1..0 +6*WG
+// 0..GH-1 +2*WG    GH-1..0 +5*WG
+// 0..GH-1 +3*WG    GH-1..0 +4*WG
+  local F *ldsIn = (local F *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
+  i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
-  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*G_H]; }
+  for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*WG]; }
 #endif
 }
 
@@ -479,12 +479,12 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 
 #if NTT_GF31
 
-void OVERLOAD reverse(u32 WG, local GF31 *lds, GF31 *u, bool bump) {
-  reverse(WG, (local F2 *) lds, (F2 *) u, bump);
+void OVERLOAD reverse(local GF31 *lds, GF31 *u, bool bump) {
+  reverse((local F2 *) lds, (F2 *) u, bump);
 }
 
-void OVERLOAD reverseLine(u32 WG, local GF31 *lds, GF31 *u) {
-  reverseLine(WG, (local F2 *) lds, (F2 *) u);
+void OVERLOAD reverseLine(local GF31 *lds, GF31 *u) {
+  reverseLine((local F2 *) lds, (F2 *) u);
 }
 
 void OVERLOAD reverse2(local GF31 *lds, GF31 *u) {
@@ -516,12 +516,12 @@ void OVERLOAD unreverseLine2(local GF31 *lds, GF31 *u) {
 
 #if NTT_GF61
 
-void OVERLOAD reverse(u32 WG, local GF61 *lds, GF61 *u, bool bump) {
-  reverse(WG, (local T2 *) lds, (T2 *) u, bump);
+void OVERLOAD reverse(local GF61 *lds, GF61 *u, bool bump) {
+  reverse((local T2 *) lds, (T2 *) u, bump);
 }
 
-void OVERLOAD reverseLine(u32 WG, local GF61 *lds, GF61 *u) {
-  reverseLine(WG, (local T2 *) lds, (T2 *) u);
+void OVERLOAD reverseLine(local GF61 *lds, GF61 *u) {
+  reverseLine((local T2 *) lds, (T2 *) u);
 }
 
 void OVERLOAD reverse2(local GF61 *lds, GF61 *u) {

From 33c72324b39593553e067a46aa5302527584f54b Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Apr 2026 19:58:54 +0000
Subject: [PATCH 043/214] Micro-optimization.  Use optional_add for make_Z61. 
 Unlikely to be any faster.

---
 src/cl/math.cl | 38 ++++++++++++++++++++++++++++++++------
 1 file changed, 32 insertions(+), 6 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 8408f397..06881fac 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -145,7 +145,7 @@ i32 select32(i32 a, i32 b, i32 c) {
 #endif
 }
 
-// Optionally add a value if first arg is negative.
+// Optionally add a constant value if first arg is negative.
 i32 optional_add(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -158,7 +158,7 @@ i32 optional_add(i32 a, const i32 b) {
   return a;
 }
 
-// Optionally subtract a value if first arg is negative.
+// Optionally subtract a constant value if first arg is negative.
 i32 optional_sub(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -171,7 +171,7 @@ i32 optional_sub(i32 a, const i32 b) {
   return a;
 }
 
-// Optionally subtract a value if first arg is greater than value.
+// Optionally subtract a constant value if first arg is greater than value.
 i32 optional_mod(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (too small a gain to measure??)
   __asm("{.reg .pred %%p;\n\t"
@@ -184,7 +184,33 @@ i32 optional_mod(i32 a, const i32 b) {
   return a;
 }
 
-// Optionally subtract c from a if a >= b.
+// Optionally add a constant value if first arg is negative.
+i64 optional_addM61(i64 a) {
+#if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.lt.s64 %%p, %0, 0;\n\t"                  // a < 0
+        " @%%p add.s64 %0, %0, 2305843009213693951;}"   // if (a < 0) a = a + M61
+        : "+l"(a));
+#else
+  if (a < 0) a = a + 2305843009213693951;
+#endif
+  return a;
+}
+
+// Optionally add a constant value if first arg is negative.
+i64 optional_add(i64 a, const i64 b) {
+#if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
+  __asm("{.reg .pred %%p;\n\t"
+        " setp.lt.s64 %%p, %0, 0;\n\t"    // a < 0
+        " @%%p add.s64 %0, %0, %1;}"      // if (a < 0) a = a + b
+        : "+l"(a) : "l"(b));              // It would be nice if there was an asm constraint to indicate a 64-bit constant
+#else
+  if (a < 0) a = a + b;
+#endif
+  return a;
+}
+
+// Optionally subtract constant c from a if a >= b.
 u64 OVERLOAD optional_sub(u64 a, const u64 b, const u64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -208,7 +234,7 @@ i64 OVERLOAD optional_sub(i64 a, const i64 b, const i64 c) {
   return a;
 }
 
-// Optionally subtract c from a if hi32(a) >= b.
+// Optionally subtract constant c from a if hi32(a) >= b.
 u64 OVERLOAD optional_sub(u64 a, const u32 b, const u64 c) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
@@ -819,7 +845,7 @@ GF31 OVERLOAD foo(GF31 a) { return foo2(a, a); }
 #define M61 ((((Z61) 1) << 61) - 1)
 
 Z61 OVERLOAD make_Z61(i32 a) { return (Z61) (a < 0 ? (i64) a + M61 : (i64) a); }  // Handles all values of a
-Z61 OVERLOAD make_Z61(i64 a) { return (Z61) (a < 0 ? a + M61 : a); }              // a must be in range of -M61 .. M61-1
+Z61 OVERLOAD make_Z61(i64 a) { return (Z61) optional_addM61(a); }                 // a must be in range of -M61 .. M61-1
 Z61 OVERLOAD make_Z61(u32 a) { return (Z61) (a); }                                // Handles all values of a
 Z61 OVERLOAD make_Z61(u64 a) { return (Z61) (a); }                                // a must be in range of 0 .. M61-1
 

From fb454fbbdbbcfa25e4e221626359097419885fcf Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Apr 2026 21:36:58 +0000
Subject: [PATCH 044/214] Fixed bug in MODM31=2 compilation

---
 src/cl/math.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 06881fac..c6a53e3c 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -683,7 +683,7 @@ Z31 OVERLOAD modM31(i32 a) { return (a & M31) + (a >> 31); }
 Z31 OVERLOAD modM31(Z31 a) { i32 alt = a + 0x80000001; return select32(a, a, alt); }  // Assumes a is not 0xFFFFFFFF (which would return 0x80000000)
 Z31 OVERLOAD modM31(i32 a) { i32 alt = a - 0x80000001; return select32(a, a, alt); }  // Assumes a is not 0x80000000 (which would return 0xFFFFFFFF)
 #else
-Z31 OVERLOAD modM31(Z31 a) { return optional_add(a, 0x80000001); }                    // Assumes a is not 0xFFFFFFFF (which would return 0x80000000)
+Z31 OVERLOAD modM31(Z31 a) { return optional_add((i32)a, 0x80000001); }               // Assumes a is not 0xFFFFFFFF (which would return 0x80000000)
 Z31 OVERLOAD modM31(i32 a) { return optional_sub(a, 0x80000001); }                    // Assumes a is not 0x80000000 (which would return 0xFFFFFFFF)
 #endif
 

From ac45f89ebb935df208e01a30374da8232527b402 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 24 Apr 2026 00:07:29 +0000
Subject: [PATCH 045/214] Don't compile the squareZero kernels when SINGLE_WIDE
 is set

---
 src/cl/tailsquare.cl | 8 ++++++++
 src/cl/tailutil.cl   | 4 ++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index f4b91df3..10105194 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -52,6 +52,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
   }
 }
 
+#if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
@@ -89,6 +90,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
   writeTailFusedLine(u, out, transPos(line, MIDDLE, WIDTH), me);
 }
+#endif
 
 #if SINGLE_WIDE
 
@@ -340,6 +342,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
   }
 }
 
+#if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
@@ -373,6 +376,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
   writeTailFusedLine(u, outF2, transPos(line, MIDDLE, WIDTH), me);
 }
+#endif
 
 #if SINGLE_WIDE
 
@@ -619,6 +623,7 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
   }
 }
 
+#if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
@@ -670,6 +675,7 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   fft_HEIGHT2(lds, u, smallTrig31, 1, me);
   writeTailFusedLine(u, out31, transPos(line, MIDDLE, WIDTH), me);
 }
+#endif
 
 #if SINGLE_WIDE
 
@@ -924,6 +930,7 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
   }
 }
 
+#if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
@@ -975,6 +982,7 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   fft_HEIGHT2(lds, u, smallTrig61, 1, me);
   writeTailFusedLine(u, out61, transPos(line, MIDDLE, WIDTH), me);
 }
+#endif
 
 #if SINGLE_WIDE
 
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index 5fd12dbf..1af416e7 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -25,8 +25,8 @@
 #if !defined(TAIL_KERNELS)
 #define TAIL_KERNELS    2                         // Default is double-wide tailSquare with two kernels
 #endif
-#define SINGLE_WIDE     TAIL_KERNELS < 2          // Old single-wide tailSquare vs. new double-wide tailSquare
-#define SINGLE_KERNEL   (TAIL_KERNELS & 1) == 0   // TailSquare uses a single kernel vs. two kernels
+#define SINGLE_WIDE    (TAIL_KERNELS < 2)         // Old single-wide tailSquare vs. new double-wide tailSquare
+#define SINGLE_KERNEL  ((TAIL_KERNELS & 1) == 0)  // TailSquare uses a single kernel vs. two kernels
 
 // 64-bit implementations of reverse routines
 

From cf9a6cb978fe37b85f507fb50d9db29ab851e37d Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 24 Apr 2026 00:29:13 +0000
Subject: [PATCH 046/214] Added OVERLOAD keyword to optional_add for the AMD
 compiler.

---
 src/cl/math.cl | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index c6a53e3c..3c0c0dfd 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -146,7 +146,7 @@ i32 select32(i32 a, i32 b, i32 c) {
 }
 
 // Optionally add a constant value if first arg is negative.
-i32 optional_add(i32 a, const i32 b) {
+i32 OVERLOAD optional_add(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
         " setp.lt.s32 %%p, %0, 0;\n\t"    // a < 0
@@ -159,7 +159,7 @@ i32 optional_add(i32 a, const i32 b) {
 }
 
 // Optionally subtract a constant value if first arg is negative.
-i32 optional_sub(i32 a, const i32 b) {
+i32 OVERLOAD optional_sub(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
         " setp.lt.s32 %%p, %0, 0;\n\t"    // a < 0
@@ -172,7 +172,7 @@ i32 optional_sub(i32 a, const i32 b) {
 }
 
 // Optionally subtract a constant value if first arg is greater than value.
-i32 optional_mod(i32 a, const i32 b) {
+i32 OVERLOAD optional_mod(i32 a, const i32 b) {
 #if HAS_PTX >= 100        // setp/sub instruction requires sm_10 support or higher  // Not faster on 5xxx GPUs (too small a gain to measure??)
   __asm("{.reg .pred %%p;\n\t"
         " setp.ge.s32 %%p, %0, %1;\n\t"   // a > b
@@ -185,7 +185,7 @@ i32 optional_mod(i32 a, const i32 b) {
 }
 
 // Optionally add a constant value if first arg is negative.
-i64 optional_addM61(i64 a) {
+i64 OVERLOAD optional_addM61(i64 a) {
 #if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
         " setp.lt.s64 %%p, %0, 0;\n\t"                  // a < 0
@@ -198,7 +198,7 @@ i64 optional_addM61(i64 a) {
 }
 
 // Optionally add a constant value if first arg is negative.
-i64 optional_add(i64 a, const i64 b) {
+i64 OVERLOAD optional_add(i64 a, const i64 b) {
 #if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
   __asm("{.reg .pred %%p;\n\t"
         " setp.lt.s64 %%p, %0, 0;\n\t"    // a < 0

From 4c7d159e8140e8314a1cb5ac55e4ddb7e82c30ed Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 24 Apr 2026 19:36:36 +0000
Subject: [PATCH 047/214] Replaced LDS padding code with better code.  All
 address calculations allow calculating a fixed base before the loop and
 simple base+offset accesses within the loop.  Less generated code, fewer
 registers used.

---
 src/cl/fftbase.cl | 156 +++++++++++++++++++++++++++-------------------
 1 file changed, 93 insertions(+), 63 deletions(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 498d18f0..daed1895 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -5,13 +5,13 @@
 
 // Calculate the LDS bytes used by shufl
 #if LDSPAD && SHUFL_BYTES == 16 && RADIX == 8
-#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 72 / 64)
+#define LDS_BYTES     ((WG * RADIX + 7) * SHUFL_BYTES)
 #elif LDSPAD && SHUFL_BYTES == 16 && RADIX == 4
-#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 20 / 16)
+#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
 #elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 8
-#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 72 / 64)
+#define LDS_BYTES     ((WG * RADIX + 56) * SHUFL_BYTES)
 #elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 4
-#define LDS_BYTES     ((WG * RADIX * SHUFL_BYTES) * 20 / 16)
+#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
 #else
 #define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
 #endif
@@ -50,50 +50,56 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
 #if LDSPAD
     // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Pad after every 8th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 8, 72..., 16...   lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad 1 value every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe * 9 + i] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 8                     + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 32 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
       return;
     }
 
     // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
     // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // No padding of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
-    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
-    // We can however save a bar() by writing to same locations that previous shufl wrote to.
-    if (!force_default && f == 8 && RADIX == 8) {
-      for (u32 i = 0; i < RADIX; ++i) { lds[(i * WG + lowMe) * 9 / 8] = u[i]; }
+    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
+    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
+    if (0 && f == 8 && RADIX == 8) {
+      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[((lowMe & ~7) + i) * 9 + (lowMe & 7)]; }
+      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
       return;
     }
 
     // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Pad after every 8th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1, 65..., 16...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad 1 value every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 9 / 8] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 9 / 8]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
       return;
     }
 
     // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16... 4..  lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
     if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
       return;
     }
 #endif
@@ -166,67 +172,81 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
 #if LDSPAD
     // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Pad after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
 
     // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    // Pad 8 values after every row to eliminate bank conflicts.
     if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].x; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i].x = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i].y; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i].y = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
       return;
     }
 
     // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Pad after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
 
     // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
     if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].x; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i].x = lds[idx + idx / 16 * 4]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 20 + i * 4 + (lowMe & 3))] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i].y = lds[idx + idx / 16 * 4]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
       return;
     }
 #endif
@@ -373,13 +393,16 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
 #if LDSPAD
     // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Pad after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) * 17 / 16] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
 
@@ -389,34 +412,41 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
     // Pad 8 values after every 64 values to eliminate bank conflicts.
     if (!force_default && f == 8 && RADIX == 8) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 8 * 72 + i * 8 + (lowMe & 7)] = u[i]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 72 + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u32 idx = (i * WG + lowMe); u[i] = lds[idx + idx / 64 * 8]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
       return;
     }
 
     // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Pad after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
     if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) * 17 / 16] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) * 17 / 16]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
 
     // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
     // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
-    // Pad 4 values after every 16th value to eliminate bank conflicts.
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
     if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * 20 + i * 4 + (lowMe & 3)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u32 idx = i * WG + lowMe; u[i] = lds[idx + idx / 16 * 4]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
       return;
     }
 #endif

From df67d21f5edceb33f6dd5682a38475752f56130f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 26 Apr 2026 04:42:04 +0000
Subject: [PATCH 048/214] Cleaner way to specify an explicit CUDA launch_bounds
 rather than a register count

---
 src/Gpu.cpp | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 446b9638..28f568de 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -671,12 +671,13 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
     use_override = "REGMO61";
     break;
   }
+  // Get the optional override register count
   int override_regs = args.value(use_override, 0);
-  // Allow command line to set CUDA launch_bounds rather than explicit maximum register count
-  if (override_regs && args.value("REGLB", 0)) return string("-DCUDA_MIN_BLOCKS=") + to_string(override_regs) + " ";
-  // Return the maximum register count
+  // If a specified override is small, use the count as a CUDA launch_bounds rather than a maximum register count
+  if (override_regs && (override_regs > 0 && override_regs <= 16)) return string("-DCUDA_MIN_BLOCKS=") + to_string(override_regs) + " ";
+  // If specified, override the default maximum register count
   if (override_regs) regs = override_regs;
-  // Sometimes the results using default launch_bounds without setting an explicit maxrrregcount can't be beat
+  // Sometimes the results using CUDA compiler's default launch_bounds without setting an explicit launch bounds or maxrrregcount can't be beat
   if (regs == -1) return string("");
   // Format an explicit register count setting
   return string("--maxrregcount=") + to_string(regs) + " ";

From 321c9c65606aca340e600be875f15055c914892f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 28 Apr 2026 01:18:46 +0000
Subject: [PATCH 049/214] CUDA compiler generates slow mul.lo.s64 instructions
 for u64 * u64.  PTX macros added to eliminate this.

---
 src/cl/carry.cl      | 18 +++++++++---------
 src/cl/carryfused.cl | 22 +++++++++++-----------
 src/cl/fftp.cl       | 18 +++++++++---------
 src/cl/math.cl       | 37 ++++++++++++++++++++++++++++++++++---
 4 files changed, 63 insertions(+), 32 deletions(-)

diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index 88a0b2b2..e8dc75a0 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -129,7 +129,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF31) in, u32 posROE, P(CarryABM) carryOut, P
 #define combo_counter   combo.b
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -203,7 +203,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF61) in, u32 posROE, P(CarryABM) carryOut, P
 #define combo_counter   combo.b
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -278,7 +278,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define combo_counter   combo.b
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -357,7 +357,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define combo_counter   combo.b
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -436,7 +436,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define combo_counter   combo.b
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -519,9 +519,9 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, P(u
 #define m61_combo_counter   m61_combo.b
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -613,9 +613,9 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define m61_combo_counter   m61_combo.b
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 5d169d41..db304570 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -162,7 +162,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = word_index * FRAC_BPW_HI + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
+  u32 frac_bits = mul3264(word_index, FRAC_BPW_HI) + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
   const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
@@ -352,7 +352,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = word_index * FRAC_BPW_HI + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
+  u32 frac_bits = mul3264(word_index, FRAC_BPW_HI) + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
   const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
@@ -549,7 +549,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -766,7 +766,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 61;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -996,7 +996,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1244,7 +1244,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1492,7 +1492,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 61;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1736,12 +1736,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m31_combo_bigstep = ((G_W * H * 2 - 1) * m31_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m31_weight_shift = m31_weight_shift % 31;
   u64 m31_starting_combo_counter = m31_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m61_combo_bigstep = ((G_W * H * 2 - 1) * m61_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m61_weight_shift = m61_weight_shift % 61;
   u64 m61_starting_combo_counter = m61_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -2005,12 +2005,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m31_combo_bigstep = ((G_W * H * 2 - 1) * m31_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m31_weight_shift = m31_weight_shift % 31;
   u64 m31_starting_combo_counter = m31_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m61_combo_bigstep = ((G_W * H * 2 - 1) * m61_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m61_weight_shift = m61_weight_shift % 61;
   u64 m61_starting_combo_counter = m61_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index b263d8ab..43ffef8e 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -95,7 +95,7 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -152,7 +152,7 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -215,7 +215,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -285,7 +285,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -355,7 +355,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = word_index * combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   weight_shift = weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -429,11 +429,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m31_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m31_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m31_weight_shift = m31_weight_shift % 31;
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m61_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m61_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m61_weight_shift = m61_weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -518,11 +518,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m31_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m31_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = word_index * m31_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m31_weight_shift = m31_weight_shift % 31;
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
   const u64 m61_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m61_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = word_index * m61_combo_step + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
   m61_weight_shift = m61_weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 3c0c0dfd..87766ac6 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -112,9 +112,8 @@ i128 OVERLOAD sub(i128 a, i64 b) { i128 val; val.x = a.x - (__int128)b; return v
 u128 OVERLOAD make_u128(u64 hi, u64 lo) { u128 val; val.x = ((unsigned __int128)hi << 64) | lo; return val; }
 u64 u128_lo64(u128 val) { return val.x; }
 u64 u128_hi64(u128 val) { return val.x >> 64; }
-u128 mul64(u64 a, u64 b) { u128 val; val.x = (unsigned __int128)a * (unsigned __int128)b; return val; }
 u128 OVERLOAD add(u128 a, u128 b) { u128 val; val.x = a.x + b.x; return val; }
-#else           // UNTESTED!  The mul64 macro causes clang to hang!
+#else           // UNTESTED!
 typedef struct { i64 hi64; u64 lo64; } i128;
 typedef struct { u64 hi64; u64 lo64; } u128;
 i128 OVERLOAD make_i128(i64 hi, u64 lo) { i128 val; val.hi64 = hi; val.lo64 = lo; return val; }
@@ -130,7 +129,6 @@ i128 OVERLOAD sub(i128 a, i64 b) { i128 val; val.lo64 = a.lo64 - (u64)b; val.hi6
 u128 OVERLOAD make_u128(u64 hi, u64 lo) { u128 val; val.hi64 = hi; val.lo64 = lo; return val; }
 u64 u128_lo64(u128 val) { return val.lo64; }
 u64 u128_hi64(u128 val) { return val.hi64; }
-u128 mul64(u64 a, u64 b) { u128 val; val.lo64 = a * b; val.hi64 = mul_hi(a, b); return val; }
 u128 OVERLOAD add(u128 a, u128 b) { u128 val; val.lo64 = a.lo64 + b.lo64; val.hi64 = a.hi64 + b.hi64 + (val.lo64 < a.lo64); return val; }
 #endif
 
@@ -260,6 +258,12 @@ i64 OVERLOAD optional_sub(i64 a, const i32 b, const i64 c) {
 
 // Multiply and add primitives
 
+u64 OVERLOAD mul3264(u32 a, u64 b) {            // Work around nVidia generating a slow mul.lo.s64 instruction for a * b
+  u32 blo = lo32(b);
+  u32 bhi = hi32(b);
+  return make_u64(mul_hi(a, blo) + a * bhi, a * blo);
+}
+
 u64 OVERLOAD mad32(u32 a, u32 b, u32 c) {
 #if HAS_PTX >= 200        // mad instruction requires sm_20 support or higher           // Same speed on TitanV, any gain may be too small to measure
   u32 reslo, reshi;
@@ -282,6 +286,33 @@ u64 OVERLOAD mad32(u32 a, u32 b, u64 c) {
 #endif
 }
 
+u128 OVERLOAD mul64(u64 a, u64 b) {
+#if HAS_PTX >= 100                              // mul instruction requires sm_10 support or higher
+  u64 reslo, reshi;
+  __asm("mul.lo.u64    %0, %2, %3;\n\t"
+        "mul.hi.u64    %1, %2, %3;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b));
+  return make_u128(reshi, reslo);
+#elif ENABLE_ALT_MUL64 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher.  This is slower than the above.
+  uint2 a2 = as_uint2(a);
+  uint2 b2 = as_uint2(b);
+  uint2 rlo2, rhi2;
+  __asm("mul.lo.u32     %0, %4, %6;\n\t"
+	"mul.hi.u32     %1, %4, %6;\n\t"
+        "mul.lo.u32     %2, %5, %7;\n\t"
+	"mad.lo.cc.u32  %1, %5, %6, %1;\n\t"
+        "madc.hi.cc.u32 %2, %5, %6, %2;\n\t"
+        "madc.hi.u32    %3, %5, %7, 0;\n\t"
+	"mad.lo.cc.u32  %1, %4, %7, %1;\n\t"
+        "madc.hi.cc.u32 %2, %4, %7, %2;\n\t"
+        "addc.u32       %3, %3, 0;"
+        : "=r"(rlo2.x), "=r"(rlo2.y), "=r"(rhi2.x), "=r"(rhi2.y)
+        : "r"(a2.x), "r"(a2.y), "r"(b2.x), "r"(b2.y));
+  return make_u128((u64)as_ulong(rhi2), (u64)as_ulong(rlo2));
+#else    // May cause clang to hang!
+  return make_u128(mul_hi(a, b), a * b);       // This generates a mul.lo.s64 PTX instruction which is much slower!
+#endif
+}
+
 u128 OVERLOAD mad64(u64 a, u64 b, u64 c) {
 #if ENABLE_MAD64 && HAS_PTX >= 200        // mad instruction requires sm_20 support or higher    // Slower on TitanV and mobile 4070, don't understand why
   u64 reslo, reshi;

From f9e9f04986c81c5ca68d8a40b3dd63e89fc78de6 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 28 Apr 2026 21:29:20 +0000
Subject: [PATCH 050/214] Enforce 32KB shared memory maximum. Micro GF31 math
 optimization.

---
 src/Gpu.cpp    | 5 +++--
 src/cl/math.cl | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 28f568de..78fdbd7e 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -310,11 +310,12 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
     if (k == "PAD") pad_size = atoi(v.c_str());
   }
 
-  // Maximum WMUL is 32KB / (WIDTH * SHUFL_BYTES_W)
+  // Maximum WMUL is 32KB / (WIDTH * SHUFL_BYTES_W).  If using the 32KB maximum, LDS padding must be disabled.
   {
     u32 shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
     u32 max_wmul = 32768 / (fft.shape.width * shufl_bytes_w);
-    if (wmul > max_wmul) wmul = max_wmul;
+    if (wmul > max_wmul) { wmul = max_wmul; config["WMUL"] = to_string(wmul); }
+    if (fft.shape.width * shufl_bytes_w * wmul >= 32768) { config["LDSPAD_W"] = to_string(0); }
   }
 
   string defines = toDefine(config);
diff --git a/src/cl/math.cl b/src/cl/math.cl
index 87766ac6..a0278128 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -737,7 +737,7 @@ GF31 OVERLOAD neg(GF31 a) { return U2(neg(a.x), neg(a.y)); }
 Z31 OVERLOAD add(Z31 a, Z31 b) { return modM31(a + b); }
 GF31 OVERLOAD add(GF31 a, GF31 b) { return U2(add(a.x, b.x), add(a.y, b.y)); }
 
-Z31 OVERLOAD sub(Z31 a, Z31 b) { i32 t = a - b; return (t & M31) + (t >> 31); }
+Z31 OVERLOAD sub(Z31 a, Z31 b) { return modM31((i32)(a - b)); }
 GF31 OVERLOAD sub(GF31 a, GF31 b) { return U2(sub(a.x, b.x), sub(a.y, b.y)); }
 
 Z31 OVERLOAD make_Z31(i32 a) { return (Z31) (a < 0 ? a + M31 : a); }    // Handles signed values of a

From 1fd99292d5b30c1e8230d822d84441d1edcb685e Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 29 Apr 2026 04:09:00 +0000
Subject: [PATCH 051/214] Added log messages when changing settings to
 accommodate 32KB LDS limit.

---
 src/Gpu.cpp | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 78fdbd7e..693d6cf4 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -314,8 +314,15 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   {
     u32 shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
     u32 max_wmul = 32768 / (fft.shape.width * shufl_bytes_w);
-    if (wmul > max_wmul) { wmul = max_wmul; config["WMUL"] = to_string(wmul); }
-    if (fft.shape.width * shufl_bytes_w * wmul >= 32768) { config["LDSPAD_W"] = to_string(0); }
+    if (wmul > max_wmul) {
+      wmul = max_wmul;
+      config["WMUL"] = to_string(wmul);
+      log("Local shared memory limit of 32KB exceeded.  Changing to WMUL=%d\n", wmul);
+    }
+    if (fft.shape.width * shufl_bytes_w * wmul >= 32768) {
+      log("Local shared memory limit of 32KB exceeded.  Changing to LDSPAD_W=0\n");
+      config["LDSPAD_W"] = to_string(0);
+    }
   }
 
   string defines = toDefine(config);

From d075f476a73ccaef1965d4daeccd952cc584bbd8 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 29 Apr 2026 19:23:12 +0000
Subject: [PATCH 052/214] Changed comments on why MUL64 inline is needed

---
 src/cl/math.cl | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index a0278128..ca51597a 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -258,7 +258,7 @@ i64 OVERLOAD optional_sub(i64 a, const i32 b, const i64 c) {
 
 // Multiply and add primitives
 
-u64 OVERLOAD mul3264(u32 a, u64 b) {            // Work around nVidia generating a slow mul.lo.s64 instruction for a * b
+u64 OVERLOAD mul3264(u32 a, u64 b) {            // 3 32-bit multiplies (instead of 4 for a u64 * u64 multiply)
   u32 blo = lo32(b);
   u32 bhi = hi32(b);
   return make_u64(mul_hi(a, blo) + a * bhi, a * blo);
@@ -286,8 +286,11 @@ u64 OVERLOAD mad32(u32 a, u32 b, u64 c) {
 #endif
 }
 
+// Multiply to u64s creating a u128.  This inline mysteriously speeds up PRPLL by 2%.  Verified on RTX 3xxx through RTX 5xxx GPUs, both CUDA 12 and CUDA 13.
+// The generated PTX code is nearly identical with DISABLE_MUL64.  It must somehow trigger different/weird PTXAS optimization decisions.
+// Future CUDA releases may make this inline unnecessary.
 u128 OVERLOAD mul64(u64 a, u64 b) {
-#if HAS_PTX >= 100                              // mul instruction requires sm_10 support or higher
+#if !DISABLE_MUL64 && HAS_PTX >= 100            // mul instruction requires sm_10 support or higher
   u64 reslo, reshi;
   __asm("mul.lo.u64    %0, %2, %3;\n\t"
         "mul.hi.u64    %1, %2, %3;" : "=l"(reslo), "=l"(reshi) : "l"(a), "l"(b));
@@ -309,7 +312,7 @@ u128 OVERLOAD mul64(u64 a, u64 b) {
         : "r"(a2.x), "r"(a2.y), "r"(b2.x), "r"(b2.y));
   return make_u128((u64)as_ulong(rhi2), (u64)as_ulong(rlo2));
 #else    // May cause clang to hang!
-  return make_u128(mul_hi(a, b), a * b);       // This generates a mul.lo.s64 PTX instruction which is much slower!
+  return make_u128(mul_hi(a, b), a * b);
 #endif
 }
 

From b9663e6f1ed71bee3cefd440cfa2c3a8839c77c3 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Apr 2026 01:17:02 +0000
Subject: [PATCH 053/214] Minor change that should speed up kernel compilations

---
 src/Gpu.cpp      | 120 +++++++++++++++++++++++++++++------------------
 src/Gpu.h        |   2 +
 src/cl/middle.cl |   8 ++--
 3 files changed, 81 insertions(+), 49 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 693d6cf4..d31ba518 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -370,10 +370,6 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
 
   // Send the FFT/NTT type and booleans that enable/disable code for each possible FP and NTT
   defines += toDefine("FFT_TYPE", (int) fft.shape.fft_type);
-  defines += toDefine("FFT_FP64", (int) fft.FFT_FP64);
-  defines += toDefine("FFT_FP32", (int) fft.FFT_FP32);
-  defines += toDefine("NTT_GF31", (int) fft.NTT_GF31);
-  defines += toDefine("NTT_GF61", (int) fft.NTT_GF61);
   defines += toDefine("WordSize", fft.WordSize);
 
   // When using multiple NTT primes or hybrid FFT/NTT, each FFT/NTT prime's data buffer and trig values are combined into one buffer.
@@ -694,6 +690,40 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
 #endif
 }
 
+// Kernels are compiled one at a time, but OpenCL source files contain multiple kernels.  This routine set the #defines necessary so that only one kernel is compiled.
+// While not strictly necessary, startup speed will be a bit faster if we do less compilations.
+string Gpu::kernelDefines(enum WHICH_KERNEL_TYPE which_kernel) {
+  string defines;
+  // Determine the kernel specific #defines
+  switch (which_kernel) {
+  case KFP:         // FP64 or FP32 kernel
+    defines += toDefine("FFT_FP64", (int) fft.FFT_FP64);
+    defines += toDefine("FFT_FP32", (int) fft.FFT_FP32);
+    defines += toDefine("NTT_GF31", 0);
+    defines += toDefine("NTT_GF61", 0);
+    break;
+  case K31:         // GF1 kernel
+    defines += toDefine("FFT_FP64", 0);
+    defines += toDefine("FFT_FP32", 0);
+    defines += toDefine("NTT_GF31", (int) fft.NTT_GF31);
+    defines += toDefine("NTT_GF61", 0);
+    break;
+  case K61:         // GF61 kernel
+    defines += toDefine("FFT_FP64", 0);
+    defines += toDefine("FFT_FP32", 0);
+    defines += toDefine("NTT_GF31", 0);
+    defines += toDefine("NTT_GF61", (int) fft.NTT_GF61);
+    break;
+  case KALL:        // Kernels, like carryFused, that need all defines set properly
+    defines += toDefine("FFT_FP64", (int) fft.FFT_FP64);
+    defines += toDefine("FFT_FP32", (int) fft.FFT_FP32);
+    defines += toDefine("NTT_GF31", (int) fft.NTT_GF31);
+    defines += toDefine("NTT_GF61", (int) fft.NTT_GF61);
+    break;
+  }
+  return defines + " ";
+}
+
 #define ROE_SIZE 100000
 #define CARRY_SIZE 100000
 
@@ -715,58 +745,58 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), queue, __VA_ARGS__)
 
-  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN).c_str()),
-  K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH),
-  K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2),
+  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), (kernelDefines(KFP) + numCudaRegisters(MIDIN)).c_str()),
+  K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH, kernelDefines(KFP).c_str()),
+  K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2, kernelDefines(KFP).c_str()),
   K(ktailSquare,           "tailsquare.cl", "tailSquare",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, numCudaRegisters(TAIL).c_str()),                           // Single-wide tailSquare with one kernel
-  K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2),
-  K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT).c_str()),
-  K(kfftW,                 "fftw.cl", "fftW", hN / nW),
-
-  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN31).c_str()),
-  K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH),
-  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2),
+                                               hN / nH / 2, (kernelDefines(KFP) + numCudaRegisters(TAIL)).c_str()),    // Single-wide tailSquare with one kernel
+  K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP).c_str()),
+  K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, (kernelDefines(KFP) + "-DMUL_LOW=1").c_str()),
+  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), (kernelDefines(KFP) + numCudaRegisters(MIDOUT)).c_str()),
+  K(kfftW,                 "fftw.cl", "fftW", hN / nW, kernelDefines(KFP).c_str()),
+
+  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), (kernelDefines(K31) + numCudaRegisters(MIDIN31)).c_str()),
+  K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH, kernelDefines(K31).c_str()),
+  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, kernelDefines(K31).c_str()),
   K(ktailSquareGF31,       "tailsquare.cl", "tailSquareGF31",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, numCudaRegisters(TAIL31).c_str()),                         // Single-wide tailSquare with one kernel
-  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2),
-  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT31).c_str()),
-  K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW),
-
-  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), numCudaRegisters(MIDIN61).c_str()),
-  K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH),
-  K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2),
+                                               hN / nH / 2, (kernelDefines(K31) + numCudaRegisters(TAIL31)).c_str()),  // Single-wide tailSquare with one kernel
+  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31).c_str()),
+  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, (kernelDefines(K31) + "-DMUL_LOW=1").c_str()),
+  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), (kernelDefines(K31) + numCudaRegisters(MIDOUT31)).c_str()),
+  K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW, kernelDefines(K31).c_str()),
+
+  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), (kernelDefines(K61) + numCudaRegisters(MIDIN61)).c_str()),
+  K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH, kernelDefines(K61).c_str()),
+  K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2, kernelDefines(K61).c_str()),
   K(ktailSquareGF61,       "tailsquare.cl", "tailSquareGF61",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, numCudaRegisters(TAIL61).c_str()),                         // Single-wide tailSquare with one kernel
-  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2),
-  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, "-DMUL_LOW=1"),
-  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), numCudaRegisters(MIDOUT61).c_str()),
-  K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW),
-
-  K(kfftP,                 "fftp.cl", "fftP", hN / nW),
-  K(kCarryA,               "carry.cl", "carry", hN / CARRY_LEN),
-  K(kCarryAROE,            "carry.cl", "carry", hN / CARRY_LEN, "-DROE=1"),
-  K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1"),
-  K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, "-DMUL3=1 -DROE=1"),
-  K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, "-DLL=1"),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, numCudaRegisters(CARRYFUSED).c_str()),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DROE=1").c_str()),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DMUL3=1").c_str()),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1").c_str()),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (numCudaRegisters(CARRYFUSED) + "-DLL=1").c_str()),
-
-  K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN),
+                                               hN / nH / 2, (kernelDefines(K61) + numCudaRegisters(TAIL61)).c_str()),  // Single-wide tailSquare with one kernel
+  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61).c_str()),
+  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, (kernelDefines(K61) + "-DMUL_LOW=1").c_str()),
+  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), (kernelDefines(K61) + numCudaRegisters(MIDOUT61)).c_str()),
+  K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW, kernelDefines(K61).c_str()),
+
+  K(kfftP,                 "fftp.cl", "fftP", hN / nW, kernelDefines(KALL).c_str()),
+  K(kCarryA,               "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL).c_str()),
+  K(kCarryAROE,            "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DROE=1").c_str()),
+  K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DMUL3=1").c_str()),
+  K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DMUL3=1 -DROE=1").c_str()),
+  K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DLL=1").c_str()),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED)).c_str()),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DROE=1").c_str()),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1").c_str()),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1").c_str()),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DLL=1").c_str()),
+
+  K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN, kernelDefines(KALL).c_str()),
 
   // 64
   K(transpIn,  "transpose.cl", "transposeIn",  hN / 64),
@@ -778,7 +808,7 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   K(kernIsEqual, "etc.cl", "isEqual", 256 * 256, "-DISEQUAL=1"),
   K(sum64,       "etc.cl", "sum64",   256 * 256, "-DSUM64=1"),
 
-  K(testTrig,    "selftest.cl", "testTrig", 256 * 256),
+  K(testTrig, "selftest.cl", "testTrig", 256 * 256),
   K(testFFT4, "selftest.cl", "testFFT4", 256),
   K(testFFT14, "selftest.cl", "testFFT14", 256),
   K(testFFT15, "selftest.cl", "testFFT15", 256),
diff --git a/src/Gpu.h b/src/Gpu.h
index 2c0554a0..a9ee95de 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -339,6 +339,8 @@ class Gpu {
   void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
   enum WHICH_KERNEL {CARRYFUSED=0, MIDIN=1, MIDIN31=2, MIDIN61=3, TAIL=4, TAIL31=5, TAIL61=6, MIDOUT=7, MIDOUT31=8, MIDOUT61=9};
   string numCudaRegisters(enum WHICH_KERNEL which_kernel);
+  enum WHICH_KERNEL_TYPE {KFP=0, K31=1, K61=2, KALL=3};
+  string kernelDefines(enum WHICH_KERNEL_TYPE which_kernel);
 };
 
 // Compute the size of an FFT/NTT data buffer depending on the FFT/NTT float/prime.  Size is returned in units of sizeof(double).
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 41809b48..0236141f 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -875,8 +875,8 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 //#define SIZEM32   (MIDDLE * SIZEB + (1 - (MIDDLE & 1)) * 16)   // Pad 128 bytes if MIDDLE is even
 // Place middle rows after all width rows
 #define SIZEBLK32   (SMALL_HEIGHT + 0)                         // No pad needed when swizzling
-#define SIZEW32   (16 * SIZEBLK + 16)                          // Pad 128 bytes
-#define SIZEM32   (WIDTH / 16 * SIZEW + 16)                    // Pad 128 bytes
+#define SIZEW32   (16 * SIZEBLK32 + 16)                        // Pad 128 bytes
+#define SIZEM32   (WIDTH / 16 * SIZEW32 + 16)                  // Pad 128 bytes
 #define SWIZ32(a,m) ((m) ^ (a))                                // Swizzle 16 rows (remove "^ (a)" to turn swizzling off)
 #else                                                          // AMD friendly padding
 // Place middle rows after first 16 rows
@@ -885,8 +885,8 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 //#define SIZEW32   (MIDDLE * SIZEM + (1 - (MIDDLE & 1)) * 16)   // Pad 128 bytes if MIDDLE is even
 // Place middle rows after all width rows
 #define SIZEBLK32 (SMALL_HEIGHT + 0)                           // No pad needed when swizzling
-#define SIZEW32   (16 * SIZEBLK + 16)                          // Pad 128 bytes
-#define SIZEM32   (WIDTH / 16 * SIZEW + 0)                     // Pad 0 bytes
+#define SIZEW32   (16 * SIZEBLK32 + 16)                        // Pad 128 bytes
+#define SIZEM32   (WIDTH / 16 * SIZEW32 + 0)                   // Pad 0 bytes
 #define SWIZ32(a,m) ((m) ^ (a))                                // Swizzle 16 rows (remove "^ (a)" to turn swizzling off)
 #endif
 

From 644fde44c4f8a1e0a8266daa13d2294aec2e1d34 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Apr 2026 17:53:17 +0000
Subject: [PATCH 054/214] Enhanced csqa (complex-square-and-add) to use mad64
 via weakMulAdd. Tailsquare now computes 2ab as (a+b)^2 - a^2 - b^2.  Since
 a^2 and b^2 are already computed, this replaces a cmul with a csq which saves
 a wideMul.

---
 src/cl/math.cl       | 194 +++++++++++--------------------------------
 src/cl/tailsquare.cl |  43 ++++++----
 2 files changed, 75 insertions(+), 162 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index ca51597a..6e260c6b 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -875,7 +875,6 @@ GF31 OVERLOAD foo(GF31 a) { return foo2(a, a); }
 
 #if NTT_GF61
 
-// bits in reduced mod M.
 #define M61 ((((Z61) 1) << 61) - 1)
 
 Z61 OVERLOAD make_Z61(i32 a) { return (Z61) (a < 0 ? (i64) a + M61 : (i64) a); }  // Handles all values of a
@@ -883,120 +882,10 @@ Z61 OVERLOAD make_Z61(i64 a) { return (Z61) optional_addM61(a); }
 Z61 OVERLOAD make_Z61(u32 a) { return (Z61) (a); }                                // Handles all values of a
 Z61 OVERLOAD make_Z61(u64 a) { return (Z61) (a); }                                // a must be in range of 0 .. M61-1
 
-#if 0   // Slower version that keeps results strictly in the range 0 .. M61-1
-
-u64 OVERLOAD get_Z61(Z61 a) { return a; }  // Get value in range 0 to M61-1
-i64 OVERLOAD get_balanced_Z61(Z61 a) { return (hi32(a) & 0xF0000000) ? (i64) a - (i64) M61 : (i64) a; }  // Get balanced value in range -M61/2 to M61/2
-
-Z61 OVERLOAD neg(Z61 a) { return a == 0 ? 0 : M61 - a; }                // GWBUG: Examine all callers to see if neg call can be avoided
-GF61 OVERLOAD neg(GF61 a) { return U2(neg(a.x), neg(a.y)); }
-
-Z61 OVERLOAD add(Z61 a, Z61 b) { Z61 t = a + b; Z61 m = t - M61; return (m & 0x8000000000000000ULL) ? t : m; }
-//Z61 OVERLOAD add(Z61 a, Z61 b) { Z61 t = a + b; Z61 m = t - M61; return t < m ? t : m; }      // Slower on TitanV
-//Z61 OVERLOAD add(Z61 a, Z61 b) { Z61 t = a + b; return t - (t >= M61 ? M61 : 0); }            // Slower on TitanV
-GF61 OVERLOAD add(GF61 a, GF61 b) { return U2(add(a.x, b.x), add(a.y, b.y)); }
-
-Z61 OVERLOAD sub(Z61 a, Z61 b) { Z61 t = a - b; return t + (((i64) t >> 63) & 0x1FFFFFFFFFFFFFFFULL); }
-//Z61 OVERLOAD sub(Z61 a, Z61 b) { Z61 t = a - b; Z61 p = t + M61; return (t & 0x8000000000000000ULL) ? p : t; }  // Better???
-//Z61 OVERLOAD sub(Z61 a, Z61 b) { Z61 t = a - b; return t + (t >= M61 ? M61 : 0); }            // Slower on TitanV
-//  BETTER???:   t = a - b;  carry_mask = sbb x, x; (generates 32 bits of 0 or 1; return t + make_carry_mask_64_bits
-GF61 OVERLOAD sub(GF61 a, GF61 b) { return U2(sub(a.x, b.x), sub(a.y, b.y)); }
-
-// Assumes k reduced mod 61.
-Z61 OVERLOAD shl(Z61 a, u32 k) { return ((a << k) + (a >> (61 - k))) & M61; }                   //GWBUG: Make sure & M61 operates on just one u32
-GF61 OVERLOAD shl(GF61 a, u32 k) { return U2(shl(a.x, k), shl(a.y, k)); }
-Z61 OVERLOAD shr(Z61 a, u32 k) { return ((a >> k) + (a << (61 - k))) & M61; }                   //GWBUG: Make sure & M61 operates on just one u32.  & M61 not needed?
-GF61 OVERLOAD shr(GF61 a, u32 k) { return U2(shr(a.x, k), shr(a.y, k)); }
-
-ulong2 wideMul(u64 ab, u64 cd) {
-  u128 r = mul64(ab, cd);
-  return U2(u128_lo64(r), u128_hi64(r));
-}
-
-Z61 OVERLOAD mul(Z61 a, Z61 b) {
-  ulong2 ab = wideMul(a, b);
-  u64 lo = ab.x, hi = ab.y;
-  u64 lo61 = lo & M61, hi61 = (hi << 3) + (lo >> 61);
-  return add(lo61, hi61);
-}
-
-Z61 OVERLOAD fma(Z61 a, Z61 b, Z61 c) { return add(mul(a, b), c); }             // GWBUG:  Can we do better?
-
-// Multiply by 2
-Z61 OVERLOAD mul2(Z61 a) { return ((a + a) + (a >> 60)) & M61; }        // GWBUG: Make sure "+ a>>60" does an add to lower u32 without a followup adc.
-GF61 OVERLOAD mul2(GF61 a) { return U2(mul2(a.x), mul2(a.y)); }
-
-// Return conjugate of a
-GF61 OVERLOAD conjugate(GF61 a) { return U2(a.x, neg(a.y)); }
-
-// Complex square.  input, output 61 bits. Uses (a + i*b)^2 == ((a+b)*(a-b) + i*2*a*b).
-GF61 OVERLOAD csq(GF61 a) { return U2(mul(add(a.x, a.y), sub(a.x, a.y)), mul2(mul(a.x, a.y))); }        //GWBUG: Probably faster to double a.y and have a mul that takes non-normalized inputs
-
-// a^2 + c
-GF61 OVERLOAD csqa(GF61 a, GF61 c) { return add(csq(a), c); }                                           // GWBUG: inline csq so we only "mod" after adding c??  Find a way to use fma instructions
-
-// Complex mul
-//GF61 OVERLOAD cmul(GF61 a, GF61 b) { return U2(sub(mul(a.x, b.x), mul(a.y, b.y)), add(mul(a.x, b.y), mul(a.y, b.x)));}   // GWBUG:  Is a 3 multiply complex mul faster?  See above
-GF61 OVERLOAD cmul(GF61 a, GF61 b) {
-  Z61 k1 = mul(b.x, add(a.x, a.y));
-  Z61 k2 = mul(a.x, sub(b.y, b.x));
-  Z61 k3 = mul(a.y, add(b.y, b.x));
-  return U2(sub(k1, k3), add(k1, k2));
-}
-
-// mul with (0, 1). (twiddle of tau/4, sqrt(-1) aka "i").
-GF61 OVERLOAD mul_t4(GF61 a) { return U2(neg(a.y), a.x); }                                              // GWBUG:  Can caller use a version that does not negate real?
-
-// mul with (-2^30, -2^30). (twiddle of tau/8 aka sqrt(i)). Note: 2 * (+/-2^30)^2 == 1 (mod M61).
-GF61 OVERLOAD mul_t8(GF61 a) { return shl(U2(sub(a.y, a.x), neg(add(a.x, a.y))), 30); }       // GWBUG:  Can caller use a version that does not negate real?
-
-// mul with (2^30, -2^30). (twiddle of 3*tau/8).
-GF61 OVERLOAD mul_3t8(GF61 a) { return shl(U2(add(a.x, a.y), sub(a.y, a.x)), 30); }
-
-// Return a+b and a-b
-void OVERLOAD X2_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); *b = sub(t, *b); }
-
-// Same as X2(a, conjugate(b))
-void OVERLOAD X2conjb_internal(GF61 *a, GF61 *b) { GF61 t = *a; a->x = add(a->x, b->x); a->y = sub(a->y, b->y); b->x = sub(t.x, b->x); b->y = add(t.y, b->y); }
-
-// Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(*a, *b); t.x = sub(t.x, b->x); b->x = sub(b->y, t.y); b->y = t.x; }
-
-// Same as X2(a, b), b = mul_t8(b)
-void OVERLOAD X2_mul_t8_internal(GF61 *a, GF61 *b) { X2(*a, *b); *b = mul_t8(*b); }
-
-// Same as X2(a, b), b = mul_3t8(b)
-void OVERLOAD X2_mul_3t8_internal(GF61 *a, GF61 *b) { X2(*a, *b); *b = mul_3t8(*b); }
-
-// Same as X2(a, b), b = conjugate(b)
-void OVERLOAD X2_conjb_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); b->x = sub(t.x, b->x); b->y = sub(b->y, t.y); }
-
-void OVERLOAD SWAP_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = *b; *b = t; }
-
-GF61 OVERLOAD addsub(GF61 a) { return U2(add(a.x, a.y), sub(a.x, a.y)); }
-GF61 OVERLOAD foo2(GF61 a, GF61 b) { a = addsub(a); b = addsub(b); return addsub(U2(mul(RE(a), RE(b)), mul(IM(a), IM(b)))); }
-GF61 OVERLOAD foo(GF61 a) { return foo2(a, a); }
-
-// The following routines can be used to reduce mod M61 operations (in the other Z61 implementations).
-// Caller must track how many M61s need to be added to make positive values for subtractions.
-// In function names, "q" stands for quick, "s" stands for slow (i.e. does mod).
-// These functions are untested with this strict Z61 implementation.  Callers need to eliminate all uses of + or - operators.
-
-Z61 OVERLOAD modM61(Z61 a) { return a; }
-GF61 OVERLOAD modM61(GF61 a) { return a; }
-Z61 OVERLOAD neg(Z61 a, u32 m61_count) { return neg(a); }
-GF61 OVERLOAD neg(GF61 a, u32 m61_count) { return neg(a); }
-
-
 // Philosophy: This Z61/GF61 implementation uses faster, sloppier mod M61 reduction where the end result is in the range 0..M61+epsilon.
-// This implementation also handles subtractions by adding enough M61s to make a value positive.  This allows us to always deal with positive
-// intermediate results.  An alternative implementation is to have Z61 be an i64 (costs us a precious bit of precision) and is surprisingly slower (at least on TitanV) because
-//      mod(a - b),             where the mod routinue uses a signed right shift is slower than
-//      mod(a + (M61*2 - b))    where the mod routine uses an unsigned shift right.
+// This implementation also handles subtractions by adding enough M61s to make a value positive.  This allows us to always deal with positive intermediate results.
 // However, a long string of subtracts (example, fft8 does 3 subtracts before mod M61 will be better off using the quick routines and negative intermediate results).
-// The mul routine (and obviously csq and cmul) must use only positive values as __int128 multiply is very slow.
-
-#elif 1   // Faster version that keeps results in the range 0 .. M61+epsilon
+// The mul routine (and csq and cmul) must use only positive values as __int128 multiply is very slow.
 
 u64 OVERLOAD get_Z61(Z61 a) { Z61 m = a - M61; return (m & 0x8000000000000000ULL) ? a : m; }        // Get value in range 0 to M61-1
 i64 OVERLOAD get_balanced_Z61(Z61 a) { return (hi32(a) >= 0x10000000) ? (i64)(a - M61) : (i64)a; }  // Get balanced value in range -M61/2 to M61/2
@@ -1038,7 +927,7 @@ Z61 OVERLOAD weakMul(Z61 a, Z61 b, const u32 a_m61_count, const u32 b_m61_count)
   ulong2 ab = wideMul(a, b);
   u64 lo = ab.x, hi = ab.y;
   u64 lo61 = lo & M61;                                  // Max value is M61
-  if ((a_m61_count - 1) * (b_m61_count - 1) <= 4) {
+  if ((a_m61_count - 1) * (b_m61_count - 1) <= 6) {
      hi = (hi << 3) + (lo >> 61);                       // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61 + epsilon
      return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
   } else {
@@ -1046,10 +935,34 @@ Z61 OVERLOAD weakMul(Z61 a, Z61 b, const u32 a_m61_count, const u32 b_m61_count)
      return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
   }
 }
+Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u64 c, const u32 a_m61_count, const u32 b_m61_count) {
+  u128 ab = mad64(a, b, c);                             // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61^2 + epsilon
+  u64 lo = u128_lo64(ab), hi = u128_hi64(ab);
+  u64 lo61 = lo & M61;                                  // Max value is M61
+  if ((a_m61_count - 1) * (b_m61_count - 1) <= 6) {
+     hi = (hi << 3) + (lo >> 61);                       // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61 + epsilon
+     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
+  } else {
+     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
+     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+  }
+}
+Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u128 c, const u32 a_m61_count, const u32 b_m61_count) {  // Max c value assumed to be 2*M61^2+epsilon
+  u128 ab = mad64(a, b, c);                             // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61^2 + epsilon
+  u64 lo = u128_lo64(ab), hi = u128_hi64(ab);
+  u64 lo61 = lo & M61;                                  // Max value is M61
+  if ((a_m61_count - 1) * (b_m61_count - 1) + 2 <= 6) {
+     hi = (hi << 3) + (lo >> 61);                       // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61 + epsilon
+     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 3) * M61 + epsilon
+  } else {
+     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
+     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+  }
+}
 
 Z61 OVERLOAD mul(Z61 a, Z61 b) { return modM61(weakMul(a, b, 2, 2)); }
 
-Z61 OVERLOAD fma(Z61 a, Z61 b, Z61 c) { return modM61(weakMul(a, b, 2, 2) + c); }             // GWBUG:  Can we do better?
+Z61 OVERLOAD fma(Z61 a, Z61 b, Z61 c) { return modM61(weakMulAdd(a, b, c, 2, 2)); }
 
 // Multiply by 2
 Z61 OVERLOAD mul2(Z61 a) { return add(a, a); }
@@ -1059,46 +972,38 @@ GF61 OVERLOAD mul2(GF61 a) { return U2(mul2(a.x), mul2(a.y)); }
 GF61 OVERLOAD conjugate(GF61 a) { return U2(a.x, neg(a.y)); }
 
 // Complex square. Uses (a + i*b)^2 == ((a+b)*(a-b) + i*2*a*b).
-GF61 OVERLOAD csqq(GF61 a, const u32 m61_count) {
-  if (m61_count > 4) return csqq(modM61(a), 2);
-  Z61 re = weakMul(a.x + a.y, a.x + neg(a.y, m61_count), 2 * m61_count - 1, 2 * m61_count);
-  Z61 im = weakMul(a.x + a.x, a.y, 2 * m61_count - 1, m61_count);
+GF61 OVERLOAD csqq(GF61 a, const u32 x_m61_count, const u32 y_m61_count) {
+  if (x_m61_count + y_m61_count >= 9) return csqq(modM61(a), 2, 2);
+  Z61 re = weakMul(a.x + a.y, a.x + neg(a.y, y_m61_count), x_m61_count + y_m61_count - 1, x_m61_count + y_m61_count);
+  Z61 im = (x_m61_count <= y_m61_count) ? weakMul(a.x + a.x, a.y, x_m61_count + x_m61_count - 1, y_m61_count) :
+                                          weakMul(a.x, a.y + a.y, x_m61_count, y_m61_count + y_m61_count - 1);
   return U2(re, im);
 }
-GF61 OVERLOAD csqs(GF61 a, const u32 m61_count) { return modM61(csqq(a, m61_count)); }
-GF61 OVERLOAD csq(GF61 a) { return csqs(a, 2); }
+GF61 OVERLOAD csqq(GF61 a, const u32 m61_count) { return csqq(a, m61_count, m61_count); }
+GF61 OVERLOAD csq(GF61 a, const u32 x_m61_count, const u32 y_m61_count) { return modM61(csqq(a, x_m61_count, y_m61_count)); }
+GF61 OVERLOAD csq(GF61 a, const u32 m61_count) { return csq(a, m61_count, m61_count); }
+GF61 OVERLOAD csq(GF61 a) { return csq(a, 2); }
 
 // a^2 + c
-GF61 OVERLOAD csqa(GF61 a, GF61 c) { return U2(modM61(weakMul(a.x + a.y, a.x + neg(a.y, 2), 3, 4) + c.x), modM61(weakMul(a.x + a.x, a.y, 3, 2) + c.y)); }
+GF61 OVERLOAD csqaq(GF61 a, GF61 c, const u32 x_m61_count, const u32 y_m61_count) {
+  if (x_m61_count + y_m61_count >= 9) return csqaq(modM61(a), c, 2, 2);
+  Z61 re = weakMulAdd(a.x + a.y, a.x + neg(a.y, y_m61_count), c.x, x_m61_count + y_m61_count - 1, x_m61_count + y_m61_count);
+  Z61 im = (x_m61_count <= y_m61_count) ? weakMulAdd(a.x + a.x, a.y, c.y, x_m61_count + x_m61_count - 1, y_m61_count) :
+                                          weakMulAdd(a.x, a.y + a.y, c.y, x_m61_count, y_m61_count + y_m61_count - 1);
+  return U2(re, im);
+}
+GF61 OVERLOAD csqaq(GF61 a, GF61 c, const u32 m61_count) { return csqaq(a, c, m61_count, m61_count); }
+GF61 OVERLOAD csqa(GF61 a, GF61 c, const u32 x_m61_count, const u32 y_m61_count) { return modM61(csqaq(a, c, x_m61_count, y_m61_count)); }
+GF61 OVERLOAD csqa(GF61 a, GF61 c, const u32 m61_count) { return csqa(a, c, m61_count, m61_count); }
+GF61 OVERLOAD csqa(GF61 a, GF61 c) { return csqa(a, c, 2); }
 
 // Complex mul
-#if 0
-GF61 OVERLOAD cmul(GF61 a, GF61 b) {              // Use 3-epsilon extra bits in u64
-  Z61 k1 = weakMul(b.x, a.x + a.y, 2, 3);         // max value is 3*M61+epsilon
-  Z61 k2 = weakMul(a.x, b.y + neg(b.x, 2), 2, 3); // max value is 3*M61+epsilon
-  Z61 k3 = weakMul(a.y, b.y + b.x, 2, 3);         // max value is 3*M61+epsilon
-  return U2(modM61(k1 + neg(k3, 4)), modM61(k1 + k2));
-}
-#else
-Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u128 c, const u32 a_m61_count, const u32 b_m61_count) {  // Max c value assumed to be 2*M61^2+epsilon
-  u128 ab = mad64(a, b, c);                             // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61^2 + epsilon
-  u64 lo = u128_lo64(ab), hi = u128_hi64(ab);
-  u64 lo61 = lo & M61;                                  // Max value is M61
-  if ((a_m61_count - 1) * (b_m61_count - 1) + 2 <= 6) {
-     hi = (hi << 3) + (lo >> 61);                       // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61 + epsilon
-     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 3) * M61 + epsilon
-  } else {
-     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
-     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
-  }
-}
 GF61 OVERLOAD cmul(GF61 a, GF61 b) {
   u128 k1 = mul64(b.x, a.x + a.y);                            // max value is 2*M61^2+epsilon
   Z61 k1k2 = weakMulAdd(a.x, b.y + neg(b.x, 2), k1, 2, 4);    // max value is 6*M61+epsilon
   Z61 k1k3 = weakMulAdd(a.y, neg(b.y + b.x, 3), k1, 2, 4);    // max value is 6*M61+epsilon
   return U2(modM61(k1k3), modM61(k1k2));
 }
-#endif
 
 // Square a root of unity complex number (the second version may be faster if the compiler optimizes the u128 squaring).
 //GF61 OVERLOAD csqTrig(GF61 a) { Z61 two_ay = a.y + a.y; return U2(modM61(1 + weakMul(two_ay, neg(a.y, 2))), mul(a.x, two_ay)); }
@@ -1158,6 +1063,7 @@ GF61 OVERLOAD subiq(GF61 a, GF61 b) { return U2(a.x + b.y, a.y - b.x); }
 
 void OVERLOAD X2q(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; *b = t - *b; }
 void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; t.x = t.x - b->x; b->x = b->y - t.y; b->y = t.x; }
+void OVERLOAD X2qconjb(GF61 *a, GF61 *b) { GF61 t = *a; a->x += b->x; a->y -= b->y; b->x = t.x - b->x; b->y = t.y + b->y; }
 void OVERLOAD X2q_conjb(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; b->x = t.x - b->x; b->y = b->y - t.y; }
 
 GF61 OVERLOAD mul_t8q(GF61 a, const u32 m61_count) { return shl(U2(m61_count * M61 + (a.y - a.x), m61_count * M61 - (a.x + a.y)), 30); }
@@ -1170,5 +1076,3 @@ GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count) { if (m61_count) { a.x += m61
 GF61 OVERLOAD modM61q(GF61 a, const u32 m61_count_x, const u32 m61_count_y) { if (m61_count_x) a.x += m61_count_x * M61; if (m61_count_y) a.y += m61_count_y * M61; return modM61(a); }
 
 #endif
-
-#endif
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 10105194..e707d138 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -874,35 +874,44 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_type) {
   GF61 a = *pa, b = *pb;
-  GF61 a2, b2t2, c, d;
+  GF61 a2, b2, b2t2, ab, addin, c, d;
+
+  X2qconjb(&a, &b);                             // X2(a, conjugate(b)).  a.x range is 0..2+, a.y range is -1-..1+, b.x range is -1-..1+, b.y range is 0..2+
+  a.y += 2*M61;					// a range is  0..2+ / 1-..3+
+  b.x += 2*M61;					// b range is 1-..3+ / 0..2+
+
+  a2 = csqq(a, 3, 4);                           // a2 = a^2, a2 range is 0..2+
+  b2 = csq(b, 4, 3);                            // b2 = b^2, b2 range is 0..1+
+
+  ab = addq(a, b);				// Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
+  addin = neg(addq(a2, b2), 4);                 // add this into the csq of a+b, addin in range 0..4
+  d = csqa(ab, addin, 6);                       // d = 2ab, range is 0..1+
+
+  b2t2 = cmul(b2, t_squared);                   // b2t2 = b^2 * t_squared, b2t2 range is 0..1+
 
-  X2conjb(a, b);                                // X2(a, conjugate(b))
-  a2 = csqq(a, 2);                              // a2 = a^2, a2.x range is 0..2+, a2.y range is 0..3+
-  b2t2 = cmul(csq(b), t_squared);               // b2t2 = b^2 * t_squared, b2t2 range is 0..1+
-  d = cmul(a, b); d = d + d;                    // d = 2ab, d range is 0..2+
   if (t_squared_type == 0) {                    // mul t_squared by 1
-    c = subq(a2, b2t2);                         // c.x range is -1..2+, c.y range is -1-..3+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is -1-..5+, d.x range is -3-..2+, d.y range is -3-..3+
+    c = subq(a2, b2t2);                         // c range is -1-..2+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c range is -1-..3+, d.x range is -1-..2+, d.y range is -2-..1+
     c = modM61q(c, 2);
-    d = modM61q(d, 4);
+    d = modM61q(d, 3);
   }
   if (t_squared_type == 1) {                    // mul t_squared by i
-    c = subiq(a2, b2t2);                        // c.x range is 0..3+, c.y range is -1-..3+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is -1..5+, d.x range is -2-..3+, d.y range is -3-..3+
+    c = subiq(a2, b2t2);                        // c.x range is 0..3+, c.y range is -1-..2+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..4+, c.y range is -1..3+, d.x range is -1-..3+, d.y range is -2-..1+
     c = modM61q(c, 0, 2);
-    d = modM61q(d, 4);
+    d = modM61q(d, 2, 3);
   }
   if (t_squared_type == 2) {                    // mul t_squared by -1
-    c = addq(a2, b2t2);                         // c.x range is 0..3+, c.y range is 0..4+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is 0..6+, d.x range is -2-..3+, d.y range is -4-..2+
+    c = addq(a2, b2t2);                         // c range is 0..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c range is 0..4+, d.x range is -1-..3+, d.y range is -3-..1+
     c = modM61q(c, 0);
-    d = modM61q(d, 3, 5);
+    d = modM61q(d, 2, 4);
   }
   if (t_squared_type == 3) {                    // mul t_squared by -i
-    c = addiq(a2, b2t2);                        // c.x range is -1-..2+, c.y range is 0..4+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is 0..6+, d.x range is -3-..2+, d.y range is -4-..2+
+    c = addiq(a2, b2t2);                        // c.x range is -1-..2+, c.y range is 0..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..3+, c.y range is 0..4+, d.x range is -1-..2+, d.y range is -3-..1+
     c = modM61q(c, 2, 0);
-    d = modM61q(d, 4, 5);
+    d = modM61q(d, 2, 4);
   }
   *pa = SWAP_XY(c), *pb = SWAP_XY(d);
 }

From 590c4d17d4e1f5bd47c686b5ca8e9cc5add5714a Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Apr 2026 18:21:37 +0000
Subject: [PATCH 055/214] Eliminate a cmul in the little-used GF61 onePairMul
 routine.

---
 src/cl/tailmul.cl | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 0b308fa0..bcce141d 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -372,11 +372,13 @@ void OVERLOAD onePairMul(GF61* pa, GF61* pb, GF61* pc, GF61* pd, GF61 t_squared)
 
   X2conjb(a, b);
   X2conjb(c, d);
-  GF61 e = subq(cmul(a, c), cmul(cmul(b, d), t_squared));    // Range is -1-..1+
-  GF61 f = addq(cmul(b, c), cmul(a, d));                     // Range is 0..2+
-  X2q_conjb(&e, &f);                                         // e range is -1..3+,  f.x range is -3-..1+, f.y range is -1-..3+
-  e = modM61q(e, 2);
-  f = modM61q(f, 4, 2);
+  GF61 ac = cmul(a, c);
+  GF61 bd = cmul(b, d);
+  GF61 e = subq(ac, cmul(bd, t_squared));                    // Range is -1-..1+
+  GF61 f = subq(subq(cmul(add(a, b), add(c, d)), ac), bd);   // Compute bc + ad.  Range is -2-..1+
+  X2q_conjb(&e, &f);                                         // e range is -3..2+,  f.x range is -2-..3+, f.y range is -3-..2+
+  e = modM61q(e, 4);
+  f = modM61q(f, 3, 4);
   *pa = SWAP_XY(e), *pb = SWAP_XY(f);
 }
 

From a40510cdf487b49541e93e6813354f2cfbf21c56 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Apr 2026 18:45:13 +0000
Subject: [PATCH 056/214] Save one cmul in GF31 onePairMul

---
 src/cl/tailmul.cl | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index bcce141d..decc0e61 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -240,13 +240,12 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 void OVERLOAD onePairMul(GF31* pa, GF31* pb, GF31* pc, GF31* pd, GF31 t_squared) {
   GF31 a = *pa, b = *pb, c = *pc, d = *pd;
-
   X2conjb(a, b);
   X2conjb(c, d);
-
-  *pa = sub(cmul(a, c), cmul(cmul(b, d), t_squared));
-  *pb = add(cmul(b, c), cmul(a, d));
-
+  GF31 ac = cmul(a, c);
+  GF31 bd = cmul(b, d);
+  *pa = sub(ac, cmul(bd, t_squared));
+  *pb = sub(sub(cmul(add(a, b), add(c, d)), ac), bd);
   X2_conjb(*pa, *pb);
   *pa = SWAP_XY(*pa), *pb = SWAP_XY(*pb);
 }
@@ -369,14 +368,13 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 void OVERLOAD onePairMul(GF61* pa, GF61* pb, GF61* pc, GF61* pd, GF61 t_squared) {
   GF61 a = *pa, b = *pb, c = *pc, d = *pd;
-
   X2conjb(a, b);
   X2conjb(c, d);
   GF61 ac = cmul(a, c);
   GF61 bd = cmul(b, d);
   GF61 e = subq(ac, cmul(bd, t_squared));                    // Range is -1-..1+
   GF61 f = subq(subq(cmul(add(a, b), add(c, d)), ac), bd);   // Compute bc + ad.  Range is -2-..1+
-  X2q_conjb(&e, &f);                                         // e range is -3..2+,  f.x range is -2-..3+, f.y range is -3-..2+
+  X2q_conjb(&e, &f);                                         // e range is -3-..2+,  f.x range is -2-..3+, f.y range is -3-..2+
   e = modM61q(e, 4);
   f = modM61q(f, 3, 4);
   *pa = SWAP_XY(e), *pb = SWAP_XY(f);

From 0d6809e078573c7548a25d887b883342974b6ba7 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Apr 2026 19:04:55 +0000
Subject: [PATCH 057/214] Neatened GF31 onePairSquare

---
 src/cl/tailsquare.cl | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index e707d138..a18a42d4 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -584,17 +584,18 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 void OVERLOAD onePairSq(GF31* pa, GF31* pb, GF31 t_squared, const u32 t_squared_type) {
   GF31 a = *pa, b = *pb;
-  GF31 c, d;
+  GF31 b2t2, c, d;
 
   X2conjb(a, b);
-  if (t_squared_type == 0)                           // mul t_squared by 1
-    c = csq_sub(a, cmul(csq(b), t_squared));         // a^2 - (b^2 * t_squared)
-  if (t_squared_type == 1)                           // mul t_squared by i
-    c = csq_subi(a, cmul(csq(b), t_squared));        // a^2 - i*(b^2 * t_squared)
-  if (t_squared_type == 2)                           // mul t_squared by -1
-    c = csq_add(a, cmul(csq(b), t_squared));         // a^2 - -1*(b^2 * t_squared)
-  if (t_squared_type == 3)                           // mul t_squared by -i
-    c = csq_addi(a, cmul(csq(b), t_squared));        // a^2 - -i*(b^2 * t_squared)
+  b2t2 = cmul(csq(b), t_squared);     // b2t2 = b^2 * t_squared
+  if (t_squared_type == 0)            // mul t_squared by 1
+    c = csq_sub(a, b2t2);             // a^2 - (b^2 * t_squared)
+  if (t_squared_type == 1)            // mul t_squared by i
+    c = csq_subi(a, b2t2);            // a^2 - i*(b^2 * t_squared)
+  if (t_squared_type == 2)            // mul t_squared by -1
+    c = csq_add(a, b2t2);             // a^2 - -1*(b^2 * t_squared)
+  if (t_squared_type == 3)            // mul t_squared by -i
+    c = csq_addi(a, b2t2);            // a^2 - -i*(b^2 * t_squared)
   d = mul2(cmul(a, b));
   X2_conjb(c, d);
   *pa = SWAP_XY(c), *pb = SWAP_XY(d);
@@ -884,7 +885,7 @@ void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_
   b2 = csq(b, 4, 3);                            // b2 = b^2, b2 range is 0..1+
 
   ab = addq(a, b);				// Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
-  addin = neg(addq(a2, b2), 4);                 // add this into the csq of a+b, addin in range 0..4
+  addin = neg(addq(a2, b2), 4);                 // add this into the csq of a+b, addin range is 0..4
   d = csqa(ab, addin, 6);                       // d = 2ab, range is 0..1+
 
   b2t2 = cmul(b2, t_squared);                   // b2t2 = b^2 * t_squared, b2t2 range is 0..1+

From 3135c791a8991209e9e22533398d2afb2d2bdc16 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 1 May 2026 02:31:54 +0000
Subject: [PATCH 058/214] Ifdefed recent GF61 onePairSquare improvement.  CUDA
 compiler couldn't handle it -- caused local memory usage.

---
 src/cl/tailsquare.cl | 34 +++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index a18a42d4..55247cf0 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -877,14 +877,16 @@ void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_
   GF61 a = *pa, b = *pb;
   GF61 a2, b2, b2t2, ab, addin, c, d;
 
+// This code should be faster (saves at least one wide mul) but the CUDA compiler makes poorer decisions regarding register usage resulting in local memory usage
+#if ENABLE_BETTER_ONEPAIRSQ
   X2qconjb(&a, &b);                             // X2(a, conjugate(b)).  a.x range is 0..2+, a.y range is -1-..1+, b.x range is -1-..1+, b.y range is 0..2+
   a.y += 2*M61;					// a range is  0..2+ / 1-..3+
   b.x += 2*M61;					// b range is 1-..3+ / 0..2+
 
+  ab = addq(a, b);				// Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
   a2 = csqq(a, 3, 4);                           // a2 = a^2, a2 range is 0..2+
   b2 = csq(b, 4, 3);                            // b2 = b^2, b2 range is 0..1+
 
-  ab = addq(a, b);				// Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
   addin = neg(addq(a2, b2), 4);                 // add this into the csq of a+b, addin range is 0..4
   d = csqa(ab, addin, 6);                       // d = 2ab, range is 0..1+
 
@@ -914,6 +916,36 @@ void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_
     c = modM61q(c, 2, 0);
     d = modM61q(d, 2, 4);
   }
+#else
+  X2conjb(a, b);                                // X2(a, conjugate(b))
+  a2 = csqq(a, 2);                              // a2 = a^2, a2.x range is 0..2+, a2.y range is 0..3+
+  b2t2 = cmul(csq(b), t_squared);               // b2t2 = b^2 * t_squared, b2t2 range is 0..1+
+  d = cmul(a, b); d = d + d;                    // d = 2ab, d range is 0..2+
+  if (t_squared_type == 0) {                    // mul t_squared by 1
+    c = subq(a2, b2t2);                         // c.x range is -1..2+, c.y range is -1-..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is -1-..5+, d.x range is -3-.>
+    c = modM61q(c, 2);
+    d = modM61q(d, 4);
+  }
+  if (t_squared_type == 1) {                    // mul t_squared by i
+    c = subiq(a2, b2t2);                        // c.x range is 0..3+, c.y range is -1-..3+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is -1..5+, d.x range is -2-..3+>
+    c = modM61q(c, 0, 2);
+    d = modM61q(d, 4);
+  }
+  if (t_squared_type == 2) {                    // mul t_squared by -1
+    c = addq(a2, b2t2);                         // c.x range is 0..3+, c.y range is 0..4+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is 0..6+, d.x range is -2-..3+,>
+    c = modM61q(c, 0);
+    d = modM61q(d, 3, 5);
+  }
+  if (t_squared_type == 3) {                    // mul t_squared by -i
+    c = addiq(a2, b2t2);                        // c.x range is -1-..2+, c.y range is 0..4+
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is 0..6+, d.x range is -3-..2>
+    c = modM61q(c, 2, 0);
+    d = modM61q(d, 4, 5);
+  }
+#endif
   *pa = SWAP_XY(c), *pb = SWAP_XY(d);
 }
 

From 3791d56db37b90384ab09d2d83514b7b8ca25a41 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 3 May 2026 04:20:16 +0000
Subject: [PATCH 059/214] 23 bits of float precision is not enough to
 optionaDouble and optionalHalve the way doubles does. FracBits overhauled so
 FP32 hybrid FFTs can use fracBits for optional doubling and halving.

---
 src/Gpu.cpp          |  11 +--
 src/cl/base.cl       |   1 +
 src/cl/carry.cl      |  94 ++++++++++++--------
 src/cl/carryb.cl     |   5 +-
 src/cl/carryfused.cl | 203 ++++++++++++++++++++++++-------------------
 src/cl/fftp.cl       |  98 ++++++++++++---------
 src/cl/weight.cl     |  61 ++++++++-----
 7 files changed, 277 insertions(+), 196 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index d31ba518..4e7dafc7 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -86,8 +86,6 @@ float invWeightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
   return expm1(M_LN2 * - (double)(extra(N, E, kAt(H, line, col) + rep)) / N);
 }
 
-float boundUnderOne(float x) { return std::min(x, nexttowardf(1, 0)); }
-
 Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
   u32 N = 2u * W * H;
   u32 groupWidth = W / nW;
@@ -131,9 +129,6 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
     for (u32 thread = 0; thread < groupWidth; ++thread) {
       auto iw = invWeight32(N, E, H, 0, thread, 0) ;
       auto w = weight32(N, E, H, 0, thread, 0) ;
-      // Play with the weight so that optionalDouble and optionalHalve work
-      iw = 2.0f * boundUnderOne(iw);
-      w = 2.0f * w;
       // Weights are scaled by 2^-24 and 2^48 so that multiplicaton by 1/epsilon does not generate infinty results (width and height variant 2).
       iw = iw * 281474976710656.0f;
       w = w * 0.000000059604644775390625f;
@@ -2131,7 +2126,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
         }
 
         doBigLog(k, res, ok, secsPerIt, kEndEnd, nErrors);
-          
+
         if (k >= kEndEnd) {
           fs::path proofFile = saveProof(args, proofSet);
           return {isPrime, finalRes64, nErrors, proofFile.string(), toHex(res2048)};
@@ -2150,9 +2145,9 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
         lastFailedRes64 = res;
         if (!doStop) { goto reload; }
       }
-        
+
       logTimeKernels();
-        
+
       if (doStop) {
         queue->finish();
         throw "stop requested";
diff --git a/src/cl/base.cl b/src/cl/base.cl
index e0168f8d..7654be7a 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -206,6 +206,7 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define BIG_HEIGHT (SMALL_HEIGHT * MIDDLE)
 #define ND (WIDTH * BIG_HEIGHT)
 #define NWORDS (ND * 2u)
+#define NWORDS_IS_POWER_OF_TWO  !(NWORDS & (NWORDS - 1))
 
 #if (NW != 4 && NW != 8) || (NH != 4 && NH != 8)
 #error NW and NH must be passed in, expected value 4 or 8.
diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index e8dc75a0..e55311e1 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -25,8 +25,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   // Calculate the most significant 32-bits of FRAC_BPW * the index of the FFT word.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 line = gy * CARRY_LEN;
-  u32 fft_word_index = (gx * G_W * H + me * H + line) * 2;
-  u32 frac_bits = fft_word_index * FRAC_BPW_HI + mad_hi (fft_word_index, FRAC_BPW_LO, FRAC_BPW_HI);
+  u32 word_index = (gx * G_W * H + me * H + line) * 2;
+  u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
 
   T base = optionalDouble(fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx)));
 
@@ -70,15 +70,21 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   // Calculate the most significant 32-bits of FRAC_BPW * the index of the FFT word.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 line = gy * CARRY_LEN;
-  u32 fft_word_index = (gx * G_W * H + me * H + line) * 2;
-  u32 frac_bits = fft_word_index * FRAC_BPW_HI + mad_hi (fft_word_index, FRAC_BPW_LO, FRAC_BPW_HI);
+  u32 word_index = (gx * G_W * H + me * H + line) * 2;
+  u32 frac_bits = fracBits(word_index);
 
-  F base = optionalDouble(fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx)));
+  F base = fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx));
+  u32 me_frac_bits = fracBits(me * H * 2);
+  u32 step_frac_bits = weightStepFracBits(gx);
+  u32 base_frac_bits = me_frac_bits + step_frac_bits;
+  base = optionalDouble(base, base_frac_bits > step_frac_bits);
 
   for (i32 i = 0; i < CARRY_LEN; ++i) {
-    u32 p = G_W * gx + WIDTH * (CARRY_LEN * gy + i) + me;
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + gy * CARRY_LEN + i].x));
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP));
+    u32 p = G_W * gx + WIDTH * (line + i) + me;
+    u32 line_frac_bits = fracBits((line + i) * 2);
+    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     bool biglit0 = frac_bits + (2*i) * FRAC_BPW_HI <= FRAC_BPW_HI;
     bool biglit1 = frac_bits + (2*i) * FRAC_BPW_HI >= -FRAC_BPW_HI;   // Same as frac_bits + (2*i) * FRAC_BPW_HI + FRAC_BPW_HI <= FRAC_BPW_HI;
     out[p] = weightAndCarryPair(SWAP_XY(in[p]), U2(w1, w2), carry, biglit0, biglit1, &carry, &roundMax, &carryMax);
@@ -128,8 +134,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF31) in, u32 posROE, P(CarryABM) carryOut, P
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -202,8 +208,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF61) in, u32 posROE, P(CarryABM) carryOut, P
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -277,8 +283,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -342,7 +348,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   u32 word_index = (gx * G_W * H + me * H + line) * 2;
 
-  F base = optionalDouble(fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx)));
+  F base = fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx));
+  u32 me_frac_bits = fracBits(me * H * 2);
+  u32 step_frac_bits = weightStepFracBits(gx);
+  u32 base_frac_bits = me_frac_bits + step_frac_bits;
+  base = optionalDouble(base, base_frac_bits > step_frac_bits);
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   const u32 log2_root_two = (u32) (((1ULL << 30) / NWORDS) % 31);
@@ -356,8 +366,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -366,11 +376,13 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   weight_shift = (weight_shift + log2_NWORDS + 1) % 31;
 
   for (i32 i = 0; i < CARRY_LEN; ++i) {
-    u32 p = G_W * gx + WIDTH * (CARRY_LEN * gy + i) + me;
+    u32 p = G_W * gx + WIDTH * (line + i) + me;
 
     // Generate the FP32 and second GF31 weight shift
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + gy * CARRY_LEN + i].x));
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP));
+    u32 line_frac_bits = fracBits((line + i) * 2);
+    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 31) weight_shift -= 31;
@@ -421,7 +433,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   u32 word_index = (gx * G_W * H + me * H + line) * 2;
 
-  F base = optionalDouble(fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx)));
+  F base = fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx));
+  u32 me_frac_bits = fracBits(me * H * 2);
+  u32 step_frac_bits = weightStepFracBits(gx);
+  u32 base_frac_bits = me_frac_bits + step_frac_bits;
+  base = optionalDouble(base, base_frac_bits > step_frac_bits);
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   const u32 log2_root_two = (u32) (((1ULL << 60) / NWORDS) % 61);
@@ -435,8 +451,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -445,11 +461,13 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   weight_shift = (weight_shift + log2_NWORDS + 1) % 61;
 
   for (i32 i = 0; i < CARRY_LEN; ++i) {
-    u32 p = G_W * gx + WIDTH * (CARRY_LEN * gy + i) + me;
+    u32 p = G_W * gx + WIDTH * (line + i) + me;
 
     // Generate the FP32 and second GF61 weight shift
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + gy * CARRY_LEN + i].x));
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP));
+    u32 line_frac_bits = fracBits((line + i) * 2);
+    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 61) weight_shift -= 61;
@@ -518,10 +536,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, P(u
 #define m61_weight_shift    m61_combo.a[1]
 #define m61_combo_counter   m61_combo.b
 
-  const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
-  const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m31_combo_step = make_u64(m31_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
+  const u64 m61_combo_step = make_u64(m61_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -593,7 +611,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   u32 word_index = (gx * G_W * H + me * H + line) * 2;
 
-  F base = optionalDouble(fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx)));
+  F base = fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx));
+  u32 me_frac_bits = fracBits(me * H * 2);
+  u32 step_frac_bits = weightStepFracBits(gx);
+  u32 base_frac_bits = me_frac_bits + step_frac_bits;
+  base = optionalDouble(base, base_frac_bits > step_frac_bits);
 
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   const u32 m31_log2_root_two = (u32) (((1ULL << 30) / NWORDS) % 31);
@@ -613,9 +635,9 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 #define m61_combo_counter   m61_combo.b
 
   const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
   const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
 
   // We also adjust shift amount for the fact that NTT returns results multiplied by 2*NWORDS.
   const u32 log2_NWORDS = (WIDTH == 256 ? 8 : WIDTH == 512 ? 9 : WIDTH == 1024 ? 10 : 12) +
@@ -628,8 +650,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
     u32 p = G_W * gx + WIDTH * (CARRY_LEN * gy + i) + me;
 
     // Generate the FP32 and second GF31 and GF61 weight shift
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + gy * CARRY_LEN + i].x));
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP));
+    u32 line_frac_bits = fracBits((line + i) * 2);
+    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 m31_weight_shift0 = m31_weight_shift;
     m31_combo_counter += m31_combo_step;
     m31_weight_shift = adjust_m31_weight_shift(m31_weight_shift);
diff --git a/src/cl/carryb.cl b/src/cl/carryb.cl
index c08004cd..ae9da09c 100644
--- a/src/cl/carryb.cl
+++ b/src/cl/carryb.cl
@@ -3,6 +3,7 @@
 #include "base.cl"
 #include "math.cl"
 #include "carryutil.cl"
+#include "weight.cl"
 
 KERNEL(G_W) carryB(P(Word2) io, CP(CarryABM) carryIn) {
   u32 g  = get_group_id(0);
@@ -14,8 +15,8 @@ KERNEL(G_W) carryB(P(Word2) io, CP(CarryABM) carryIn) {
   // Derive the big vs. little flags from the fractional number of bits in each FFT word rather read the flags from memory.
   // Calculate the most significant 32-bits of FRAC_BPW * the index of the FFT word.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 line = gy * CARRY_LEN;
-  u32 fft_word_index = (gx * G_W * H + me * H + line) * 2;
-  u32 frac_bits = fft_word_index * FRAC_BPW_HI + mad_hi (fft_word_index, FRAC_BPW_LO, FRAC_BPW_HI);
+  u32 word_index = (gx * G_W * H + me * H + line) * 2;
+  u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
 
   io += G_W * gx + WIDTH * CARRY_LEN * gy;
 
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index db304570..c4727115 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -162,8 +162,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = mul3264(word_index, FRAC_BPW_HI) + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
-  const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
+  u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
+  const u32 frac_bits_bigstep = fracBits(G_W * H * 2);
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
@@ -335,13 +335,24 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   fft_WIDTH1(lds + zerohack, u, smallTrig + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
+  u32 me_frac_bits = fracBits(lowMe * H * 2);
 #if !NVIDIAGPU || CUDA_BACKEND
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
+  u32 line_frac_bits = fracBits(line * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > line_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > line_frac_bits);
 #else
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
-  weights.x = optionalDouble(weights.x);
-  weights.y = optionalHalve(weights.y);
+  u32 partialLine_frac_bits = fracBits((line % 64) * 2);
+  u32 base_frac_bits = me_frac_bits + partialLine_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
+  partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
+  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
 
   P(CFcarry) carryShuttlePtr = (P(CFcarry)) carryShuttle;
@@ -352,16 +363,15 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 
   // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = mul3264(word_index, FRAC_BPW_HI) + mad_hi (word_index, FRAC_BPW_LO, FRAC_BPW_HI);
-  const u32 frac_bits_bigstep = ((G_W * H * 2) * FRAC_BPW_HI + (u32)(((u64)(G_W * H * 2) * FRAC_BPW_LO) >> 32));
+  u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
+  const u32 frac_bits_bigstep = fracBits(G_W * H * 2);
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
-  F invBase = optionalDouble(weights.x);
-  
+  F invBase = weights.x;
   for (u32 i = 0; i < NW; ++i) {
-    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)));
-    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
+    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
+    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
 
     // Generate big-word/little-word flags
     bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
@@ -411,14 +421,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
-  // Calculate inverse weights
-  F base = optionalHalve(weights.y);
-  for (u32 i = 0; i < NW; ++i) {
-    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP));
-    u[i] = U2(weight1, weight2);
-  }
-
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
@@ -470,10 +472,14 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   }
 
   // Apply each 32 or 64 bit carry to the 2 words
+  F base = weights.y;
   for (i32 i = 0; i < NW; ++i) {
+    // Calculate inverse weights
+    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
-    u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
+    u[i] = U2(weight1 * wu[i].x, weight2 * wu[i].y);
   }
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
@@ -547,9 +553,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -764,9 +770,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 61;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -994,9 +1000,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1212,13 +1218,24 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   fft_WIDTH1(lds31 + zerohack, u31, smallTrig31 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
+  u32 me_frac_bits = fracBits(lowMe * H * 2);
 #if !NVIDIAGPU || CUDA_BACKEND
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
+  u32 line_frac_bits = fracBits(line * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > line_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > line_frac_bits);
 #else
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
-  weights.x = optionalDouble(weights.x);
-  weights.y = optionalHalve(weights.y);
+  u32 partialLine_frac_bits = fracBits((line % 64) * 2);
+  u32 base_frac_bits = me_frac_bits + partialLine_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
+  partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
+  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
 
   P(i32) carryShuttlePtr = (P(i32)) carryShuttle;
@@ -1242,9 +1259,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1257,11 +1274,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
-  F invBase = optionalDouble(weights.x);
+  F invBase = weights.x;
   for (u32 i = 0; i < NW; ++i) {
     // Generate the FP32 weights and second GF31 weight shift
-    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)));
-    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
+    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
+    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 31) weight_shift -= 31;
@@ -1320,14 +1337,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
-  // Calculate inverse weights
-  F base = optionalHalve(weights.y);
-  for (u32 i = 0; i < NW; ++i) {
-    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP));
-    uF2[i] = U2(weight1, weight2);
-  }
-
   // Shuffle carries up
   shufl_carries_up(ldsF2, carry, me, lowMe);
 
@@ -1379,7 +1388,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
 
   // Apply each 32 or 64 bit carry to the 2 words.  Apply weights.
+  F base = weights.y;
   for (i32 i = 0; i < NW; ++i) {
+    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     // Generate the second weight shift
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
@@ -1388,7 +1400,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Generate big-word/little-word flag, propagate final carry
     bool biglit0 = frac_bits <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
-    uF2[i] = U2(uF2[i].x * wu[i].x, uF2[i].y * wu[i].y);
+    uF2[i] = U2(weight1 * wu[i].x, weight2 * wu[i].y);
     u31[i] = U2(shl(make_Z31(wu[i].x), weight_shift0), shl(make_Z31(wu[i].y), weight_shift1));
 
     // Generate weight shifts and frac_bits for next pair
@@ -1460,13 +1472,24 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
+  u32 me_frac_bits = fracBits(lowMe * H * 2);
 #if !NVIDIAGPU || CUDA_BACKEND
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
+  u32 line_frac_bits = fracBits(line * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > line_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > line_frac_bits);
 #else
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
-  weights.x = optionalDouble(weights.x);
-  weights.y = optionalHalve(weights.y);
+  u32 partialLine_frac_bits = fracBits((line % 64) * 2);
+  u32 base_frac_bits = me_frac_bits + partialLine_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
+  partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
+  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
 
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
@@ -1490,9 +1513,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #define weight_shift    combo.a[1]
 #define combo_counter   combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * H * 2 - 1) * combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 61;
   u64 starting_combo_counter = combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1505,11 +1528,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
-  F invBase = optionalDouble(weights.x);
+  F invBase = weights.x;
   for (u32 i = 0; i < NW; ++i) {
     // Generate the FP32 weights and second GF61 weight shift
-    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)));
-    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
+    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
+    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 61) weight_shift -= 61;
@@ -1568,14 +1592,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
-  // Calculate inverse weights
-  F base = optionalHalve(weights.y);
-  for (u32 i = 0; i < NW; ++i) {
-    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP));
-    uF2[i] = U2(weight1, weight2);
-  }
-
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
@@ -1627,7 +1643,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
 
   // Apply each 32 or 64 bit carry to the 2 words.  Apply weights.
+  F base = weights.y;
   for (i32 i = 0; i < NW; ++i) {
+    // Calculate inverse weights
+    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     // Generate the second weight shift
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
@@ -1636,7 +1656,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Generate big-word/little-word flag, propagate final carry
     bool biglit0 = frac_bits <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
-    uF2[i] = U2(uF2[i].x * wu[i].x, uF2[i].y * wu[i].y);
+    uF2[i] = U2(weight1 * wu[i].x, weight2 * wu[i].y);
     u61[i] = U2(shl(make_Z61(wu[i].x), weight_shift0), shl(make_Z61(wu[i].y), weight_shift1));
 
     // Generate weight shifts and frac_bits for next pair
@@ -1734,14 +1754,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #define m61_weight_shift    m61_combo.a[1]
 #define m61_combo_counter   m61_combo.b
 
-  const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m31_combo_bigstep = ((G_W * H * 2 - 1) * m31_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m31_combo_step = make_u64(m31_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m31_combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * m31_bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m31_weight_shift = m31_weight_shift % 31;
   u64 m31_starting_combo_counter = m31_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
-  const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m61_combo_bigstep = ((G_W * H * 2 - 1) * m61_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m61_combo_step = make_u64(m61_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m61_combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * m61_bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m61_weight_shift = m61_weight_shift % 61;
   u64 m61_starting_combo_counter = m61_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -1968,13 +1988,24 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   fft_WIDTH1(lds61 + zerohack, u61, smallTrig61 + zerohack, WMUL, lowMe);
 
   Word2 wu[NW];
+  u32 me_frac_bits = fracBits(lowMe * H * 2);
 #if !NVIDIAGPU || CUDA_BACKEND
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), TSLOAD(&THREAD_WEIGHTS[G_W + line]));
+  u32 line_frac_bits = fracBits(line * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > line_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > line_frac_bits);
 #else
   F2 weights = fancyMul(TFLOAD(&THREAD_WEIGHTS[lowMe]), CONST_THREAD_WEIGHTS[line % 64]);
-  weights.x = optionalDouble(weights.x);
-  weights.y = optionalHalve(weights.y);
+  u32 partialLine_frac_bits = fracBits((line % 64) * 2);
+  u32 base_frac_bits = me_frac_bits + partialLine_frac_bits;
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
+  partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
+  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
+  weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
 
   P(i64) carryShuttlePtr = (P(i64)) carryShuttle;
@@ -2003,14 +2034,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #define m61_weight_shift    m61_combo.a[1]
 #define m61_combo_counter   m61_combo.b
 
-  const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m31_combo_bigstep = ((G_W * H * 2 - 1) * m31_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m31_combo_step = make_u64(m31_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m31_combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * m31_bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m31_weight_shift = m31_weight_shift % 31;
   u64 m31_starting_combo_counter = m31_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
-  const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m61_combo_bigstep = ((G_W * H * 2 - 1) * m61_combo_step + (((u64) (G_W * H * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m61_combo_step = make_u64(m61_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m61_combo_bigstep = (comboFracBits(G_W * H * 2 - 1) + make_u64((G_W * H * 2 - 1) * m61_bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m61_weight_shift = m61_weight_shift % 61;
   u64 m61_starting_combo_counter = m61_combo_counter;     // Save starting counter before adding log2_NWORDS+1 for applying weights after carry propagation
 
@@ -2023,11 +2054,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
-  F invBase = optionalDouble(weights.x);
+  F invBase = weights.x;
   for (u32 i = 0; i < NW; ++i) {
     // Generate the FP32 weights and second GF31 and GF61 weight shift
-    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)));
-    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
+    F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
+    F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 m31_weight_shift0 = m31_weight_shift;
     m31_combo_counter += m31_combo_step;
     m31_weight_shift = adjust_m31_weight_shift(m31_weight_shift);
@@ -2093,14 +2124,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
-  // Calculate inverse weights
-  F base = optionalHalve(weights.y);
-  for (u32 i = 0; i < NW; ++i) {
-    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP));
-    uF2[i] = U2(weight1, weight2);
-  }
-
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
@@ -2152,7 +2175,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
 
   // Apply each 32 or 64 bit carry to the 2 words.  Apply weights.
+  F base = weights.y;
   for (i32 i = 0; i < NW; ++i) {
+    // Calculate inverse weights
+    F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     // Generate the second weight shifts
     u32 m31_weight_shift0 = m31_weight_shift;
     m31_combo_counter += m31_combo_step;
@@ -2165,7 +2192,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Generate big-word/little-word flag, propagate final carry
     bool biglit0 = frac_bits <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
-    uF2[i] = U2(uF2[i].x * wu[i].x, uF2[i].y * wu[i].y);
+    uF2[i] = U2(weight1 * wu[i].x, weight2 * wu[i].y);
     u31[i] = U2(shl(make_Z31(wu[i].x), m31_weight_shift0), shl(make_Z31(wu[i].y), m31_weight_shift1));
     u61[i] = U2(shl(make_Z61(wu[i].x), m61_weight_shift0), shl(make_Z61(wu[i].y), m61_weight_shift1));
 
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index 43ffef8e..57e2af82 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -48,11 +48,16 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
 
   in += g * WIDTH;
 
-  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y));
+  u32 me_frac_bits = fracBits(me * BIG_HEIGHT * 2);
+  u32 line_frac_bits = fracBits(g * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
 
   for (u32 i = 0; i < NW; ++i) {
-    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP));
+    u32 step_frac_bits = weightStepFracBits(i);
+    u32 w1_frac_bits = base_frac_bits + step_frac_bits;
+    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), base_frac_bits > step_frac_bits);
+    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 p = G_W * i + me;
     u[i] = U2(in[p].x * w1, in[p].y * w2);
   }
@@ -93,9 +98,9 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
 #define weight_shift        combo.a[1]
 #define combo_counter       combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -150,9 +155,9 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
 #define weight_shift	combo.a[1]
 #define combo_counter	combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -213,9 +218,9 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 #define weight_shift        combo.a[1]
 #define combo_counter       combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -266,10 +271,13 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   in += g * WIDTH;
 
-  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y));
-
   u32 word_index = (me * BIG_HEIGHT + g) * 2;
 
+  u32 me_frac_bits = fracBits(me * BIG_HEIGHT * 2);
+  u32 line_frac_bits = fracBits(g * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
+
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 31.
   const u32 log2_root_two = (u32) (((1ULL << 30) / NWORDS) % 31);
@@ -283,16 +291,16 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 #define weight_shift        combo.a[1]
 #define combo_counter       combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 31;
 
   for (u32 i = 0; i < NW; ++i) {
     u32 p = G_W * i + me;
     // Generate the FP32 weights and the second GF31 weight shift
-    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP));
+    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 31) weight_shift -= 31;
@@ -336,10 +344,13 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   in += g * WIDTH;
 
-  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y));
-
   u32 word_index = (me * BIG_HEIGHT + g) * 2;
 
+  u32 me_frac_bits = fracBits(me * BIG_HEIGHT * 2);
+  u32 line_frac_bits = fracBits(g * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
+
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 61.
   const u32 log2_root_two = (u32) (((1ULL << 60) / NWORDS) % 61);
@@ -353,16 +364,16 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 #define weight_shift        combo.a[1]
 #define combo_counter       combo.b
 
-  const u64 combo_step = ((u64) bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  combo_counter = mul3264(word_index, combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 combo_step = make_u64(bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  combo_counter = comboFracBits(word_index) + make_u64(word_index * bigword_weight_shift_minus1, 0xFFFFFFFF);
   weight_shift = weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
     u32 p = G_W * i + me;
     // Generate the FP32 weights and the second GF61 weight shift
-    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP));
+    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 61) weight_shift -= 61;
@@ -427,13 +438,13 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
 #define m61_weight_shift    m61_combo.a[1]
 #define m61_combo_counter   m61_combo.b
 
-  const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m31_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m31_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m31_combo_step = make_u64(m31_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m31_combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * m31_bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m31_weight_shift = m31_weight_shift % 31;
-  const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m61_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m61_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m61_combo_step = make_u64(m61_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m61_combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * m61_bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m61_weight_shift = m61_weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
@@ -493,10 +504,13 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
   in += g * WIDTH;
 
-  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y));
-
   u32 word_index = (me * BIG_HEIGHT + g) * 2;
 
+  u32 me_frac_bits = fracBits(me * BIG_HEIGHT * 2);
+  u32 line_frac_bits = fracBits(g * 2);
+  u32 base_frac_bits = me_frac_bits + line_frac_bits;
+  F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
+
   // Weight is 2^[ceil(qj / n) - qj/n] where j is the word index, q is the Mersenne exponent, and n is the number of words.
   // Weights can be applied with shifts because 2 is the 60th root GF61.
   // Let s be the shift amount for word 1.  The shift amount for word x is ceil(x * (s - 1) + num_big_words_less_than_x) % 61.
@@ -516,20 +530,20 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 #define m61_weight_shift    m61_combo.a[1]
 #define m61_combo_counter   m61_combo.b
 
-  const u64 m31_combo_step = ((u64) m31_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m31_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m31_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (31ULL << 32);
-  m31_combo_counter = mul3264(word_index, m31_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m31_combo_step = make_u64(m31_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m31_combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * m31_bigword_weight_shift_minus1, 0)) % (31ULL << 32);
+  m31_combo_counter = comboFracBits(word_index) + make_u64(word_index * m31_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m31_weight_shift = m31_weight_shift % 31;
-  const u64 m61_combo_step = ((u64) m61_bigword_weight_shift_minus1 << 32) + FRAC_BPW_HI;
-  const u64 m61_combo_bigstep = ((G_W * BIG_HEIGHT * 2 - 1) * m61_combo_step + (((u64) (G_W * BIG_HEIGHT * 2 - 1) * FRAC_BPW_LO) >> 32)) % (61ULL << 32);
-  m61_combo_counter = mul3264(word_index, m61_combo_step) + mul_hi(word_index, FRAC_BPW_LO) + 0xFFFFFFFFULL;
+  const u64 m61_combo_step = make_u64(m61_bigword_weight_shift_minus1, FRAC_BPW_HI);
+  const u64 m61_combo_bigstep = (comboFracBits(G_W * BIG_HEIGHT * 2 - 1) + make_u64((G_W * BIG_HEIGHT * 2 - 1) * m61_bigword_weight_shift_minus1, 0)) % (61ULL << 32);
+  m61_combo_counter = comboFracBits(word_index) + make_u64(word_index * m61_bigword_weight_shift_minus1, 0xFFFFFFFF);
   m61_weight_shift = m61_weight_shift % 61;
 
   for (u32 i = 0; i < NW; ++i) {
     u32 p = G_W * i + me;
     // Generate the FP32 weights and the second GF31 and GF61 weight shift
-    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)));
-    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP));
+    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 m31_weight_shift0 = m31_weight_shift;
     m31_combo_counter += m31_combo_step;
     m31_weight_shift = adjust_m31_weight_shift(m31_weight_shift);
diff --git a/src/cl/weight.cl b/src/cl/weight.cl
index 66075bb7..ccad666a 100644
--- a/src/cl/weight.cl
+++ b/src/cl/weight.cl
@@ -3,6 +3,33 @@
 #define STEP (NWORDS - (EXP % NWORDS))
 // bool isBigWord(u32 extra) { return extra < NWORDS - STEP; }
 
+// Determine the fractional-bits-per-word for a given FFT word.  The fracbits value is (word * STEP % NWORDS) / NWORDS.
+// The fracbits value is multiplied by 2^32 and truncated to make an integer.  Fracbits can be used to determine weights and big-vs-little-word flags.
+// Weight is 2^(1 - fracbits), but if fracbits is zero it is 2^0.
+// Big word is true if fracbits + FRAC_BPW_HI does not overflow, but also true if fracbits is zero.
+// To eliminate special logic for the FFT word 0, we subtract one from fracbits.
+u32 fracBits(u32 i) {
+#if NWORDS_IS_POWER_OF_TWO
+  return i * (FRAC_BPW_HI + 1) - 1;               // We know FRAC_BPW_LO is -1
+#else
+  return i * FRAC_BPW_HI + mul_hi(i, FRAC_BPW_LO) - 1;
+#endif
+}
+
+// Somewhat similar to the above.  Also returns the number of big words that occurred in getting to a given word.
+u64 comboFracBits(u32 i) {
+#if NWORDS_IS_POWER_OF_TWO
+  return (u64)i * (u64)(FRAC_BPW_HI + 1) - 1;     // We know FRAC_BPW_LO is -1
+#else
+  return (u64)i * (u64)FRAC_BPW_HI + mul_hi(i, FRAC_BPW_LO) - 1;
+#endif
+}
+
+// Routines to acces the 8 precomputed step weights
+u32 weightStepIndex(u32 i) { return i * STEP % NW * (8 / NW); }
+u32 weightStepFracBits(u32 i) { return 0xFFFFFFFF - (weightStepIndex(i) << 29); }
+
+
 #if FFT_FP64
 
 T fweightStep(u32 i) {
@@ -17,7 +44,7 @@ T fweightStep(u32 i) {
     0.68179283050742912,
     0.83400808640934243,
   };
-  return TWO_TO_NTH[i * STEP % NW * (8 / NW)];
+  return TWO_TO_NTH[weightStepIndex(i)];
 }
 
 T iweightStep(u32 i) {
@@ -32,7 +59,7 @@ T iweightStep(u32 i) {
     -0.40539644249863949,
     -0.45474613366737116,
   };
-  return TWO_TO_MINUS_NTH[i * STEP % NW * (8 / NW)];
+  return TWO_TO_MINUS_NTH[weightStepIndex(i)];
 }
 
 // This routine is not used.  It forces "-use NO_ASM" in Windows.  bfi should be replaced by a builtin if ever needed.
@@ -93,7 +120,7 @@ F fweightStep(u32 i) {
     0.68179283050742912,
     0.83400808640934243,
   };
-  return TWO_TO_NTH[i * STEP % NW * (8 / NW)];
+  return TWO_TO_NTH[weightStepIndex(i)];
 }
 
 F iweightStep(u32 i) {
@@ -108,28 +135,20 @@ F iweightStep(u32 i) {
     -0.40539644249863949,
     -0.45474613366737116,
   };
-  return TWO_TO_MINUS_NTH[i * STEP % NW * (8 / NW)];
+  return TWO_TO_MINUS_NTH[weightStepIndex(i)];
 }
 
-F optionalDouble(F iw) {
-  // In a straightforward implementation, inverse weights are between 0.5 and 1.0.  We use inverse weights between 1.0 and 2.0
-  // because it allows us to implement this routine with a single OR instruction on the exponent.   The original implementation
-  // where this routine took as input values from 0.25 to 1.0 required both an AND and an OR instruction on the exponent.
-  // return iw <= 1.0 ? iw * 2 : iw;
-  assert(iw > 0.5 && iw < 2);
-  uint u = as_uint(iw);
-  u |= 0x00800000;
-  return as_float(u);
+F optionalDouble(F iw, int flag) {
+  // The 23 bits of precision in a float is not enough to handle doubling and halving the same way FP64 does.
+  // A straightforward implementation.  Inverse weights are between > 0.5 and <= 1.0.
+  F doubled_iw = iw + iw;
+  return flag ? doubled_iw : iw;
 }
 
-F optionalHalve(F w) {    // return w >= 4 ? w / 2 : w;
-  // In a straightforward implementation, weights are between 1.0 and 2.0.  We use weights between 2.0 and 4.0 because
-  // it allows us to implement this routine with a single AND instruction on the exponent.   The original implementation
-  // where this routine took as input values from 1.0 to 4.0 required both an AND and an OR instruction on the exponent.
-  assert(w >= 2 && w < 8);
-  uint u = as_uint(w);
-  u &= 0xFF7FFFFF;
-  return as_float(u);
+F optionalHalve(F w, int flag) {
+  // A straightforward implementation.  Weights are between >= 1.0 and < 2.0.
+  F halved_w = w * 0.5f;
+  return flag ? halved_w : w;
 }
 
 #endif

From 1d5df448cbc238adaa88db0d831a4ee3ef64e315 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 3 May 2026 04:56:27 +0000
Subject: [PATCH 060/214] Fixed typo in openCL compile of previous commit

---
 src/cl/carryfused.cl | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index c4727115..72e2b3cf 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -350,7 +350,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
   partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
-  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  base_frac_bits = base_frac_bits + partialLine_frac_bits;
   weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
@@ -1233,7 +1233,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
   partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
-  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  base_frac_bits = base_frac_bits + partialLine_frac_bits;
   weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
@@ -1487,7 +1487,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
   partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
-  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  base_frac_bits = base_frac_bits + partialLine_frac_bits;
   weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif
@@ -2003,7 +2003,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
   weights = fancyMul(weights, CONST_THREAD_WEIGHTS[64 + line / 64]);
   partialLine_frac_bits = fracBits(((line / 64) * 64) * 2);
-  base_frac_bits = base_frac_bits + partialLine_frac_bits
+  base_frac_bits = base_frac_bits + partialLine_frac_bits;
   weights.x = optionalDouble(weights.x, base_frac_bits > partialLine_frac_bits);
   weights.y = optionalHalve(weights.y, base_frac_bits > partialLine_frac_bits);
 #endif

From 85c61cb1e6744563c0f5681d27e6486fccd498df Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 3 May 2026 14:22:19 +0000
Subject: [PATCH 061/214] Fixed crash bug looking up BPW on the experimental
 FFT types 52 and 53

---
 src/FFTConfig.cpp | 31 +++++++++++++++++++------------
 1 file changed, 19 insertions(+), 12 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index 2e45afd0..dd0568a7 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -140,24 +140,31 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
     if (height > width) {
       bpw = FFTShape{t, h, m, w}.bpw;
     } else {
-      // Make up some defaults
-
-      //double d = 0.275 * (log2(size()) - log2(256 * 13 * 1024 * 2));
-      //bpw = {18.1-d, 18.2-d, 18.2-d, 18.3-d};
-      //log("BPW info for %s not found, defaults={%.2f, %.2f, %.2f, %.2f}\n", s.c_str(), bpw[0], bpw[1], bpw[2], bpw[3]);
-
       // Manipulate the shape into something that was likely pre-computed
+      u32 orig_w = w;
+      u32 orig_m = m;
+      u32 orig_h = h;
       while (m < 9) { m *= 2; w /= 2; }
       while (w >= 4*h) { w /= 2; h *= 2; }
       while (w < h || w < 256 || w == 2048) { w *= 2; h /= 2; }
       while (h < 256) { h *= 2; m /= 2; }
       if (m == 1) m = 2;
-      bpw = FFTShape{t, w, m, h}.bpw;
-      for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) bpw[j] -= 0.05f;   // Assume this fft spec is worse than measured fft specs
-      if (this->isFavoredShape()) {  // Don't output this warning message for non-favored shapes (we expect the BPW info to be missing)
-        printf("BPW info for %s not found, defaults={", s.c_str());
-        for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) printf("%s%.2f", j ? ", " : "", (double) bpw[j]);
-        printf("}\n");
+
+      // Make up some defaults (should only happen for experimental FFT types (t >= 52)
+      if (w == orig_w && m == orig_m && h == orig_h) {
+        bpw = {18.1f, 18.1f, 18.1f, 18.1f, 18.1f, 18.1f};
+        log("ERROR: BPW info for %s not found, using default of 18.1.\n", s.c_str());
+      }
+
+      // Try the modified shape
+      else {
+        bpw = FFTShape{t, w, m, h}.bpw;
+        for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) bpw[j] -= 0.05f;   // Assume this fft spec is worse than measured fft specs
+        if (this->isFavoredShape()) {  // Don't output this warning message for non-favored shapes (we expect the BPW info to be missing)
+          printf("BPW info for %s not found, defaults={", s.c_str());
+          for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) printf("%s%.2f", j ? ", " : "", (double) bpw[j]);
+          printf("}\n");
+        }
       }
     }
   }

From 5e7f189bb00be729a22d9adacd6185e8a4805dc3 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 3 May 2026 18:57:51 +0000
Subject: [PATCH 062/214] Fix !ENABLE_BETTER_ONEPAIRSQ.  All GF61 NTTs have
 been broken for a week.

---
 src/cl/math.cl       |  4 ++--
 src/cl/tailsquare.cl | 11 ++++++-----
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 6e260c6b..0cd73719 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -921,8 +921,8 @@ ulong2 wideMul(u64 ab, u64 cd) {
 
 // Returns a * b not modded by M61.  Max value of result depends on the m61_counts of the inputs.
 // Let n = (a_m61_count - 1) * (b_m61_count - 1).  This is the maximum value in the highest 6 bits of a * b.
-// If n <= 4 result will be at most (n+1)*M61+epsilon.
-// If n > 4 result will be at most 2*M61+epsilon.
+// If n <= 6 result will be at most (n+1)*M61+epsilon.
+// If n > 6 result will be at most 2*M61+epsilon.
 Z61 OVERLOAD weakMul(Z61 a, Z61 b, const u32 a_m61_count, const u32 b_m61_count) {
   ulong2 ab = wideMul(a, b);
   u64 lo = ab.x, hi = ab.y;
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 55247cf0..80dc0260 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -918,30 +918,31 @@ void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_
   }
 #else
   X2conjb(a, b);                                // X2(a, conjugate(b))
-  a2 = csqq(a, 2);                              // a2 = a^2, a2.x range is 0..2+, a2.y range is 0..3+
+  a2 = csqq(a, 2);                              // a2 = a^2, a2.x range is 0..7+, a2.y range is 0..2+
+  a2.x = modM61(a2.x);                          // a2.x range is 0..1+, a2.y range is 0..2+
   b2t2 = cmul(csq(b), t_squared);               // b2t2 = b^2 * t_squared, b2t2 range is 0..1+
   d = cmul(a, b); d = d + d;                    // d = 2ab, d range is 0..2+
   if (t_squared_type == 0) {                    // mul t_squared by 1
     c = subq(a2, b2t2);                         // c.x range is -1..2+, c.y range is -1-..3+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is -1-..5+, d.x range is -3-.>
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is -1-..5+, d.x range is -3-..2+, d.y range is -3-..3+
     c = modM61q(c, 2);
     d = modM61q(d, 4);
   }
   if (t_squared_type == 1) {                    // mul t_squared by i
     c = subiq(a2, b2t2);                        // c.x range is 0..3+, c.y range is -1-..3+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is -1..5+, d.x range is -2-..3+>
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is -1..5+, d.x range is -2-..3+, d.y range is -3-..3+
     c = modM61q(c, 0, 2);
     d = modM61q(d, 4);
   }
   if (t_squared_type == 2) {                    // mul t_squared by -1
     c = addq(a2, b2t2);                         // c.x range is 0..3+, c.y range is 0..4+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is 0..6+, d.x range is -2-..3+,>
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is 0..5+, c.y range is 0..6+, d.x range is -2-..3+, d.y range is -4-..2+
     c = modM61q(c, 0);
     d = modM61q(d, 3, 5);
   }
   if (t_squared_type == 3) {                    // mul t_squared by -i
     c = addiq(a2, b2t2);                        // c.x range is -1-..2+, c.y range is 0..4+
-    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is 0..6+, d.x range is -3-..2>
+    X2q_conjb(&c, &d);                          // X2(c, d); d = conjugate(d); c.x range is -1-..4+, c.y range is 0..6+, d.x range is -3-..2+, d.y range is -4-..2+
     c = modM61q(c, 2, 0);
     d = modM61q(d, 4, 5);
   }

From 04e6753dd48d95dfb66368c0189474ef7e871e48 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 3 May 2026 21:29:09 +0000
Subject: [PATCH 063/214] Finished frac_bits makeover.

---
 src/cl/carry.cl      | 36 ++++++++++++++++--------------------
 src/cl/carryfused.cl | 37 +++++++++++++++++++++++++++----------
 src/cl/fftp.cl       | 13 +++++++++----
 3 files changed, 52 insertions(+), 34 deletions(-)

diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index e55311e1..243d1b8c 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -68,10 +68,9 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
   float roundMax = 0;
   float carryMax = 0;
 
-  // Calculate the most significant 32-bits of FRAC_BPW * the index of the FFT word.  Also add FRAC_BPW_HI to test first biglit flag.
+  // Calculate the most significant 32-bits of FRAC_BPW * the index of the FFT word.
   u32 line = gy * CARRY_LEN;
   u32 word_index = (gx * G_W * H + me * H + line) * 2;
-  u32 frac_bits = fracBits(word_index);
 
   F base = fancyMul(THREAD_WEIGHTS[me].x, iweightStep(gx));
   u32 me_frac_bits = fracBits(me * H * 2);
@@ -79,15 +78,18 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
   u32 base_frac_bits = me_frac_bits + step_frac_bits;
   base = optionalDouble(base, base_frac_bits > step_frac_bits);
 
+  u32 frac_bits = fracBits(word_index);
+
   for (i32 i = 0; i < CARRY_LEN; ++i) {
     u32 p = G_W * gx + WIDTH * (line + i) + me;
-    u32 line_frac_bits = fracBits((line + i) * 2);
-    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
-    bool biglit0 = frac_bits + (2*i) * FRAC_BPW_HI <= FRAC_BPW_HI;
-    bool biglit1 = frac_bits + (2*i) * FRAC_BPW_HI >= -FRAC_BPW_HI;   // Same as frac_bits + (2*i) * FRAC_BPW_HI + FRAC_BPW_HI <= FRAC_BPW_HI;
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), frac_bits > base_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    frac_bits += FRAC_BPW_HI;
+    bool biglit0 = frac_bits <= FRAC_BPW_HI;
+    bool biglit1 = frac_bits >= -FRAC_BPW_HI;   // Same as frac_bits <= FRAC_BPW_HI;
     out[p] = weightAndCarryPair(SWAP_XY(in[p]), U2(w1, w2), carry, biglit0, biglit1, &carry, &roundMax, &carryMax);
+    // Generate frac_bits for next pair
+    frac_bits += FRAC_BPW_HI;
   }
   carryOut[G_W * g + me] = carry;
 
@@ -379,10 +381,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
     u32 p = G_W * gx + WIDTH * (line + i) + me;
 
     // Generate the FP32 and second GF31 weight shift
-    u32 line_frac_bits = fracBits((line + i) * 2);
-    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), frac_bits > base_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 31) weight_shift -= 31;
@@ -464,10 +464,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
     u32 p = G_W * gx + WIDTH * (line + i) + me;
 
     // Generate the FP32 and second GF61 weight shift
-    u32 line_frac_bits = fracBits((line + i) * 2);
-    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), frac_bits > base_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 weight_shift0 = weight_shift;
     combo_counter += combo_step;
     if (weight_shift > 61) weight_shift -= 61;
@@ -650,10 +648,8 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
     u32 p = G_W * gx + WIDTH * (CARRY_LEN * gy + i) + me;
 
     // Generate the FP32 and second GF31 and GF61 weight shift
-    u32 line_frac_bits = fracBits((line + i) * 2);
-    u32 w1_frac_bits = base_frac_bits + line_frac_bits;
-    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), w1_frac_bits > line_frac_bits);
-    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), frac_bits > base_frac_bits);
+    F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 m31_weight_shift0 = m31_weight_shift;
     m31_combo_counter += m31_combo_step;
     m31_weight_shift = adjust_m31_weight_shift(m31_weight_shift);
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 72e2b3cf..5d683d02 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -164,18 +164,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   u32 word_index = (lowMe * H + line) * 2;
   u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
   const u32 frac_bits_bigstep = fracBits(G_W * H * 2);
+  u32 starting_frac_bits = frac_bits;
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
   T invBase = optionalDouble(weights.x);
-
   for (u32 i = 0; i < NW; ++i) {
     T invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)));
     T invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP));
 
     // Generate big-word/little-word flags
-    bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
-    bool biglit1 = frac_bits + i * frac_bits_bigstep >= -FRAC_BPW_HI;   // Same as frac_bits + i * frac_bits_bigstep + FRAC_BPW_HI <= FRAC_BPW_HI;
+    bool biglit0 = frac_bits <= FRAC_BPW_HI;
+    bool biglit1 = frac_bits >= -FRAC_BPW_HI;   // Same as frac_bits + FRAC_BPW_HI <= FRAC_BPW_HI;
 
     // Apply the inverse weights, optionally compute roundoff error, and convert to integer.  Also apply MUL3 here.
     // Then propagate carries through two words (the first carry does not have to be accurately calculated because it will
@@ -184,7 +184,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
                       // For an LL test, add -2 as the very initial "carry in"
                       // We'd normally use logical &&, but the compiler whines with warning and bitwise fixes it
                       (LL & (i == 0) & (line==0) & (me == 0)) ? -2 : 0, biglit0, biglit1, &carry[i], &roundMax, &carryMax);
+
+    // Generate frac_bits for next pair
+    frac_bits += frac_bits_bigstep;
   }
+  frac_bits = starting_frac_bits;     // Restore starting frac_bits for applying weights after carry propagation
 
 #if ROE
   updateStats(bufROE, posROE, roundMax);
@@ -281,9 +285,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
   // Apply each 32 or 64 bit carry to the 2 words
   for (i32 i = 0; i < NW; ++i) {
-    bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
+    bool biglit0 = frac_bits <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
     u[i] = U2(u[i].x * wu[i].x, u[i].y * wu[i].y);
+
+    // Generate frac_bits for next pair
+    frac_bits += frac_bits_bigstep;
   }
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP64
@@ -361,10 +368,11 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   float roundMax = 0;
   float carryMax = 0;
 
-  // Calculate the most significant 32-bits of FRAC_BPW * the word index.  Also add FRAC_BPW_HI to test first biglit flag.
+  // Calculate the most significant 32-bits of FRAC_BPW * the word index.
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = fracBits(word_index) + FRAC_BPW_HI;
-  const u32 frac_bits_bigstep = fracBits(G_W * H * 2);
+  u32 frac_bits = fracBits(word_index);
+  const u32 frac_bits_bigstep = fracBits(G_W * H * 2 - 1);
+  u32 starting_frac_bits = frac_bits;
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
@@ -372,10 +380,11 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   for (u32 i = 0; i < NW; ++i) {
     F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
     F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    frac_bits += FRAC_BPW_HI;
 
     // Generate big-word/little-word flags
-    bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
-    bool biglit1 = frac_bits + i * frac_bits_bigstep >= -FRAC_BPW_HI;   // Same as frac_bits + i * frac_bits_bigstep + FRAC_BPW_HI <= FRAC_BPW_HI;
+    bool biglit0 = frac_bits <= FRAC_BPW_HI;
+    bool biglit1 = frac_bits >= -FRAC_BPW_HI;   // Same as frac_bits + FRAC_BPW_HI <= FRAC_BPW_HI;
 
     // Apply the inverse weights, optionally compute roundoff error, and convert to integer.  Also apply MUL3 here.
     // Then propagate carries through two words (the first carry does not have to be accurately calculated because it will
@@ -384,7 +393,11 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
                       // For an LL test, add -2 as the very initial "carry in"
                       // We'd normally use logical &&, but the compiler whines with warning and bitwise fixes it
                       (LL & (i == 0) & (line==0) & (me == 0)) ? -2 : 0, biglit0, biglit1, &carry[i], &roundMax, &carryMax);
+
+    // Generate frac_bits for next pair
+    frac_bits += frac_bits_bigstep;
   }
+  frac_bits = starting_frac_bits;     // Restore starting frac_bits for applying weights after carry propagation
 
 #if ROE
   updateStats(bufROE, posROE, roundMax);
@@ -477,9 +490,13 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     // Calculate inverse weights
     F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
     F weight2 = optionalHalve(fancyMul(weight1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
-    bool biglit0 = frac_bits + i * frac_bits_bigstep <= FRAC_BPW_HI;
+    frac_bits += FRAC_BPW_HI;
+    bool biglit0 = frac_bits <= FRAC_BPW_HI;
     wu[i] = carryFinal(wu[i], carry[i], biglit0);
     u[i] = U2(weight1 * wu[i].x, weight2 * wu[i].y);
+
+    // Generate frac_bits for next pair
+    frac_bits += frac_bits_bigstep;
   }
 
   dependentLaunch();   // Next kernel will be fftMiddleInFP32
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index 57e2af82..e3c4fecf 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -48,18 +48,23 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
 
   in += g * WIDTH;
 
+  u32 word_index = (me * BIG_HEIGHT + g) * 2;
+
   u32 me_frac_bits = fracBits(me * BIG_HEIGHT * 2);
   u32 line_frac_bits = fracBits(g * 2);
   u32 base_frac_bits = me_frac_bits + line_frac_bits;
   F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
 
+  u32 frac_bits = fracBits(word_index);
+  const u32 frac_bits_bigstep = fracBits(G_W * BIG_HEIGHT * 2);
+
   for (u32 i = 0; i < NW; ++i) {
-    u32 step_frac_bits = weightStepFracBits(i);
-    u32 w1_frac_bits = base_frac_bits + step_frac_bits;
-    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), base_frac_bits > step_frac_bits);
-    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), w1_frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
+    F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
+    F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     u32 p = G_W * i + me;
     u[i] = U2(in[p].x * w1, in[p].y * w2);
+    // Generate frac_bits for next pair
+    frac_bits += frac_bits_bigstep;
   }
 
   fft_WIDTH(lds, u, smallTrig, 1, me);

From ea7e1b4844862206057e8f69d0a49a66d57a2fc0 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 4 May 2026 04:34:18 +0000
Subject: [PATCH 064/214] Fixed the constant multiplier in fftMiddleOut because
 FP32 weights are no longer doubled for optionalDouble and optionalHalve.

---
 src/cl/carry.cl        |  6 +++++-
 src/cl/carryfused.cl   |  7 +++----
 src/cl/fftmiddleout.cl | 14 ++++----------
 src/cl/fftp.cl         |  3 ++-
 4 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index 243d1b8c..fe2ce3d3 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -80,13 +80,17 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
 
   u32 frac_bits = fracBits(word_index);
 
+  // Base_frac_bits and frac_bits are inexact values.  We only want to trigger an optional double when it is clear to do so.
+  // Fudge base_frac_bits to make it harder to trigger a double when the two inexact values are equal.
+  base_frac_bits++;
+
   for (i32 i = 0; i < CARRY_LEN; ++i) {
     u32 p = G_W * gx + WIDTH * (line + i) + me;
     F w1 = optionalDouble(fancyMul(base, THREAD_WEIGHTS[G_W + line + i].x), frac_bits > base_frac_bits);
     F w2 = optionalDouble(fancyMul(w1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
     frac_bits += FRAC_BPW_HI;
     bool biglit0 = frac_bits <= FRAC_BPW_HI;
-    bool biglit1 = frac_bits >= -FRAC_BPW_HI;   // Same as frac_bits <= FRAC_BPW_HI;
+    bool biglit1 = frac_bits >= -FRAC_BPW_HI;   // Same as frac_bits + FRAC_BPW_HI <= FRAC_BPW_HI;
     out[p] = weightAndCarryPair(SWAP_XY(in[p]), U2(w1, w2), carry, biglit0, biglit1, &carry, &roundMax, &carryMax);
     // Generate frac_bits for next pair
     frac_bits += FRAC_BPW_HI;
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 5d683d02..d5d52610 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -368,15 +368,14 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   float roundMax = 0;
   float carryMax = 0;
 
-  // Calculate the most significant 32-bits of FRAC_BPW * the word index.
+  // Calculate the most significant 32-bits of FRAC_BPW * the word index (it's the same as base_frac_bits).
   u32 word_index = (lowMe * H + line) * 2;
-  u32 frac_bits = fracBits(word_index);
   const u32 frac_bits_bigstep = fracBits(G_W * H * 2 - 1);
-  u32 starting_frac_bits = frac_bits;
 
   // Apply the inverse weights and carry propagate pairs to generate the output carries
 
   F invBase = weights.x;
+  u32 frac_bits = base_frac_bits;
   for (u32 i = 0; i < NW; ++i) {
     F invWeight1 = i == 0 ? invBase : optionalDouble(fancyMul(invBase, iweightStep(i)), frac_bits > base_frac_bits);
     F invWeight2 = optionalDouble(fancyMul(invWeight1, IWEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
@@ -397,7 +396,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     // Generate frac_bits for next pair
     frac_bits += frac_bits_bigstep;
   }
-  frac_bits = starting_frac_bits;     // Restore starting frac_bits for applying weights after carry propagation
 
 #if ROE
   updateStats(bufROE, posROE, roundMax);
@@ -486,6 +484,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 
   // Apply each 32 or 64 bit carry to the 2 words
   F base = weights.y;
+  frac_bits = base_frac_bits;
   for (i32 i = 0; i < NW; ++i) {
     // Calculate inverse weights
     F weight1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index 6e05b712..b7c486cb 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -110,11 +110,8 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
 
   fft_MIDDLE(u);
 
-  // FFT results come out multiplied by the FFT length (NWORDS).  Also, for performance reasons
-  // weights and invweights are doubled meaning we need to divide by another 2^2 and 2^2.
-  // Finally, roundoff errors are sometimes improved if we use the next lower double precision
-  // number.  This may be due to roundoff errors introduced by applying inexact TWO_TO_N_8TH weights.
-  double factor = 1.0 / (4 * 4 * NWORDS);
+  // FFT results come out multiplied by the FFT length (NWORDS * 2).
+  const float factor = 1.0f / (NWORDS * 2);
 
   middleMul2(u, y, x, factor, trigF2);
 
@@ -351,11 +348,8 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
 
   fft_MIDDLE(u);
 
-  // FFT results come out multiplied by the FFT length (NWORDS).  Also, for performance reasons
-  // weights and invweights are doubled meaning we need to divide by another 2^2 and 2^2.
-  // Finally, roundoff errors are sometimes improved if we use the next lower double precision
-  // number.  This may be due to roundoff errors introduced by applying inexact TWO_TO_N_8TH weights.
-  double factor = 1.0 / (4 * 4 * NWORDS);
+  // FFT results come out multiplied by the FFT length (NWORDS * 2).
+  const float factor = 1.0f / (NWORDS * 2);
 
   middleMul2(u, y, x, factor, trigF2);
 
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index e3c4fecf..f91cd99a 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -55,9 +55,9 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
   u32 base_frac_bits = me_frac_bits + line_frac_bits;
   F base = optionalHalve(fancyMul(THREAD_WEIGHTS[me].y, THREAD_WEIGHTS[G_W + g].y), base_frac_bits > line_frac_bits);
 
-  u32 frac_bits = fracBits(word_index);
   const u32 frac_bits_bigstep = fracBits(G_W * BIG_HEIGHT * 2);
 
+  u32 frac_bits = base_frac_bits;
   for (u32 i = 0; i < NW; ++i) {
     F w1 = i == 0 ? base : optionalHalve(fancyMul(base, fweightStep(i)), frac_bits > base_frac_bits);
     F w2 = optionalHalve(fancyMul(w1, WEIGHT_STEP), frac_bits + FRAC_BPW_HI > FRAC_BPW_HI);
@@ -313,6 +313,7 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
     // Convert and weight input
     uF2[i] = U2(in[p].x * w1, in[p].y * w2);
     u31[i] = U2(shl(make_Z31(in[p].x), weight_shift0), shl(make_Z31(in[p].y), weight_shift1));      // Form a GF31 from each pair of input words
+
     // Generate weight shifts and frac_bits for next pair
     combo_counter += combo_bigstep;
     if (weight_shift > 31) weight_shift -= 31;

From e53a41b449fc0a67dcb30a9d67a42473e727bbe2 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 4 May 2026 06:48:08 +0000
Subject: [PATCH 065/214] With FP32 bug fixed, the BPW is updated with higher
 allowed values for the larger FP32 hybrid FFTs.

---
 src/fftbpw.h | 64 ++++++++++++++++++++++++++--------------------------
 1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/src/fftbpw.h b/src/fftbpw.h
index fdd490fc..5bab17d0 100644
--- a/src/fftbpw.h
+++ b/src/fftbpw.h
@@ -112,24 +112,24 @@
 { "1:4K:16:512", {38.37f, 38.37f, 38.37f, 38.37f, 38.37f, 38.37f}},
 {  "1:4K:16:1K", {38.12f, 38.12f, 38.12f, 38.12f, 38.12f, 38.12f}}, // Estimated
 // FFT3261 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "2:256:2:256", {34.57f, 34.57f, 34.57f, 34.57f, 34.57f, 34.57f}},
+{ "2:256:2:256", {34.53f, 34.53f, 34.53f, 34.53f, 34.53f, 34.53f}},
 { "2:256:4:256", {34.24f, 34.24f, 34.24f, 34.24f, 34.24f, 34.24f}},
-{ "2:256:8:256", {34.06f, 34.06f, 34.06f, 34.06f, 34.06f, 34.06f}},
-{ "2:512:4:256", {34.06f, 34.06f, 34.06f, 34.06f, 34.06f, 34.06f}},
-{"2:256:16:256", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
-{ "2:512:8:256", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
-{ "2:512:4:512", {32.07f, 32.07f, 32.07f, 32.07f, 32.07f, 32.07f}},
-{  "2:1K:8:256", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
-{"2:512:16:256", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
-{ "2:512:8:512", {31.81f, 31.81f, 31.81f, 31.81f, 31.81f, 31.81f}},
-{ "2:1K:16:256", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
-{  "2:1K:8:512", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
-{"2:512:16:512", {31.50f, 31.50f, 31.50f, 31.50f, 31.50f, 31.50f}},
-{ "2:1K:16:512", {28.68f, 28.68f, 28.68f, 28.68f, 28.68f, 28.68f}}, // Very strange. 481421001 has a maxROE of 0.180, 481422001 has a maxROE of 0.5
-{   "2:1K:8:1K", {28.68f, 28.68f, 28.68f, 28.68f, 28.68f, 28.68f}},
-{  "2:1K:16:1K", {25.37f, 25.37f, 25.37f, 25.37f, 25.37f, 25.37f}}, // Also strange. 851422001 ROEmax=0.273, ROEavg=0.003
-{ "2:4K:16:512", {23.27f, 23.27f, 23.27f, 23.27f, 23.27f, 23.27f}},
-{  "2:4K:16:1K", {21.15f, 21.15f, 21.15f, 21.15f, 21.15f, 21.15f}}, // Estimated
+{ "2:256:8:256", {33.89f, 33.89f, 33.89f, 33.89f, 33.89f, 33.89f}},
+{ "2:512:4:256", {33.89f, 33.89f, 33.89f, 33.89f, 33.89f, 33.89f}},
+{"2:256:16:256", {31.95f, 31.95f, 31.95f, 31.95f, 31.95f, 31.95f}},
+{ "2:512:8:256", {31.95f, 31.95f, 31.95f, 31.95f, 31.95f, 31.95f}},
+{ "2:512:4:512", {31.95f, 31.95f, 31.95f, 31.95f, 31.95f, 31.95f}},
+{  "2:1K:8:256", {31.66f, 31.66f, 31.66f, 31.66f, 31.66f, 31.66f}},
+{"2:512:16:256", {31.66f, 31.66f, 31.66f, 31.66f, 31.66f, 31.66f}},
+{ "2:512:8:512", {31.66f, 31.66f, 31.66f, 31.66f, 31.66f, 31.66f}},
+{ "2:1K:16:256", {31.35f, 31.35f, 31.35f, 31.35f, 31.35f, 31.35f}},
+{  "2:1K:8:512", {31.35f, 31.35f, 31.35f, 31.35f, 31.35f, 31.35f}},
+{"2:512:16:512", {31.35f, 31.35f, 31.35f, 31.35f, 31.35f, 31.35f}},
+{ "2:1K:16:512", {29.48f, 29.48f, 29.48f, 29.48f, 29.48f, 29.48f}},
+{   "2:1K:8:1K", {29.53f, 29.53f, 29.53f, 29.53f, 29.53f, 29.53f}},
+{  "2:1K:16:1K", {29.21f, 29.21f, 29.21f, 29.21f, 29.21f, 29.21f}},
+{ "2:4K:16:512", {28.94f, 28.94f, 28.94f, 28.94f, 28.94f, 28.94f}},
+{  "2:4K:16:1K", {28.64f, 28.64f, 28.64f, 28.64f, 28.64f, 28.64f}}, // Estimated
 // FFT61 - Computed by targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
 { "3:256:2:256", {25.02f, 25.02f, 25.02f, 25.02f, 25.02f, 25.02f}},
 { "3:256:4:256", {24.72f, 24.10f, 24.10f, 24.10f, 24.10f, 24.10f}},
@@ -150,24 +150,24 @@
 { "3:4K:16:512", {22.92f, 22.92f, 22.92f, 22.92f, 22.92f, 22.92f}},
 {  "3:4K:16:1K", {22.72f, 22.72f, 22.72f, 22.72f, 22.72f, 22.72f}}, // Estimated
 // FFT323161 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
-{ "4:256:2:256", {50.05f, 50.05f, 50.05f, 50.05f, 50.05f, 50.05f}},
-{ "4:256:4:256", {49.76f, 49.76f, 49.76f, 49.76f, 49.76f, 49.76f}},
-{ "4:256:8:256", {49.59f, 49.59f, 49.59f, 49.59f, 49.59f, 49.59f}},
-{ "4:512:4:256", {49.59f, 49.59f, 49.59f, 49.59f, 49.59f, 49.59f}},
-{"4:256:16:256", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
-{ "4:512:8:256", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
-{ "4:512:4:512", {47.59f, 47.59f, 47.59f, 47.59f, 47.59f, 47.59f}},
-{  "4:1K:8:256", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
-{"4:512:16:256", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
-{ "4:512:8:512", {47.33f, 47.33f, 47.33f, 47.33f, 47.33f, 47.33f}},
+{ "4:256:2:256", {50.01f, 50.01f, 50.01f, 50.01f, 50.01f, 50.01f}},
+{ "4:256:4:256", {49.71f, 49.71f, 49.71f, 49.71f, 49.71f, 49.71f}},
+{ "4:256:8:256", {49.52f, 49.52f, 49.52f, 49.52f, 49.52f, 49.52f}},
+{ "4:512:4:256", {49.52f, 49.52f, 49.52f, 49.52f, 49.52f, 49.52f}},
+{"4:256:16:256", {47.55f, 47.55f, 47.55f, 47.55f, 47.55f, 47.55f}},
+{ "4:512:8:256", {47.55f, 47.55f, 47.55f, 47.55f, 47.55f, 47.55f}},
+{ "4:512:4:512", {47.55f, 47.55f, 47.55f, 47.55f, 47.55f, 47.55f}},
+{  "4:1K:8:256", {47.29f, 47.29f, 47.29f, 47.29f, 47.29f, 47.29f}},
+{"4:512:16:256", {47.29f, 47.29f, 47.29f, 47.29f, 47.29f, 47.29f}},
+{ "4:512:8:512", {47.29f, 47.29f, 47.29f, 47.29f, 47.29f, 47.29f}},
 { "4:1K:16:256", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
 {  "4:1K:8:512", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
 {"4:512:16:512", {47.00f, 47.00f, 47.00f, 47.00f, 47.00f, 47.00f}},
-{ "4:1K:16:512", {44.52f, 44.52f, 44.52f, 44.52f, 44.52f, 44.52f}},
-{   "4:1K:8:1K", {44.52f, 44.52f, 44.52f, 44.52f, 44.52f, 44.52f}},
-{  "4:1K:16:1K", {41.72f, 41.72f, 41.72f, 41.72f, 41.72f, 41.72f}}, // Strange 41.72 has tiny error, 41.75 is 0.5
-{ "4:4K:16:512", {39.50f, 39.50f, 39.50f, 39.50f, 39.50f, 39.50f}}, // Estimated
-{  "4:4K:16:1K", {37.50f, 37.50f, 37.50f, 37.50f, 37.50f, 37.50f}}, // Estimated
+{ "4:1K:16:512", {45.02f, 45.02f, 45.02f, 45.02f, 45.02f, 45.02f}},
+{   "4:1K:8:1K", {45.02f, 45.02f, 45.02f, 45.02f, 45.02f, 45.02f}},
+{  "4:1K:16:1K", {44.70f, 44.70f, 44.70f, 44.70f, 44.70f, 44.70f}},
+{ "4:4K:16:512", {44.42f, 44.42f, 44.42f, 44.42f, 44.42f, 44.42f}},
+{  "4:4K:16:1K", {44.12f, 44.12f, 44.12f, 44.12f, 44.12f, 44.12f}}, // Estimated
 // FFT3231 - Computed with -use TABMUL_CHAIN32=0,TAIL_TRIGS32=0 and targeting maxROE of ~0.35 over 1000 iterations, probably could go higher
 { "50:256:2:256", {19.57f, 19.57f, 19.57f, 19.57f, 19.57f, 19.57f}},
 { "50:256:4:256", {19.23f, 19.23f, 19.23f, 19.23f, 19.23f, 19.23f}},

From f7e11d87b8ef8292eeb59f4ad4811c692113bb14 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 4 May 2026 14:44:17 +0000
Subject: [PATCH 066/214] Added tdulcet's suggested fix for the
 Windows-buffering-logfile-output problem.

---
 src/File.cpp | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/File.cpp b/src/File.cpp
index 2d54bda2..2ab37b7c 100644
--- a/src/File.cpp
+++ b/src/File.cpp
@@ -18,9 +18,11 @@ File::File(const std::filesystem::path& path, const string& mode, bool throwOnEr
 
   if (mode == "ab") {
     assert(f);
-#if HAS_SETLINEBUF
-    setlinebuf(f);
-#endif
+//#if HAS_SETLINEBUF
+//    setlinebuf(f);
+//#endif
+    // tdulcet's suggested portable replacement for the lines above
+    setvbuf(f, nullptr, _IOLBF, 0);
   }
 }
 

From da51b2a4914e4b497258e79d4a5fabf0caafbba9 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 7 May 2026 00:32:33 +0000
Subject: [PATCH 067/214] If proof generation fails, lower and lower proof
 powers are tried.  Untested.  I have a GPU that has twice failed proof
 generation and the next lower proof power succeeded.  This will automate the
 process rather than raising an error and aborting which requires manual
 intervention.  Up next see if we figure out how to catch this problem earlier
 (during write of proof residues?)

---
 src/Gpu.cpp | 32 +++++++++++++++++++-------------
 src/Gpu.h   |  2 +-
 src/Proof.h |  3 ++-
 3 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 4e7dafc7..42a0caa3 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1705,21 +1705,27 @@ void Gpu::doDiv9(u64 E, Words& words) {
   doDiv3(E, words);
 }
 
-fs::path Gpu::saveProof(const Args& args, const ProofSet& proofSet) {
-  for (int retry = 0; retry < 2; ++retry) {
-    auto [proof, hashes] = proofSet.computeProof(this);
-    fs::path tmpFile = proof.file(args.proofToVerifyDir);
-    proof.save(tmpFile);
+fs::path Gpu::saveProof(const Args& args, ProofSet& proofSet) {
+  bool problem_proof = false;
+  for ( ; ; ) {
+    for (int retry = 0; retry == 0 || (retry == 1 && !problem_proof); ++retry) {
+      auto [proof, hashes] = proofSet.computeProof(this);
+      fs::path tmpFile = proof.file(args.proofToVerifyDir);
+      proof.save(tmpFile);
             
-    fs::path proofFile = proof.file(args.proofResultDir);
-
-    bool ok = Proof::load(tmpFile).verify(this, hashes);
-    log("Proof '%s' verification %s\n", tmpFile.string().c_str(), ok ? "OK" : "FAILED");
-    if (ok) {
-      fancyRename(tmpFile, proofFile);
-      log("Proof '%s' generated\n", proofFile.string().c_str());
-      return proofFile;
+      fs::path proofFile = proof.file(args.proofResultDir);
+
+      bool ok = Proof::load(tmpFile).verify(this, hashes);
+      log("Proof '%s' verification %s\n", tmpFile.string().c_str(), ok ? "OK" : "FAILED");
+      if (ok) {
+        fancyRename(tmpFile, proofFile);
+        log("Proof '%s' generated\n", proofFile.string().c_str());
+        return proofFile;
+      }
     }
+    problem_proof = true;
+    proofSet.reducePower();
+    if (proofSet.power < 4) break;
   }
   throw "bad proof generation";
 }
diff --git a/src/Gpu.h b/src/Gpu.h
index a9ee95de..9553fec1 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -270,7 +270,7 @@ class Gpu {
   void modMul(Buffer<Word>& ioA, Buffer<Word>& inB, bool mul3 = false);
   void modMul(Buffer<Word>& ioA, Buffer<Word>& inB, enum LEAD_TYPE leadInB, bool mul3 = false);
 
-  fs::path saveProof(const Args& args, const ProofSet& proofSet);
+  fs::path saveProof(const Args& args, ProofSet& proofSet);
   std::pair<RoeInfo, RoeInfo> readROE();
   RoeInfo readCarryStats();
 
diff --git a/src/Proof.h b/src/Proof.h
index c83d8ace..e2df024c 100644
--- a/src/Proof.h
+++ b/src/Proof.h
@@ -55,7 +55,7 @@ class Proof {
 class ProofSet {
 public:
   const u64 E;
-  const u32 power;
+  u32 power;
   
 private:  
   vector<u64> points;  
@@ -86,5 +86,6 @@ class ProofSet {
   void save(u64 k, const Words& words) const { return save(E, power, k, words); }
   Words load(u64 k) const { return load(E, power, k); }
 
+  void reducePower(void) { power--; }
   std::pair<Proof, vector<u64>> computeProof(Gpu *gpu) const;
 };

From 2c9a2e8e3da4cb1aa1082760d23252f676470f4f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 9 May 2026 21:45:33 +0000
Subject: [PATCH 068/214] Fixed bug where worktodo-0.txt file name was not
 printed properly.  fs:path.c_str() returns a wide char in Windows.

---
 src/Worktodo.cpp | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 0801ffec..7c31361c 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -109,14 +109,16 @@ static std::optional<Task> bestTask(const fs::path& fileName, bool smallest) {
 string workName(i32 instance) { return "worktodo-" + to_string(instance) + ".txt"; }
 
 optional<Task> getWork(Args& args, i32 instance) {
-  fs::path localWork = workName(instance);
+  string filename = workName(instance);           // Used for printf statements.  Using fd::path is problematic because it 8-bit char in Linux and 16-bit char in Windows.
+  fs::path localWork = filename;
 
   // Try to get a task from the local worktodo-<N> file.
   if (optional<Task> task = bestTask(localWork, args.smallest)) { return task; }
 
-  if (args.masterDir.empty()) { log("No work to do found.  Add work to %s.\n", localWork.c_str()); return {}; }
+  if (args.masterDir.empty()) { log("No work to do found.  Add work to %s.\n", filename.c_str()); return {}; }
 
-  fs::path worktodo = args.masterDir / "worktodo.txt";
+  filename = args.masterDir / "worktodo.txt";
+  fs::path worktodo = filename;
 
   /*
     We need to aquire a task from the global worktodo.txt, and "atomically"
@@ -156,7 +158,7 @@ optional<Task> getWork(Args& args, i32 instance) {
     if (!found) { return {}; }
   }
 
-  log("Could not extract a task from '%s'\n", worktodo.string().c_str());
+  log("Could not extract a task from '%s'\n", filename.c_str());
   // must be tough luck to be preempted twice while mutating the global worktodo
   assert(false);
   return {};

From 53b35ff7759e745277e317aca431390c33dfc0cc Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 9 May 2026 22:45:08 +0000
Subject: [PATCH 069/214] Trying again with Windows pathname bug fix.

---
 src/Worktodo.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 7c31361c..63762490 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -117,8 +117,8 @@ optional<Task> getWork(Args& args, i32 instance) {
 
   if (args.masterDir.empty()) { log("No work to do found.  Add work to %s.\n", filename.c_str()); return {}; }
 
-  filename = args.masterDir / "worktodo.txt";
-  fs::path worktodo = filename;
+  filename = "worktodo.txt";
+  fs::path worktodo = args.masterDir / filename;
 
   /*
     We need to aquire a task from the global worktodo.txt, and "atomically"

From 73172dfdd2b532b7c3e0189cf6f7fdc4e82b0c1a Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 13 May 2026 04:56:13 +0000
Subject: [PATCH 070/214] Added ETA to LL status lines

---
 src/Gpu.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 42a0caa3..7fd00a7b 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2235,7 +2235,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     float secsPerIt = iterationTimer.reset(k);
     queue->setSquareTime((int) (secsPerIt * 1'000'000));
-    log("%9" PRIu64 " %016" PRIx64 " %4.0f\n", k, res64, secsPerIt * 1'000'000);
+    log("%9" PRIu64 " %016" PRIx64 " %4.0f ETA %s\n", k, res64, secsPerIt * 1'000'000, getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) { return {isAllZero, res64}; }
 

From 445f17a38ba6ee1caf09e167e438051cb472534c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 14 May 2026 03:02:27 +0000
Subject: [PATCH 071/214] Outpu per-iteration timing down to the 1/10th of a
 microsecond.  Batalov's suggestion.

---
 src/Gpu.cpp | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 7fd00a7b..f7f57c24 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -522,6 +522,17 @@ string toHex(const vector<u32>& v) {
   return s;
 }
 
+string formatSecsPerIter(float secsPerIter) {
+  char buf[64];
+  float usecsPerIter = secsPerIter * 1.0e6f;    // Convert to micro-seconds
+  if (usecsPerIter > 1000.0f) {
+    snprintf(buf, sizeof(buf), "%4.0f", usecsPerIter);
+  } else {
+    snprintf(buf, sizeof(buf), "%6.1f", usecsPerIter);
+  }
+  return string(buf);  
+}
+
 } // namespace
 
 // --------
@@ -1315,7 +1326,7 @@ Words Gpu::expExp2(const Words& A, u32 n) {
     queue->finish();
     if (k % logStep == 0) {
       float secsPerIt = timer.reset(k);
-      log("%u / %u, %.0f us/it\n", k, n, secsPerIt * 1'000'000);
+      log("%u / %u, %s us/it\n", k, n, formatSecsPerIter(secsPerIt).c_str());
     }
   }
   return readData();
@@ -1556,9 +1567,9 @@ string RoeInfo::toString() const {
 static string makeLogStr(const string& status, u64 k, u64 res, float secsPerIt, u64 nIters) {
   char buf[256];
   
-  snprintf(buf, sizeof(buf), "%2s %9" PRIu64 " %016" PRIx64 " %4.0f ETA %s; ",
+  snprintf(buf, sizeof(buf), "%2s %9" PRIu64 " %016" PRIx64 " %s ETA %s; ",
            status.c_str(), k, res, /* k / float(nIters) * 100, */
-           secsPerIt * 1'000'000, getETA(k, nIters, secsPerIt).c_str());
+           formatSecsPerIter(secsPerIt).c_str(), getETA(k, nIters, secsPerIt).c_str());
   return buf;
 }
 
@@ -2109,7 +2120,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
                                     elapsedBefore + elapsedTimer.at()});
       });
 
-      log("   %9" PRIu64 " %016" PRIx64 " %4.0f\n", k, res, /*k / float(kEndEnd) * 100*,*/ secsPerIt * 1'000'000);
+      log("   %9" PRIu64 " %016" PRIx64 " %s\n", k, res, formatSecsPerIter(secsPerIt).c_str());
       RoeInfo carryStats = readCarryStats();
       if (carryStats.N) {
         u32 m = ldexp(carryStats.max, 32);
@@ -2235,7 +2246,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     float secsPerIt = iterationTimer.reset(k);
     queue->setSquareTime((int) (secsPerIt * 1'000'000));
-    log("%9" PRIu64 " %016" PRIx64 " %4.0f ETA %s\n", k, res64, secsPerIt * 1'000'000, getETA(k, kEnd, secsPerIt).c_str());
+    log("%9" PRIu64 " %016" PRIx64 " %s ETA %s\n", k, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) { return {isAllZero, res64}; }
 
@@ -2295,7 +2306,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
     float secsPerIt = iterationTimer.reset(k);
     queue->setSquareTime((int) (secsPerIt * 1'000'000));
-    log("%7u / %7u %016" PRIx64 " %4.0f ETA %s\n", k, kEnd, res64, secsPerIt * 1'000'000, getETA(k, kEnd, secsPerIt).c_str());
+    log("%7u / %7u %016" PRIx64 " %s ETA %s\n", k, kEnd, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) {
       fs::remove (fname);

From 59aaf73d8d60a5c5dad657c17e9abea052326c14 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 15 May 2026 04:51:20 +0000
Subject: [PATCH 072/214] Moved Context to GpuCommon.  Made Gpu class
 responsible for creating command queues.   Prep work eeded for trying
 dispatching kernels to multiple queues.

---
 src/Gpu.cpp     | 51 +++++++++++++++----------------
 src/Gpu.h       |  8 ++---
 src/GpuCommon.h |  2 ++
 src/Task.cpp    |  4 +--
 src/Task.h      |  3 +-
 src/main.cpp    | 14 ++++-----
 src/tune.cpp    | 80 ++++++++++++++++++++++++-------------------------
 src/tune.h      |  4 +--
 8 files changed, 82 insertions(+), 84 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index f7f57c24..27fa8a73 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -537,8 +537,8 @@ string formatSecsPerIter(float secsPerIter) {
 
 // --------
 
-unique_ptr<Gpu> Gpu::make(Queue* q, u64 E, GpuCommon shared, FFTConfig fftConfig, const vector<KeyVal>& extraConf, bool logFftSize) {
-  return make_unique<Gpu>(q, shared, fftConfig, E, extraConf, logFftSize);
+unique_ptr<Gpu> Gpu::make(u64 E, GpuCommon shared, FFTConfig fftConfig, const vector<KeyVal>& extraConf, bool logFftSize) {
+  return make_unique<Gpu>(shared, fftConfig, E, extraConf, logFftSize);
 }
 
 Gpu::~Gpu() {
@@ -733,8 +733,8 @@ string Gpu::kernelDefines(enum WHICH_KERNEL_TYPE which_kernel) {
 #define ROE_SIZE 100000
 #define CARRY_SIZE 100000
 
-Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
-  queue(q),
+Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
+  shared(s),
   background{shared.background},
   args{*shared.args},
   E(E),
@@ -747,9 +747,10 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   nW(fft.shape.nW()),
   nH(fft.shape.nH()),
   useLongCarry{args.carry == CARRY_64},
-  compiler{args, queue->context, clDefines(args, queue->context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
+  queue{*shared.context, args.profile},
+  compiler{args, shared.context, clDefines(args, shared.context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
 
-#define K(name, ...) name(#name, &compiler, profile.make(#name), queue, __VA_ARGS__)
+#define K(name, ...) name(#name, &compiler, profile.make(#name), &queue, __VA_ARGS__)
 
   K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), (kernelDefines(KFP) + numCudaRegisters(MIDIN)).c_str()),
   K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH, kernelDefines(KFP).c_str()),
@@ -827,11 +828,11 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
   bufTrigM{shared.bufCache->middleTrig(shared.args, fft, SMALL_H, BIG_H / SMALL_H, WIDTH)},
   bufTrigW{shared.bufCache->smallTrig(shared.args, fft, WIDTH, nW, fft.shape.middle, SMALL_H, nH, tail_single_wide)},
 
-  weights{genWeights(fft, E, WIDTH, BIG_H, nW, isNvidiaGpu(q->context->deviceId()))},
-  bufConstWeights{q->context, std::move(weights.weightsConstIF)},
-  bufWeights{q->context,      std::move(weights.weightsIF)},
+  weights{genWeights(fft, E, WIDTH, BIG_H, nW, isNvidiaGpu(shared.context->deviceId()))},
+  bufConstWeights{shared.context, std::move(weights.weightsConstIF)},
+  bufWeights{shared.context,      std::move(weights.weightsIF)},
 
-#define BUF(name, ...) name{profile.make(#name), queue, __VA_ARGS__}
+#define BUF(name, ...) name{profile.make(#name), &queue, __VA_ARGS__}
 
   // GPU Buffers containing integer data.  Since this buffer is type i64, if fft.WordSize < 8 then we need less memory allocated.
   BUF(bufData, N * fft.WordSize / sizeof(Word)),
@@ -944,8 +945,8 @@ Gpu::Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>&
     selftestTrig();
   }
 
-  queue->setSquareKernels(1 + 3 * (fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61));
-  queue->finish();
+  queue.setSquareKernels(1 + 3 * (fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61));
+  queue.finish();
 }
 
 
@@ -1039,7 +1040,7 @@ void Gpu::carryFusedLL(Buffer<double>& out, Buffer<double>& in) {
 void Gpu::measureTransferSpeed() {
   u32 SIZE_MB = 16;
   vector<double> data(SIZE_MB * 1024 * 1024, 1);
-  Buffer<double> buf{profile.make("DMA"), queue, SIZE};
+  Buffer<double> buf{profile.make("DMA"), &queue, SIZE};
 
   Timer t;
   for (int i = 0; i < 4; ++i) {
@@ -1049,11 +1050,11 @@ void Gpu::measureTransferSpeed() {
 
   for (int i = 0; i < 4; ++i) {
     buf.read(data);
-    // queue->finish();
+    // queue.finish();
     log("buffer READ : %f GB/s\n", double(SIZE / 1024 / 1024) * sizeof(double) / (1024 * t.reset()));
   }
 
-  queue->finish();
+  queue.finish();
 }
 #endif
 
@@ -1063,7 +1064,7 @@ u32 Gpu::updateCarryPos(u32 bit) {
 
 vector<Buffer<Word>> Gpu::makeBufVector(u32 size) {
   vector<Buffer<Word>> r;
-  for (u32 i = 0; i < size; ++i) { r.emplace_back(timeBufVect, queue, N); }
+  for (u32 i = 0; i < size; ++i) { r.emplace_back(timeBufVect, &queue, N); }
   return r;
 }
 
@@ -1323,7 +1324,7 @@ Words Gpu::expExp2(const Words& A, u32 n) {
     u32 its = std::min(blockSize, n - k);
     squareLoop(bufData, 0, its);
     k += its;
-    queue->finish();
+    queue.finish();
     if (k % logStep == 0) {
       float secsPerIt = timer.reset(k);
       log("%u / %u, %s us/it\n", k, n, formatSecsPerIter(secsPerIt).c_str());
@@ -1661,7 +1662,7 @@ void Gpu::selftestTrig() {
   log("TRIG norm: up %d, down %d\n", oneUp, oneDown);
 #endif
 
-  if (isAmdGpu(queue->context->deviceId())) {
+  if (isAmdGpu(shared.context->deviceId())) {
     vector<string> WHATS {"V_NOP", "V_ADD_I32", "V_FMA_F32", "V_ADD_F64", "V_FMA_F64", "V_MUL_F64", "V_MAD_U64_U32"};
     for (int w = 0; w < int(WHATS.size()); ++w) {
       const int what = w;
@@ -1957,11 +1958,11 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
     leadIn = leadOut;
     ++k;
   }
-  queue->finish();
+  queue.finish();
   if (Signal::stopRequested()) { throw "stop requested"; }
 
   Timer t;
-  queue->setSquareTime(0);     // Busy wait on nVidia to get the most accurate timings while tuning
+  queue.setSquareTime(0);     // Busy wait on nVidia to get the most accurate timings while tuning
   while (true) {
     while (k % blockSize < blockSize-1) {
       square(bufData, bufData, leadIn, leadOut);
@@ -1978,7 +1979,7 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
     leadIn = LEAD_MIDDLE;
     if (Signal::stopRequested()) { throw "stop requested"; }
   }
-  queue->finish();
+  queue.finish();
   double secsPerIt = t.reset() / (iters - warmup);
 
   if (Signal::stopRequested()) { throw "stop requested"; }
@@ -2104,7 +2105,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
     u64 res = dataResidue();
     float secsPerIt = iterationTimer.reset(k);
-    queue->setSquareTime((int) (secsPerIt * 1'000'000));
+    queue.setSquareTime((int) (secsPerIt * 1'000'000));
 
     vector<Word> rawCheck = readChecked(bufCheck);
     if (rawCheck.empty()) {
@@ -2166,7 +2167,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
       logTimeKernels();
 
       if (doStop) {
-        queue->finish();
+        queue.finish();
         throw "stop requested";
       }
 
@@ -2245,7 +2246,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
     }
 
     float secsPerIt = iterationTimer.reset(k);
-    queue->setSquareTime((int) (secsPerIt * 1'000'000));
+    queue.setSquareTime((int) (secsPerIt * 1'000'000));
     log("%9" PRIu64 " %016" PRIx64 " %s ETA %s\n", k, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) { return {isAllZero, res64}; }
@@ -2305,7 +2306,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
     u64 res64 = (u64(data[1]) << 32) | data[0];
 
     float secsPerIt = iterationTimer.reset(k);
-    queue->setSquareTime((int) (secsPerIt * 1'000'000));
+    queue.setSquareTime((int) (secsPerIt * 1'000'000));
     log("%7u / %7u %016" PRIx64 " %s ETA %s\n", k, kEnd, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
     if (k >= kEnd) {
diff --git a/src/Gpu.h b/src/Gpu.h
index 9553fec1..c3e6f766 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -83,7 +83,7 @@ struct Weights {
 };
 
 class Gpu {
-  Queue* queue;
+  GpuCommon shared;
   Background* background;
 
 public:
@@ -106,6 +106,7 @@ class Gpu {
 
   Profile profile{};
 
+  Queue queue;
   KernelCompiler compiler;
 
   /* Kernels for FFT_FP64 or FFT_FP32 */
@@ -287,9 +288,8 @@ class Gpu {
   void selftestTrig();
 
 public:
-  Gpu(Queue* q, GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize);
-  static unique_ptr<Gpu> make(Queue* q, u64 E, GpuCommon shared, FFTConfig fft,
-                              const vector<KeyVal>& extraConf = {}, bool logFftSize = true);
+  Gpu(GpuCommon shared, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize);
+  static unique_ptr<Gpu> make(u64 E, GpuCommon shared, FFTConfig fft, const vector<KeyVal>& extraConf = {}, bool logFftSize = true);
 
   ~Gpu();
 
diff --git a/src/GpuCommon.h b/src/GpuCommon.h
index 5a9f4756..76ba072b 100644
--- a/src/GpuCommon.h
+++ b/src/GpuCommon.h
@@ -2,6 +2,7 @@
 
 #pragma once
 
+class Context;
 class Args;
 class TrigBufCache;
 class Background;
@@ -9,6 +10,7 @@ class Background;
 // Data that's normally shared between Gpu instances
 class GpuCommon {
 public:
+  Context* context;
   Args* args;
   TrigBufCache* bufCache;
   Background* background;
diff --git a/src/Task.cpp b/src/Task.cpp
index 95c23e98..28794956 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -209,7 +209,7 @@ void Task::writeResultCERT(FFTConfig fft, const Args &args, u32 instance, array
   File::append(resultsFile, s + '\n');
 }
 
-void Task::execute(GpuCommon shared, Queue *q, u32 instance) {
+void Task::execute(GpuCommon shared, u32 instance) {
   if (kind == VERIFY) { exponent = proof::getInfo(verifyPath).exp; }
 
   assert(exponent);
@@ -232,7 +232,7 @@ void Task::execute(GpuCommon shared, Queue *q, u32 instance) {
 
   FFTConfig fft = FFTConfig::bestFit(*shared.args, exponent, shared.args->fftSpec);
 
-  auto gpu = Gpu::make(q, exponent, shared, fft);
+  auto gpu = Gpu::make(exponent, shared, fft);
 
   if (kind == VERIFY) {
     Proof proof{Proof::load(verifyPath)};
diff --git a/src/Task.h b/src/Task.h
index 4c130446..588acd3a 100644
--- a/src/Task.h
+++ b/src/Task.h
@@ -12,7 +12,6 @@
 class Args;
 class Result;
 class Context;
-class Queue;
 class TrigBufCache;
 
 class Task {
@@ -26,7 +25,7 @@ class Task {
   u32 squarings;  // For CERTs
 
   string verifyPath; // For Verify
-  void execute(GpuCommon shared, Queue* q, u32 instance);
+  void execute(GpuCommon shared, u32 instance);
 
   void writeResultPRP(FFTConfig fft, const Args&, u32 instance, bool isPrime, u64 res64, const std::string& res2048, u32 nErrors, const fs::path& proofPath) const;
   void writeResultLL(FFTConfig fft, const Args&, u32 instance, bool isPrime, u64 res64) const;
diff --git a/src/main.cpp b/src/main.cpp
index 259b7f9b..efdfc38d 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -20,7 +20,7 @@
 #include <thread>
 // #include <format> from GCC-13 onwards
 
-void gpuWorker(GpuCommon shared, Queue *q, i32 instance) {
+void gpuWorker(GpuCommon shared, i32 instance) {
   // LogContext context{(instance ? shared.args->tailDir() : ""s) + to_string(instance) + ' '};
   // log("Starting worker %d\n", instance);
   if (instance > 0) {
@@ -29,7 +29,7 @@ void gpuWorker(GpuCommon shared, Queue *q, i32 instance) {
   }
 
   try {
-    while (auto task = Worktodo::getTask(*shared.args, instance)) { task->execute(shared, q, instance); }
+    while (auto task = Worktodo::getTask(*shared.args, instance)) { task->execute(shared, instance); }
   } catch (const char *mes) {
     log("Exception \"%s\"\n", mes);
   } catch (const string& mes) {
@@ -97,14 +97,14 @@ int main(int argc, char **argv) {
     Signal signal;
     Background background;
     GpuCommon shared;
+    shared.context = &context;
     shared.args = &args;
     TrigBufCache bufCache{&context};
     shared.bufCache = &bufCache;
     shared.background = &background;
 
     if (args.doCtune || args.doTune || args.doZtune || args.carryTune) {
-      Queue q(context, args.profile);
-      Tune tune{&q, shared};
+      Tune tune{shared};
 
       if (args.doCtune) {
         tune.ctune();
@@ -117,13 +117,11 @@ int main(int argc, char **argv) {
       }
     } else {
       {
-        vector<Queue> queues;
-        for (int i = 0; i < int(args.workers); ++i) { queues.emplace_back(context, args.profile); }
         vector<jthread> threads;
         for (int i = 1; i < int(args.workers); ++i) {
-          threads.emplace_back(gpuWorker, shared, &queues[i], i);
+          threads.emplace_back(gpuWorker, shared, i);
         }
-        gpuWorker(shared, &queues[0], 0);
+        gpuWorker(shared, 0);
       }
 
       // log("No more work. Add work to worktodo.txt , see -h for details.\n");
diff --git a/src/tune.cpp b/src/tune.cpp
index c00956f0..dea4f864 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -176,7 +176,7 @@ float Tune::zForBpw(float bpw, FFTConfig fft, u32 count) {
   u64 exponent = (count == 1) ? primes.prevPrime(fft.size() * bpw) : primes.nextPrime(fft.size() * bpw);
   float total_z = 0.0f;
   for (u32 i = 0; i < count; i++, exponent = primes.nextPrime (exponent + 1)) {
-    auto [ok, res, roeSq, roeMul] = Gpu::make(q, exponent, shared, fft, {}, false)->measureROE(true);
+    auto [ok, res, roeSq, roeMul] = Gpu::make(exponent, shared, fft, {}, false)->measureROE(true);
     float z = roeSq.z();
     total_z += z;
 log("Zforbpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str());
@@ -250,7 +250,7 @@ void Tune::carryTune() {
     const float mid = fft.shape.carry32BPW();
     for (float bpw : {mid - 0.05f, mid + 0.05f}) {
       u64 exponent = primes.nearestPrime(fft.size() * bpw);
-      auto [ok, carry] = Gpu::make(q, exponent, shared, fft, {}, false)->measureCarry();
+      auto [ok, carry] = Gpu::make(exponent, shared, fft, {}, false)->measureCarry();
       m = carry.max;
       if (!ok) { log("Error %s at %f\n", fft.spec().c_str(), bpw); }
       zv.push_back(carry.z());
@@ -309,7 +309,7 @@ void Tune::ctune() {
         for (u32 k = i + 1; k < configsVect.size(); ++k) {
           add(c, configsVect[k][bestPos[k]]);
         }
-        auto cost = Gpu::make(q, exponent, shared, fft, c, false)->timePRP();
+        auto cost = Gpu::make(exponent, shared, fft, c, false)->timePRP();
 
         bool isBest = (cost < best.cost);
         if (isBest) {
@@ -342,8 +342,8 @@ void Tune::tune() {
   vector<FFTShape> shapes = FFTShape::multiSpec(args->fftSpec);
 
   // There are some options and variants that are different based on GPU manufacturer
-  bool AMDGPU = isAmdGpu(q->context->deviceId());
-  bool NVIDIAGPU = isNvidiaGpu(q->context->deviceId());
+  bool AMDGPU = isAmdGpu(shared.context->deviceId());
+  bool NVIDIAGPU = isNvidiaGpu(shared.context->deviceId());
   int NO_ASM = args->value("NO_ASM", 0);
 
   bool tune_config = 1;
@@ -410,11 +410,11 @@ void Tune::tune() {
       log("Checking whether this GPU is better suited for double-precision FFTs or integer NTTs.\n");
       defaultFFTShape = FFTShape(FFT64, 512, 16, 512);
       FFTConfig fft{defaultFFTShape, 101, CARRY_32};
-      double fp64_time = Gpu::make(q, 141000001, shared, fft, {}, false)->timePRP(quick);
+      double fp64_time = Gpu::make(141000001, shared, fft, {}, false)->timePRP(quick);
       log("Time for FP64 FFT %12s is %6.1f\n", fft.spec().c_str(), fp64_time);
       defaultNTTShape = FFTShape(FFT3161, 512, 8, 512);
       FFTConfig ntt{defaultNTTShape, 202, CARRY_AUTO};
-      double ntt_time = Gpu::make(q, 141000001, shared, ntt, {}, false)->timePRP(quick);
+      double ntt_time = Gpu::make(141000001, shared, ntt, {}, false)->timePRP(quick);
       log("Time for M31*M61 NTT %12s is %6.1f\n", ntt.spec().c_str(), ntt_time);
       if (fp64_time < ntt_time) {
         defaultShape = &defaultFFTShape;
@@ -463,7 +463,7 @@ void Tune::tune() {
         for (u32 in_sizex : {8, 16, 32}) {
           args->flags["IN_WG"] = to_string(in_wg);
           args->flags["IN_SIZEX"] = to_string(in_sizex);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using IN_WG=%u, IN_SIZEX=%u is %6.1f\n", fft.spec().c_str(), in_wg, in_sizex, cost);
           if (in_wg == current_in_wg && in_sizex == current_in_sizex) current_cost = cost;
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_in_wg = in_wg; best_in_sizex = in_sizex; }
@@ -485,7 +485,7 @@ void Tune::tune() {
         for (u32 out_sizex : {8, 16, 32}) {
           args->flags["OUT_WG"] = to_string(out_wg);
           args->flags["OUT_SIZEX"] = to_string(out_sizex);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using OUT_WG=%u, OUT_SIZEX=%u is %6.1f\n", fft.spec().c_str(), out_wg, out_sizex, cost);
           if (out_wg == current_out_wg && out_sizex == current_out_sizex) current_cost = cost;
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_out_wg = out_wg; best_out_sizex = out_sizex; }
@@ -508,7 +508,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 pad : {0, 64, 128, 256, 512}) {
         args->flags["PAD"] = to_string(pad);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using PAD=%u is %6.1f\n", fft.spec().c_str(), pad, cost);
         if (pad == current_pad) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_pad = pad; }
@@ -528,7 +528,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 middle_in_lds_transpose : {0, 1}) {
         args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
         if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
@@ -548,7 +548,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 middle_out_lds_transpose : {0, 1}) {
         args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
         if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
@@ -572,7 +572,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 inplace : {0, 1}) {
         args->flags["INPLACE"] = to_string(inplace);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using INPLACE=%u is %6.1f\n", fft.spec().c_str(), inplace, cost);
         if (inplace == current_inplace) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_inplace = inplace; }
@@ -596,7 +596,7 @@ void Tune::tune() {
 	for (u32 fft_load : {0, 1, 2, 3, 4}) {
           if (fft_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10 * 10 + fft_load);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT load=%u is %6.1f\n", fft.spec().c_str(), fft_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_load = fft_load; }
         }
@@ -614,7 +614,7 @@ void Tune::tune() {
 	for (u32 fft_store : {0, 1, 2, 3, 4}) {
           if (fft_store >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT store=%u is %6.1f\n", fft.spec().c_str(), fft_store, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_store = fft_store; }
         }
@@ -635,7 +635,7 @@ void Tune::tune() {
 	  u32 cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
           args->flags["LOADS"] = to_string(loads / 100 * 100 + cs_load * 10 + loads % 10);
           args->flags["STORES"] = to_string(stores / 100 * 100 + cs_store * 10 + stores % 10);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using carry shuttle load=%u, store=%u is %6.1f\n", fft.spec().c_str(), cs_load, cs_store, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_cs_load = cs_load; best_cs_store = cs_store; }
         }
@@ -655,7 +655,7 @@ void Tune::tune() {
 	for (u32 trig_load : {0, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 1000 * 1000 + trig_load * 100 + loads % 100);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig frequently used load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -673,7 +673,7 @@ void Tune::tune() {
 	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10000 * 10000 + trig_load * 1000 + loads % 1000);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig several uses load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -691,7 +691,7 @@ void Tune::tune() {
 	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(trig_load * 10000 + loads % 10000);
-          double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig used once load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -717,7 +717,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 fast_barrier : {0, 1}) {
         args->flags["FAST_BARRIER"] = to_string(fast_barrier);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using FAST_BARRIER=%u is %6.1f\n", fft.spec().c_str(), fast_barrier, cost);
         if (fast_barrier == current_fast_barrier) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fast_barrier = fast_barrier; }
@@ -737,7 +737,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tail_kernels : {0, 1, 2, 3}) {
         args->flags["TAIL_KERNELS"] = to_string(tail_kernels);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_KERNELS=%u is %6.1f\n", fft.spec().c_str(), tail_kernels, cost);
         if (tail_kernels == current_tail_kernels) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_kernels = tail_kernels; }
@@ -760,7 +760,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tail_trigs : {0, 1, 2}) {
         args->flags["TAIL_TRIGS"] = to_string(tail_trigs);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -781,7 +781,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tail_trigs : {0, 1}) {
         args->flags["TAIL_TRIGS31"] = to_string(tail_trigs);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS31=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -802,7 +802,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tail_trigs : {0, 1, 2}) {
         args->flags["TAIL_TRIGS32"] = to_string(tail_trigs);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS32=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -823,7 +823,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tail_trigs : {0, 1}) {
         args->flags["TAIL_TRIGS61"] = to_string(tail_trigs);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS61=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -843,7 +843,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN"] = to_string(tabmul_chain);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -864,7 +864,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN31"] = to_string(tabmul_chain);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN31=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -885,7 +885,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN32"] = to_string(tabmul_chain);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN32=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -906,7 +906,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN61"] = to_string(tabmul_chain);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN61=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -927,7 +927,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 modm31 : {0, 1, 2}) {
         args->flags["MODM31"] = to_string(modm31);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MODM31=%u is %6.1f\n", fft.spec().c_str(), modm31, cost);
         if (modm31 == current_modm31) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_modm31 = modm31; }
@@ -947,7 +947,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 unroll_w : {0, 1}) {
         args->flags["UNROLL_W"] = to_string(unroll_w);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using UNROLL_W=%u is %6.1f\n", fft.spec().c_str(), unroll_w, cost);
         if (unroll_w == current_unroll_w) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_unroll_w = unroll_w; }
@@ -967,7 +967,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 unroll_h : {0, 1}) {
         args->flags["UNROLL_H"] = to_string(unroll_h);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using UNROLL_H=%u is %6.1f\n", fft.spec().c_str(), unroll_h, cost);
         if (unroll_h == current_unroll_h) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_unroll_h = unroll_h; }
@@ -987,7 +987,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 zerohack_w : {0, 1}) {
         args->flags["ZEROHACK_W"] = to_string(zerohack_w);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using ZEROHACK_W=%u is %6.1f\n", fft.spec().c_str(), zerohack_w, cost);
         if (zerohack_w == current_zerohack_w) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_zerohack_w = zerohack_w; }
@@ -1007,7 +1007,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 zerohack_h : {0, 1}) {
         args->flags["ZEROHACK_H"] = to_string(zerohack_h);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using ZEROHACK_H=%u is %6.1f\n", fft.spec().c_str(), zerohack_h, cost);
         if (zerohack_h == current_zerohack_h) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_zerohack_h = zerohack_h; }
@@ -1027,7 +1027,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 wmul : {1, 2, 4}) {
         args->flags["WMUL"] = to_string(wmul);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using WMUL=%u is %6.1f\n", fft.spec().c_str(), wmul, cost);
         if (wmul == current_wmul) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_wmul = wmul; }
@@ -1048,7 +1048,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 noreg : {0, 1}) {
         args->flags["NOREG"] = to_string(noreg);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using NOREG=%u is %6.1f\n", fft.spec().c_str(), noreg, cost);
         if (noreg == current_noreg) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_noreg = noreg; }
@@ -1069,7 +1069,7 @@ void Tune::tune() {
       double current_cost = -1.0;
       for (u32 biglit : {0, 1}) {
         args->flags["BIGLIT"] = to_string(biglit);
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using BIGLIT=%u is %6.1f\n", fft.spec().c_str(), biglit, cost);
         if (biglit == current_biglit) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_biglit = biglit; }
@@ -1198,7 +1198,7 @@ skip_1K_256 = 0;
               if (w == 0 && !AMDGPU) continue;
               if (w == 0 && test.width > 1024) continue;
               FFTConfig fft{test, variant_WMH (w, 0, 1), CARRY_32};
-              cost = Gpu::make(q, primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(adjusted_quick);
+              cost = Gpu::make(primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(adjusted_quick);
               log("Fast width search %6.1f %12s\n", cost, fft.spec().c_str());
               if (min_cost < 0.0 || cost < min_cost) { min_cost = cost; fastest_width = w; }
             }
@@ -1220,7 +1220,7 @@ skip_1K_256 = 0;
               if (h == 0 && !AMDGPU) continue;
               if (h == 0 && test.height > 1024) continue;
               FFTConfig fft{test, variant_WMH (1, 0, h), CARRY_32};
-              cost = Gpu::make(q, primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(quick);
+              cost = Gpu::make(primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(quick);
               log("Fast height search %6.1f %12s\n", cost, fft.spec().c_str());
               if (min_cost < 0.0 || cost < min_cost) { min_cost = cost; fastest_height = h; }
             }
@@ -1250,7 +1250,7 @@ skip_1K_256 = 0;
         // Skip middle = 1, CARRY_32 if maximum exponent would be the same as middle = 0, CARRY_32
         if (variant_M(variant) > 0 && carry == CARRY_32 && fft.maxExp() <= FFTConfig{shape, variant - 10, CARRY_32}.maxExp()) continue;
 
-        double cost = Gpu::make(q, exponent, shared, fft, {}, false)->timePRP(quick);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         bool isUseful = TuneEntry{cost, fft}.update(results);
         log("%c %6.1f %12s %9" PRIu64 "\n", isUseful ? '*' : ' ', cost, fft.spec().c_str(), fft.maxExp());
         if (isUseful) TuneEntry::writeTuneFile(results);
diff --git a/src/tune.h b/src/tune.h
index a64f2100..b3ce6119 100644
--- a/src/tune.h
+++ b/src/tune.h
@@ -9,7 +9,6 @@
 #include <array>
 #include <vector>
 
-class Queue;
 class GpuCommon;
 class RoeInfo;
 class Gpu;
@@ -18,7 +17,6 @@ using TuneConfig = vector<KeyVal>;
 
 class Tune {
 private:
-  Queue *q;
   GpuCommon shared;
   Primes primes;
 
@@ -26,7 +24,7 @@ class Tune {
   float zForBpw(float bpw, FFTConfig fft, u32);
 
 public:
-  Tune(Queue *q, GpuCommon shared) : q{q}, shared{shared} {}
+  Tune(GpuCommon shared) : shared{shared} {}
 
   // Find the max-BPW for each FFT
   void ztune();

From e213b6f497bff78f4b3f7d7ac5f172421346d5cf Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 15 May 2026 06:03:12 +0000
Subject: [PATCH 073/214] Potential fix for the "Read GPU error" problem!

---
 src/Buffer.h  | 11 ++++++-----
 src/Gpu.cpp   |  1 +
 src/cl/etc.cl |  2 --
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/Buffer.h b/src/Buffer.h
index 7866975d..4bd57c6d 100644
--- a/src/Buffer.h
+++ b/src/Buffer.h
@@ -35,9 +35,10 @@ class Buffer {
     , tInfo{tInfo}
   {}
 
-  void fill(T value, u32 len) {
-    assert(len <= size);
-    queue->fillBuf(get(), value, (len ? len : size) * sizeof(T), tInfo);
+  void fill(T value, u32 sizeOrFull = 0) {
+    assert(sizeOrFull <= size);
+    auto fillSize = sizeOrFull ? sizeOrFull : size;
+    queue->fillBuf(get(), value, fillSize * sizeof(T), tInfo);
   }
 
 public:
@@ -84,8 +85,8 @@ class Buffer {
 
   void write(const vector<T>& vect) { queue->write(get(), vect, tInfo); }
 
-  void zero(size_t len = 0) {
-    fill(0, len);
+  void zero(size_t sizeOrFull = 0) {
+    fill(0, sizeOrFull);
   }
 
   void set(T value) {
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 27fa8a73..22fa5e71 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1123,6 +1123,7 @@ static bool isAllZero(vector<T> v) { return std::all_of(v.begin(), v.end(), [](T
 // Read from GPU, verifying the transfer with a sum, and retry on failure.
 vector<Word> Gpu::readChecked(Buffer<Word>& buf) {
   for (int nRetry = 0; nRetry < 3; ++nRetry) {
+    bufSumOut.zero();
     sum64(bufSumOut, u32(buf.size * sizeof(Word)), buf);
 
     vector<u64> expectedVect(1);
diff --git a/src/cl/etc.cl b/src/cl/etc.cl
index ae4fd857..2f5fb43a 100644
--- a/src/cl/etc.cl
+++ b/src/cl/etc.cl
@@ -17,8 +17,6 @@ KERNEL(32) readResidue(P(Word2) out, CP(Word2) in) {
 
 #if SUM64
 KERNEL(64) sum64(global ulong* out, u32 sizeBytes, global ulong* in) {
-  if (get_global_id(0) == 0) { out[0] = 0; }
-
   ulong sum = 0;
   for (i32 p = get_global_id(0); p < sizeBytes / sizeof(u64); p += get_global_size(0)) {
     sum += in[p];

From d76e4a70ce02b88d426e99fa20b859b93b423d31 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 17 May 2026 11:38:46 +0000
Subject: [PATCH 074/214] Windows asserted using _IOLBF, 0 in setvbuf.  
 Switched to _IONBF.

---
 src/File.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/File.cpp b/src/File.cpp
index 2ab37b7c..1360b3f3 100644
--- a/src/File.cpp
+++ b/src/File.cpp
@@ -22,7 +22,7 @@ File::File(const std::filesystem::path& path, const string& mode, bool throwOnEr
 //    setlinebuf(f);
 //#endif
     // tdulcet's suggested portable replacement for the lines above
-    setvbuf(f, nullptr, _IOLBF, 0);
+    setvbuf(f, nullptr, _IONBF, 0);
   }
 }
 

From e98adb1c623d2005944304a537ab1e6927cb6b67 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 17 May 2026 11:48:08 +0000
Subject: [PATCH 075/214] First cut at multiple command queues.  Off by
 default.  Can be turned on with -use MULTI_Q.  Slower on 5070Ti due to
 increase L2 cache hits.  Significantly faster on a 5080.  No change on a 4080
 which has same L2 cache size as a 5080.  Needs more study.

---
 src/Gpu.cpp              | 134 ++++++++++++++++++++++++++++++++++++++-
 src/Gpu.h                |   5 +-
 src/Kernel.h             |   5 +-
 src/Queue.cpp            |   8 ++-
 src/Queue.h              |   6 +-
 src/clwrap.cpp           |   6 ++
 src/clwrap.h             |   1 +
 src/cuda/clwrap_cuda.cpp |  10 ++-
 8 files changed, 166 insertions(+), 9 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 22fa5e71..335b69bd 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -345,7 +345,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   defines += toDefine("FFT_VARIANT", fft.variant);
   defines += toDefine("MAXBPW", (u32)(fft.maxBpw() * 100.0f));
 
-  if (fft.FFT_FP64 | fft.FFT_FP32) {
+  if (fft.FFT_FP64 || fft.FFT_FP32) {
     defines += toDefine("WEIGHT_STEP", weightM1(N, E, fft.shape.height * fft.shape.middle, 0, 0, 1));
     defines += toDefine("IWEIGHT_STEP", invWeightM1(N, E, fft.shape.height * fft.shape.middle, 0, 0, 1));
     if (fft.FFT_FP64) defines += toDefine("TAILT", root1Fancy(fft.shape.height * 2, 1));
@@ -748,6 +748,7 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   nH(fft.shape.nH()),
   useLongCarry{args.carry == CARRY_64},
   queue{*shared.context, args.profile},
+  auxQueues{},    
   compiler{args, shared.context, clDefines(args, shared.context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), &queue, __VA_ARGS__)
@@ -945,10 +946,127 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     selftestTrig();
   }
 
-  queue.setSquareKernels(1 + 3 * (fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61));
+  // If MULTI_Q option is set there are fewer kernels executed in the main queue, but there are some additional syncEvents and waits.
+  // That's a total of 4 kernels (carryFused, MidIn/Out, TailSquare) plus 1 syncEvent plus 1 or more syncWaits.
+  // If MULTI_Q option is not set there is carryFused + MidIn/Out and TailSquare for each NTT modulus.
+  // NOTE: We dont take into account the optional tailSquareZero kernel.  We theoretically should.
+  if (args.value("MULTI_Q", 0))
+    queue.setSquareKernels(5 + ((fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61) - 1));
+  else
+    queue.setSquareKernels(1 + 3 * (fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61));
   queue.finish();
 }
 
+// Optionallly split some of the MiddleIn/Tail/MiddleOut kernels off od executing on the main queue to run on an auxiliary queue.
+// This will increase GPU occupancy but will negatively impact L2 cache coherency.
+// If the L2 cache is large enough so that all FFT data fits in the cache, this ought to be a win.
+// If the L2 cache is small enough such that L2 cache hits are very low anyway, this might be a win.
+
+void Gpu::splitQueue(void) {
+
+  // If MULTI_Q -use not set, return
+  if (!args.value("MULTI_Q", 0)) return;
+
+  // Create aux queues.  For now, we only have one auxiliary queue.  We could do more.
+  if (auxQueues.size() == 0) {
+    auxQueues.push_back(Queue{*shared.context, args.profile, true});
+  }
+
+  // Queue a sync event in the main queue.  Have all auxiliary queues wait on the event.
+  EventHolder event = queue.createSyncEvent();
+  for (size_t i = 0; i < auxQueues.size(); ++i) {
+    auxQueues[i].waitForSyncEvent(&event);
+  }
+
+  // Assign kernels to running on the main queue or an auxiliary queue
+
+  int which_queue = -1;
+
+  // For no particularly good reason, put a kernel that operates on 64-bit vaules in the main queue.
+  if (fft.NTT_GF61) {
+    if (which_queue != -1) {
+      kfftWGF61.setQueue(&auxQueues[which_queue]);
+      kfftMidInGF61.setQueue(&auxQueues[which_queue]);
+      kfftMidOutGF61.setQueue(&auxQueues[which_queue]);
+      ktailSquareZeroGF61.setQueue(&auxQueues[which_queue]);
+      ktailSquareGF61.setQueue(&auxQueues[which_queue]);
+      ktailMulGF61.setQueue(&auxQueues[which_queue]);
+      ktailMulLowGF61.setQueue(&auxQueues[which_queue]);
+    }
+    which_queue++;
+  }
+
+  if (fft.FFT_FP64 || fft.FFT_FP32) {
+    if (which_queue != -1) {
+      kfftW.setQueue(&auxQueues[which_queue]);
+      kfftMidIn.setQueue(&auxQueues[which_queue]);
+      kfftMidOut.setQueue(&auxQueues[which_queue]);
+      ktailSquareZero.setQueue(&auxQueues[which_queue]);
+      ktailSquare.setQueue(&auxQueues[which_queue]);
+      ktailMul.setQueue(&auxQueues[which_queue]);
+      ktailMulLow.setQueue(&auxQueues[which_queue]);
+    }
+    // For no particularly good reason, put kernels that operate on 32-bit value in the same queue unless there are no kernels operating on 64-bit values
+    if (fft.FFT_FP64 || (fft.FFT_FP32 && which_queue == -1)) {
+      which_queue++;
+    }
+  }
+
+  if (fft.NTT_GF31) {
+    if (which_queue != -1) {
+      kfftWGF31.setQueue(&auxQueues[which_queue]);
+      kfftMidInGF31.setQueue(&auxQueues[which_queue]);
+      kfftMidOutGF31.setQueue(&auxQueues[which_queue]);
+      ktailSquareZeroGF31.setQueue(&auxQueues[which_queue]);
+      ktailSquareGF31.setQueue(&auxQueues[which_queue]);
+      ktailMulGF31.setQueue(&auxQueues[which_queue]);
+      ktailMulLowGF31.setQueue(&auxQueues[which_queue]);
+    }
+    //which_queue++;
+  }
+}
+
+void Gpu::mergeQueue(void) {
+
+  // If MULTI_Q -use not set, return
+  if (!args.value("MULTI_Q", 0)) return;
+
+  // Queue a sync event in each auxiliary queue(s).  Wait on the event(s) in the main queue.
+  for (size_t i = 0; i < auxQueues.size(); ++i) {
+    EventHolder event = auxQueues[i].createSyncEvent();
+    queue.waitForSyncEvent(&event);
+  }
+
+  // Return kernels to running on the main queue
+  // NOTE: I believe there is no need to switch queues back and forth between the main and auxiliary queues.  No one currently uses the cache_group == 0 option.
+  if (fft.NTT_GF61) {
+    kfftWGF61.setQueue(&queue);
+    kfftMidInGF61.setQueue(&queue);
+    kfftMidOutGF61.setQueue(&queue);
+    ktailSquareZeroGF61.setQueue(&queue);
+    ktailSquareGF61.setQueue(&queue);
+    ktailMulGF61.setQueue(&queue);
+    ktailMulLowGF61.setQueue(&queue);
+  }
+  if (fft.FFT_FP64 || fft.FFT_FP32) {
+    kfftW.setQueue(&queue);
+    kfftMidIn.setQueue(&queue);
+    kfftMidOut.setQueue(&queue);
+    ktailSquareZero.setQueue(&queue);
+    ktailSquare.setQueue(&queue);
+    ktailMul.setQueue(&queue);
+    ktailMulLow.setQueue(&queue);
+  }
+  if (fft.NTT_GF31) {
+    kfftWGF31.setQueue(&queue);
+    kfftMidInGF31.setQueue(&queue);
+    kfftMidOutGF31.setQueue(&queue);
+    ktailSquareZeroGF31.setQueue(&queue);
+    ktailSquareGF31.setQueue(&queue);
+    ktailMulGF31.setQueue(&queue);
+    ktailMulLowGF31.setQueue(&queue);
+  }
+}
 
 // Call the appropriate kernels to support hybrid FFTs and NTTs
 
@@ -1162,21 +1280,25 @@ vector<u32> Gpu::readData() { return readAndCompress(bufData); }
 void Gpu::mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, Buffer<double>& tmp2, bool mul3) {
   if (!in_place) {
     fftP(tmp2, ioA);
+    splitQueue();
     for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
       fftMidIn(tmp1, tmp2, cache_group);
       tailMul(tmp2, inB, tmp1, cache_group);
       fftMidOut(tmp1, tmp2, cache_group);
       fftW(tmp2, tmp1, cache_group);
     }
+    mergeQueue();
   }
   else {
     fftP(tmp1, ioA);
+    splitQueue();
     for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
       fftMidIn(tmp1, tmp1, cache_group);
       tailMul(tmp1, inB, tmp1, cache_group);
       fftMidOut(tmp1, tmp1, cache_group);
       fftW(tmp2, tmp1, cache_group);
     }
+    mergeQueue();
   }
 
   // Register the current ROE pos as multiplication (vs. a squaring)
@@ -1371,6 +1493,7 @@ void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Bu
     while (!testBit(exp, p)) { --p; }
 
     for (--p; ; --p) {
+      splitQueue();
       for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
         if (!in_place) {
           if (!midInAlreadyDone) fftMidIn(buf2, buf3, cache_group);
@@ -1382,10 +1505,12 @@ void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Bu
           fftMidOut(buf2, buf2, cache_group);
         }
       }
+      mergeQueue();
       midInAlreadyDone = 0;
 
       if (testBit(exp, p)) {
         doCarry(buf3, buf2, bufInOut);
+        splitQueue();
         for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
           if (!in_place) {
             fftMidIn(buf2, buf3, cache_group);
@@ -1397,6 +1522,7 @@ void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Bu
             fftMidOut(buf2, buf2, cache_group);
           }
         }
+        mergeQueue();
       }
 
       if (!p) { break; }
@@ -1447,12 +1573,14 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
   // If leadOut is LEAD_WIDTH, then will buf2 contain the output of carryFused -- to be used as input to the next squaring.
   if (!in_place) {
     if (leadIn == LEAD_NONE) fftP(buf2, in);
+    splitQueue();
     for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
       if (leadIn != LEAD_MIDDLE) fftMidIn(buf1, buf2, cache_group);
       tailSquare(buf2, buf1, cache_group);
       fftMidOut(buf1, buf2, cache_group);
       if (leadOut == LEAD_NONE) fftW(buf2, buf1, cache_group);
     }
+    mergeQueue();
   }
 
   // In place FFTs use buf1.
@@ -1462,12 +1590,14 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
   // If leadOut is LEAD_WIDTH, then buf1 will contain the output of carryFused -- to be used as input to the next squaring.
   else {
     if (leadIn == LEAD_NONE) fftP(buf1, in);
+    splitQueue();
     for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
       if (leadIn != LEAD_MIDDLE) fftMidIn(buf1, buf1, cache_group);
       tailSquare(buf1, buf1, cache_group);
       fftMidOut(buf1, buf1, cache_group);
       if (leadOut == LEAD_NONE) fftW(buf2, buf1, cache_group);
     }
+    mergeQueue();
   }
 
   // If leadOut is not allowed then we cannot use the faster carryFused kernel
diff --git a/src/Gpu.h b/src/Gpu.h
index c3e6f766..6035d0a9 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -107,6 +107,7 @@ class Gpu {
   Profile profile{};
 
   Queue queue;
+  vector<Queue> auxQueues;
   KernelCompiler compiler;
 
   /* Kernels for FFT_FP64 or FFT_FP32 */
@@ -218,7 +219,9 @@ class Gpu {
   TimeInfo* timeBufVect;
   ZAvg zAvg;
 
-  int NUM_CACHE_GROUPS = 3;
+  const int NUM_CACHE_GROUPS = 3;
+  void splitQueue(void);
+  void mergeQueue(void);
 
   void fftP(Buffer<double>& out, Buffer<double>& in) { fftP(out, reinterpret_cast<Buffer<Word>&>(in)); }
   void fftP(Buffer<double>& out, Buffer<Word>& in);
diff --git a/src/Kernel.h b/src/Kernel.h
index a1505d4d..67a7bf50 100644
--- a/src/Kernel.h
+++ b/src/Kernel.h
@@ -42,7 +42,10 @@ class Kernel {
 
   void startLoad(KernelCompiler* compiler);
   void finishLoad();
-  
+
+  // Change which queue is used to run a kernel
+  void setQueue(Queue *q) { queue = q; }
+
   template<typename... Args> void setFixedArgs(int pos, const Args &...tail) { setArgs(pos, tail...); }
   
   template<typename... Args> void operator()(const Args &...args) {
diff --git a/src/Queue.cpp b/src/Queue.cpp
index 27f461ad..0b2d0baf 100644
--- a/src/Queue.cpp
+++ b/src/Queue.cpp
@@ -17,9 +17,10 @@ void Events::synced() {
   assert(empty());
 }
 
-Queue::Queue(const Context& context, bool profile) :
+Queue::Queue(const Context& context, bool profile, bool auxQueue) :
   QueueHolder{makeQueue(context.deviceId(), context.get(), profile)},
   hasEvents{profile},
+  isAuxQueue(auxQueue),
   context{&context},
   markerEvent{},
   markerQueued(false),
@@ -55,6 +56,7 @@ void Queue::print() {
 
 void Queue::add(EventHolder&& e, TimeInfo* ti) {
   if (hasEvents) { events.emplace_back(std::move(e), ti); }
+  if (isAuxQueue) return;
   queueCount++;
   if (queueCount == MAX_QUEUE_COUNT) queueMarkerEvent();
 }
@@ -77,6 +79,7 @@ void Queue::run(cl_kernel kernel, size_t groupSize, size_t workSize, TimeInfo* t
 }
 
 void Queue::finish() {
+  assert (!isAuxQueue);
   waitForMarkerEvent();
   ::finish(get());
   events.synced();
@@ -84,6 +87,7 @@ void Queue::finish() {
 }
 
 void Queue::queueMarkerEvent() {
+  assert (!isAuxQueue);
   waitForMarkerEvent();
   if (queueCount) {
     // AMD GPUs have no trouble waiting for a finish without a CPU busy wait.  So, instead of markers and events, simply run finish every now and then.
@@ -100,6 +104,7 @@ void Queue::queueMarkerEvent() {
 }
 
 void Queue::waitForMarkerEvent() {
+  assert (!isAuxQueue);
   if (!markerQueued) return;
   // By default, nVidia finish causes a CPU busy wait.  Instead, sleep for a while.  Since we know how many items are enqueued after the marker we can make an
   // educated guess of how long to sleep to keep CPU overhead low.
@@ -111,6 +116,7 @@ void Queue::waitForMarkerEvent() {
 }
 
 void Queue::setSquareTime(int time) {
+  assert (!isAuxQueue);
   if (firstSetTime) {                 // Ignore first setSquareTime call.  First measured times are wrong because of startup costs
     firstSetTime = false;
     return;
diff --git a/src/Queue.h b/src/Queue.h
index be8341d6..3e0b3ab0 100644
--- a/src/Queue.h
+++ b/src/Queue.h
@@ -23,6 +23,7 @@ class Events : public std::deque<Event> {
 class Queue : public QueueHolder {
   Events events;
   bool hasEvents;
+  bool isAuxQueue;
 
   void writeTE(cl_mem buf, u64 size, const void* data, TimeInfo *tInfo);
   void fillBufTE(cl_mem buf, u32 patSize, const void* pattern, u64 size, TimeInfo* tInfo);
@@ -33,7 +34,7 @@ class Queue : public QueueHolder {
 public:
   const Context* context;
 
-  Queue(const Context& context, bool profile);
+  Queue(const Context& context, bool profile, bool auxQueue = false);
 
   static int registerThread();
   static int tid();
@@ -50,6 +51,9 @@ class Queue : public QueueHolder {
   void copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo);
   void finish();
 
+  EventHolder createSyncEvent(void) { return enqueueMarker(get()); }                     // Enqueue a synchronization event.  Used to sync work among multiple queues.
+  void waitForSyncEvent(EventHolder* e) { enqueueMarkerWithWaits(get(), {e->get()}); }   // Wait for a synchronization event to complete.
+
   void setSquareTime(int);          // Update the time to do one squaring (in microseconds)
   void setSquareKernels(int n) { squareKernels = n; firstSetTime = true; }
 
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 93385e64..602a317c 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -369,6 +369,12 @@ EventHolder enqueueMarker(cl_queue q) {
   return EventHolder{event};
 }
 
+EventHolder enqueueMarkerWithWaits(cl_queue q, vector<cl_event>&& waits) {
+  cl_event event{};
+  CHECK1(clEnqueueMarkerWithWaitList(q, waits.size(), waits.empty() ? 0 : waits.data(), &event));
+  return EventHolder{event};
+}
+
 void waitForEvents(vector<cl_event>&& waits) {
   if (!waits.empty()) {
     CHECK1(clWaitForEvents(waits.size(), waits.data()));
diff --git a/src/clwrap.h b/src/clwrap.h
index f5cf78fd..0b005879 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -111,6 +111,7 @@ EventHolder copyBuf(cl_queue queue, vector<cl_event>&& waits, const cl_mem src,
 EventHolder fillBuf(cl_queue q, vector<cl_event>&& waits, cl_mem buf, const void *pat, size_t patSize, size_t size, bool genEvent);
 
 EventHolder enqueueMarker(cl_queue q);
+EventHolder enqueueMarkerWithWaits(cl_queue q, vector<cl_event>&& waits);
 
 void waitForEvents(vector<cl_event>&& waits);
 
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 1e3157af..c8e20bd2 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -543,7 +543,7 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
       // Also write to file since WSL2+CUDA swallows stderr
       if (dumpPrefix) {
         FILE* regLog = fopen("kernel_regs.log", "a");
-	if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads); fclose(regLog); }
+        if (regLog) { fprintf(regLog, "  %-25s: %3d regs, %5d shmem, %d localmem, maxThreads=%d\n", name, numRegs, shmem, localmem, maxThreads); fclose(regLog); }
       }
     }
   }
@@ -804,8 +804,12 @@ int clEnqueueFillBuffer(cl_command_queue q, cl_mem buf, const void* pattern,
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
 }
 
-int clEnqueueMarkerWithWaitList(cl_command_queue q, unsigned nWaits,
-                                 const cl_event* waits, cl_event* event) {
+int clEnqueueMarkerWithWaitList(cl_command_queue q, unsigned nWaits, const cl_event* waits, cl_event* event) {
+  if (nWaits) {
+    for (unsigned int i = 0; i < nWaits; ++i) {
+      cuStreamWaitEvent(q->stream, waits[i]->end, 0);
+    }
+  }
   if (event) {
     auto* ev = new _cl_event;
     cuEventCreate(&ev->end, CU_EVENT_DEFAULT);

From f9a2c069b6227e9f1033c27de0fac704005c7a8b Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 17 May 2026 20:40:29 +0000
Subject: [PATCH 076/214] Used #if to not include some code that was giving
 some OpenCL ccmpilers trouble (fma on  floats).  The code was not used
 anyway.

---
 src/cl/fftbase.cl | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index daed1895..e6c3c3a3 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -1189,6 +1189,11 @@ void OVERLOAD tabMul(TrigFP32 trig, F2 *u, u32 f, u32 me) {
 // New fft WIDTH and HEIGHT macros to support radix-4 FFTs with more FMA instructions
 //************************************************************************************
 
+// Some OpenCL compilers are having trouble with fma on floats.  Specifically, line "X2_via_FMA(u[3], preloads[7], u[7]);  u[7] = mul_3t8_delayed(u[7]);".
+// Since we're not enabling FP32 variant 2 by default, don't include these "more FMA" routines.
+
+#if ENABLE_FP32_VARIANT_2
+
 // Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
 // We're trying to calculate u * U2(cosine,sine).
 // real = (u.x - u.y*sine_over_cosine) * cosine
@@ -1422,6 +1427,8 @@ void finish_tabMul8_fft8(TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u3
   SWAP(u[3], u[6]);
 }
 
+#endif
+
 // Variant 2 code uses more FMA instructions than the original fft version.
 // The tabMul after fft8 only does a partial complex multiply, saving a mul-by-cosine for the next fft8 using FMA instructions.
 // To maximize FMA opportunities we precompute trig values as cosine and sine/cosine rather than cosine and sine.

From 6e22d6ab4e6dc26b6c06a6a8278ccb89f2dabb31 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 20 May 2026 03:33:06 +0000
Subject: [PATCH 077/214] Reworked kernel calls.  The ping-pong nature of
 !in_place and the favorable L2 cache locality of working on NTT data one data
 type at a time has been moved to a central location.  Code is much more
 readable.  Paves the way for further improvements in L2 cache locality work.

---
 src/Gpu.cpp      | 425 ++++++++++++++++++++++++++---------------------
 src/Gpu.h        |  30 ++--
 src/cl/middle.cl |   4 +-
 3 files changed, 254 insertions(+), 205 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 335b69bd..ea6be69e 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -855,7 +855,10 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
 #undef BUF
 
   statsBits{u32(args.value("STATS", 0))},
-  timeBufVect{profile.make("proofBufVect")}
+  timeBufVect{profile.make("proofBufVect")},
+
+  recorded_kernels{},
+  recorded_kernel_args{}
 {    
 
   float bitsPerWord = E / float(N);
@@ -985,26 +988,28 @@ void Gpu::splitQueue(void) {
   // For no particularly good reason, put a kernel that operates on 64-bit vaules in the main queue.
   if (fft.NTT_GF61) {
     if (which_queue != -1) {
-      kfftWGF61.setQueue(&auxQueues[which_queue]);
       kfftMidInGF61.setQueue(&auxQueues[which_queue]);
-      kfftMidOutGF61.setQueue(&auxQueues[which_queue]);
+      kfftHinGF61.setQueue(&auxQueues[which_queue]);
       ktailSquareZeroGF61.setQueue(&auxQueues[which_queue]);
       ktailSquareGF61.setQueue(&auxQueues[which_queue]);
       ktailMulGF61.setQueue(&auxQueues[which_queue]);
       ktailMulLowGF61.setQueue(&auxQueues[which_queue]);
+      kfftMidOutGF61.setQueue(&auxQueues[which_queue]);
+      kfftWGF61.setQueue(&auxQueues[which_queue]);
     }
     which_queue++;
   }
 
   if (fft.FFT_FP64 || fft.FFT_FP32) {
     if (which_queue != -1) {
-      kfftW.setQueue(&auxQueues[which_queue]);
       kfftMidIn.setQueue(&auxQueues[which_queue]);
-      kfftMidOut.setQueue(&auxQueues[which_queue]);
+      kfftHin.setQueue(&auxQueues[which_queue]);
       ktailSquareZero.setQueue(&auxQueues[which_queue]);
       ktailSquare.setQueue(&auxQueues[which_queue]);
       ktailMul.setQueue(&auxQueues[which_queue]);
       ktailMulLow.setQueue(&auxQueues[which_queue]);
+      kfftMidOut.setQueue(&auxQueues[which_queue]);
+      kfftW.setQueue(&auxQueues[which_queue]);
     }
     // For no particularly good reason, put kernels that operate on 32-bit value in the same queue unless there are no kernels operating on 64-bit values
     if (fft.FFT_FP64 || (fft.FFT_FP32 && which_queue == -1)) {
@@ -1014,13 +1019,14 @@ void Gpu::splitQueue(void) {
 
   if (fft.NTT_GF31) {
     if (which_queue != -1) {
-      kfftWGF31.setQueue(&auxQueues[which_queue]);
       kfftMidInGF31.setQueue(&auxQueues[which_queue]);
-      kfftMidOutGF31.setQueue(&auxQueues[which_queue]);
+      kfftHinGF31.setQueue(&auxQueues[which_queue]);
       ktailSquareZeroGF31.setQueue(&auxQueues[which_queue]);
       ktailSquareGF31.setQueue(&auxQueues[which_queue]);
       ktailMulGF31.setQueue(&auxQueues[which_queue]);
       ktailMulLowGF31.setQueue(&auxQueues[which_queue]);
+      kfftMidOutGF31.setQueue(&auxQueues[which_queue]);
+      kfftWGF31.setQueue(&auxQueues[which_queue]);
     }
     //which_queue++;
   }
@@ -1040,85 +1046,194 @@ void Gpu::mergeQueue(void) {
   // Return kernels to running on the main queue
   // NOTE: I believe there is no need to switch queues back and forth between the main and auxiliary queues.  No one currently uses the cache_group == 0 option.
   if (fft.NTT_GF61) {
-    kfftWGF61.setQueue(&queue);
     kfftMidInGF61.setQueue(&queue);
-    kfftMidOutGF61.setQueue(&queue);
+    kfftHinGF61.setQueue(&queue);
     ktailSquareZeroGF61.setQueue(&queue);
     ktailSquareGF61.setQueue(&queue);
     ktailMulGF61.setQueue(&queue);
     ktailMulLowGF61.setQueue(&queue);
+    kfftMidOutGF61.setQueue(&queue);
+    kfftWGF61.setQueue(&queue);
   }
   if (fft.FFT_FP64 || fft.FFT_FP32) {
-    kfftW.setQueue(&queue);
     kfftMidIn.setQueue(&queue);
-    kfftMidOut.setQueue(&queue);
+    kfftHin.setQueue(&queue);
     ktailSquareZero.setQueue(&queue);
     ktailSquare.setQueue(&queue);
     ktailMul.setQueue(&queue);
     ktailMulLow.setQueue(&queue);
+    kfftMidOut.setQueue(&queue);
+    kfftW.setQueue(&queue);
   }
   if (fft.NTT_GF31) {
-    kfftWGF31.setQueue(&queue);
     kfftMidInGF31.setQueue(&queue);
-    kfftMidOutGF31.setQueue(&queue);
+    kfftHinGF31.setQueue(&queue);
     ktailSquareZeroGF31.setQueue(&queue);
     ktailSquareGF31.setQueue(&queue);
     ktailMulGF31.setQueue(&queue);
     ktailMulLowGF31.setQueue(&queue);
+    kfftMidOutGF31.setQueue(&queue);
+    kfftWGF31.setQueue(&queue);
+  }
+}
+
+// Replay the recorded bottom half kernels in a cache friendly order.  We support several
+// options here using multiple openCl command queues.
+void Gpu::replay(void) {
+
+  // If using multiple command queues, handle that now.
+  splitQueue();
+
+  // For better L2 cache locality, operate on all the FP data, then operate on all the GF31 data, then GF61.
+  for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+
+    // Check for irrelevant cache gouup
+    if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+    if (cache_group == 2 && !fft.NTT_GF31) continue;
+    if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+    // Iterate over the recorded kernels
+    int arg = 0;
+    for (auto kern : recorded_kernels) {
+
+      // Call the appropriate kernel
+      if (kern == KMIDIN) {
+        Buffer<double> *buf = recorded_kernel_args[arg++];
+        // If not in place, the input is from the scratch buffer
+        Buffer<double> *in = in_place ? buf : &buf3;
+        Buffer<double> *out = buf;
+        if (cache_group == 1) kfftMidIn(*out, *in);
+        if (cache_group == 2) kfftMidInGF31(*out, *in);
+        if (cache_group == 3) kfftMidInGF61(*out, *in);
+      }
+
+      if (kern == KFFTHIN) {
+        Buffer<double> *out = recorded_kernel_args[arg++];
+        Buffer<double> *in = recorded_kernel_args[arg++];
+        if (cache_group == 1) kfftHin(*out, *in);
+        if (cache_group == 2) kfftHinGF31(*out, *in);
+        if (cache_group == 3) kfftHinGF61(*out, *in);
+      }
+
+      if (kern == KTAILSQUARE) {
+        Buffer<double> *buf = recorded_kernel_args[arg++];
+        // If not in place, the output is to the scratch buffer
+        Buffer<double> *in = buf;
+        Buffer<double> *out = in_place ? buf : &buf3;
+        if (!tail_single_kernel) {
+          if (cache_group == 1) ktailSquareZero(*out, *in);
+          if (cache_group == 2) ktailSquareZeroGF31(*out, *in);
+          if (cache_group == 3) ktailSquareZeroGF61(*out, *in);
+        }
+        if (cache_group == 1) ktailSquare(*out, *in);
+        if (cache_group == 2) ktailSquareGF31(*out, *in);
+        if (cache_group == 3) ktailSquareGF61(*out, *in);
+      }
+
+      if (kern == KTAILMUL) {
+        Buffer<double> *buf = recorded_kernel_args[arg++];
+        Buffer<double> *in2 = recorded_kernel_args[arg++];
+        // If not in place, the output is to the scratch buffer
+        Buffer<double> *in1 = buf;
+        Buffer<double> *out = in_place ? buf : &buf3;
+        if (cache_group == 1) ktailMul(*out, *in1, *in2);
+        if (cache_group == 2) ktailMulGF31(*out, *in1, *in2);
+        if (cache_group == 3) ktailMulGF61(*out, *in1, *in2);
+      }
+
+      if (kern == KTAILMULLOW) {
+        Buffer<double> *buf = recorded_kernel_args[arg++];
+        Buffer<double> *in2 = recorded_kernel_args[arg++];
+        // If not in place, the output is to the scratch buffer
+        Buffer<double> *in1 = buf;
+        Buffer<double> *out = in_place ? buf : &buf3;
+        if (cache_group == 1) ktailMulLow(*out, *in1, *in2);
+        if (cache_group == 2) ktailMulLowGF31(*out, *in1, *in2);
+        if (cache_group == 3) ktailMulLowGF61(*out, *in1, *in2);
+      }
+
+      if (kern == KMIDOUT) {
+        Buffer<double> *buf = recorded_kernel_args[arg++];
+        // If not in place, the input is from the scratch buffer
+        Buffer<double> *in = in_place ? buf : &buf3;
+        Buffer<double> *out = buf;
+        if (cache_group == 1) kfftMidOut(*out, *in);
+        if (cache_group == 2) kfftMidOutGF31(*out, *in);
+        if (cache_group == 3) kfftMidOutGF61(*out, *in);
+      }
+
+      if (kern == KFFTW) {
+        Buffer<double> *out = recorded_kernel_args[arg++];
+        Buffer<double> *in = recorded_kernel_args[arg++];
+        if (cache_group == 1) kfftW(*out, *in);
+        if (cache_group == 2) kfftWGF31(*out, *in);
+        if (cache_group == 3) kfftWGF61(*out, *in);
+      }
+    }
   }
+
+  // Empty the recorded kernels queue
+  recorded_kernels.clear();
+  recorded_kernel_args.clear();
+
+  // If using multiple command queues, go back to a single command queue
+  mergeQueue();
 }
 
 // Call the appropriate kernels to support hybrid FFTs and NTTs
 
-void Gpu::fftP(Buffer<double>& out, Buffer<Word>& in) {
-  kfftP(out, in);
+void Gpu::fftP(Buffer<double>& buf, Buffer<Word>& in) {
+  // If not in place, instead write the output to the scratch buffer
+  Buffer<double> *out = in_place ? &buf : &buf3;
+  kfftP(*out, in);
 }
 
-void Gpu::fftW(Buffer<double>& out, Buffer<double>& in, int cache_group) {
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) kfftW(out, in);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) kfftWGF31(out, in);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) kfftWGF61(out, in);
+void Gpu::fftMidIn(Buffer<double>& buf) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KMIDIN);
+  recorded_kernel_args.push_back(&buf);
 }
 
-void Gpu::fftMidIn(Buffer<double>& out, Buffer<double>& in, int cache_group) {
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) kfftMidIn(out, in);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) kfftMidInGF31(out, in);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) kfftMidInGF61(out, in);
+void Gpu::fftHin(Buffer<double>& out, Buffer<double>& in) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KFFTHIN);
+  recorded_kernel_args.push_back(&out);
+  recorded_kernel_args.push_back(&in);
 }
 
-void Gpu::fftMidOut(Buffer<double>& out, Buffer<double>& in, int cache_group) {
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) kfftMidOut(out, in);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) kfftMidOutGF31(out, in);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) kfftMidOutGF61(out, in);
+void Gpu::tailSquare(Buffer<double>& buf) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KTAILSQUARE);
+  recorded_kernel_args.push_back(&buf);
 }
 
-void Gpu::fftHin(Buffer<double>& out, Buffer<double>& in) {
-  if (fft.FFT_FP64 || fft.FFT_FP32) kfftHin(out, in);
-  if (fft.NTT_GF31) kfftHinGF31(out, in);
-  if (fft.NTT_GF61) kfftHinGF61(out, in);
+void Gpu::tailMul(Buffer<double>& buf, Buffer<double>& in2) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KTAILMUL);
+  recorded_kernel_args.push_back(&buf);
+  recorded_kernel_args.push_back(&in2);
 }
 
-void Gpu::tailSquare(Buffer<double>& out, Buffer<double>& in, int cache_group) {
-  if (!tail_single_kernel) {
-    if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) ktailSquareZero(out, in);
-    if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) ktailSquareZeroGF31(out, in);
-    if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) ktailSquareZeroGF61(out, in);
-  }
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) ktailSquare(out, in);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) ktailSquareGF31(out, in);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) ktailSquareGF61(out, in);
+void Gpu::tailMulLow(Buffer<double>& buf, Buffer<double>& in2) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KTAILMULLOW);
+  recorded_kernel_args.push_back(&buf);
+  recorded_kernel_args.push_back(&in2);
 }
 
-void Gpu::tailMul(Buffer<double>& out, Buffer<double>& in1, Buffer<double>& in2, int cache_group) {
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) ktailMul(out, in1, in2);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) ktailMulGF31(out, in1, in2);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) ktailMulGF61(out, in1, in2);
+void Gpu::fftMidOut(Buffer<double>& buf) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KMIDOUT);
+  recorded_kernel_args.push_back(&buf);
 }
 
-void Gpu::tailMulLow(Buffer<double>& out, Buffer<double>& in1, Buffer<double>& in2, int cache_group) {
-  if ((cache_group == 0 || cache_group == 1) && (fft.FFT_FP64 || fft.FFT_FP32)) ktailMulLow(out, in1, in2);
-  if ((cache_group == 0 || cache_group == 2) && fft.NTT_GF31) ktailMulLowGF31(out, in1, in2);
-  if ((cache_group == 0 || cache_group == 3) && fft.NTT_GF61) ktailMulLowGF61(out, in1, in2);
+void Gpu::fftW(Buffer<double>& out, Buffer<double>& in) {
+  // Record this call for later playback
+  recorded_kernels.push_back(KFFTW);
+  recorded_kernel_args.push_back(&out);
+  recorded_kernel_args.push_back(&in);
+  // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
+  replay();
 }
 
 void Gpu::carryA(Buffer<Word>& out, Buffer<double>& in) {
@@ -1137,20 +1252,35 @@ void Gpu::carryLL(Buffer<Word>& out, Buffer<double>& in) {
   kCarryLL(out, in, updateCarryPos(1 << 2));
 }
 
-void Gpu::carryFused(Buffer<double>& out, Buffer<double>& in) {
+void Gpu::carryFused(Buffer<double>& buf) {
+  // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
+  replay();
   assert(roePos <= ROE_SIZE);
-  roePos < wantROE ? kCarryFusedROE(out, in, roePos++)
-                   : kCarryFused(out, in, updateCarryPos(1 << 0));
+  // Like fftP, if not in place write the output to the scratch buffer
+  Buffer<double> *in = &buf;
+  Buffer<double> *out = in_place ? &buf : &buf3;
+  roePos < wantROE ? kCarryFusedROE(*out, *in, roePos++)
+                   : kCarryFused(*out, *in, updateCarryPos(1 << 0));
 }
 
-void Gpu::carryFusedMul(Buffer<double>& out, Buffer<double>& in) {
+void Gpu::carryFusedMul(Buffer<double>& buf) {
+  // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
+  replay();
   assert(roePos <= ROE_SIZE);
-  roePos < wantROE ? kCarryFusedMulROE(out, in, roePos++)
-                   : kCarryFusedMul(out, in, updateCarryPos(1 << 1));
+  // Like fftP, if not in place write the output to the scratch buffer
+  Buffer<double> *in = &buf;
+  Buffer<double> *out = in_place ? &buf : &buf3;
+  roePos < wantROE ? kCarryFusedMulROE(*out, *in, roePos++)
+                   : kCarryFusedMul(*out, *in, updateCarryPos(1 << 1));
 }
 
-void Gpu::carryFusedLL(Buffer<double>& out, Buffer<double>& in) {
-  kCarryFusedLL(out, in, updateCarryPos(1 << 0));
+void Gpu::carryFusedLL(Buffer<double>& buf) {
+  // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
+  replay();
+  // Like fftP, if not in place write the output to the scratch buffer
+  Buffer<double> *in = &buf;
+  Buffer<double> *out = in_place ? &buf : &buf3;
+  kCarryFusedLL(*out, *in, updateCarryPos(1 << 0));
 }
 
 
@@ -1276,58 +1406,32 @@ Words Gpu::readAndCompress(Buffer<Word>& buf)  { return compactBits(readChecked(
 vector<u32> Gpu::readCheck() { return readAndCompress(bufCheck); }
 vector<u32> Gpu::readData() { return readAndCompress(bufData); }
 
-// out := inA * inB; inB is preserved
-void Gpu::mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, Buffer<double>& tmp2, bool mul3) {
-  if (!in_place) {
-    fftP(tmp2, ioA);
-    splitQueue();
-    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-      fftMidIn(tmp1, tmp2, cache_group);
-      tailMul(tmp2, inB, tmp1, cache_group);
-      fftMidOut(tmp1, tmp2, cache_group);
-      fftW(tmp2, tmp1, cache_group);
-    }
-    mergeQueue();
-  }
-  else {
-    fftP(tmp1, ioA);
-    splitQueue();
-    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-      fftMidIn(tmp1, tmp1, cache_group);
-      tailMul(tmp1, inB, tmp1, cache_group);
-      fftMidOut(tmp1, tmp1, cache_group);
-      fftW(tmp2, tmp1, cache_group);
-    }
-    mergeQueue();
-  }
+// ioA := ioA * inB; inB must be the output of fftMidIn; inB is preserved
+void Gpu::mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, bool mul3) {
+  fftP(tmp1, ioA);
+  fftMidIn(tmp1);
+  tailMul(tmp1, inB);
+  fftMidOut(tmp1);
+  fftW(buf3, tmp1);
 
   // Register the current ROE pos as multiplication (vs. a squaring)
   if (mulRoePos.empty() || mulRoePos.back() < roePos) { mulRoePos.push_back(roePos); }
 
-  if (mul3) { carryM(ioA, tmp2); } else { carryA(ioA, tmp2); }
+  if (mul3) { carryM(ioA, buf3); } else { carryA(ioA, buf3); }
   carryB(ioA);
 }
 
-void Gpu::mul(Buffer<Word>& io, Buffer<double>& buf1) {
-  // We know that mul() stores double output in buf1; so we're going to use buf2 & buf3 for temps.
-  mul(io, buf1, buf2, buf3, false);
-}
-
-// out := inA * inB;
+// ioA := ioA * inB; inB will end up in buf1 in the LEAD_MIDDLE state
 void Gpu::modMul(Buffer<Word>& ioA, Buffer<Word>& inB, bool mul3) {
   modMul(ioA, inB, LEAD_NONE, mul3);
 };
 
-// out := inA * inB; inB will end up in buf1 in the LEAD_MIDDLE state
+// ioA := ioA * inB; inB will end up in buf1 in the LEAD_MIDDLE state
 void Gpu::modMul(Buffer<Word>& ioA, Buffer<Word>& inB, enum LEAD_TYPE leadInB, bool mul3) {
-  if (!in_place) {
-    if (leadInB == LEAD_NONE) fftP(buf2, inB);
-    if (leadInB != LEAD_MIDDLE) fftMidIn(buf1, buf2);
-  } else {
-    if (leadInB == LEAD_NONE) fftP(buf1, inB);
-    if (leadInB != LEAD_MIDDLE) fftMidIn(buf1, buf1);
-  }
-  mul(ioA, buf1, buf2, buf3, mul3);
+  if (leadInB == LEAD_NONE) fftP(buf1, inB);
+  if (leadInB != LEAD_MIDDLE) fftMidIn(buf1);
+  replay();  // Work around an odd bug.  The above executed fftP writing to buf3 if !in_place and queued fftMidIn.  If we don't replay now, mul will call fftP again overwriting buf3.
+  mul(ioA, buf1, buf2, mul3);
 };
 
 void Gpu::writeState(u64 k, const vector<u32>& check, u32 blockSize) {
@@ -1458,7 +1562,7 @@ Words Gpu::expExp2(const Words& A, u32 n) {
 
 // A:= A^h * B
 void Gpu::expMul(Buffer<Word>& A, u64 h, Buffer<Word>& B) {
-  exponentiate(A, h, buf1, buf2, buf3);
+  exponentiate(A, h);
   modMul(A, B);
 }
 
@@ -1475,139 +1579,80 @@ Words Gpu::expMul(const Words& A, u64 h, const Words& B, bool doSquareB) {
 static bool testBit(u64 x, int bit) { return x & (u64(1) << bit); }
 
 // See "left-to-right binary exponentiation" on wikipedia
-void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Buffer<double>& buf2, Buffer<double>& buf3) {
+void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp) {
   if (exp == 0) {
     bufInOut.set(1);
   } else if (exp > 1) {
-    if (!in_place) {
-      fftP(buf3, bufInOut);
-      fftMidIn(buf2, buf3);
-    } else {
-      fftP(buf2, bufInOut);
-      fftMidIn(buf2, buf2);
-    }
-    fftHin(buf1, buf2); // save "base" to buf1
+    fftP(buf1, bufInOut);
+    fftMidIn(buf1);
+    fftHin(buf2, buf1); // save fully FFTed "base" to buf2
     bool midInAlreadyDone = 1;
 
     int p = 63;
     while (!testBit(exp, p)) { --p; }
 
     for (--p; ; --p) {
-      splitQueue();
-      for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-        if (!in_place) {
-          if (!midInAlreadyDone) fftMidIn(buf2, buf3, cache_group);
-          tailSquare(buf3, buf2, cache_group);
-          fftMidOut(buf2, buf3, cache_group);
-        } else {
-          if (!midInAlreadyDone) fftMidIn(buf2, buf2, cache_group);
-          tailSquare(buf2, buf2, cache_group);
-          fftMidOut(buf2, buf2, cache_group);
-        }
-      }
-      mergeQueue();
+      if (!midInAlreadyDone) fftMidIn(buf1);
+      tailSquare(buf1);
+      fftMidOut(buf1);
       midInAlreadyDone = 0;
 
       if (testBit(exp, p)) {
-        doCarry(buf3, buf2, bufInOut);
-        splitQueue();
-        for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-          if (!in_place) {
-            fftMidIn(buf2, buf3, cache_group);
-            tailMulLow(buf3, buf2, buf1, cache_group);
-            fftMidOut(buf2, buf3, cache_group);
-          } else {
-            fftMidIn(buf2, buf2, cache_group);
-            tailMulLow(buf2, buf2, buf1, cache_group);
-            fftMidOut(buf2, buf2, cache_group);
-          }
-        }
-        mergeQueue();
+        doCarry(buf1, bufInOut);
+        fftMidIn(buf1);
+        tailMulLow(buf1, buf2);
+        fftMidOut(buf1);
       }
 
       if (!p) { break; }
 
-      doCarry(buf3, buf2, bufInOut);
+      doCarry(buf1, bufInOut);
     }
 
-    fftW(buf3, buf2);
+    fftW(buf3, buf1);
     carryA(bufInOut, buf3);
     carryB(bufInOut);
   }
 }
 
 // does either carryFused() or the expanded version depending on useLongCarry
-void Gpu::doCarry(Buffer<double>& out, Buffer<double>& in, Buffer<Word>& tmp) {
-  if (!in_place) {
-    if (useLongCarry) {
-      fftW(out, in);
-      carryA(tmp, out);
-      carryB(tmp);
-      fftP(out, tmp);
-    } else {
-      carryFused(out, in);
-    }
+void Gpu::doCarry(Buffer<double>& in, Buffer<Word>& wordBuf) {
+  if (useLongCarry) {
+    fftW(buf3, in);
+    carryA(wordBuf, buf3);
+    carryB(wordBuf);
+    fftP(in, wordBuf);
   } else {
-    if (useLongCarry) {
-      fftW(out, in);
-      carryA(tmp, out);
-      carryB(tmp);
-      fftP(in, tmp);
-    } else {
-      carryFused(in, in);
-    }
+    carryFused(in);
   }
 }
 
-// Use buf1 and buf2 to do a single squaring.
+// Use buf1 (and buf23 if not in place) to do a single squaring.
 void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enum LEAD_TYPE leadOut, bool doMul3, bool doLL) {
   // leadOut = LEAD_MIDDLE is not supported (slower than LEAD_WIDTH)
   assert(leadOut != LEAD_MIDDLE);
   // LL does not do Mul3
   assert(!(doMul3 && doLL));
 
-  // Not in place FFTs use buf1 and buf2 in a "ping pong" fashion.
-  // If leadIn is LEAD_NONE, in contains the input data, squaring starts at fftP
-  // If leadIn is LEAD_WIDTH, buf2 contains the input data, squaring starts at fftMidIn
-  // If leadIn is LEAD_MIDDLE, buf1 contains the input data, squaring starts at tailSquare
-  // If leadOut is LEAD_WIDTH, then will buf2 contain the output of carryFused -- to be used as input to the next squaring.
-  if (!in_place) {
-    if (leadIn == LEAD_NONE) fftP(buf2, in);
-    splitQueue();
-    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-      if (leadIn != LEAD_MIDDLE) fftMidIn(buf1, buf2, cache_group);
-      tailSquare(buf2, buf1, cache_group);
-      fftMidOut(buf1, buf2, cache_group);
-      if (leadOut == LEAD_NONE) fftW(buf2, buf1, cache_group);
-    }
-    mergeQueue();
-  }
-
-  // In place FFTs use buf1.
+  // In place FFTs use buf1.  Not in place FFTs also use buf3.
   // If leadIn is LEAD_NONE, in contains the input data, squaring starts at fftP
-  // If leadIn is LEAD_WIDTH, buf1 contains the input data, squaring starts at fftMidIn
+  // If leadIn is LEAD_WIDTH, buf1 (or buf3 if not in place) contains the input data, squaring starts at fftMidIn
   // If leadIn is LEAD_MIDDLE, buf1 contains the input data, squaring starts at tailSquare
-  // If leadOut is LEAD_WIDTH, then buf1 will contain the output of carryFused -- to be used as input to the next squaring.
-  else {
-    if (leadIn == LEAD_NONE) fftP(buf1, in);
-    splitQueue();
-    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-      if (leadIn != LEAD_MIDDLE) fftMidIn(buf1, buf1, cache_group);
-      tailSquare(buf1, buf1, cache_group);
-      fftMidOut(buf1, buf1, cache_group);
-      if (leadOut == LEAD_NONE) fftW(buf2, buf1, cache_group);
-    }
-    mergeQueue();
-  }
+  // If leadOut is LEAD_WIDTH, then buf1 (or buf3 if not in place) will contain the output of carryFused -- to be used as input to the next squaring.
+  if (leadIn == LEAD_NONE) fftP(buf1, in);
+  if (leadIn != LEAD_MIDDLE) fftMidIn(buf1);
+  tailSquare(buf1);
+  fftMidOut(buf1);
 
   // If leadOut is not allowed then we cannot use the faster carryFused kernel
   if (leadOut == LEAD_NONE) {
+    fftW(buf3, buf1);
     if (!doLL && !doMul3) {
-      carryA(out, buf2);
+      carryA(out, buf3);
     } else if (doLL) {
-      carryLL(out, buf2);
+      carryLL(out, buf3);
     } else {
-      carryM(out, buf2);
+      carryM(out, buf3);
     }
     carryB(out);
   }
@@ -1617,9 +1662,9 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
     assert(!useLongCarry);
     assert(!doMul3);
     if (doLL) {
-      carryFusedLL(in_place ? buf1 : buf2, buf1);
+      carryFusedLL(buf1);
     } else {
-      carryFused(in_place ? buf1 : buf2, buf1);
+      carryFused(buf1);
     }
   }
 }
diff --git a/src/Gpu.h b/src/Gpu.h
index 6035d0a9..e7a2b810 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -219,26 +219,31 @@ class Gpu {
   TimeInfo* timeBufVect;
   ZAvg zAvg;
 
+  enum BOTTOM_HALF_KERNELS {KMIDIN, KFFTHIN, KTAILSQUARE, KTAILMUL, KTAILMULLOW, KMIDOUT, KFFTW};
+  vector<enum BOTTOM_HALF_KERNELS> recorded_kernels;
+  vector<Buffer<double> *> recorded_kernel_args;
+
   const int NUM_CACHE_GROUPS = 3;
   void splitQueue(void);
   void mergeQueue(void);
+  void replay(void);
 
   void fftP(Buffer<double>& out, Buffer<double>& in) { fftP(out, reinterpret_cast<Buffer<Word>&>(in)); }
   void fftP(Buffer<double>& out, Buffer<Word>& in);
-  void fftMidIn(Buffer<double>& out, Buffer<double>& in, int cache_group = 0);
-  void fftMidOut(Buffer<double>& out, Buffer<double>& in, int cache_group = 0);
+  void fftMidIn(Buffer<double>& buf);
+  void fftMidOut(Buffer<double>& buf);
   void fftHin(Buffer<double>& out, Buffer<double>& in);
-  void tailSquare(Buffer<double>& out, Buffer<double>& in, int cache_group = 0);
-  void tailMul(Buffer<double>& out, Buffer<double>& in1, Buffer<double>& in2, int cache_group = 0);
-  void tailMulLow(Buffer<double>& out, Buffer<double>& in1, Buffer<double>& in2, int cache_group = 0);
-  void fftW(Buffer<double>& out, Buffer<double>& in, int cache_group = 0);
+  void tailSquare(Buffer<double>& buf);
+  void tailMul(Buffer<double>& buf, Buffer<double>& in2);
+  void tailMulLow(Buffer<double>& buf, Buffer<double>& in2);
+  void fftW(Buffer<double>& out, Buffer<double>& in);
   void carryA(Buffer<double>& out, Buffer<double>& in) { carryA(reinterpret_cast<Buffer<Word>&>(out), in); }
   void carryA(Buffer<Word>& out, Buffer<double>& in);
   void carryM(Buffer<Word>& out, Buffer<double>& in);
   void carryLL(Buffer<Word>& out, Buffer<double>& in);
-  void carryFused(Buffer<double>& out, Buffer<double>& in);
-  void carryFusedMul(Buffer<double>& out, Buffer<double>& in);
-  void carryFusedLL(Buffer<double>& out, Buffer<double>& in);
+  void carryFused(Buffer<double>& buf);
+  void carryFusedMul(Buffer<double>& buf);
+  void carryFusedLL(Buffer<double>& buf);
 
   vector<Word> readWords(Buffer<Word> &buf);
   void writeWords(Buffer<Word>& buf, vector<Word> &words);
@@ -261,15 +266,14 @@ class Gpu {
   
   vector<u32> writeBase(const vector<u32> &v);
   
-  void exponentiate(Buffer<Word>& bufInOut, u64 exp, Buffer<double>& buf1, Buffer<double>& buf2, Buffer<double>& buf3);
+  void exponentiate(Buffer<Word>& bufInOut, u64 exp);
 
   void writeState(u64 k, const vector<u32>& check, u32 blockSize);
 
   // does either carrryFused() or the expanded version depending on useLongCarry
-  void doCarry(Buffer<double>& out, Buffer<double>& in, Buffer<Word>& tmp);
+  void doCarry(Buffer<double>& in, Buffer<Word>& wordBuf);
 
-  void mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, Buffer<double>& tmp2, bool mul3 = false);
-  void mul(Buffer<Word>& io, Buffer<double>& inB);
+  void mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, bool mul3 = false);
 
   void modMul(Buffer<Word>& ioA, Buffer<Word>& inB, bool mul3 = false);
   void modMul(Buffer<Word>& ioA, Buffer<Word>& inB, enum LEAD_TYPE leadInB, bool mul3 = false);
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 0236141f..35a251cf 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -680,11 +680,11 @@ void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
 // Goals:
 // 1) In-place transpose.  Rather than "ping-pong"ing buffers, an in-place transpose uses half as much memory.  This may allow
 //    the entire FFT/NTT data set to reside in the L2 cache on upper end consumer GPUs (circa 2025) which can have 64MB or larger L2 caches.
-// 2) We want to have distribute the carryFused and/or tailSquare memory in the L2 cache with minimal cache line collisions.  The hope is to (one day) do
+// 2) We want to distribute the carryFused and/or tailSquare memory in the L2 cache with minimal cache line collisions.  The hope is to (one day) do
 //    fftMiddleOut/carryFused/fftMiddleIn or fftMiddleIn/tailSquare/fftMiddleOut in L2 cache-sized chunks to minimize the slowest memory accesses.
 //    The cost of extra kernel launches may negate any L2 cache benefits.
 // 3) We use swizzling and/or modest padding to reduce carryFused L2 cache line collisions.  Several different memory layouts and padding were tried
-//    on nVidia Titan V and AMD Radeon VII to find the fastest in-place layout and padding scheme.  Hopefully, these will schemes will work well
+//    on nVidia Titan V and AMD Radeon VII to find the fastest in-place layout and padding scheme.  Hopefully, these schemes will work well
 //    on later generation GPUs with different L2 cache dimensions (size and "number-of-ways").
 // 4) Apparently cache line collisions in the L1 cache also adversely affect timings.  The L1 cache may have a different cache line size and number-of-ways
 //    which makes padding tuning a bit difficult.  This is especially true on AMD which has a very strange channel & banks partitioning of memory accesses.

From 0bd593e73fed317c7c27b72afe177b94b2f7bcaf Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 24 May 2026 00:44:17 +0000
Subject: [PATCH 078/214] Fixed yet another Windws treats long as 32-bits bug.

---
 src/cl/carryutil.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 4ae4b576..57bf5adb 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -94,7 +94,7 @@ bool test(u32 bits, u32 pos) { return (bits >> pos) & 1; }
 
 #if FFT_FP64
 // Rounding constant: 3 * 2^51, See https://stackoverflow.com/questions/17035464
-#define RNDVAL (3.0 * (1l << 51))
+#define RNDVAL (3.0 * (1ull << 51))
 
 // Convert a double to long efficiently.  Double must be in RNDVAL+integer format.
 i64 RNDVALdoubleToLong(double d) {

From 0b54a8ceb18784881e1ebccb7da8fc33074f30db Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 25 May 2026 06:00:29 +0000
Subject: [PATCH 079/214] Detect nVidia compute capability to set HAS_PTX
 properly.  Lets nVidia 1080 Gpus use asm by default.

---
 src/Gpu.cpp              |  1 +
 src/cl/base.cl           |  2 +-
 src/clwrap.cpp           |  8 ++++++++
 src/clwrap.h             |  1 +
 src/cuda/clwrap_cuda.cpp | 14 ++++++++++++++
 src/cuda/tinycuda.h      |  4 ++++
 src/tinycl.h             |  4 ++++
 7 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ea6be69e..5a2bb181 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -335,6 +335,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
 
   if (isAmdGpu(id)) { defines += toDefine("AMDGPU", 1); }
   if (isNvidiaGpu(id)) { defines += toDefine("NVIDIAGPU", 1); }
+  if (isNvidiaGpu(id)) { defines += toDefine("CC", getNvidiaComputeCapability(id)); }
 
   if ((fft.carry == CARRY_AUTO && fft.shape.needsLargeCarry(E)) || (fft.carry == CARRY_64)) {
     if (doLog) { log("Using CARRY64\n"); }
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 7654be7a..ae20149a 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -75,7 +75,7 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define HAS_PTX 0
 #elif NVIDIAGPU
 #define HAS_ASM 0
-#define HAS_PTX 1200        // Assume CUDA 12.00 support until we can figure out how to automatically determine this at runtime
+#define HAS_PTX CC     // C code computed the nVidia GPU's compute capability
 #else
 #define HAS_ASM 0
 #define HAS_PTX 0
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 602a317c..1152a7bb 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -178,6 +178,14 @@ bool isNvidiaGpu(cl_device_id id) {
   return pcieId == 0x10DE;
 }
 
+u32 getNvidiaComputeCapability(cl_device_id id) {
+  u32 major = 0;
+  u32 minor = 0;
+  GET_INFO(id, CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV, major);
+  GET_INFO(id, CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV, minor);
+  return major * 100 + minor;
+}
+
 /*
 static string getFreq(cl_device_id device) {
   unsigned computeUnits, frequency;
diff --git a/src/clwrap.h b/src/clwrap.h
index 0b005879..41b2bb93 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -67,6 +67,7 @@ u64 getFreeMem(cl_device_id id);
 bool hasFreeMemInfo(cl_device_id id);
 bool isAmdGpu(cl_device_id id);
 bool isNvidiaGpu(cl_device_id id);
+u32 getNvidiaComputeCapability(cl_device_id id);
 string getDriverVersion(cl_device_id id);
 string getDriverVersionByPos(int pos);
 
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index c8e20bd2..5df25791 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -969,6 +969,20 @@ int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* va
     if (value && size >= sizeof(freeKB)) memcpy(value, &freeKB, sizeof(freeKB));
     break;
   }
+  case CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV: {
+    int major = 0;
+    cuDeviceGetAttribute(&major, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR, dev->dev);
+    if (sizeRet) *sizeRet = sizeof(major);
+    if (value && size >= sizeof(major)) memcpy(value, &major, sizeof(major));
+    break;
+  }
+  case CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV: {
+    int minor = 0;
+    cuDeviceGetAttribute(&minor, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR, dev->dev);
+    if (sizeRet) *sizeRet = sizeof(minor);
+    if (value && size >= sizeof(minor)) memcpy(value, &minor, sizeof(minor));
+    break;
+  }
   default:
     return CL_INVALID_VALUE;
   }
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index 5a34c15e..d01946df 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -207,6 +207,10 @@ using cl_queue = cl_command_queue;
 #define CL_KERNEL_ATTRIBUTES     0x1195
 #define CL_KERNEL_COMPILE_WORK_GROUP_SIZE 0x11B1
 
+// nVidia
+#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV     0x4000
+#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV     0x4001
+
 // AMD-specific (unused but must exist for compilation)
 #define CL_DEVICE_PCIE_ID_AMD           0x4034
 #define CL_DEVICE_TOPOLOGY_AMD          0x4037
diff --git a/src/tinycl.h b/src/tinycl.h
index e3317657..90fa8404 100644
--- a/src/tinycl.h
+++ b/src/tinycl.h
@@ -207,6 +207,10 @@ int clSetKernelArgSVMPointer(cl_kernel, unsigned, const void *);
 
 #define CL_KERNEL_COMPILE_WORK_GROUP_SIZE 0x11B1
 
+// nVidia
+#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV     0x4000
+#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV     0x4001
+
 // AMD
 #define CL_DEVICE_PCIE_ID_AMD     0x4034
 #define CL_DEVICE_TOPOLOGY_AMD    0x4037

From a3e4c7eecf0c1b446b56da98e502aa6b432e788c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 25 May 2026 19:32:41 +0000
Subject: [PATCH 080/214] Another attempt at fixing the GPU read failed error.

---
 src/Gpu.cpp   | 15 ++++-----------
 src/cl/etc.cl |  4 ++--
 2 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 5a2bb181..4a491748 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1373,22 +1373,15 @@ static bool isAllZero(vector<T> v) { return std::all_of(v.begin(), v.end(), [](T
 vector<Word> Gpu::readChecked(Buffer<Word>& buf) {
   for (int nRetry = 0; nRetry < 3; ++nRetry) {
     bufSumOut.zero();
-    sum64(bufSumOut, u32(buf.size * sizeof(Word)), buf);
-
+    sum64(bufSumOut, N, buf);
     vector<u64> expectedVect(1);
-
     bufSumOut.readAsync(expectedVect);
-    vector<Word> data = readOut(buf);
 
-    u64 gpuSum = expectedVect[0];
+    vector<Word> data = readOut(buf);
     u64 hostSum = 0;
+    for (auto it = data.begin(), end = data.end(); it < end; ++it) hostSum += u64(*it);
 
-    int even = 1;
-    for (auto it = data.begin(), end = data.end(); it < end; ++it, even = !even) {
-      if (fft.WordSize == 4) hostSum += even ? u64(u32(*it)) : (u64(*it) << 32);
-      if (fft.WordSize == 8) hostSum += u64(*it);
-    }
-
+    u64 gpuSum = expectedVect[0];
     if (hostSum == gpuSum) {
       // A buffer containing all-zero is exceptional, so mark that through the empty vector.
       if (gpuSum == 0 && isAllZero(data)) {
diff --git a/src/cl/etc.cl b/src/cl/etc.cl
index 2f5fb43a..e3e0f7c9 100644
--- a/src/cl/etc.cl
+++ b/src/cl/etc.cl
@@ -16,9 +16,9 @@ KERNEL(32) readResidue(P(Word2) out, CP(Word2) in) {
 #endif
 
 #if SUM64
-KERNEL(64) sum64(global ulong* out, u32 sizeBytes, global ulong* in) {
+KERNEL(64) sum64(global ulong* out, u32 count, CP(Word) in) {
   ulong sum = 0;
-  for (i32 p = get_global_id(0); p < sizeBytes / sizeof(u64); p += get_global_size(0)) {
+  for (i32 p = get_global_id(0); p < count; p += get_global_size(0)) {
     sum += in[p];
   }
   u32 prev = atomic_add((global u32*)out, (u32) sum);

From 7b6b2c1c93bed2f228ba70896640fdc9fc4e1fef Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 26 May 2026 19:48:24 +0000
Subject: [PATCH 081/214] Restrict usage of WMUL=4 for WIDTH=1K and WMUL=2 for
 WIDTH=4K

---
 src/Gpu.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 4a491748..f16fe0e9 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -306,13 +306,16 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   }
 
   // Maximum WMUL is 32KB / (WIDTH * SHUFL_BYTES_W).  If using the 32KB maximum, LDS padding must be disabled.
+  // Furthermore, I've seen the CUDA compiler refuse to create a kernel with 1024 threads.  Thus, we limit WMUL to 2 for a 1K width and to 1 for a 4K width.
   {
     u32 shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
     u32 max_wmul = 32768 / (fft.shape.width * shufl_bytes_w);
+    if (max_wmul > 2 && fft.shape.width >= 1024) max_wmul = 2;
+    if (max_wmul > 1 && fft.shape.width >= 4096) max_wmul = 1;
     if (wmul > max_wmul) {
       wmul = max_wmul;
       config["WMUL"] = to_string(wmul);
-      log("Local shared memory limit of 32KB exceeded.  Changing to WMUL=%d\n", wmul);
+      log("WMUL setting too large for this FFT width.  Changing to WMUL=%d\n", wmul);
     }
     if (fft.shape.width * shufl_bytes_w * wmul >= 32768) {
       log("Local shared memory limit of 32KB exceeded.  Changing to LDSPAD_W=0\n");

From b2d530f99be9e0cdedd2f54f2c0cae815a50e073 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Mon, 30 Mar 2026 10:45:47 -0700
Subject: [PATCH 082/214] Updated CI to support building with CUDA.

---
 .github/workflows/ci.yml | 73 +++++++++++++++++++++++++++++++++++-----
 1 file changed, 65 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 6d43b725..aa7b5f77 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -7,8 +7,8 @@ on:
     - cron:  '0 0 1 * *'
 
 jobs:
-  Linux:
-    name: Linux
+  Linux-OpenCL:
+    name: Linux OpenCL
 
     runs-on: ${{ matrix.os }}
     strategy:
@@ -26,7 +26,7 @@ jobs:
     - name: Install
       run: |
         sudo apt-get update -y
-        sudo apt-get install -y cppcheck ocl-icd-opencl-dev pocl-opencl-icd
+        sudo apt-get install -y ocl-icd-opencl-dev pocl-opencl-icd
         $CXX --version
     - name: Script
       run: |
@@ -39,14 +39,71 @@ jobs:
       with:
         name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
         path: ${{ github.workspace }}
-    - name: Cppcheck
+
+  Linux-CUDA:
+    name: Linux CUDA
+
+    runs-on: ${{ matrix.os }}
+    strategy:
+      matrix:
+        os: [ubuntu-22.04, ubuntu-24.04]
+        cxx: [g++, clang++]
+        exclude:
+        - os: ubuntu-22.04-arm
+          cxx: clang++
+      fail-fast: false
+    env:
+      CXX: ${{ matrix.cxx }}
+    steps:
+    - uses: actions/checkout@v6
+    - name: Install
+      run: |
+        sudo apt-get update -y
+        sudo apt-get install -y nvidia-cuda-toolkit
+        $CXX --version
+    - name: Script
+      run: |
+        make CUDA=1 -O -j "$(nproc)"
+        cd build-cuda
+        rm -f -- *.o
+        ./prpll -h
+    - uses: actions/upload-artifact@v7
+      if: always()
+      with:
+        name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_cuda_prpll
+        path: ${{ github.workspace }}
+
+  Cppcheck:
+    name: Cppcheck
+
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v6
+    - name: Install
+      run: |
+        sudo apt-get update -y
+        sudo apt-get install -y cppcheck
+    - name: Script
       run: cppcheck --enable=all --force .
-    - name: Clang-Tidy
-      if: ${{ matrix.cxx == 'clang++' }}
+
+  Clang-Tidy:
+    name: Clang-Tidy
+
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v6
+    - name: Script
       run: clang-tidy -checks='bugprone-*,-bugprone-reserved-identifier,cert-*,-cert-dcl37-c,-cert-dcl51-cpp,clang-analyzer-*,concurrency-*,misc-*,-misc-no-recursion,modernize-*,-modernize-use-trailing-return-type,performance-*,portability-*,readability-const-return-type,readability-container-*,readability-duplicate-include,readability-else-after-return,readability-make-member-function-cons,readability-non-const-parameter,readability-redundant-*,readability-simplify-*,readability-string-compare,readability-use-*' -header-filter='.*' src/*.cpp -- -Wall -O3 -std=gnu++20
       continue-on-error: true
-    - name: ShellCheck
-      run: shopt -s globstar; shellcheck -o avoid-nullary-conditions,check-extra-masked-returns,check-set-e-suppressed,deprecate-which,quote-safe-variables,require-double-brackets -s bash **/*.sh
+
+  ShellCheck:
+    name: ShellCheck
+
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v6
+    - name: Script
+      run: shopt -s globstar; shellcheck -o avoid-nullary-conditions,check-set-e-suppressed,deprecate-which,quote-safe-variables,require-double-brackets -s bash **/*.sh
       continue-on-error: true
 
   Windows:

From ea498d2b63470f12ef580a4f65469fa9bf0a80e8 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Thu, 11 Jun 2026 13:37:12 -0700
Subject: [PATCH 083/214] Updated CI to test on Ubuntu 26.04.

---
 .github/workflows/ci.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index aa7b5f77..31d60e10 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -13,7 +13,7 @@ jobs:
     runs-on: ${{ matrix.os }}
     strategy:
       matrix:
-        os: [ubuntu-22.04, ubuntu-24.04, ubuntu-22.04-arm, ubuntu-24.04-arm]
+        os: [ubuntu-22.04, ubuntu-24.04, ubuntu-26.04, ubuntu-22.04-arm, ubuntu-24.04-arm, ubuntu-26.04-arm]
         cxx: [g++, clang++]
         exclude:
         - os: ubuntu-22.04-arm
@@ -46,7 +46,7 @@ jobs:
     runs-on: ${{ matrix.os }}
     strategy:
       matrix:
-        os: [ubuntu-22.04, ubuntu-24.04]
+        os: [ubuntu-22.04, ubuntu-24.04, ubuntu-26.04]
         cxx: [g++, clang++]
         exclude:
         - os: ubuntu-22.04-arm

From 0bf908092d71bd9da05ec4da09e885f743650340 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Fri, 12 Jun 2026 05:45:57 -0700
Subject: [PATCH 084/214] Made Clang-Tidy fixes.

---
 src/AllocTrac.cpp        |   1 -
 src/AllocTrac.h          |   4 +-
 src/Args.cpp             |  32 +--
 src/Args.h               |  10 +-
 src/Background.h         |  15 +-
 src/Buffer.h             |  10 +-
 src/Context.h            |   2 +-
 src/Event.cpp            |   3 +-
 src/Event.h              |   2 +-
 src/FFTConfig.cpp        |  88 +++----
 src/FFTConfig.h          |  34 +--
 src/File.cpp             |   3 +-
 src/File.h               |  43 ++--
 src/Gpu.cpp              | 459 ++++++++++++++++++-----------------
 src/Gpu.h                |  35 +--
 src/Hash.h               |   2 +-
 src/Kernel.cpp           |   1 -
 src/Kernel.h             |   4 +-
 src/KernelCompiler.cpp   |  15 +-
 src/KernelCompiler.h     |   6 +-
 src/MD5.h                |   8 +-
 src/Primes.cpp           |   8 +-
 src/Primes.h             |  10 +-
 src/Profile.cpp          |   2 +-
 src/Profile.h            |   2 +-
 src/Proof.cpp            |  54 +++--
 src/Proof.h              |   6 +-
 src/Queue.cpp            |  18 +-
 src/Queue.h              |  12 +-
 src/Saver.cpp            |  53 ++--
 src/Saver.h              |   2 +-
 src/Sha3Hash.h           |   2 +-
 src/Signal.cpp           |   4 +-
 src/Task.cpp             |  37 +--
 src/TimeInfo.h           |   2 +-
 src/Trig.cpp             |   4 +-
 src/TrigBufCache.cpp     | 294 +++++++++++-----------
 src/TrigBufCache.h       |  27 ++-
 src/TuneEntry.cpp        |  10 +-
 src/TuneEntry.h          |   2 +-
 src/Worktodo.cpp         |  30 +--
 src/clwrap.cpp           |  71 +++---
 src/clwrap.h             |   4 +-
 src/common.cpp           |  14 +-
 src/common.h             |   2 +-
 src/cuda/clwrap_cuda.cpp | 167 +++++++------
 src/cuda/cudawrap.cpp    |  36 +--
 src/cuda/cudawrap.h      |  21 +-
 src/cuda/tinycuda.h      |  84 +++----
 src/fs.cpp               |   5 +-
 src/gpuid.cpp            |  11 +-
 src/log.cpp              |  10 +-
 src/main.cpp             |  13 +-
 src/md5.cpp              |  12 +-
 src/sha3.cpp             |   4 +-
 src/shared.h             |   4 +-
 src/state.cpp            |  21 +-
 src/timeutil.cpp         |   4 +-
 src/timeutil.h           |   4 +-
 src/tinycl.h             |  50 ++--
 src/tune.cpp             | 509 ++++++++++++++++++++-------------------
 61 files changed, 1201 insertions(+), 1201 deletions(-)

diff --git a/src/AllocTrac.cpp b/src/AllocTrac.cpp
index b951bcd8..1995b719 100644
--- a/src/AllocTrac.cpp
+++ b/src/AllocTrac.cpp
@@ -1,7 +1,6 @@
 // Copyright (C) Mihai Preda.
 
 #include "AllocTrac.h"
-#include <limits>
 
 std::atomic<size_t> AllocTrac::totalAlloc = 0;
 size_t AllocTrac::maxAlloc = size_t(15) * 1024 * 1024 * 1024; // 15 GB
diff --git a/src/AllocTrac.h b/src/AllocTrac.h
index 2bcedb4c..0c3169c4 100644
--- a/src/AllocTrac.h
+++ b/src/AllocTrac.h
@@ -36,8 +36,8 @@ class AllocTrac {
   AllocTrac(const AllocTrac&) = delete;
   void operator=(const AllocTrac&) = delete;
 
-  AllocTrac(AllocTrac&& rhs) : size(rhs.size) { rhs.size = 0; }
-  AllocTrac& operator=(AllocTrac&& rhs) {
+  AllocTrac(AllocTrac&& rhs)  noexcept : size(rhs.size) { rhs.size = 0; }
+  AllocTrac& operator=(AllocTrac&& rhs)  noexcept {
     AllocTrac tmp{std::move(rhs)};
     swap(*this, tmp);
     return *this;
diff --git a/src/Args.cpp b/src/Args.cpp
index b9084ba3..6e115a16 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -16,7 +16,7 @@
 #include <algorithm>
 
 // This is a copy of the args.verbose flag.  It allows the CUDA wrapper to access the flag.
-bool prpll_verbose = 0;
+bool prpll_verbose = false;
 
 int Args::value(const string& key, int valNotFound) const {
   auto it = flags.find(key);
@@ -52,7 +52,7 @@ vector<KeyVal> Args::splitArgLine(const string& inputLine) {
         ret.push_back({prev, {}});
         prev = s;
       } else {
-        ret.push_back({prev, s});
+        ret.emplace_back(prev, s);
         prev.clear();
       }
     }
@@ -67,14 +67,14 @@ vector<KeyVal> Args::splitArgLine(const string& inputLine) {
 // Splits a string of the form "Foo=bar,C,D=1" into key=value pairs, with value defaulting to "1".
 vector<KeyVal> Args::splitUses(string ss) { // pass by value is intentional
   vector<KeyVal> ret;
-  std::replace(ss.begin(), ss.end(), ',', ' ');
+  std::ranges::replace(ss, ',', ' ');
   std::istringstream iss{ss};
-  vector<string> uses{std::istream_iterator<std::string>{iss}, std::istream_iterator<std::string>{}};
+  vector<string> const uses{std::istream_iterator<std::string>{iss}, std::istream_iterator<std::string>{}};
   for (const string &s : uses) {
     auto pos = s.find('=');
-    string key = (pos == string::npos) ? s : s.substr(0, pos);
-    string val = (pos == string::npos) ? "1"s : s.substr(pos+1);
-    ret.push_back({key, val});
+    string const key = (pos == string::npos) ? s : s.substr(0, pos);
+    string const val = (pos == string::npos) ? "1"s : s.substr(pos+1);
+    ret.emplace_back(key, val);
   }
   return ret;
 }
@@ -96,7 +96,7 @@ u32 Args::getProofPow(u64 exponent) const {
 
 string Args::tailDir() const { return fs::path{dir}.filename().string(); }
 
-bool Args::hasFlag(const string& key) const { return flags.find(key) != flags.end(); }
+bool Args::hasFlag(const string& key) const { return flags.contains(key); }
 
 void Args::printHelp() {
   printf(R"(
@@ -223,7 +223,7 @@ Device selection : use one of -uid <UID>, -pci <BDF>, -device <N>, see the list
   }
   for (unsigned i = 0; i < deviceIds.size(); ++i) {
     cl_device_id id = deviceIds[i];
-    string bdf = getBdfFromDevice(id);
+    string const bdf = getBdfFromDevice(id);
     printf("%2u  : %7s | %16s | %-24s | %s | %s\n",
            i,
            bdf.c_str(),
@@ -242,7 +242,7 @@ Device selection : use one of -uid <UID>, -pci <BDF>, -device <N>, see the list
   u32 activeSize = 0;
   float maxBpw = 0;
   string variants;
-  for (enum FFT_TYPES type : {FFT64, FFT3161, FFT3261, FFT61}) {
+  for (enum FFT_TYPES const type : {FFT64, FFT3161, FFT3261, FFT61}) {
     for (auto c : configs) {
       if (c.fft_type != type) continue;
       if (c.size() != activeSize) {
@@ -273,8 +273,8 @@ void Args::parse(const string& line) {
     char fftBuf[32];
     char configBuf[256];
     sscanf(line.c_str(), "! %31s %255s", fftBuf, configBuf);
-    string fft = fftBuf;
-    string config = configBuf;
+    string const fft = fftBuf;
+    string const config = configBuf;
     perFftConfig[fft] = splitUses(config);
     return;
   }
@@ -288,10 +288,10 @@ void Args::parse(const string& line) {
     if (key == "-h" || key == "--help") {
       printHelp();
       throw "help";
-    } else if (key == "-version") {
+    } if (key == "-version") {
       // log("PRPLL %s\n", VERSION);
       throw "version";
-    } else if (key == "-info") {
+    } if (key == "-info") {
       if (s.empty()) {
         log("-info expects an FFT spec, e.g. -info 1K:13:256\n");
         throw "-info <fft>";
@@ -300,12 +300,12 @@ void Args::parse(const string& line) {
       for (const FFTShape& shape : FFTShape::multiSpec(s)) {
         for (u32 variant = 0; variant <= LAST_VARIANT; variant = next_variant (variant)) {
           if (variant != LAST_VARIANT && shape.fft_type != FFT64) continue;
-          FFTConfig fft{shape, variant, CARRY_AUTO};
+          FFTConfig const fft{shape, variant, CARRY_AUTO};
           log("%12s | %.2f | %5.1f\n", fft.spec().c_str(), fft.maxBpw(), fft.maxExp() / 1'000'000.0);
         }
       }
       throw "info";
-    } else if (key == "-od") {
+    } if (key == "-od") {
       double od = stod(s);
       fftOverdrive = 1 + od / 1000;
     } else if (key == "-roe") {
diff --git a/src/Args.h b/src/Args.h
index 99d3a87d..d876ce79 100644
--- a/src/Args.h
+++ b/src/Args.h
@@ -26,13 +26,13 @@ class Args {
 
   void parse(const string& line);
   void setDefaults();
-  bool uses(const std::string& key) const { return flags.find(key) != flags.end(); }
-  int value(const std::string& key, int valNotFound = -1) const;
+  [[nodiscard]] bool uses(const std::string& key) const { return flags.contains(key); }
+  [[nodiscard]] int value(const std::string& key, int valNotFound = -1) const;
   void readConfig(const fs::path& path);
-  u32 getProofPow(u64 exponent) const;
-  string tailDir() const;
+  [[nodiscard]] u32 getProofPow(u64 exponent) const;
+  [[nodiscard]] string tailDir() const;
 
-  bool hasFlag(const string& key) const;
+  [[nodiscard]] bool hasFlag(const string& key) const;
 
   bool silent;
   string user;
diff --git a/src/Background.h b/src/Background.h
index 96cbe804..c93bf17f 100644
--- a/src/Background.h
+++ b/src/Background.h
@@ -18,7 +18,7 @@ class Background {
   std::deque<std::function<void()> > tasks;
   std::mutex mut;
   std::condition_variable cond;
-  bool stopRequested;
+  bool stopRequested{false};
   std::jthread thread;
 
   void run() {
@@ -30,9 +30,8 @@ class Background {
         while (tasks.empty()) {
           if (stopRequested) {
             return;
-          } else {
-            cond.wait(lock);
-          }
+          }             cond.wait(lock);
+         
         }
         task = tasks.front();
       }
@@ -48,7 +47,7 @@ class Background {
       }
 
       {
-        std::unique_lock lock(mut);
+        std::unique_lock const lock(mut);
         assert(!tasks.empty());
         tasks.pop_front();
         if (tasks.size() == maxSize - 1 || tasks.empty()) { cond.notify_all(); }
@@ -59,12 +58,12 @@ class Background {
 public:
   Background(unsigned size = 2) :
     maxSize{size},
-    stopRequested(false),
+    
     thread{&Background::run, this} {
   }
 
   ~Background() {
-    std::lock_guard lock(mut);
+    std::scoped_lock const lock(mut);
     stopRequested = true;
     cond.notify_all();
   }
@@ -74,7 +73,7 @@ class Background {
     while (!tasks.empty()) { cond.wait(lock); }
   }
 
-  template<typename T> void operator()(T task) {
+  template<typename T> void operator()(const T& task) {
     std::unique_lock lock(mut);
     while (tasks.size() >= maxSize) {
       cond.wait(lock);
diff --git a/src/Buffer.h b/src/Buffer.h
index 4bd57c6d..8e76dca1 100644
--- a/src/Buffer.h
+++ b/src/Buffer.h
@@ -28,7 +28,7 @@ class Buffer {
   TimeInfo *tInfo;
 
   Buffer(cl_context context, TimeInfo *tInfo, Queue* queue, size_t size, unsigned flags, const T* ptr = nullptr)
-    : ptr{size == 0 ? NULL : makeBuf_(context, flags, size * sizeof(T), ptr)}
+    : ptr{size == 0 ? nullptr : makeBuf_(context, flags, size * sizeof(T), ptr)}
     , size{size}
     , allocTrac(size * sizeof(T))
     , queue{queue}
@@ -50,15 +50,15 @@ class Buffer {
   Buffer(TimeInfo *tInfo, Queue* queue, size_t size)
     : Buffer(queue->context->get(), tInfo, queue, size, CL_MEM_READ_WRITE /*| CL_MEM_HOST_NO_ACCESS*/) {}
 
-  Buffer(Buffer&& rhs) = default;
+  Buffer(Buffer&& rhs)  noexcept = default;
 
-  Buffer& operator=(Buffer&& rhs) {
+  Buffer& operator=(Buffer&& rhs)  noexcept {
     assert(size == rhs.size);
     std::swap(ptr, rhs.ptr);
     return *this;
   }
 
-  cl_mem get() const { return ptr.get(); }
+  [[nodiscard]] cl_mem get() const { return ptr.get(); }
 
   void read(T* out, size_t readSize) const {
     assert(readSize && readSize <= size);
@@ -69,7 +69,7 @@ class Buffer {
   void read(vector<T>& v) const { read(v.data(), v.size()); }
 
   // sync read
-  vector<T> read(size_t sizeOrFull = 0) const {
+  [[nodiscard]] vector<T> read(size_t sizeOrFull = 0) const {
     auto readSize = sizeOrFull ? sizeOrFull : size;
     vector<T> ret(readSize);
     read(ret);
diff --git a/src/Context.h b/src/Context.h
index 3f281061..ec14002d 100644
--- a/src/Context.h
+++ b/src/Context.h
@@ -11,5 +11,5 @@ class Context : public std::unique_ptr<cl_context> {
 public:
   explicit Context(cl_device_id id): unique_ptr<cl_context>{createContext(id)}, id{id} {}
   
-  cl_device_id deviceId() const { return id; }
+  [[nodiscard]] cl_device_id deviceId() const { return id; }
 };
diff --git a/src/Event.cpp b/src/Event.cpp
index f6098085..bd235177 100644
--- a/src/Event.cpp
+++ b/src/Event.cpp
@@ -4,6 +4,7 @@
 #include "TimeInfo.h"
 
 #include <cassert>
+#include <utility>
 
 Event::Event(EventHolder&& e, TimeInfo* tInfo) :
   event{std::move(e)},
@@ -13,7 +14,7 @@ Event::Event(EventHolder&& e, TimeInfo* tInfo) :
 }
 
 Event::~Event() {
-  [[maybe_unused]] bool done = isComplete();
+  [[maybe_unused]] bool const done = isComplete();
   assert(done);
 }
 
diff --git a/src/Event.h b/src/Event.h
index 98810a5b..479391a7 100644
--- a/src/Event.h
+++ b/src/Event.h
@@ -17,7 +17,7 @@ class Event {
   Event(Event&& oth) = default;
   ~Event();
 
-  cl_event get() const { return event.get(); }
+  [[nodiscard]] cl_event get() const { return event.get(); }
 
   bool isComplete();
   bool isRunning();
diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index dd0568a7..83603861 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -23,7 +23,7 @@ struct FftBpw {
   array<float, NUM_BPW_ENTRIES> bpw;
 };
 
-map<string, array<float, NUM_BPW_ENTRIES>> BPW {
+static map<string, array<float, NUM_BPW_ENTRIES>> BPW {
 #include "fftbpw.h"
 };
 
@@ -32,8 +32,8 @@ namespace {
 u32 parseInt(const string& s) {
   // if (s.empty()) { return 1; }
   assert(!s.empty());
-  char c = s.back();
-  u32 multiple = c == 'k' || c == 'K' ? 1024 : c == 'm' || c == 'M' ? 1024 * 1024 : 1;
+  char const c = s.back();
+  u32 const multiple = c == 'k' || c == 'K' ? 1024 : c == 'm' || c == 'M' ? 1024 * 1024 : 1;
   return u32(strtod(s.c_str(), nullptr) * multiple);
 }
 
@@ -59,18 +59,18 @@ vector<FFTShape> FFTShape::multiSpec(const string& iniSpec) {
     }
     assert(parts.size() <= 3);
     if (parts.size() == 3) {
-      u32 width = parseInt(parts[0]);
-      u32 middle = parseInt(parts[1]);
-      u32 height = parseInt(parts[2]);
-      ret.push_back({fft_type, width, middle, height});
+      u32 const width = parseInt(parts[0]);
+      u32 const middle = parseInt(parts[1]);
+      u32 const height = parseInt(parts[2]);
+      ret.emplace_back(fft_type, width, middle, height);
       continue;
     }
     assert(parts.size() == 1);
 
     parts = split(spec, '-');
-    assert(parts.size() >= 1 && parts.size() <= 2);
-    u32 sizeFrom = parseInt(parts[0]);
-    u32 sizeTo = parts.size() == 2 ? parseInt(parts[1]) : sizeFrom;
+    assert(!parts.empty() && parts.size() <= 2);
+    u32 const sizeFrom = parseInt(parts[0]);
+    u32 const sizeTo = parts.size() == 2 ? parseInt(parts[1]) : sizeFrom;
     auto shapes = allShapes(sizeFrom, sizeTo);
     if (shapes.empty()) {
       log("Could not find a FFT config for '%s'\n", spec.c_str());
@@ -83,21 +83,21 @@ vector<FFTShape> FFTShape::multiSpec(const string& iniSpec) {
 
 vector<FFTShape> FFTShape::allShapes(u32 sizeFrom, u32 sizeTo) {
   vector<FFTShape> configs;
-  for (enum FFT_TYPES type : {FFT64, FFT3161, FFT3261, FFT61, FFT323161}) {
-    for (u32 width : {256, 512, 1024, 4096}) {
-      for (u32 height : {256, 512, 1024}) {
+  for (enum FFT_TYPES const type : {FFT64, FFT3161, FFT3261, FFT61, FFT323161}) {
+    for (u32 const width : {256, 512, 1024, 4096}) {
+      for (u32 const height : {256, 512, 1024}) {
         if (width == 256 && height == 1024) { continue; } // Skip because we prefer width >= height
-        for (u32 middle : {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}) {
+        for (u32 const middle : {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}) {
           if (type != FFT64 && (middle & (middle - 1))) continue;   // Reject non-power-of-two NTTs
-          u32 sz = width * height * middle * 2;
+          u32 const sz = width * height * middle * 2;
           if (sizeFrom <= sz && sz <= sizeTo) {
-            configs.push_back({type, width, middle, height});
+            configs.emplace_back(type, width, middle, height);
           }
         }
       }
     }
   }
-  std::sort(configs.begin(), configs.end(),
+  std::ranges::sort(configs,
             [](const FFTShape &a, const FFTShape &b) {
               if (a.size() != b.size()) { return (a.size() < b.size()); }
               if (a.width != b.width) {
@@ -133,7 +133,7 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
   // Un-initialized shape, don't set BPW
   if (w == 1 && m == 1 && h == 1) { return; }
 
-  string s = spec();
+  string const s = spec();
   if (auto it = BPW.find(s); it != BPW.end()) {
     bpw = it->second;
   } else {
@@ -141,9 +141,9 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
       bpw = FFTShape{t, h, m, w}.bpw;
     } else {
       // Manipulate the shape into something that was likely pre-computed
-      u32 orig_w = w;
-      u32 orig_m = m;
-      u32 orig_h = h;
+      u32 const orig_w = w;
+      u32 const orig_m = m;
+      u32 const orig_h = h;
       while (m < 9) { m *= 2; w /= 2; }
       while (w >= 4*h) { w /= 2; h *= 2; }
       while (w < h || w < 256 || w == 2048) { w *= 2; h /= 2; }
@@ -217,9 +217,9 @@ FFTConfig::FFTConfig(const string& spec) {
 
   // Sanity check the spec
   if (v.size() >= 3) {
-    u32 w = parseInt(v[0]);
-    u32 m = parseInt(v[1]);
-    u32 h = parseInt(v[2]);
+    u32 const w = parseInt(v[0]);
+    u32 const m = parseInt(v[1]);
+    u32 const h = parseInt(v[2]);
     if (w != 256 && w != 512 && w != 1024 && w != 4096) {
       log("Width must be 256, 512, 1024, or 4096.\n");
       throw "Invalid FFT spec";
@@ -245,7 +245,7 @@ FFTConfig::FFTConfig(const string& spec) {
   } else if (v.size() == 4) {
     *this = {FFTShape{fft_type, v[0], v[1], v[2]}, parseInt(v[3]), CARRY_AUTO};
   } else if (v.size() == 5) {
-    int c = parseInt(v[4]);
+    int const c = parseInt(v[4]);
     assert(c == 0 || c == 1);
     *this = {FFTShape{fft_type, v[0], v[1], v[2]}, parseInt(v[3]), c == 0 ? CARRY_32 : CARRY_64};
   } else {
@@ -262,20 +262,20 @@ FFTConfig::FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry) :
   assert(variant_M(variant) < N_VARIANT_M);
   assert(variant_H(variant) < N_VARIANT_H);
 
-  if      (shape.fft_type == FFT64)     FFT_FP64 = 1, FFT_FP32 = 0, NTT_GF31 = 0, NTT_GF61 = 0, WordSize = 4;
-  else if (shape.fft_type == FFT3161)   FFT_FP64 = 0, FFT_FP32 = 0, NTT_GF31 = 1, NTT_GF61 = 1, WordSize = 8;
-  else if (shape.fft_type == FFT3261)   FFT_FP64 = 0, FFT_FP32 = 1, NTT_GF31 = 0, NTT_GF61 = 1, WordSize = 8;
-  else if (shape.fft_type == FFT61)     FFT_FP64 = 0, FFT_FP32 = 0, NTT_GF31 = 0, NTT_GF61 = 1, WordSize = 4;
-  else if (shape.fft_type == FFT323161) FFT_FP64 = 0, FFT_FP32 = 1, NTT_GF31 = 1, NTT_GF61 = 1, WordSize = 8;
-  else if (shape.fft_type == FFT3231)   FFT_FP64 = 0, FFT_FP32 = 1, NTT_GF31 = 1, NTT_GF61 = 0, WordSize = 4;
-  else if (shape.fft_type == FFT6431)   FFT_FP64 = 1, FFT_FP32 = 0, NTT_GF31 = 1, NTT_GF61 = 0, WordSize = 8;
-  else if (shape.fft_type == FFT31)     FFT_FP64 = 0, FFT_FP32 = 0, NTT_GF31 = 1, NTT_GF61 = 0, WordSize = 4;
-  else if (shape.fft_type == FFT32)     FFT_FP64 = 0, FFT_FP32 = 1, NTT_GF31 = 0, NTT_GF61 = 0, WordSize = 4;
+  if      (shape.fft_type == FFT64)     FFT_FP64 = true, FFT_FP32 = false, NTT_GF31 = false, NTT_GF61 = false, WordSize = 4;
+  else if (shape.fft_type == FFT3161)   FFT_FP64 = false, FFT_FP32 = false, NTT_GF31 = true, NTT_GF61 = true, WordSize = 8;
+  else if (shape.fft_type == FFT3261)   FFT_FP64 = false, FFT_FP32 = true, NTT_GF31 = false, NTT_GF61 = true, WordSize = 8;
+  else if (shape.fft_type == FFT61)     FFT_FP64 = false, FFT_FP32 = false, NTT_GF31 = false, NTT_GF61 = true, WordSize = 4;
+  else if (shape.fft_type == FFT323161) FFT_FP64 = false, FFT_FP32 = true, NTT_GF31 = true, NTT_GF61 = true, WordSize = 8;
+  else if (shape.fft_type == FFT3231)   FFT_FP64 = false, FFT_FP32 = true, NTT_GF31 = true, NTT_GF61 = false, WordSize = 4;
+  else if (shape.fft_type == FFT6431)   FFT_FP64 = true, FFT_FP32 = false, NTT_GF31 = true, NTT_GF61 = false, WordSize = 8;
+  else if (shape.fft_type == FFT31)     FFT_FP64 = false, FFT_FP32 = false, NTT_GF31 = true, NTT_GF61 = false, WordSize = 4;
+  else if (shape.fft_type == FFT32)     FFT_FP64 = false, FFT_FP32 = true, NTT_GF31 = false, NTT_GF61 = false, WordSize = 4;
   else throw "FFT type";
 }
 
 string FFTConfig::spec() const {
-  string s = shape.spec() + ":" + to_string(variant_W(variant)) + to_string(variant_M(variant)) + to_string(variant_H(variant));
+  string const s = shape.spec() + ":" + to_string(variant_W(variant)) + to_string(variant_M(variant)) + to_string(variant_H(variant));
   return carry == CARRY_AUTO ? s : (s + (carry == CARRY_32 ? ":0" : ":1"));
 }
 
@@ -289,8 +289,8 @@ float FFTConfig::maxBpw() const {
   }
   // Interpolate for the maximum bpw.  This might could be improved upon.  However, I doubt people will use these variants often.
   else {
-    float b1 = shape.bpw[variant_M(variant) * 3 + variant_W(variant)];
-    float b2 = shape.bpw[variant_M(variant) * 3 + variant_H(variant)];
+    float const b1 = shape.bpw[variant_M(variant) * 3 + variant_W(variant)];
+    float const b2 = shape.bpw[variant_M(variant) * 3 + variant_H(variant)];
     b = (b1 + b2) / 2.0f;
   }
   // Only some FFTs support both 32 and 64 bit carries.
@@ -308,7 +308,7 @@ FFTConfig FFTConfig::bestFit(const Args& args, u64 E, const string& spec) {
   }
 
   // No FFT-spec given, so choose from tune.txt the fastest FFT that can handle E
-  vector<TuneEntry> tunes = TuneEntry::readTuneFile(args);
+  vector<TuneEntry> const tunes = TuneEntry::readTuneFile(args);
   for (const TuneEntry& e : tunes) {
     // The first acceptable is the best as they're sorted by cost
     if (E <= e.fft.maxExp() * args.fftOverdrive) { return e.fft; }
@@ -318,7 +318,7 @@ FFTConfig FFTConfig::bestFit(const Args& args, u64 E, const string& spec) {
 
   // Take the first FFT that can handle E
   for (const FFTShape& shape : FFTShape::allShapes()) {
-    for (u32 v : {101, 202}) {
+    for (u32 const v : {101, 202}) {
       if (FFTConfig fft{shape, v, CARRY_AUTO}; fft.maxExp() * args.fftOverdrive >= E) { return fft; }
     }
   }
@@ -329,8 +329,8 @@ FFTConfig FFTConfig::bestFit(const Args& args, u64 E, const string& spec) {
 
 
 string numberK(u64 n) {
-  u32 K = 1024;
-  u32 M = K * K;
+  u32 const K = 1024;
+  u32 const M = K * K;
 
   if (n % M == 0) { return to_string(n / M) + 'M'; }
 
@@ -338,10 +338,10 @@ string numberK(u64 n) {
   if (n >= M && (n * u64(100)) % M == 0) {
     snprintf(buf, sizeof(buf), "%.2f", float(n) / M);
     return string(buf) + 'M';
-  } else if (n >= K) {
+  } if (n >= K) {
     snprintf(buf, sizeof(buf), "%g", float(n) / K);
     return string(buf) + 'K';
-  } else {
+  } 
     return to_string(n);
-  }
+ 
 }
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index e16d610a..5bc719e7 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -12,7 +12,9 @@
 
 // We pre-calculate the maximum BPW for a number of fft specs.  From these entries we can either look up or interpolate to get the
 // maximum BPW for all variants of an FFT spec.  The variants for which maximum bpw are precomputed are 000, 101, 202, 010, 111, 212.
-#define NUM_BPW_ENTRIES 6
+enum {
+NUM_BPW_ENTRIES = 6
+};
 
 class Args;
 
@@ -39,17 +41,17 @@ class FFTShape {
   FFTShape(enum FFT_TYPES t, const string& w, const string& m, const string& h);
   explicit FFTShape(const string& spec);
 
-  u32 size() const { return width * height * middle * 2; }
-  u32 nW() const { return (width == 1024 || width == 256 /*|| width == 4096*/) ? 4 : 8; }
-  u32 nH() const { return (height == 1024 || height == 256 /*|| height == 4096*/) ? 4 : 8; }
+  [[nodiscard]] u32 size() const { return width * height * middle * 2; }
+  [[nodiscard]] u32 nW() const { return (width == 1024 || width == 256 /*|| width == 4096*/) ? 4 : 8; }
+  [[nodiscard]] u32 nH() const { return (height == 1024 || height == 256 /*|| height == 4096*/) ? 4 : 8; }
 
-  float minBpw() const { return fft_type != FFT32 ? 3.0f : 1.0f; }
-  float maxBpw() const { return *max_element(bpw.begin(), bpw.end()); }
-  std::string spec() const { return (fft_type ? to_string(fft_type) + ':' : "") + numberK(width) + ':' + numberK(middle) + ':' + numberK(height); }
+  [[nodiscard]] float minBpw() const { return fft_type != FFT32 ? 3.0f : 1.0f; }
+  [[nodiscard]] float maxBpw() const { return *std::ranges::max_element(bpw); }
+  [[nodiscard]] std::string spec() const { return (fft_type ? to_string(fft_type) + ':' : "") + numberK(width) + ':' + numberK(middle) + ':' + numberK(height); }
 
-  float carry32BPW() const;
-  bool needsLargeCarry(u64 E) const;
-  bool isFavoredShape() const;
+  [[nodiscard]] float carry32BPW() const;
+  [[nodiscard]] bool needsLargeCarry(u64 E) const;
+  [[nodiscard]] bool isFavoredShape() const;
 };
 
 static const u32 N_VARIANT_W = 3;
@@ -82,17 +84,17 @@ struct FFTConfig {
   // Size (in bytes) of integer data passed to FFTs/NTTs on the GPU
   u32 WordSize;
 
-  FFTShape shape{};
+  FFTShape shape;
   u32 variant;
   enum CARRY_KIND carry;
 
   explicit FFTConfig(const string& spec);
   FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry);
 
-  std::string spec() const;
-  u64 size() const { return shape.size(); }
-  u64 maxExp()  const { return u64(maxBpw() * shape.size()); }
+  [[nodiscard]] std::string spec() const;
+  [[nodiscard]] u64 size() const { return shape.size(); }
+  [[nodiscard]] u64 maxExp()  const { return u64(maxBpw() * shape.size()); }
 
-  float minBpw() const { return shape.minBpw(); }
-  float maxBpw() const;
+  [[nodiscard]] float minBpw() const { return shape.minBpw(); }
+  [[nodiscard]] float maxBpw() const;
 };
diff --git a/src/File.cpp b/src/File.cpp
index 1360b3f3..56d258b1 100644
--- a/src/File.cpp
+++ b/src/File.cpp
@@ -3,6 +3,7 @@
 #include "File.h"
 #include <filesystem>
 #include <system_error>
+#include <utility>
 
 using namespace std;
 
@@ -40,7 +41,7 @@ i64 File::size(const fs::path &name) {
   return filesystem::file_size(name, dummy);
 }
 
-File& File::operator=(File&& other) {
+File& File::operator=(File&& other)  noexcept {
   assert(this != &other);
   this->~File();
   new (this) File(std::move(other));
diff --git a/src/File.h b/src/File.h
index 52b84d7c..fdc3e3ac 100644
--- a/src/File.h
+++ b/src/File.h
@@ -12,6 +12,7 @@
 #include <unistd.h>
 #endif
 #include <filesystem>
+#include <utility>
 #include <vector>
 #include <string>
 #include <optional>
@@ -20,7 +21,7 @@
 #include <io.h>
 #endif
 
-#if defined(__APPLE__)
+#ifdef __APPLE__
 #include <fcntl.h>
 #endif
 
@@ -67,7 +68,7 @@ class File {
 
   void datasync() {
     fflush(f);
-#if defined(_MSC_VER)
+#ifdef _MSC_VER
 // We'd really like to use FlushFileBuffers(h), but we do not have easy access to the Windows file handle.
 // We might could get that by getting the pathname and opening the file with native Windows routines.
 #elif defined(_WIN32) || defined(__WIN32__)
@@ -99,13 +100,13 @@ class File {
   
   static void append(const fs::path& name, std::string_view text) { File::openAppend(name).write(text); }
 
-  File() : f{}, readOnly{true} {}
+  File() :  readOnly{true} {}
 
-  File(FILE* f, const string& name) : f{f}, readOnly{false}, name{name} {}
+  File(FILE* f, string  name) : f{f}, readOnly{false}, name{std::move(name)} {}
   
-  File(File&& other) : f{other.f}, readOnly{other.readOnly}, name{other.name} { other.f = nullptr; }
+  File(File&& other)  noexcept : f{other.f}, readOnly{other.readOnly}, name{other.name} { other.f = nullptr; }
   
-  File& operator=(File&& other);
+  File& operator=(File&& other) noexcept ;
 
   File(const File& other) = delete;
   File& operator=(const File& other) = delete;
@@ -146,7 +147,7 @@ class File {
   }
   
   void seek(long offset, int whence = SEEK_SET) {
-    int ret = fseek(this->get(), offset, whence);
+    int const ret = fseek(this->get(), offset, whence);
     if (ret) { throw ReadError{name}; }
       // throw(std::ios_base::failure(("fseek: "s + to_string(ret)).c_str()));
   }
@@ -156,7 +157,7 @@ class File {
   int printf(const char *fmt, ...) const FORMAT_PRINTF(2, 3) {
     va_list va;
     va_start(va, fmt);
-    int ret = vfprintf(f, fmt, va);
+    int const ret = vfprintf(f, fmt, va);
     va_end(va);
 
 #if !HAS_LINEBUF
@@ -169,7 +170,7 @@ class File {
   int scanf(const char *fmt, ...) FORMAT_SCANF(2, 3) {
     va_list va;
     va_start(va, fmt);
-    int ret = vfscanf(f, fmt, va);
+    int const ret = vfscanf(f, fmt, va);
     va_end(va);
     return ret;
   }
@@ -179,10 +180,10 @@ class File {
   void write(string_view s) { write(s.data(), u32(s.size())); }
 
   operator bool() const { return f != nullptr; }
-  FILE* get() const { return f; }
+  [[nodiscard]] FILE* get() const { return f; }
 
-  long ftell() const {
-    long pos = ::ftell(this->get());
+  [[nodiscard]] long ftell() const {
+    long const pos = ::ftell(this->get());
     assert(pos >= 0);
     return pos;
   }
@@ -193,8 +194,8 @@ class File {
   }
   
   long size() {
-    long savePos = ftell();
-    long retSize = seekEnd();
+    long const savePos = ftell();
+    long const retSize = seekEnd();
     seek(savePos);
     return retSize;
   }
@@ -205,7 +206,7 @@ class File {
   std::string readLine() {
     char buf[1024];
     buf[0] = 0;
-    bool ok = fgets(buf, sizeof(buf), this->get());
+    bool const ok = fgets(buf, sizeof(buf), this->get());
     if (!ok) { return ""; }  // EOF or error
     string line = buf;
     if (line.empty() || line.back() != '\n') {
@@ -222,7 +223,7 @@ class File {
   }
 
   template<typename T>
-  std::vector<T> read(u32 nWords) const {
+  [[nodiscard]] [[nodiscard]] std::vector<T> read(u32 nWords) const {
     vector<T> ret;
     ret.resize(nWords);
     read(ret.data(), nWords * sizeof(T));
@@ -230,8 +231,8 @@ class File {
   }
 
   template<typename T>
-  std::vector<T> readChecked(u32 nWords) const {
-    u32 expectedCRC = read<u32>(1)[0];
+  [[nodiscard]] std::vector<T> readChecked(u32 nWords) const {
+    u32 const expectedCRC = read<u32>(1)[0];
     return readWithCRC<T>(nWords, expectedCRC);
   }
 
@@ -242,7 +243,7 @@ class File {
   }
 
   template<typename T>
-  std::vector<T> readWithCRC(u32 nWords, u32 crc) const {
+  [[nodiscard]] std::vector<T> readWithCRC(u32 nWords, u32 crc) const {
     auto data = read<T>(nWords);
     if (crc != crc32(data)) {
       log("File '%s' : CRC: expected %u, actual %u\n", name.c_str(), crc, crc32(data));
@@ -253,7 +254,7 @@ class File {
 
   std::vector<u32> readBytesLE(u32 nBytes) {
     assert(nBytes > 0);
-    u32 nWords = (nBytes - 1) / 4 + 1;
+    u32 const nWords = (nBytes - 1) / 4 + 1;
     vector<u32> data(nWords);
     read(data.data(), nBytes);
     return data;
@@ -262,7 +263,7 @@ class File {
   u32 readUpTo(void* data, u32 nUpToBytes) { return u32(fread(data, 1, nUpToBytes, this->get())); }
 
   string readAll() {
-    u32 sz = u32(size());
+    u32 const sz = u32(size());
     return {read<char>(sz).data(), sz};
   }
 };
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index f16fe0e9..fd63bdde 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -18,16 +18,16 @@
 #include "Sha3Hash.h"
 
 #include <algorithm>
-#include <bitset>
 #include <limits>
 #include <iomanip>
 #include <array>
 #include <cinttypes>
 #include <cstring>
-#include <cinttypes>
 
 #define _USE_MATH_DEFINES
 #include <cmath>
+#include <ranges>
+#include <utility>
 
 #ifndef M_PIl
 #define M_PIl 3.141592653589793238462643383279502884L
@@ -45,7 +45,9 @@
 #define M_LN2 0.69314718055994530941723212145818
 #endif
 
-#define CARRY_LEN 8
+enum {
+CARRY_LEN = 8
+};
 
 namespace {
 
@@ -87,8 +89,8 @@ float invWeightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
 }
 
 Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
-  u32 N = 2u * W * H;
-  u32 groupWidth = W / nW;
+  u32 const N = 2u * W * H;
+  u32 const groupWidth = W / nW;
 
   vector<double> weightsConstIF;
   vector<double> weightsIF;
@@ -162,7 +164,7 @@ Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
     memcpy((double *) weightsConstIF.data(), weightsConstIF32.data(), weightsConstIF32.size() * sizeof(float));
   }
 
-  return Weights{weightsConstIF, weightsIF};
+  return Weights{.weightsConstIF=weightsConstIF, .weightsIF=weightsIF};
 }
 
 string toLiteral(i32 value) { return to_string(value); }
@@ -217,7 +219,7 @@ string toLiteral(const string& s) { return s; }
 [[maybe_unused]] string toLiteral(ulong2 cs) { return "U2("s + toLiteral(cs.first) + ',' + toLiteral(cs.second) + ')'; }
 
 template<typename T>
-string toDefine(const string& k, T v) { return " -D"s + k + '=' + toLiteral(v); }
+string toDefine(const string& k, const T& v) { return " -D"s + k + '=' + toLiteral(v); }
 
 template<typename T>
 string toDefine(const T& vect) {
@@ -248,14 +250,14 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   }
 
   // Default value for -use options that must also be parsed in C++ code
-  tail_single_wide = 0, tail_single_kernel = 1;         // Default tailSquare is double-wide in one kernel
+  tail_single_wide = false, tail_single_kernel = true;         // Default tailSquare is double-wide in one kernel
   in_place = 0;                                         // Default is not in-place
   wmul = 2;                                             // Default is carryFused processes two lines at a time
   pad_size = isAmdGpu(id) ? 256 : 0;                    // Default is 256 bytes for AMD, 0 for others
 
   // Validate -use options
   for (const auto& [k, v] : config) {
-    bool isValid = isInList(k, {
+    bool const isValid = isInList(k, {
                               "FAST_BARRIER",
                               "STATS",
                               "IN_SIZEX",
@@ -295,10 +297,10 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
 
     // Some -use options are needed in both OpenCL code and C++ initialization code
     if (k == "TAIL_KERNELS") {
-      if (atoi(v.c_str()) == 0) tail_single_wide = 1, tail_single_kernel = 1;
-      if (atoi(v.c_str()) == 1) tail_single_wide = 1, tail_single_kernel = 0;
-      if (atoi(v.c_str()) == 2) tail_single_wide = 0, tail_single_kernel = 1;
-      if (atoi(v.c_str()) == 3) tail_single_wide = 0, tail_single_kernel = 0;
+      if (atoi(v.c_str()) == 0) tail_single_wide = true, tail_single_kernel = true;
+      if (atoi(v.c_str()) == 1) tail_single_wide = true, tail_single_kernel = false;
+      if (atoi(v.c_str()) == 2) tail_single_wide = false, tail_single_kernel = true;
+      if (atoi(v.c_str()) == 3) tail_single_wide = false, tail_single_kernel = false;
     }
     if (k == "INPLACE") in_place = atoi(v.c_str());
     if (k == "WMUL") wmul = atoi(v.c_str());
@@ -308,7 +310,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   // Maximum WMUL is 32KB / (WIDTH * SHUFL_BYTES_W).  If using the 32KB maximum, LDS padding must be disabled.
   // Furthermore, I've seen the CUDA compiler refuse to create a kernel with 1024 threads.  Thus, we limit WMUL to 2 for a 1K width and to 1 for a 4K width.
   {
-    u32 shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
+    u32 const shufl_bytes_w = args.value("SHUFL_BYTES_W", 8);
     u32 max_wmul = 32768 / (fft.shape.width * shufl_bytes_w);
     if (max_wmul > 2 && fft.shape.width >= 1024) max_wmul = 2;
     if (max_wmul > 1 && fft.shape.width >= 4096) max_wmul = 1;
@@ -345,7 +347,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
     defines += toDefine("CARRY64", 1);
   }
 
-  u32 N = fft.shape.size();
+  u32 const N = fft.shape.size();
   defines += toDefine("FFT_VARIANT", fft.variant);
   defines += toDefine("MAXBPW", (u32)(fft.maxBpw() * 100.0f));
 
@@ -355,7 +357,7 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
     if (fft.FFT_FP64) defines += toDefine("TAILT", root1Fancy(fft.shape.height * 2, 1));
     else defines += toDefine("TAILT", root1FancyFP32(fft.shape.height * 2, 1));
 
-    TrigCoefs coefs = trigCoefs(fft.shape.size() / 4);
+    TrigCoefs const coefs = trigCoefs(fft.shape.size() / 4);
     defines += toDefine("TRIG_SCALE", int(coefs.scale));
     defines += toDefine("TRIG_SIN",  coefs.sinCoefs);
     defines += toDefine("TRIG_COS",  coefs.cosCoefs);
@@ -431,8 +433,8 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
   }
 
   // Calculate fractional bits-per-word = (E % N) / N * 2^64
-  u32 bpw_hi = (u64(E % N) << 32) / N;
-  u32 bpw_lo = (((u64(E % N) << 32) % N) << 32) / N;
+  u32 const bpw_hi = (u64(E % N) << 32) / N;
+  u32 const bpw_lo = (((u64(E % N) << 32) % N) << 32) / N;
   u64 bpw = (u64(bpw_hi) << 32) + bpw_lo;
   bpw--; // bpw must not be an exact value -- it must be less than exact value to get last biglit value right
   defines += toDefine("FRAC_BPW_HI", (u32) (bpw >> 32));
@@ -465,16 +467,16 @@ RoeInfo roeStat(const vector<float>& roe) {
   double maxRoe = 0;
 
   for (auto xf : roe) {
-    double x = xf;
+    double const x = xf;
     assert(x >= 0);
     maxRoe = max(x, maxRoe);
     sumRoe  += x;
     sum2Roe += x * x;
   }
-  u32 n = roe.size();
+  u32 const n = roe.size();
 
-  double sdRoe = sqrt(n * sum2Roe - sumRoe * sumRoe) / n;
-  double meanRoe = sumRoe / n;
+  double const sdRoe = sqrt(n * sum2Roe - sumRoe * sumRoe) / n;
+  double const meanRoe = sumRoe / n;
 
   return {n, maxRoe, meanRoe, sdRoe};
 }
@@ -487,9 +489,9 @@ class IterationTimer {
   explicit IterationTimer(u64 kStart) : kStart(kStart) { }
 
   float reset(u64 k) {
-    float secs = timer.reset();
+    float const secs = timer.reset();
 
-    u64 its = max(u64(1), k - kStart);
+    u64 const its = max(u64(1), k - kStart);
     kStart = k;
     return secs / its;
   }
@@ -508,7 +510,7 @@ u32 baseCheckStep(u32 blockSize) {
 }
 
 u32 checkStepForErrors(u32 blockSize, u32 nErrors) {
-  u32 step = baseCheckStep(blockSize);
+  u32 const step = baseCheckStep(blockSize);
   return nErrors ? step / 2 : step;
 }
 
@@ -528,7 +530,7 @@ string toHex(const vector<u32>& v) {
 
 string formatSecsPerIter(float secsPerIter) {
   char buf[64];
-  float usecsPerIter = secsPerIter * 1.0e6f;    // Convert to micro-seconds
+  float const usecsPerIter = secsPerIter * 1.0e6f;    // Convert to micro-seconds
   if (usecsPerIter > 1000.0f) {
     snprintf(buf, sizeof(buf), "%4.0f", usecsPerIter);
   } else {
@@ -686,7 +688,7 @@ string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
     break;
   }
   // Get the optional override register count
-  int override_regs = args.value(use_override, 0);
+  int const override_regs = args.value(use_override, 0);
   // If a specified override is small, use the count as a CUDA launch_bounds rather than a maximum register count
   if (override_regs && (override_regs > 0 && override_regs <= 16)) return string("-DCUDA_MIN_BLOCKS=") + to_string(override_regs) + " ";
   // If specified, override the default maximum register count
@@ -734,8 +736,10 @@ string Gpu::kernelDefines(enum WHICH_KERNEL_TYPE which_kernel) {
   return defines + " ";
 }
 
-#define ROE_SIZE 100000
-#define CARRY_SIZE 100000
+enum {
+ROE_SIZE = 100000,
+CARRY_SIZE = 100000
+};
 
 Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
   shared(s),
@@ -752,63 +756,63 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   nH(fft.shape.nH()),
   useLongCarry{args.carry == CARRY_64},
   queue{*shared.context, args.profile},
-  auxQueues{},    
+      
   compiler{args, shared.context, clDefines(args, shared.context->deviceId(), fft, extraConf, E, logFftSize, tail_single_wide, tail_single_kernel, in_place, pad_size, wmul)},
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), &queue, __VA_ARGS__)
 
-  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), (kernelDefines(KFP) + numCudaRegisters(MIDIN)).c_str()),
-  K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH, kernelDefines(KFP).c_str()),
-  K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2, kernelDefines(KFP).c_str()),
+  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numCudaRegisters(MIDIN)),
+  K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH, kernelDefines(KFP)),
+  K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2, kernelDefines(KFP)),
   K(ktailSquare,           "tailsquare.cl", "tailSquare",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, (kernelDefines(KFP) + numCudaRegisters(TAIL)).c_str()),    // Single-wide tailSquare with one kernel
-  K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP).c_str()),
-  K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, (kernelDefines(KFP) + "-DMUL_LOW=1").c_str()),
-  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), (kernelDefines(KFP) + numCudaRegisters(MIDOUT)).c_str()),
-  K(kfftW,                 "fftw.cl", "fftW", hN / nW, kernelDefines(KFP).c_str()),
-
-  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), (kernelDefines(K31) + numCudaRegisters(MIDIN31)).c_str()),
-  K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH, kernelDefines(K31).c_str()),
-  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, kernelDefines(K31).c_str()),
+                                               hN / nH / 2, kernelDefines(KFP) + numCudaRegisters(TAIL)),    // Single-wide tailSquare with one kernel
+  K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP)),
+  K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP) + "-DMUL_LOW=1"),
+  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numCudaRegisters(MIDOUT)),
+  K(kfftW,                 "fftw.cl", "fftW", hN / nW, kernelDefines(KFP)),
+
+  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), kernelDefines(K31) + numCudaRegisters(MIDIN31)),
+  K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH, kernelDefines(K31)),
+  K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, kernelDefines(K31)),
   K(ktailSquareGF31,       "tailsquare.cl", "tailSquareGF31",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, (kernelDefines(K31) + numCudaRegisters(TAIL31)).c_str()),  // Single-wide tailSquare with one kernel
-  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31).c_str()),
-  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, (kernelDefines(K31) + "-DMUL_LOW=1").c_str()),
-  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), (kernelDefines(K31) + numCudaRegisters(MIDOUT31)).c_str()),
-  K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW, kernelDefines(K31).c_str()),
-
-  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), (kernelDefines(K61) + numCudaRegisters(MIDIN61)).c_str()),
-  K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH, kernelDefines(K61).c_str()),
-  K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2, kernelDefines(K61).c_str()),
+                                               hN / nH / 2, kernelDefines(K31) + numCudaRegisters(TAIL31)),  // Single-wide tailSquare with one kernel
+  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31)),
+  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31) + "-DMUL_LOW=1"),
+  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), kernelDefines(K31) + numCudaRegisters(MIDOUT31)),
+  K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW, kernelDefines(K31)),
+
+  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), kernelDefines(K61) + numCudaRegisters(MIDIN61)),
+  K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH, kernelDefines(K61)),
+  K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2, kernelDefines(K61)),
   K(ktailSquareGF61,       "tailsquare.cl", "tailSquareGF61",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, (kernelDefines(K61) + numCudaRegisters(TAIL61)).c_str()),  // Single-wide tailSquare with one kernel
-  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61).c_str()),
-  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, (kernelDefines(K61) + "-DMUL_LOW=1").c_str()),
-  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), (kernelDefines(K61) + numCudaRegisters(MIDOUT61)).c_str()),
-  K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW, kernelDefines(K61).c_str()),
-
-  K(kfftP,                 "fftp.cl", "fftP", hN / nW, kernelDefines(KALL).c_str()),
-  K(kCarryA,               "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL).c_str()),
-  K(kCarryAROE,            "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DROE=1").c_str()),
-  K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DMUL3=1").c_str()),
-  K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DMUL3=1 -DROE=1").c_str()),
-  K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, (kernelDefines(KALL) + "-DLL=1").c_str()),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED)).c_str()),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DROE=1").c_str()),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1").c_str()),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1").c_str()),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, (kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DLL=1").c_str()),
-
-  K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN, kernelDefines(KALL).c_str()),
+                                               hN / nH / 2, kernelDefines(K61) + numCudaRegisters(TAIL61)),  // Single-wide tailSquare with one kernel
+  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61)),
+  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61) + "-DMUL_LOW=1"),
+  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), kernelDefines(K61) + numCudaRegisters(MIDOUT61)),
+  K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW, kernelDefines(K61)),
+
+  K(kfftP,                 "fftp.cl", "fftP", hN / nW, kernelDefines(KALL)),
+  K(kCarryA,               "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL)),
+  K(kCarryAROE,            "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DROE=1"),
+  K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DMUL3=1"),
+  K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DMUL3=1 -DROE=1"),
+  K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DLL=1"),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED)),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DROE=1"),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1"),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1"),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DLL=1"),
+
+  K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN, kernelDefines(KALL)),
 
   // 64
   K(transpIn,  "transpose.cl", "transposeIn",  hN / 64),
@@ -859,13 +863,11 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
 #undef BUF
 
   statsBits{u32(args.value("STATS", 0))},
-  timeBufVect{profile.make("proofBufVect")},
-
-  recorded_kernels{},
-  recorded_kernel_args{}
+  timeBufVect{profile.make("proofBufVect")}
+  
 {    
 
-  float bitsPerWord = E / float(N);
+  float const bitsPerWord = E / float(N);
   if (logFftSize) {
     log("FFT: %s %s (%.2f bpw)\n", numberK(N).c_str(), fft.spec().c_str(), bitsPerWord);
 
@@ -969,20 +971,20 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
 // If the L2 cache is large enough so that all FFT data fits in the cache, this ought to be a win.
 // If the L2 cache is small enough such that L2 cache hits are very low anyway, this might be a win.
 
-void Gpu::splitQueue(void) {
+void Gpu::splitQueue() {
 
   // If MULTI_Q -use not set, return
   if (!args.value("MULTI_Q", 0)) return;
 
   // Create aux queues.  For now, we only have one auxiliary queue.  We could do more.
-  if (auxQueues.size() == 0) {
-    auxQueues.push_back(Queue{*shared.context, args.profile, true});
+  if (auxQueues.empty()) {
+    auxQueues.emplace_back(*shared.context, args.profile, true);
   }
 
   // Queue a sync event in the main queue.  Have all auxiliary queues wait on the event.
   EventHolder event = queue.createSyncEvent();
-  for (size_t i = 0; i < auxQueues.size(); ++i) {
-    auxQueues[i].waitForSyncEvent(&event);
+  for (auto & auxQueue : auxQueues) {
+    auxQueue.waitForSyncEvent(&event);
   }
 
   // Assign kernels to running on the main queue or an auxiliary queue
@@ -1036,14 +1038,14 @@ void Gpu::splitQueue(void) {
   }
 }
 
-void Gpu::mergeQueue(void) {
+void Gpu::mergeQueue() {
 
   // If MULTI_Q -use not set, return
   if (!args.value("MULTI_Q", 0)) return;
 
   // Queue a sync event in each auxiliary queue(s).  Wait on the event(s) in the main queue.
-  for (size_t i = 0; i < auxQueues.size(); ++i) {
-    EventHolder event = auxQueues[i].createSyncEvent();
+  for (auto & auxQueue : auxQueues) {
+    EventHolder event = auxQueue.createSyncEvent();
     queue.waitForSyncEvent(&event);
   }
 
@@ -1083,7 +1085,7 @@ void Gpu::mergeQueue(void) {
 
 // Replay the recorded bottom half kernels in a cache friendly order.  We support several
 // options here using multiple openCl command queues.
-void Gpu::replay(void) {
+void Gpu::replay() {
 
   // If using multiple command queues, handle that now.
   splitQueue();
@@ -1102,28 +1104,28 @@ void Gpu::replay(void) {
 
       // Call the appropriate kernel
       if (kern == KMIDIN) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
+        Buffer<double>  const*buf = recorded_kernel_args[arg++];
         // If not in place, the input is from the scratch buffer
-        Buffer<double> *in = in_place ? buf : &buf3;
-        Buffer<double> *out = buf;
+        Buffer<double>  const*in = in_place ? buf : &buf3;
+        Buffer<double>  const*out = buf;
         if (cache_group == 1) kfftMidIn(*out, *in);
         if (cache_group == 2) kfftMidInGF31(*out, *in);
         if (cache_group == 3) kfftMidInGF61(*out, *in);
       }
 
       if (kern == KFFTHIN) {
-        Buffer<double> *out = recorded_kernel_args[arg++];
-        Buffer<double> *in = recorded_kernel_args[arg++];
+        Buffer<double>  const*out = recorded_kernel_args[arg++];
+        Buffer<double>  const*in = recorded_kernel_args[arg++];
         if (cache_group == 1) kfftHin(*out, *in);
         if (cache_group == 2) kfftHinGF31(*out, *in);
         if (cache_group == 3) kfftHinGF61(*out, *in);
       }
 
       if (kern == KTAILSQUARE) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
+        Buffer<double>  const*buf = recorded_kernel_args[arg++];
         // If not in place, the output is to the scratch buffer
-        Buffer<double> *in = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
+        Buffer<double>  const*in = buf;
+        Buffer<double>  const*out = in_place ? buf : &buf3;
         if (!tail_single_kernel) {
           if (cache_group == 1) ktailSquareZero(*out, *in);
           if (cache_group == 2) ktailSquareZeroGF31(*out, *in);
@@ -1135,40 +1137,40 @@ void Gpu::replay(void) {
       }
 
       if (kern == KTAILMUL) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        Buffer<double> *in2 = recorded_kernel_args[arg++];
+        Buffer<double>  const*buf = recorded_kernel_args[arg++];
+        Buffer<double>  const*in2 = recorded_kernel_args[arg++];
         // If not in place, the output is to the scratch buffer
-        Buffer<double> *in1 = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
+        Buffer<double>  const*in1 = buf;
+        Buffer<double>  const*out = in_place ? buf : &buf3;
         if (cache_group == 1) ktailMul(*out, *in1, *in2);
         if (cache_group == 2) ktailMulGF31(*out, *in1, *in2);
         if (cache_group == 3) ktailMulGF61(*out, *in1, *in2);
       }
 
       if (kern == KTAILMULLOW) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        Buffer<double> *in2 = recorded_kernel_args[arg++];
+        Buffer<double>  const*buf = recorded_kernel_args[arg++];
+        Buffer<double>  const*in2 = recorded_kernel_args[arg++];
         // If not in place, the output is to the scratch buffer
-        Buffer<double> *in1 = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
+        Buffer<double>  const*in1 = buf;
+        Buffer<double>  const*out = in_place ? buf : &buf3;
         if (cache_group == 1) ktailMulLow(*out, *in1, *in2);
         if (cache_group == 2) ktailMulLowGF31(*out, *in1, *in2);
         if (cache_group == 3) ktailMulLowGF61(*out, *in1, *in2);
       }
 
       if (kern == KMIDOUT) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
+        Buffer<double>  const*buf = recorded_kernel_args[arg++];
         // If not in place, the input is from the scratch buffer
-        Buffer<double> *in = in_place ? buf : &buf3;
-        Buffer<double> *out = buf;
+        Buffer<double>  const*in = in_place ? buf : &buf3;
+        Buffer<double>  const*out = buf;
         if (cache_group == 1) kfftMidOut(*out, *in);
         if (cache_group == 2) kfftMidOutGF31(*out, *in);
         if (cache_group == 3) kfftMidOutGF61(*out, *in);
       }
 
       if (kern == KFFTW) {
-        Buffer<double> *out = recorded_kernel_args[arg++];
-        Buffer<double> *in = recorded_kernel_args[arg++];
+        Buffer<double>  const*out = recorded_kernel_args[arg++];
+        Buffer<double>  const*in = recorded_kernel_args[arg++];
         if (cache_group == 1) kfftW(*out, *in);
         if (cache_group == 2) kfftWGF31(*out, *in);
         if (cache_group == 3) kfftWGF61(*out, *in);
@@ -1188,7 +1190,7 @@ void Gpu::replay(void) {
 
 void Gpu::fftP(Buffer<double>& buf, Buffer<Word>& in) {
   // If not in place, instead write the output to the scratch buffer
-  Buffer<double> *out = in_place ? &buf : &buf3;
+  Buffer<double>  const*out = in_place ? &buf : &buf3;
   kfftP(*out, in);
 }
 
@@ -1261,8 +1263,8 @@ void Gpu::carryFused(Buffer<double>& buf) {
   replay();
   assert(roePos <= ROE_SIZE);
   // Like fftP, if not in place write the output to the scratch buffer
-  Buffer<double> *in = &buf;
-  Buffer<double> *out = in_place ? &buf : &buf3;
+  Buffer<double>  const*in = &buf;
+  Buffer<double>  const*out = in_place ? &buf : &buf3;
   roePos < wantROE ? kCarryFusedROE(*out, *in, roePos++)
                    : kCarryFused(*out, *in, updateCarryPos(1 << 0));
 }
@@ -1272,8 +1274,8 @@ void Gpu::carryFusedMul(Buffer<double>& buf) {
   replay();
   assert(roePos <= ROE_SIZE);
   // Like fftP, if not in place write the output to the scratch buffer
-  Buffer<double> *in = &buf;
-  Buffer<double> *out = in_place ? &buf : &buf3;
+  Buffer<double>  const*in = &buf;
+  Buffer<double>  const*out = in_place ? &buf : &buf3;
   roePos < wantROE ? kCarryFusedMulROE(*out, *in, roePos++)
                    : kCarryFusedMul(*out, *in, updateCarryPos(1 << 1));
 }
@@ -1282,8 +1284,8 @@ void Gpu::carryFusedLL(Buffer<double>& buf) {
   // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
   replay();
   // Like fftP, if not in place write the output to the scratch buffer
-  Buffer<double> *in = &buf;
-  Buffer<double> *out = in_place ? &buf : &buf3;
+  Buffer<double>  const*in = &buf;
+  Buffer<double>  const*out = in_place ? &buf : &buf3;
   kCarryFusedLL(*out, *in, updateCarryPos(1 << 0));
 }
 
@@ -1316,29 +1318,30 @@ u32 Gpu::updateCarryPos(u32 bit) {
 
 vector<Buffer<Word>> Gpu::makeBufVector(u32 size) {
   vector<Buffer<Word>> r;
-  for (u32 i = 0; i < size; ++i) { r.emplace_back(timeBufVect, &queue, N); }
+  r.reserve(size);
+for (u32 i = 0; i < size; ++i) { r.emplace_back(timeBufVect, &queue, N); }
   return r;
 }
 
 pair<RoeInfo, RoeInfo> Gpu::readROE() {
   assert(roePos <= ROE_SIZE);
   if (roePos) {
-    vector<float> roe = bufROE.read(roePos);
+    vector<float> const roe = bufROE.read(roePos);
     assert(roe.size() == roePos);
     bufROE.zero(roePos);
     roePos = 0;
     auto [squareRoe, mulRoe] = split(roe, mulRoePos);
     mulRoePos.clear();
     return {roeStat(squareRoe), roeStat(mulRoe)};
-  } else {
+  } 
     return {};
-  }
+ 
 }
 
 RoeInfo Gpu::readCarryStats() {
   assert(carryPos <= CARRY_SIZE);
   if (carryPos == 0) { return {}; }
-  vector<float> carry = bufStatsCarry.read(carryPos);
+  vector<float> const carry = bufStatsCarry.read(carryPos);
   assert(carry.size() == carryPos);
   bufStatsCarry.zero(carryPos);
   carryPos = 0;
@@ -1384,7 +1387,7 @@ vector<Word> Gpu::readChecked(Buffer<Word>& buf) {
     u64 hostSum = 0;
     for (auto it = data.begin(), end = data.end(); it < end; ++it) hostSum += u64(*it);
 
-    u64 gpuSum = expectedVect[0];
+    u64 const gpuSum = expectedVect[0];
     if (hostSum == gpuSum) {
       // A buffer containing all-zero is exceptional, so mark that through the empty vector.
       if (gpuSum == 0 && isAllZero(data)) {
@@ -1479,10 +1482,10 @@ void Gpu::logTimeKernels() {
 
   string s = "Profile:\n";
   for (const TimeInfo* p : prof) {
-    u32 n = p->n;
+    u32 const n = p->n;
     assert(n);
-    double f = 1e-3 / n;
-    double percent = 100.0 / total * p->times[2];
+    double const f = 1e-3 / n;
+    double const percent = 100.0 / total * p->times[2];
     if (!args.verbose && percent < 0.2) { break; }
     snprintf(buf, sizeof(buf),
              args.verbose ? "%s %5.2f%% %-11s : %6.0f us/call x %5d calls  (%.3f %.0f)\n"
@@ -1512,7 +1515,7 @@ vector<Word> Gpu::readWords(Buffer<Word> &buf) {
 
 void Gpu::writeWords(Buffer<Word>& buf, vector<Word> &words) {
   // GPU is expecting either 4-byte or 8-byte integers.  C++ code is using 8-byte integers.  Handle the "no conversion" case.
-  if (fft.WordSize == 8) buf.write(std::move(words));
+  if (fft.WordSize == 8) buf.write(words);
   // Convert 64-bit C++ Words into 32-bit GPU Words
   else {
     vector<Word> GPUdata;
@@ -1521,7 +1524,7 @@ void Gpu::writeWords(Buffer<Word>& buf, vector<Word> &words) {
     for (u32 i = 0; i < words.size(); i += 2) {
       GPUdata[i/2] = ((i64) words[i+1] << 32) | (u32) words[i];
     }
-    buf.write(std::move(GPUdata));
+    buf.write(GPUdata);
   }
 }
 
@@ -1538,19 +1541,19 @@ void Gpu::writeIn(Buffer<Word>& buf, vector<Word>&& words) {
 }
 
 Words Gpu::expExp2(const Words& A, u32 n) {
-  u32 logStep   = 10000;
-  u32 blockSize = 100;
+  u32 const logStep   = 10000;
+  u32 const blockSize = 100;
   
-  writeIn(bufData, std::move(A));
+  writeIn(bufData, A);
   IterationTimer timer{0};
   u32 k = 0;
   while (k < n) {
-    u32 its = std::min(blockSize, n - k);
+    u32 const its = std::min(blockSize, n - k);
     squareLoop(bufData, 0, its);
     k += its;
     queue.finish();
     if (k % logStep == 0) {
-      float secsPerIt = timer.reset(k);
+      float const secsPerIt = timer.reset(k);
       log("%u / %u, %s us/it\n", k, n, formatSecsPerIter(secsPerIt).c_str());
     }
   }
@@ -1583,7 +1586,7 @@ void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp) {
     fftP(buf1, bufInOut);
     fftMidIn(buf1);
     fftHin(buf2, buf1); // save fully FFTed "base" to buf2
-    bool midInAlreadyDone = 1;
+    bool midInAlreadyDone = true;
 
     int p = 63;
     while (!testBit(exp, p)) { --p; }
@@ -1592,7 +1595,7 @@ void Gpu::exponentiate(Buffer<Word>& bufInOut, u64 exp) {
       if (!midInAlreadyDone) fftMidIn(buf1);
       tailSquare(buf1);
       fftMidOut(buf1);
-      midInAlreadyDone = 0;
+      midInAlreadyDone = false;
 
       if (testBit(exp, p)) {
         doCarry(buf1, bufInOut);
@@ -1670,7 +1673,7 @@ u32 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool
   assert(from < to);
   enum LEAD_TYPE leadIn = LEAD_NONE;
   for (u64 k = from; k < to; ++k) {
-    enum LEAD_TYPE leadOut = useLongCarry || (k == to - 1) ? LEAD_NONE : LEAD_WIDTH;
+    enum LEAD_TYPE const leadOut = useLongCarry || (k == to - 1) ? LEAD_NONE : LEAD_WIDTH;
     square(out, (k==from) ? in : out, leadIn, leadOut, doTailMul3 && (k == to - 1));
     leadIn = leadOut;
   }
@@ -1691,18 +1694,18 @@ u64 Gpu::bufResidue(Buffer<Word> &buf) {
 
   int carry = 0;
   for (int i = 0; i < 32; ++i) {
-    u32 len = bitlen(N, E, N - 32 + i);
-    i64 w = (i64) words[i] + carry;
+    u32 const len = bitlen(N, E, N - 32 + i);
+    i64 const w = (i64) words[i] + carry;
     carry = (int) (w >> len);
   }
 
   u64 res = 0;
   int hasBits = 0;
   for (int k = 0; k < 32 && hasBits < 64; ++k) {
-    u32 len = bitlen(N, E, k);
-    i64 tmp = (i64) words[32 + k] + carry;
+    u32 const len = bitlen(N, E, k);
+    i64 const tmp = (i64) words[32 + k] + carry;
     carry = (int) (tmp >> len);
-    u64 w = tmp - ((i64) carry << len);
+    u64 const w = tmp - ((i64) carry << len);
     assert(w < (1ULL << len));
     res += w << hasBits;
     hasBits += len;
@@ -1711,10 +1714,10 @@ u64 Gpu::bufResidue(Buffer<Word> &buf) {
 }
 
 static string formatETA(u32 secs) {
-  u32 etaMins = (secs + 30) / 60;
-  int days  = etaMins / (24 * 60);
-  int hours = etaMins / 60 % 24;
-  int mins  = etaMins % 60;
+  u32 const etaMins = (secs + 30) / 60;
+  int const days  = etaMins / (24 * 60);
+  int const hours = etaMins / 60 % 24;
+  int const mins  = etaMins % 60;
   char buf[64];
   if (days) {
     snprintf(buf, sizeof(buf), "%dd %02d:%02d", days, hours, mins);
@@ -1725,7 +1728,7 @@ static string formatETA(u32 secs) {
 }
 
 static string getETA(u32 step, u32 total, float secsPerStep) {
-  u32 etaSecs = max(0u, u32((total - step) * secsPerStep));
+  u32 const etaSecs = max(0u, u32((total - step) * secsPerStep));
   return formatETA(etaSecs);
 }
 
@@ -1749,7 +1752,7 @@ static string makeLogStr(const string& status, u64 k, u64 res, float secsPerIt,
 
 void Gpu::doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors) {
   auto [roeSq, roeMul] = readROE();
-  double z = roeSq.z();
+  double const z = roeSq.z();
   zAvg.update(z, roeSq.N);
   if (roeSq.max > 0.005)
     log("%sZ=%.0f (avg %.1f), ROEmax=%.3f, ROEavg=%.3f. %s\n", makeLogStr(checkOK ? "OK" : "EE", k, res, secsPerIt, nIters).c_str(),
@@ -1765,10 +1768,10 @@ void Gpu::doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u3
   // Unless ROE log is not explicitly requested, measure only a few iterations to minimize overhead
   wantROE = args.logROE ? ROE_SIZE : 400;
 
-  RoeInfo carryStats = readCarryStats();
+  RoeInfo const carryStats = readCarryStats();
   if (carryStats.N > 2) {
-    u32 m = ldexp(carryStats.max, 32);
-    double z = carryStats.z();
+    u32 const m = ldexp(carryStats.max, 32);
+    double const z = carryStats.z();
     log("Carry: %x Z(%u)=%.1f\n", m, carryStats.N, z);
   }
 }
@@ -1779,20 +1782,20 @@ bool Gpu::equals9(const Words& a) {
   return true;
 }
 
-int ulps(double a, double b) {
+static int ulps(double a, double b) {
   if (a == 0 && b == 0) { return 0; }
 
-  u64 aa = as<u64>(a);
-  u64 bb = as<u64>(b);
-  bool sameSign = (aa >> 63) == (bb >> 63);
-  int delta = sameSign ? bb - aa : bb + aa;
+  u64 const aa = as<u64>(a);
+  u64 const bb = as<u64>(b);
+  bool const sameSign = (aa >> 63) == (bb >> 63);
+  int const delta = sameSign ? bb - aa : bb + aa;
   return delta;
 }
 
 [[maybe_unused]] static double trigNorm(double c, double s) {
-  double c2 = c * c;
-  double err = fma(c, c, -c2);
-  double norm = c2 + fma(s, s, err);
+  double const c2 = c * c;
+  double const err = fma(c, c, -c2);
+  double const norm = c2 + fma(s, s, err);
   return norm;
 }
 
@@ -1837,22 +1840,22 @@ void Gpu::selftestTrig() {
 
   if (isAmdGpu(shared.context->deviceId())) {
     vector<string> WHATS {"V_NOP", "V_ADD_I32", "V_FMA_F32", "V_ADD_F64", "V_FMA_F64", "V_MUL_F64", "V_MAD_U64_U32"};
-    for (int w = 0; w < int(WHATS.size()); ++w) {
+    for (int w = 0; std::cmp_less(w, WHATS.size()); ++w) {
       const int what = w;
       testTime(what, bufCarry);
-      vector<i64> times = bufCarry.read(4096 * 2);
-      [[maybe_unused]] i64 prev = 0;
+      vector<i64> const times = bufCarry.read(4096 * 2);
+      [[maybe_unused]] i64 const prev = 0;
       u64 min = -1;
       u64 sum = 0;
-      for (int i = 0; i < int(times.size()); ++i) {
-        i64 x = times[i];
+      for (long const x : times) {
+        
 #if 0
         if (x != prev) {
           log("%4d : %ld\n", i, x);
           prev = x;
         }
 #endif
-        if (x > 0 && u64(x) < min) { min = x; }
+        if (x > 0 && std::cmp_less(x, min)) { min = x; }
         if (x > 0) { sum += x; }
       }
       log("%-15s : %.2f cycles latency; time min: %d; avg %.0f\n",
@@ -1864,22 +1867,22 @@ void Gpu::selftestTrig() {
 static u32 mod3(const std::vector<u32> &words) {
   u32 r = 0;
   // uses the fact that 2**32 % 3 == 1.
-  for (u32 w : words) { r += w % 3; }
+  for (u32 const w : words) { r += w % 3; }
   return r % 3;
 }
 
 static void doDiv3(u64 E, Words& words) {
   u32 r = (3 - mod3(words)) % 3;
   assert(r < 3);
-  int topBits = E % 32;
+  int const topBits = E % 32;
   assert(topBits > 0 && topBits < 32);
   {
-    u64 w = (u64(r) << topBits) + words.back();
+    u64 const w = (u64(r) << topBits) + words.back();
     words.back() = w / 3;
     r = w % 3;
   }
   for (auto it = words.rbegin() + 1, end = words.rend(); it != end; ++it) {
-    u64 w = (u64(r) << 32) + *it;
+    u64 const w = (u64(r) << 32) + *it;
     *it = w / 3;
     r = w % 3;
   }
@@ -1895,12 +1898,12 @@ fs::path Gpu::saveProof(const Args& args, ProofSet& proofSet) {
   for ( ; ; ) {
     for (int retry = 0; retry == 0 || (retry == 1 && !problem_proof); ++retry) {
       auto [proof, hashes] = proofSet.computeProof(this);
-      fs::path tmpFile = proof.file(args.proofToVerifyDir);
+      fs::path const tmpFile = proof.file(args.proofToVerifyDir);
       proof.save(tmpFile);
             
       fs::path proofFile = proof.file(args.proofResultDir);
 
-      bool ok = Proof::load(tmpFile).verify(this, hashes);
+      bool const ok = Proof::load(tmpFile).verify(this, hashes);
       log("Proof '%s' verification %s\n", tmpFile.string().c_str(), ok ? "OK" : "FAILED");
       if (ok) {
         fancyRename(tmpFile, proofFile);
@@ -1923,7 +1926,7 @@ PRPState Gpu::loadPRP(Saver<PRPState>& saver) {
 
     PRPState state = saver.load();
     writeState(state.k, state.check, state.blockSize);
-    u64 res = dataResidue();
+    u64 const res = dataResidue();
 
     if (res == state.res64) {
       log("OK %9" PRIu64 " on-load: blockSize %d, %016" PRIx64 "\n", state.k, state.blockSize, res);
@@ -1940,7 +1943,7 @@ PRPState Gpu::loadPRP(Saver<PRPState>& saver) {
 }
 
 u32 Gpu::getProofPower(u64 k) {
-  u32 power = ProofSet::effectivePower(E, args.getProofPow(E), k);
+  u32 const power = ProofSet::effectivePower(E, args.getProofPow(E), k);
 
   if (power != args.getProofPow(E)) {
     log("Proof using power %u (vs %u)\n", power, args.getProofPow(E));
@@ -1964,10 +1967,10 @@ tuple<bool, RoeInfo> Gpu::measureCarry() {
   assert(iters % blockSize == 0);
 
   u32 k = 0;
-  PRPState state{E, 0, blockSize, 3, makeWords(E, 1), 0};
+  PRPState const state{.exponent=E, .k=0, .blockSize=blockSize, .res64=3, .check=makeWords(E, 1), .nErrors=0};
   writeState(state.k, state.check, state.blockSize);
   {
-    u64 res = dataResidue();
+    u64 const res = dataResidue();
     if (res != state.res64) {
       log("residue expected %016" PRIx64 " found %016" PRIx64 "\n", state.res64, res);
     }
@@ -1978,7 +1981,7 @@ tuple<bool, RoeInfo> Gpu::measureCarry() {
   modMul(bufCheck, bufData, leadIn);
   leadIn = LEAD_MIDDLE;
 
-  enum LEAD_TYPE leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+  enum LEAD_TYPE const leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
   square(bufData, bufData, leadIn, leadOut);
   leadIn = leadOut;
   ++k;
@@ -2010,27 +2013,23 @@ tuple<bool, RoeInfo> Gpu::measureCarry() {
     if (Signal::stopRequested()) { throw "stop requested"; }
   }
 
-  [[maybe_unused]] u64 res = dataResidue();
+  [[maybe_unused]] u64 const res = dataResidue();
   if (Signal::stopRequested()) { throw "stop requested"; }
 
-  bool ok = doCheck(blockSize);
+  bool const ok = doCheck(blockSize);
   auto stats = readCarryStats();
 
   // log("%s %016" PRIx64 " %s\n", ok ? "OK" : "EE", res, roe.toString(statsBits).c_str());
   return {ok, stats};
 }
 
-tuple<bool, u64, RoeInfo, RoeInfo> Gpu::measureROE(bool quick) {
+tuple<bool, u64, RoeInfo, RoeInfo> Gpu::measureROE(bool  /*quick*/) {
   u32 blockSize{}, iters{}, warmup{};
 
-  if (true) {
+  {
     blockSize = 200;
     iters = 2000;
     warmup = 50;
-  } else {
-    blockSize = 500;
-    iters = 10'000;
-    warmup = 100;
   }
 
   assert(iters % blockSize == 0);
@@ -2038,10 +2037,10 @@ tuple<bool, u64, RoeInfo, RoeInfo> Gpu::measureROE(bool quick) {
   wantROE = ROE_SIZE; // should be large enough to capture fully this measureROE()
 
   u32 k = 0;
-  PRPState state{E, 0, blockSize, 3, makeWords(E, 1), 0};
+  PRPState const state{.exponent=E, .k=0, .blockSize=blockSize, .res64=3, .check=makeWords(E, 1), .nErrors=0};
   writeState(state.k, state.check, state.blockSize);
   {
-    u64 res = dataResidue();
+    u64 const res = dataResidue();
     if (res != state.res64) {
       log("residue expected %016" PRIx64 " found %016" PRIx64 "\n", state.res64, res);
     }
@@ -2052,7 +2051,7 @@ tuple<bool, u64, RoeInfo, RoeInfo> Gpu::measureROE(bool quick) {
   modMul(bufCheck, bufData, leadIn);
   leadIn = LEAD_MIDDLE;
 
-  enum LEAD_TYPE leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+  enum LEAD_TYPE const leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
   square(bufData, bufData, leadIn, leadOut);
   leadIn = leadOut;
   ++k;
@@ -2084,10 +2083,10 @@ tuple<bool, u64, RoeInfo, RoeInfo> Gpu::measureROE(bool quick) {
     if (Signal::stopRequested()) { throw "stop requested"; }
   }
 
-  [[maybe_unused]] u64 res = dataResidue();
+  [[maybe_unused]] u64 const res = dataResidue();
   if (Signal::stopRequested()) { throw "stop requested"; }
 
-  bool ok = doCheck(blockSize);
+  bool const ok = doCheck(blockSize);
   auto roes = readROE();
 
   wantROE = 0;
@@ -2113,7 +2112,7 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
   assert(iters % blockSize == 0);
 
   u32 k = 0;
-  PRPState state{E, 0, blockSize, 3, makeWords(E, 1), 0};
+  PRPState const state{.exponent=E, .k=0, .blockSize=blockSize, .res64=3, .check=makeWords(E, 1), .nErrors=0};
   writeState(state.k, state.check, state.blockSize);
   assert(dataResidue() == state.res64);
 
@@ -2121,7 +2120,7 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
   modMul(bufCheck, bufData, leadIn);
   leadIn = LEAD_MIDDLE;
 
-  enum LEAD_TYPE leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+  enum LEAD_TYPE const leadOut = useLongCarry ? LEAD_NONE : LEAD_WIDTH;
   square(bufData, bufData, leadIn, leadOut);
   leadIn = leadOut;
   ++k;
@@ -2157,8 +2156,8 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
 
   if (Signal::stopRequested()) { throw "stop requested"; }
 
-  u64 res = dataResidue();
-  bool ok = doCheck(blockSize);
+  u64 const res = dataResidue();
+  bool const ok = doCheck(blockSize);
   if (!ok) {
     log("Error %016" PRIx64 "\n", res);
     secsPerIt = 0.1; // a large value to mark the error
@@ -2175,7 +2174,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
   u32 nErrors = 0;
   int nSeqErrors = 0;
   u64 lastFailedRes64 = 0;
-  u32 logStep = args.logStep;
+  u32 const logStep = args.logStep;
 
  reload:
   elapsedTimer.reset();
@@ -2184,7 +2183,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
   double elapsedBefore = 0;
 
   {
-    PRPState state = loadPRP(*getSaver());
+    PRPState const state = loadPRP(*getSaver());
     nErrors = std::max(nErrors, state.nErrors);
     blockSize = state.blockSize;
     k = state.k;
@@ -2193,10 +2192,10 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
   assert(blockSize > 0 && logStep % blockSize == 0);
 
-  u32 checkStep = checkStepForErrors(blockSize, nErrors);
+  u32 const checkStep = checkStepForErrors(blockSize, nErrors);
   assert(checkStep % logStep == 0);
 
-  u32 power = getProofPower(k);
+  u32 const power = getProofPower(k);
   
   ProofSet proofSet{E, power};
 
@@ -2213,7 +2212,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
   assert(k < kEnd);
 
   // We continue beyound kEnd: to the next multiple of blockSize, to do a check there
-  u64 kEndEnd = roundUp(kEnd, blockSize);
+  u64 const kEndEnd = roundUp(kEnd, blockSize);
 
   bool skipNextCheckUpdate = false;
 
@@ -2242,10 +2241,10 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
     ++k; // !! early inc
 
-    bool doStop = (k % blockSize == 0) && (Signal::stopRequested() || (args.iters && k - startK >= args.iters));
-    bool doCheck = doStop || (k % checkStep == 0) || (k >= kEndEnd) || (k - startK == 2 * blockSize);
-    bool doLog = k % logStep == 0;
-    enum LEAD_TYPE leadOut = doCheck || doLog || k == persistK || k == kEnd || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+    bool const doStop = (k % blockSize == 0) && (Signal::stopRequested() || (args.iters && k - startK >= args.iters));
+    bool const doCheck = doStop || (k % checkStep == 0) || (k >= kEndEnd) || (k - startK == 2 * blockSize);
+    bool const doLog = k % logStep == 0;
+    enum LEAD_TYPE const leadOut = doCheck || doLog || k == persistK || k == kEnd || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
 
     if (doStop) { log("Stopping, please wait..\n"); }
 
@@ -2253,7 +2252,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
     leadIn = leadOut;
 
     if (k == persistK) {
-      vector<Word> rawData = readChecked(bufData);
+      vector<Word> const rawData = readChecked(bufData);
       if (rawData.empty()) {
         log("Data error ZERO\n");
         ++nErrors;
@@ -2276,8 +2275,8 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
     if (!doCheck && !doLog) continue;
 
-    u64 res = dataResidue();
-    float secsPerIt = iterationTimer.reset(k);
+    u64 const res = dataResidue();
+    float const secsPerIt = iterationTimer.reset(k);
     queue.setSquareTime((int) (secsPerIt * 1'000'000));
 
     vector<Word> rawCheck = readChecked(bufCheck);
@@ -2290,20 +2289,20 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
     if (!doCheck) {
       (*background)([=, this] {
-        getSaver()->saveUnverified({E, k, blockSize, res, compactBits(rawCheck, E), nErrors,
-                                    elapsedBefore + elapsedTimer.at()});
+        getSaver()->saveUnverified({.exponent=E, .k=k, .blockSize=blockSize, .res64=res, .check=compactBits(rawCheck, E), .nErrors=nErrors,
+                                    .elapsed=elapsedBefore + elapsedTimer.at()});
       });
 
       log("   %9" PRIu64 " %016" PRIx64 " %s\n", k, res, formatSecsPerIter(secsPerIt).c_str());
-      RoeInfo carryStats = readCarryStats();
+      RoeInfo const carryStats = readCarryStats();
       if (carryStats.N) {
-        u32 m = ldexp(carryStats.max, 32);
-        double z = carryStats.z();
+        u32 const m = ldexp(carryStats.max, 32);
+        double const z = carryStats.z();
         log("Carry: %x Z(%u)=%.1f\n", m, carryStats.N, z);
       }
     } else {
-      bool ok = this->doCheck(blockSize);
-      [[maybe_unused]] float secsCheck = iterationTimer.reset(k);
+      bool const ok = this->doCheck(blockSize);
+      [[maybe_unused]] float const secsCheck = iterationTimer.reset(k);
 
       if (ok) {
         nSeqErrors = 0;
@@ -2312,15 +2311,15 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
 
         if (k < kEnd) {
           (*background)([=, this, rawCheck = std::move(rawCheck)] {
-            getSaver()->save({E, k, blockSize, res, compactBits(rawCheck, E), nErrors, elapsedBefore + elapsedTimer.at()});
+            getSaver()->save({.exponent=E, .k=k, .blockSize=blockSize, .res64=res, .check=compactBits(rawCheck, E), .nErrors=nErrors, .elapsed=elapsedBefore + elapsedTimer.at()});
           });
         }
 
         doBigLog(k, res, ok, secsPerIt, kEndEnd, nErrors);
 
         if (k >= kEndEnd) {
-          fs::path proofFile = saveProof(args, proofSet);
-          return {isPrime, finalRes64, nErrors, proofFile.string(), toHex(res2048)};
+          fs::path const proofFile = saveProof(args, proofSet);
+          return {.isPrime=isPrime, .res64=finalRes64, .nErrors=nErrors, .proofPath=proofFile.string(), .res2048=toHex(res2048)};
         }        
       } else {
         ++nErrors;
@@ -2367,9 +2366,9 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     elapsedBefore = state.elapsed;
     startK = state.k;
-    u64 expectedRes = (u64(state.data[1]) << 32) | state.data[0];
-    writeIn(bufData, std::move(state.data));
-    u64 res = dataResidue();
+    u64 const expectedRes = (u64(state.data[1]) << 32) | state.data[0];
+    writeIn(bufData, state.data);
+    u64 const res = dataResidue();
     if (res != expectedRes) { throw "Invalid savefile (res64)"; }
     assert(res == expectedRes);
     log("LL loaded @ %" PRIu64 " : %016" PRIx64 "\n", startK, res);
@@ -2378,7 +2377,7 @@ LLResult Gpu::isPrimeLL(const Task& task) {
   IterationTimer iterationTimer{startK};
 
   u64 k = startK;
-  u64 kEnd = E - 2;
+  u64 const kEnd = E - 2;
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
   while (true) {
@@ -2390,8 +2389,8 @@ LLResult Gpu::isPrimeLL(const Task& task) {
       log("Stopping, please wait..\n");
     }
 
-    bool doLog = (k % args.logStep == 0) || doStop;
-    enum LEAD_TYPE leadOut = doLog || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+    bool const doLog = (k % args.logStep == 0) || doStop;
+    enum LEAD_TYPE const leadOut = doLog || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
 
     squareLL(bufData, leadIn, leadOut);
     leadIn = leadOut;
@@ -2400,29 +2399,29 @@ LLResult Gpu::isPrimeLL(const Task& task) {
 
     u64 res64 = 0;
     auto data = readData();
-    bool isAllZero = data.empty();
+    bool const isAllZero = data.empty();
 
     if (isAllZero) {
       if (k < kEnd) {
         log("Error: early ZERO @ %" PRIu64 "\n", k);
         if (doStop) {
           throw "stop requested";
-        } else {
+        } 
           goto reload;
-        }
+       
       }
       res64 = 0;
     } else {
       assert(data.size() >= 2);
       res64 = (u64(data[1]) << 32) | data[0];
-      saver.save({E, k, std::move(data), elapsedBefore + elapsedTimer.at()});
+      saver.save({.exponent=E, .k=k, .data=std::move(data), .elapsed=elapsedBefore + elapsedTimer.at()});
     }
 
-    float secsPerIt = iterationTimer.reset(k);
+    float const secsPerIt = iterationTimer.reset(k);
     queue.setSquareTime((int) (secsPerIt * 1'000'000));
     log("%9" PRIu64 " %016" PRIx64 " %s ETA %s\n", k, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
-    if (k >= kEnd) { return {isAllZero, res64}; }
+    if (k >= kEnd) { return {.isPrime=isAllZero, .res64=res64}; }
 
     if (doStop) { throw "stop requested"; }
   }
@@ -2440,21 +2439,21 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
   { // Enclosing this code in braces ensures the file will be closed by the File destructor.  The later file deletion requires the file be closed in Windows.
     File fi = File::openReadThrow(fname);
-    u32 nBytes = u32((E - 1) / 8 + 1);
-    Words B = fi.readBytesLE(nBytes);
-    writeIn(bufData, std::move(B));
+    u32 const nBytes = u32((E - 1) / 8 + 1);
+    Words const B = fi.readBytesLE(nBytes);
+    writeIn(bufData, B);
   }
 
   Timer elapsedTimer;
 
   elapsedTimer.reset();
 
-  u32 startK = 0;
+  u32 const startK = 0;
 
   IterationTimer iterationTimer{startK};
 
   u32 k = 0;
-  u32 kEnd = task.squarings;
+  u32 const kEnd = task.squarings;
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
   while (true) {
@@ -2466,8 +2465,8 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
       log("Stopping, please wait..\n");
     }
 
-    bool doLog = (k % 100'000 == 0) || doStop;
-    enum LEAD_TYPE leadOut = doLog || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
+    bool const doLog = (k % 100'000 == 0) || doStop;
+    enum LEAD_TYPE const leadOut = doLog || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
 
     squareCERT(bufData, leadIn, leadOut);
     leadIn = leadOut;
@@ -2476,9 +2475,9 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
     Words data = readData();
     assert(data.size() >= 2);
-    u64 res64 = (u64(data[1]) << 32) | data[0];
+    u64 const res64 = (u64(data[1]) << 32) | data[0];
 
-    float secsPerIt = iterationTimer.reset(k);
+    float const secsPerIt = iterationTimer.reset(k);
     queue.setSquareTime((int) (secsPerIt * 1'000'000));
     log("%7u / %7u %016" PRIx64 " %s ETA %s\n", k, kEnd, res64, formatSecsPerIter(secsPerIt).c_str(), getETA(k, kEnd, secsPerIt).c_str());
 
diff --git a/src/Gpu.h b/src/Gpu.h
index e7a2b810..7e91c1bd 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -15,6 +15,7 @@
 #include "GpuCommon.h"
 #include "FFTConfig.h"
 
+#include <numbers>
 #include <vector>
 #include <memory>
 #include <filesystem>
@@ -35,7 +36,7 @@ struct PRPResult {
   bool isPrime{};
   u64 res64 = 0;
   u32 nErrors = 0;
-  fs::path proofPath{};
+  fs::path proofPath;
   std::string res2048;
 };
 
@@ -62,15 +63,15 @@ class RoeInfo {
   RoeInfo(u32 n, double max, double mean, double sd) : N{n}, max{max}, mean{mean}, sd{sd} {
     // https://en.wikipedia.org/wiki/Gumbel_distribution
     gumbelBeta = sd * 0.779696801233676; // sqrt(6)/pi
-    gumbelMiu = mean - gumbelBeta * 0.577215664901533; // Euler-Mascheroni
+    gumbelMiu = mean - gumbelBeta * std::numbers::egamma; // Euler-Mascheroni
   }
 
-  double z(double x = 0.5) const { return N ? (x - gumbelMiu) / gumbelBeta : 0.0; }
+  [[nodiscard]] double z(double x = 0.5) const { return N ? (x - gumbelMiu) / gumbelBeta : 0.0; }
 
-  double gumbelCDF(double x) const { return exp(-exp(-z(x))); }
-  double gumbelRightCDF(double x) const { return -expm1(-exp(-z(x))); }
+  [[nodiscard]] double gumbelCDF(double x) const { return exp(-exp(-z(x))); }
+  [[nodiscard]] double gumbelRightCDF(double x) const { return -expm1(-exp(-z(x))); }
 
-  std::string toString() const;
+  [[nodiscard]] std::string toString() const;
 
   u32 N{};
   double max{}, mean{}, sd{};
@@ -224,9 +225,9 @@ class Gpu {
   vector<Buffer<double> *> recorded_kernel_args;
 
   const int NUM_CACHE_GROUPS = 3;
-  void splitQueue(void);
-  void mergeQueue(void);
-  void replay(void);
+  void splitQueue();
+  void mergeQueue();
+  void replay();
 
   void fftP(Buffer<double>& out, Buffer<double>& in) { fftP(out, reinterpret_cast<Buffer<Word>&>(in)); }
   void fftP(Buffer<double>& out, Buffer<Word>& in);
@@ -354,11 +355,11 @@ class Gpu {
 // Data buffers require extra space for padding.  We can probably tighten up the amount of extra memory allocated.
 // The worst case seems to be !INPLACE, MIDDLE=4, PAD_SIZE=512.
 
-#define MID_ADJUST(size,M,pad)                  ((pad == 0 || M != 4) ? (size) : (size) * 5/4)
-#define PAD_ADJUST(N,M,inplace,pad)             (inplace ? 3*N/2 : MID_ADJUST(pad == 0 ? N : pad <= 128 ? 9*N/8 : pad <= 256 ? 5*N/4 : 3*N/2, M, pad))
-#define FP64_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST(W*M*H*2, M, inplace, pad)
-#define FP32_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST(W*M*H*2, M, inplace, pad) * sizeof(float) / sizeof(double)
-#define GF31_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST(W*M*H*2, M, inplace, pad) * sizeof(uint) / sizeof(double)
-#define GF61_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST(W*M*H*2, M, inplace, pad) * sizeof(ulong) / sizeof(double)
-#define TOTAL_DATA_SIZE(fft,W,M,H,inplace,pad)  (int)fft.FFT_FP64 * FP64_DATA_SIZE(W,M,H,inplace,pad) + (int)fft.FFT_FP32 * FP32_DATA_SIZE(W,M,H,inplace,pad) + \
-                                                (int)fft.NTT_GF31 * GF31_DATA_SIZE(W,M,H,inplace,pad) + (int)fft.NTT_GF61 * GF61_DATA_SIZE(W,M,H,inplace,pad)
+#define MID_ADJUST(size,M,pad)                  (((pad) == 0 || (M) != 4) ? (size) : (size) * 5/4)
+#define PAD_ADJUST(N,M,inplace,pad)             ((inplace) ? 3*(N)/2 : MID_ADJUST((pad) == 0 ? (N) : (pad) <= 128 ? 9*(N)/8 : (pad) <= 256 ? 5*(N)/4 : 3*(N)/2, M, pad))
+#define FP64_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST((W)*(M)*(H)*2, M, inplace, pad)
+#define FP32_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST((W)*(M)*(H)*2, M, inplace, pad) * sizeof(float) / sizeof(double)
+#define GF31_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST((W)*(M)*(H)*2, M, inplace, pad) * sizeof(uint) / sizeof(double)
+#define GF61_DATA_SIZE(W,M,H,inplace,pad)       PAD_ADJUST((W)*(M)*(H)*2, M, inplace, pad) * sizeof(ulong) / sizeof(double)
+#define TOTAL_DATA_SIZE(fft,W,M,H,inplace,pad)  ((int)(fft).FFT_FP64 * FP64_DATA_SIZE(W,M,H,inplace,pad) + (int)(fft).FFT_FP32 * FP32_DATA_SIZE(W,M,H,inplace,pad) + \
+                                                (int)(fft).NTT_GF31 * GF31_DATA_SIZE(W,M,H,inplace,pad) + (int)(fft).NTT_GF61 * GF61_DATA_SIZE(W,M,H,inplace,pad))
diff --git a/src/Hash.h b/src/Hash.h
index ddeb9c2e..5144db17 100644
--- a/src/Hash.h
+++ b/src/Hash.h
@@ -11,7 +11,7 @@ class Hash {
   
 public:
   template <typename... Ts>
-  static auto hash(Ts... data) {
+  static auto hash(const Ts&... data) {
     Hash hash;
     (hash.update(data),...);
     return std::move(hash).finish();
diff --git a/src/Kernel.cpp b/src/Kernel.cpp
index 5da47088..5807534d 100644
--- a/src/Kernel.cpp
+++ b/src/Kernel.cpp
@@ -3,7 +3,6 @@
 #include "Kernel.h"
 #include "KernelCompiler.h"
 
-#include <stdexcept>
 
 Kernel::Kernel(string_view name, KernelCompiler* compiler, TimeInfo* timeInfo, Queue* queue,
        string_view fileName, string_view nameInFile,
diff --git a/src/Kernel.h b/src/Kernel.h
index 67a7bf50..557dd7e6 100644
--- a/src/Kernel.h
+++ b/src/Kernel.h
@@ -27,7 +27,7 @@ class Kernel {
   size_t workSize;
   u32 groupSize = 0;
   
-  KernelHolder kernel{};
+  KernelHolder kernel;
   std::future<KernelHolder> pendingKernel;
   cl_device_id deviceId;
   std::vector<std::pair<u32, cl_mem>> pendingArgs;
@@ -67,7 +67,7 @@ class Kernel {
     if (kernel) {
       ::setArg(kernel.get(), pos, arg, name);
     } else {
-      pendingArgs.push_back({pos, arg});
+      pendingArgs.emplace_back(pos, arg);
     }
   }
 
diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index 59165081..a5885227 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -8,6 +8,7 @@
 #include <cassert>
 #include <cinttypes>
 #include <future>
+#include <utility>
 
 using namespace std;
 
@@ -34,7 +35,7 @@ KernelCompiler::KernelCompiler(const Args& args, const Context* context, const s
   deviceId{context->deviceId()}
 {
 
-  string hw = getDriverVersion(deviceId) + ':' + getDeviceName(deviceId);
+  string const hw = getDriverVersion(deviceId) + ':' + getDeviceName(deviceId);
   if (args.verbose) { log("OpenCL: %s, args %s\n", hw.c_str(), baseArgs.c_str()); }
 
   SHA3 hasher;
@@ -44,10 +45,10 @@ KernelCompiler::KernelCompiler(const Args& args, const Context* context, const s
   auto& clNames = getClFileNames();
   auto& clFiles = getClFiles();
   assert(clNames.size() == clFiles.size());
-  int n = clNames.size();
+  int const n = clNames.size();
   for (int i = 0; i < n; ++i) {
     auto &src = clFiles[i];
-    files.push_back({clNames[i], src});
+    files.emplace_back(clNames[i], src);
     clSources.push_back(loadSource(context->get(), src));
 
     hasher.update(clNames[i]);
@@ -75,7 +76,7 @@ Program KernelCompiler::compile(const string& fileName, const string& extraArgs)
                              clSources.size()-1, (const cl_program*) (clSources.data()+1), getClFileNames().data()+1,
                              nullptr, nullptr);
 #endif
-  if (string mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
+  if (string const mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
   if (err != CL_SUCCESS) {
     log("Compiling '%s' error %s (args %s)\n", fileName.c_str(), errMes(err).c_str(), args.c_str());
     return {};
@@ -83,7 +84,7 @@ Program KernelCompiler::compile(const string& fileName, const string& extraArgs)
   
   Program p2{clLinkProgram(context, 1, &deviceId, linkArgs.c_str(),
                            1, (cl_program *) &p1, nullptr, nullptr, &err)};
-  if (string mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
+  if (string const mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
   if (err != CL_SUCCESS) {
     log("Linking '%s' error %s (args %s)\n", fileName.c_str(), errMes(err).c_str(), linkArgs.c_str());
   }
@@ -97,14 +98,14 @@ static string to_hex(u64 d) {
 }
 
 KernelHolder KernelCompiler::loadAux(const string& fileName, const string& kernelName, const string& args) const {
-  Timer timer;
+  Timer const timer;
   bool fromCache = true;
 
   Program program;
   string cacheFile;
 
   if (useCache) {
-    string f = kernelName + '-' + to_hex(SHA3::hash(contextHash, fileName, kernelName, args)[0]);
+    string const f = kernelName + '-' + to_hex(SHA3::hash(contextHash, fileName, kernelName, args)[0]);
     cacheFile = cacheDir + '/' + f;
     program = loadBinary(context, deviceId, cacheFile);
   }
diff --git a/src/KernelCompiler.h b/src/KernelCompiler.h
index 0d07a7ee..19cd9d60 100644
--- a/src/KernelCompiler.h
+++ b/src/KernelCompiler.h
@@ -25,13 +25,13 @@ class KernelCompiler {
 
   u64 contextHash{};
   
-  Program compile(const string& fileName, const string& args) const;
-  KernelHolder loadAux(const string& fileName, const string& kernelName, const string& args) const;
+  [[nodiscard]] Program compile(const string& fileName, const string& args) const;
+  [[nodiscard]] KernelHolder loadAux(const string& fileName, const string& kernelName, const string& args) const;
 
 public:
   const cl_device_id deviceId;
 
   KernelCompiler(const Args& args, const Context* context, const string& clArgs);
   
-  std::future<KernelHolder> load(const string& fileName, const string& kernelName, const string& args) const;
+  [[nodiscard]] std::future<KernelHolder> load(const string& fileName, const string& kernelName, const string& args) const;
 };
diff --git a/src/MD5.h b/src/MD5.h
index 433d1b64..c0b19437 100644
--- a/src/MD5.h
+++ b/src/MD5.h
@@ -22,10 +22,10 @@ class MD5Hash {
     unsigned char digest[16];
     MD5Final(digest, &context);
     string s;
-    char hex[] = "0123456789abcdef";
-    for (int i = 0; i < 16; ++i) {
-      s.push_back(hex[digest[i] >> 4]);
-      s.push_back(hex[digest[i] & 0xf]);
+    char const hex[] = "0123456789abcdef";
+    for (unsigned char const i : digest) {
+      s.push_back(hex[i >> 4]);
+      s.push_back(hex[i & 0xf]);
     }
     return s;
   }
diff --git a/src/Primes.cpp b/src/Primes.cpp
index 6e3ceb36..665ee251 100644
--- a/src/Primes.cpp
+++ b/src/Primes.cpp
@@ -9,7 +9,7 @@ Primes::Primes() {
 
   for (u32 i = 0; i < sieve.size(); ++i) {
     if (sieve[i]) {
-      u32 n = 2 * i + 3;
+      u32 const n = 2 * i + 3;
       for (u32 k = i + n; k < sieve.size(); k += n) { sieve.reset(k); }
     }
   }
@@ -21,7 +21,7 @@ bool Primes::isPrimeOdd(u64 n) const {
   if (n < 3) { return false; }
   for (u32 k = 0; k < sieve.size(); ++k) {
     if (sieve[k]) {
-      u32 p = k * 2 + 3;
+      u32 const p = k * 2 + 3;
       if (u64(p) * u64(p) > n) { return true; }
       if (n % p == 0) { return false; }
     }
@@ -53,8 +53,8 @@ u64 Primes::nextPrime(u64 n) const {
 
 u64 Primes::nearestPrime(u64 n) const {
   if (isPrime(n)) { return n; }
-  u64 a = prevPrime(n);
-  u64 b = nextPrime(n);
+  u64 const a = prevPrime(n);
+  u64 const b = nextPrime(n);
   assert(a < n && n < b);
   return n-a < b-n ? a : b;
 }
diff --git a/src/Primes.h b/src/Primes.h
index 7f1f16fb..b5dbd4e4 100644
--- a/src/Primes.h
+++ b/src/Primes.h
@@ -7,13 +7,13 @@
 
 class Primes {
   std::bitset<50000> sieve;           // Allows for testing prims up to 10 billion
-  bool isPrimeOdd(u64 n) const;
+  [[nodiscard]] bool isPrimeOdd(u64 n) const;
 
 public:
   Primes();
 
-  bool isPrime(u64 n) const;
-  u64 prevPrime(u64 n) const;
-  u64 nextPrime(u64 n) const;
-  u64 nearestPrime(u64 n) const;
+  [[nodiscard]] bool isPrime(u64 n) const;
+  [[nodiscard]] u64 prevPrime(u64 n) const;
+  [[nodiscard]] u64 nextPrime(u64 n) const;
+  [[nodiscard]] u64 nearestPrime(u64 n) const;
 };
diff --git a/src/Profile.cpp b/src/Profile.cpp
index dcb543d2..4437abde 100644
--- a/src/Profile.cpp
+++ b/src/Profile.cpp
@@ -13,7 +13,7 @@ TimeInfo* Profile::make(string_view s) {
 vector<const TimeInfo*> Profile::get() const {
   vector<const TimeInfo*> ret;
   for (auto& t : entries) { if (t->n) { ret.push_back(t.get()); } }
-  std::sort(ret.begin(), ret.end(), [](auto p1, auto p2) { return p1->times[2] > p2->times[2]; });
+  std::ranges::sort(ret, [](auto p1, auto p2) { return p1->times[2] > p2->times[2]; });
   return ret;
 }
 
diff --git a/src/Profile.h b/src/Profile.h
index 3c919142..46040201 100644
--- a/src/Profile.h
+++ b/src/Profile.h
@@ -16,7 +16,7 @@ class Profile {
 public:
   TimeInfo *make(std::string_view s);
 
-  std::vector<const TimeInfo*> get() const;
+  [[nodiscard]] std::vector<const TimeInfo*> get() const;
 
   void reset();
 };
diff --git a/src/Proof.cpp b/src/Proof.cpp
index bd8d4be6..1d395954 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -6,6 +6,7 @@
 #include "Gpu.h"
 
 #include <algorithm>
+#include <utility>
 #include <vector>
 #include <string>
 #include <cassert>
@@ -37,7 +38,7 @@ string fileHash(const fs::path& filePath) {
 }
 
 ProofInfo getInfo(const fs::path& proofFile) {
-  string hash = proof::fileHash(proofFile);
+  string const hash = proof::fileHash(proofFile);
   File fi = File::openReadThrow(proofFile);
   u64 E = 0;
   u32 power = 0;
@@ -46,7 +47,7 @@ ProofInfo getInfo(const fs::path& proofFile) {
     log("Proof file '%s' has invalid header\n", proofFile.string().c_str());
     throw "Invalid proof header";
   }
-  return {power, E, hash};
+  return {.power=power, .exp=E, .md5=hash};
 }
 
 }
@@ -54,14 +55,14 @@ ProofInfo getInfo(const fs::path& proofFile) {
 // ---- Proof ----
 
 fs::path Proof::file(const fs::path& proofDir) const {
-  string strE = to_string(E);
-  u32 power = middles.size();
+  string const strE = to_string(E);
+  u32 const power = middles.size();
   return proofDir / (strE + '-' + to_string(power) + ".proof");  
 }
 
 void Proof::save(const fs::path& proofFile) const {
-  File fo = File::openWrite(proofFile);
-  u32 power = middles.size();
+  File const fo = File::openWrite(proofFile);
+  u32 const power = middles.size();
   fo.printf(HEADER_v2, power, E, '\n');
   fo.write(B.data(), (E-1)/8+1);
   for (const Words& w : middles) { fo.write(w.data(), (E-1)/8+1); }
@@ -76,21 +77,22 @@ Proof Proof::load(const fs::path& path) {
     log("Proof file '%s' has invalid header\n", path.string().c_str());
     throw "Invalid proof header";
   }
-  u32 nBytes = (E - 1) / 8 + 1;
-  Words B = fi.readBytesLE(nBytes);
+  u32 const nBytes = (E - 1) / 8 + 1;
+  Words const B = fi.readBytesLE(nBytes);
   vector<Words> middles;
-  for (u32 i = 0; i < power; ++i) { middles.push_back(fi.readBytesLE(nBytes)); }
-  return {E, B, middles};
+  middles.reserve(power);
+for (u32 i = 0; i < power; ++i) { middles.push_back(fi.readBytesLE(nBytes)); }
+  return {.E=E, .B=B, .middles=middles};
 }
 
 bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   // log("B         %016" PRIx64 "\n", res64(B));
   // for (u32 i = 0; i < middles.size(); ++i) { log("Middle[%u] %016" PRIx64 "\n", i, res64(middles[i])); }
 
-  u32 power = middles.size();
+  u32 const power = middles.size();
   assert(power > 0);
 
-  bool isPrime = (B == makeWords(E, 9));
+  bool const isPrime = (B == makeWords(E, 9));
 
   Words A{makeWords(E, 3)};
   Words B{this->B};
@@ -101,14 +103,14 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   for (u32 i = 0; i < power; ++i, span = (span + 1) / 2) {
     const Words& M = middles[i];
     hash = proof::hashWords(E, hash, M);
-    u64 h = hash[0];
+    u64 const h = hash[0];
     
     if (hashes.size() > i && h != hashes.at(i)) {
       log("proof [%u] : hash expected %016" PRIx64 " != %016" PRIx64 "\n", i, hashes[i], h);
       return false;
     }
 
-    bool doSquareB = span % 2;
+    bool const doSquareB = span % 2;
     B = gpu->expMul(M, h, B, doSquareB);
     A = gpu->expMul(A, h, M, false);
 
@@ -118,7 +120,7 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   log("proof verification: doing %" PRIu64 " iterations\n", span);
   A = gpu->expExp2(A, span);
 
-  bool ok = (A == B);
+  bool const ok = (A == B);
   if (ok) {
     log("proof: %" PRIu64 " proved %s\n", E, isPrime ? "probable prime" : "composite");
   } else {
@@ -156,7 +158,7 @@ ProofSet::ProofSet(u64 E, u32 power)
   assert(points.front() == 0);
 
   points.front() = E;
-  std::sort(points.begin(), points.end());
+  std::ranges::sort(points);
 
   assert(points.size() == (1u << power));
   assert(points.back() == E);
@@ -164,7 +166,7 @@ ProofSet::ProofSet(u64 E, u32 power)
   points.push_back(u32(-1)); // guard element
   cacheIt = points.begin();
 
-  for ([[maybe_unused]] u64 p : points) {
+  for ([[maybe_unused]] u64 const p : points) {
     assert(p > E || isInPoints(E, power, p));
   }
 }
@@ -198,7 +200,7 @@ u32 ProofSet::bestPower(u64 E) {
 
   assert(E > 0);
   // log2(x)/2 is log4(x)
-  int power = 10 + floor(log2(E / 60e6) / 2);
+  int const power = 10 + floor(log2(E / 60e6) / 2);
   assert(power >= 2);
   return power;
 }
@@ -224,7 +226,7 @@ bool ProofSet::fileExists(u64 k) const {
 }
 
 bool ProofSet::isValidTo(u64 limitK) const {
-  auto it = upper_bound(points.begin(), points.end(), limitK);
+  auto it = std::ranges::upper_bound(points, limitK);
 
   if (it == points.begin()) {
     return true;
@@ -246,7 +248,7 @@ bool ProofSet::isValidTo(u64 limitK) const {
 
 u64 ProofSet::next(u64 k) const {
   if (*cacheIt <= k || (cacheIt > points.begin() && *prev(cacheIt) > k)) {
-    cacheIt = upper_bound(points.begin(), points.end(), k);
+    cacheIt = std::ranges::upper_bound(points, k);
   }
   return *cacheIt;
 }
@@ -267,7 +269,7 @@ Words ProofSet::load(u64 E, u32 power, u64 k) {
 
 std::pair<Proof, vector<u64>> ProofSet::computeProof(Gpu *gpu) const {
   Words B = load(E);
-  Words A = makeWords(E, 3);
+  Words const A = makeWords(E, 3);
 
   vector<Words> middles;
   vector<u64> hashes;
@@ -279,19 +281,19 @@ std::pair<Proof, vector<u64>> ProofSet::computeProof(Gpu *gpu) const {
   for (u32 p = 0; p < power; ++p) {
     auto bufIt = bufVect.begin();
     assert(p == hashes.size());
-    u32 s = (1u << (power - p - 1));
+    u32 const s = (1u << (power - p - 1));
     for (u32 i = 0; i < (1u << p); ++i) {
-      Words w = load(points[s * (i * 2 + 1) - 1]);
+      Words const w = load(points[s * (i * 2 + 1) - 1]);
       gpu->writeIn(*bufIt++, w);
       for (u32 k = 0; i & (1u << k); ++k) {
         assert(k <= p - 1);
         --bufIt;
-        u64 h = hashes[p - 1 - k];
+        u64 const h = hashes[p - 1 - k];
         gpu->expMul(*(bufIt - 1), h, *bufIt);
       }
     }
     assert(bufIt == bufVect.begin() + 1);
-    Words w = gpu->readAndCompress(bufVect.front());
+    Words const w = gpu->readAndCompress(bufVect.front());
     if (w.empty()) { throw "Read ZERO during proof generation"; }
     middles.push_back(w);
     hash = proof::hashWords(E, hash, middles.back());
@@ -299,5 +301,5 @@ std::pair<Proof, vector<u64>> ProofSet::computeProof(Gpu *gpu) const {
 
     log("proof [%u] : M %016" PRIx64 ", h %016" PRIx64 "\n", p, res64(middles.back()), hashes.back());
   }
-  return {Proof{E, std::move(B), std::move(middles)}, hashes};
+  return {Proof{.E=E, .B=std::move(B), .middles=std::move(middles)}, hashes};
 }
diff --git a/src/Proof.h b/src/Proof.h
index e2df024c..bac5d295 100644
--- a/src/Proof.h
+++ b/src/Proof.h
@@ -47,7 +47,7 @@ class Proof {
 
   void save(const fs::path& proofResultDir) const;
 
-  fs::path file(const fs::path& proofDir) const;
+  [[nodiscard]] fs::path file(const fs::path& proofDir) const;
   
   bool verify(Gpu *gpu, const vector<u64>& hashes = {}) const;
 };
@@ -64,7 +64,7 @@ class ProofSet {
 
   static bool canDo(u64 E, u32 power, u64 currentK);
 
-  mutable decltype(points)::const_iterator cacheIt{};
+  mutable decltype(points)::const_iterator cacheIt;
 
   bool fileExists(u64 k) const;
 
@@ -86,6 +86,6 @@ class ProofSet {
   void save(u64 k, const Words& words) const { return save(E, power, k, words); }
   Words load(u64 k) const { return load(E, power, k); }
 
-  void reducePower(void) { power--; }
+  void reducePower() { power--; }
   std::pair<Proof, vector<u64>> computeProof(Gpu *gpu) const;
 };
diff --git a/src/Queue.cpp b/src/Queue.cpp
index 0b2d0baf..b13433a7 100644
--- a/src/Queue.cpp
+++ b/src/Queue.cpp
@@ -1,14 +1,13 @@
 // Copyright (C) Mihai Preda
 
 #include "Queue.h"
-#include "Args.h"
 #include "TimeInfo.h"
-#include "timeutil.h"
 #include "log.h"
 
 #include <cassert>
 #include <chrono>
 #include <thread>
+#include <utility>
 
 void Events::clearCompleted() { while (!empty() && front().isComplete()) { pop_front(); } }
 
@@ -21,13 +20,8 @@ Queue::Queue(const Context& context, bool profile, bool auxQueue) :
   QueueHolder{makeQueue(context.deviceId(), context.get(), profile)},
   hasEvents{profile},
   isAuxQueue(auxQueue),
-  context{&context},
-  markerEvent{},
-  markerQueued(false),
-  queueCount(0),
-  squareTime(50),
-  squareKernels(4),
-  firstSetTime(true)
+  context{&context}
+  
 {
   // Formerly a constant (thus the CAPS).  nVidia is 3% CPU load at 400 or 500, and 35% load at 800 on my Linux machine.
   // AMD is just over 2% load at 1600 and 3200 on the same Linux machine.  Marginally better timings(?) at 3200.
@@ -43,7 +37,7 @@ void Queue::fillBufTE(cl_mem buf, u32 patSize, const void* pattern, u64 size, Ti
   add(::fillBuf(get(), {}, buf, pattern, patSize, size, hasEvents), tInfo);
 }
 
-string status(Events& events) {
+static string status(Events& events) {
   if (events.empty()) { return ""; }
   Event& f = events.front();
   return f.isComplete() ? "C" : f.isQueued() ? "Q" : f.isRunning() ? "R" : f.isSubmitted() ? "S" : "?";
@@ -121,7 +115,7 @@ void Queue::setSquareTime(int time) {
     firstSetTime = false;
     return;
   }
-  if (time < 30) time = 30;           // Assume a minimum square time of 30us
-  if (time > 3000) time = 3000;       // Assume a maximum square time of 3000us
+  time = std::max(time, 30);           // Assume a minimum square time of 30us
+  time = std::min(time, 3000);       // Assume a maximum square time of 3000us
   squareTime = time;
 }
diff --git a/src/Queue.h b/src/Queue.h
index 3e0b3ab0..6c5f3b79 100644
--- a/src/Queue.h
+++ b/src/Queue.h
@@ -51,7 +51,7 @@ class Queue : public QueueHolder {
   void copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo);
   void finish();
 
-  EventHolder createSyncEvent(void) { return enqueueMarker(get()); }                     // Enqueue a synchronization event.  Used to sync work among multiple queues.
+  EventHolder createSyncEvent() { return enqueueMarker(get()); }                     // Enqueue a synchronization event.  Used to sync work among multiple queues.
   void waitForSyncEvent(EventHolder* e) { enqueueMarkerWithWaits(get(), {e->get()}); }   // Wait for a synchronization event to complete.
 
   void setSquareTime(int);          // Update the time to do one squaring (in microseconds)
@@ -60,11 +60,11 @@ class Queue : public QueueHolder {
 private:                            // This replaces the "call queue->finish every 400 squarings" code in Gpu.cpp.  Solves the busy wait on nVidia GPUs.
   int MAX_QUEUE_COUNT;              // Queue size before a marker will be enqueued.  Typically, 100 to 1000 squarings.
   EventHolder markerEvent;          // Event associated with an enqueued marker placed in the queue every MAX_QUEUE_COUNT entries and before r/w operations.
-  bool markerQueued;                // TRUE if a marker and event have been queued
-  int queueCount;                   // Count of items added to the queue since last marker
-  int squareTime;                   // Time to do one squaring (in microseconds)
-  int squareKernels;                // Number of kernels in one squaring
-  bool firstSetTime;                // Flag so we can ignore first setSquareTime call (which is inaccurate because of all the initial openCL compiles)
+  bool markerQueued{false};                // TRUE if a marker and event have been queued
+  int queueCount{0};                   // Count of items added to the queue since last marker
+  int squareTime{50};                   // Time to do one squaring (in microseconds)
+  int squareKernels{4};                // Number of kernels in one squaring
+  bool firstSetTime{true};                // Flag so we can ignore first setSquareTime call (which is inaccurate because of all the initial openCL compiles)
   void queueMarkerEvent();          // Queue the marker event
   void waitForMarkerEvent();        // Wait for marker event to complete
 };
diff --git a/src/Saver.cpp b/src/Saver.cpp
index 68caba41..c9663fb5 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -11,6 +11,7 @@
 #include <cinttypes>
 #include <filesystem>
 #include <algorithm>
+#include <utility>
 
 namespace {
 
@@ -32,14 +33,14 @@ static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64
 struct BadHeaderError { string name; };
 
 bool startsWith(const string& s, const string& prefix) {
-  return s.rfind(prefix, 0) == 0;
+  return s.starts_with(prefix);
 }
 
-vector<u64> savefiles(fs::path dir, const string& prefix, const string& kind) {
+vector<u64> savefiles(const fs::path& dir, const string& prefix, const string& kind) {
   vector<u64> v;
   for (const auto& entry: fs::directory_iterator(dir)) {
     if (entry.is_regular_file()) {
-      string filename = entry.path().filename().string();
+      string const filename = entry.path().filename().string();
       auto dot = filename.find('.');
       if (dot != string::npos && startsWith(filename, prefix) && filename.substr(dot + 1) == kind) {
         assert(dot > prefix.size());
@@ -57,7 +58,7 @@ vector<u64> savefiles(fs::path dir, const string& prefix, const string& kind) {
       }
     }
   }
-  std::sort(v.begin(), v.end());
+  std::ranges::sort(v);
   return v;
 }
 
@@ -67,21 +68,21 @@ string str9(u64 k) {
   return buf;
 }
 
-fs::path pathFor(fs::path base, const string& prefix, const string& kind, u64 k) {
+fs::path pathFor(const fs::path& base, const string& prefix, const string& kind, u64 k) {
   return base / (prefix + str9(k) + '.' + kind);
 }
 
-fs::path pathUnverified(fs::path base, const string& prefix) {
+fs::path pathUnverified(const fs::path& base, const string& prefix) {
   return base / (prefix + "unverified.prp");
 }
 
 // find the "most advanced" file in dir with a name of the form
 // <prefix><id>.<kind>
 // e.g.: 125784077-010000000.prp
-fs::path findLast(fs::path dir, const string& prefix, const string& kind) {
+fs::path findLast(const fs::path& dir, const string& prefix, const string& kind) {
   vector<u64> v = savefiles(dir, prefix, kind);
   if (v.empty()) { return {}; }
-  u64 lastK = v.back();
+  u64 const lastK = v.back();
   fs::path path = pathFor(dir, prefix, kind, lastK);
   assert(is_regular_file(path));
   return path;
@@ -93,15 +94,15 @@ PRPState readState(const PRPState& dummy, File fi) {
   u64 res64{};
   double elapsed{};
 
-  string header = fi.readLine();
+  string const header = fi.readLine();
 
   if (sscanf(header.c_str(), PRP_v13, &exponent, &k, &blockSize, &res64, &nErrors, &elapsed) == 6) {
-    return {exponent, k, blockSize, res64, fi.readChecked<u32>(nWords(exponent)), nErrors, elapsed};
+    return {.exponent=exponent, .k=k, .blockSize=blockSize, .res64=res64, .check=fi.readChecked<u32>(nWords(exponent)), .nErrors=nErrors, .elapsed=elapsed};
   }
 
   u32 crc{};
   if (sscanf(header.c_str(), PRP_v12, &exponent, &k, &blockSize, &res64, &nErrors, &crc) == 6) {
-    return {exponent, k, blockSize, res64, fi.readWithCRC<u32>(nWords(exponent), crc), nErrors, 0};
+    return {.exponent=exponent, .k=k, .blockSize=blockSize, .res64=res64, .check=fi.readWithCRC<u32>(nWords(exponent), crc), .nErrors=nErrors, .elapsed=0};
   }
 
   log("Loading PRP from '%s': bad header '%s'\n", fi.name.c_str(), header.c_str());
@@ -112,15 +113,15 @@ LLState readState(const LLState& dummy, File fi) {
   u64 exponent{}, k{};
   double elapsed{};
 
-  string header = fi.readLine();
+  string const header = fi.readLine();
 
   if (sscanf(header.c_str(), LL_v13, &exponent, &k, &elapsed) == 3) {
-    return {exponent, k, fi.readChecked<u32>(nWords(exponent)), elapsed};
+    return {.exponent=exponent, .k=k, .data=fi.readChecked<u32>(nWords(exponent)), .elapsed=elapsed};
   }
 
   u32 crc{};
   if (sscanf(header.c_str(), LL_v1, &exponent, &k, &crc) == 3) {
-    return {exponent, k, fi.readWithCRC<u32>(nWords(exponent), crc), 0};
+    return {.exponent=exponent, .k=k, .data=fi.readWithCRC<u32>(nWords(exponent), crc), .elapsed=0};
   }
 
   log("Loading LL from '%s': bad header '%s'\n", fi.name.c_str(), header.c_str());
@@ -159,11 +160,11 @@ double roundNumberScore(u64 x) {
 } // namespace
 
 template<> PRPState Saver<PRPState>::initState() {
-  return {exponent, 0, blockSize, 3, makeWords(exponent, 1), 0, 0};
+  return {.exponent=exponent, .k=0, .blockSize=blockSize, .res64=3, .check=makeWords(exponent, 1), .nErrors=0, .elapsed=0};
 }
 
 template<> LLState Saver<LLState>::initState() {
-  return {exponent, 0, makeWords(exponent, 4), 0};
+  return {.exponent=exponent, .k=0, .data=makeWords(exponent, 4), .elapsed=0};
 }
 
 
@@ -191,14 +192,14 @@ Saver<State>::~Saver() = default;
 template<typename State>
 void Saver<State>::clear(u64 exponent) {
   error_code dummy;
-  fs::path base = std::is_same_v<State, PRPState> ?
+  fs::path const base = std::is_same_v<State, PRPState> ?
         fs::current_path() / to_string(exponent)
       : fs::current_path() / (string(State::KIND) + '-' + to_string(exponent));
   fs::remove_all(base, dummy);
 }
 
 template<typename State>
-void Saver<State>::moveToTrash(fs::path src) {
+void Saver<State>::moveToTrash(const fs::path& src) {
   log("Removing bad savefile '%s'\n", src.string().c_str());
   fancyRename(src, src + ".bad"s);
 }
@@ -216,7 +217,7 @@ fs::path Saver<State>::mostRecentSavefile() {
 template<typename State>
 State Saver<State>::load() {
   for (int i = 0; i < 2; ++i) {
-    fs::path path = mostRecentSavefile();
+    fs::path const path = mostRecentSavefile();
 
     if (path.empty()) {
       // no savefiles at all
@@ -254,9 +255,9 @@ void Saver<State>::trimFiles() {
     u64 prevK = 0;
 
     for (u32 i = 0; i < v.size() - 1; ++i) {
-      u64 k = v[i];
-      double niceBias = std::min(1.0, roundNumberScore(k) - 4);
-      double span = (v[i + 1] - prevK) * niceBias;
+      u64 const k = v[i];
+      double const niceBias = std::min(1.0, roundNumberScore(k) - 4);
+      double const span = (v[i + 1] - prevK) * niceBias;
       prevK = k;
       if (span < bestSpan) {
         bestSpan = span;
@@ -264,9 +265,9 @@ void Saver<State>::trimFiles() {
       }
     }
     assert(bestIdx >= 0);
-    u64 k = v[bestIdx];
+    u64 const k = v[bestIdx];
     // log("Deleting savefile %" PRIu64 "\n", k);
-    fs::path path = pathFor(base, prefix, State::KIND, k);
+    fs::path const path = pathFor(base, prefix, State::KIND, k);
     fs::remove(path);
     v.erase(v.begin() + bestIdx);
   }
@@ -274,7 +275,7 @@ void Saver<State>::trimFiles() {
 
 template<typename State>
 void Saver<State>::save(const State& state) {
-  fs::path path = pathFor(base, to_string(exponent) + '-', State::KIND, state.k);
+  fs::path const path = pathFor(base, to_string(exponent) + '-', State::KIND, state.k);
   ::writeState(*CycleFile{path}, state);
   trimFiles();
   // log("rm '%s'\n", pathUnverified(base, prefix).string().c_str());
@@ -288,7 +289,7 @@ void Saver<PRPState>::saveUnverified(const PRPState& state) const {
 
 template<typename State>
 void Saver<State>::dropMostRecent() {
-  fs::path path = mostRecentSavefile();
+  fs::path const path = mostRecentSavefile();
   assert(!path.empty());
   if (!path.empty()) { moveToTrash(path); }
 }
diff --git a/src/Saver.h b/src/Saver.h
index 5a3a7ba6..671b7025 100644
--- a/src/Saver.h
+++ b/src/Saver.h
@@ -40,7 +40,7 @@ class Saver {
   u32 nSavefiles;
 
   State initState();
-  void moveToTrash(fs::path file);
+  void moveToTrash(const fs::path& file);
   void trimFiles();
   fs::path mostRecentSavefile();
 
diff --git a/src/Sha3Hash.h b/src/Sha3Hash.h
index f47fc74b..f02b7707 100644
--- a/src/Sha3Hash.h
+++ b/src/Sha3Hash.h
@@ -18,7 +18,7 @@ class Sha3Hash {
   void update(const void* data, u32 size) { SHA3Update(&context, reinterpret_cast<const unsigned char*>(data), size); }
   
   array<u64, 4> finish() && {
-    u64 *p = reinterpret_cast<u64 *>(SHA3Final(&context));
+    u64  const*p = reinterpret_cast<u64 *>(SHA3Final(&context));
     return {p[0], p[1], p[2], p[3]};
   }
 };
diff --git a/src/Signal.cpp b/src/Signal.cpp
index 77192bd2..49b3bed3 100644
--- a/src/Signal.cpp
+++ b/src/Signal.cpp
@@ -8,7 +8,7 @@ using namespace std;
 
 static volatile sig_atomic_t signalled = 0;
 
-static void (* volatile oldHandler)(int) = 0;
+static void (* volatile oldHandler)(int) = nullptr;
 
 static void signalHandler(int signal) { signalled = signal; }
 
@@ -27,6 +27,6 @@ void Signal::release() {
   if (isOwner) {
     isOwner = false;
     signal(SIGINT, oldHandler);
-    oldHandler = 0;
+    oldHandler = nullptr;
   }
 }
diff --git a/src/Task.cpp b/src/Task.cpp
index 28794956..9d8d3648 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -15,6 +15,7 @@
 
 #include <cmath>
 #include <cassert>
+#include <utility>
 
 namespace {
 
@@ -63,9 +64,9 @@ struct OsInfo {
 };
 
 [[maybe_unused]] OsInfo getOsInfoMinimum() {
-  int plat = platform();
-  string os = plat == LINUX_64 || plat == LINUX_32 ? "Linux" : plat == 4 ? "Windows" : plat == MACOSX_64 ? "MacOS" : "";
-  return {os, "", ""};
+  int const plat = platform();
+  string const os = plat == LINUX_64 || plat == LINUX_32 ? "Linux" : plat == 4 ? "Windows" : plat == MACOSX_64 ? "MacOS" : "";
+  return {.os=os, .release="", .arch=""};
 }
 
 #if __has_include(<sys/utsname.h>)
@@ -75,7 +76,7 @@ struct OsInfo {
 OsInfo getOsInfo() {
   utsname buf{};
   uname(&buf);
-  return OsInfo{buf.sysname, buf.release, buf.machine};
+  return OsInfo{.os=buf.sysname, .release=buf.release, .arch=buf.machine};
 }
 
 #else
@@ -124,7 +125,7 @@ vector<string> commonFields(u64 E, const char *worktype, const string &status) {
 
 vector<string> tailFields(const std::string &AID, const Args &args) {
   assert(*VERSION); // version string isn't empty
-  OsInfo os = getOsInfo();
+  OsInfo const os = getOsInfo();
   return {json("program", vector<string>{
                  json("name", "prpll"),
                  json("version", (VERSION[0] == 'v') ? VERSION + 1 : VERSION), // skip leading "v" from version
@@ -144,11 +145,11 @@ vector<string> tailFields(const std::string &AID, const Args &args) {
 
 void writeResult(u32 instance, u64 E, const char *workType, const string &status, const std::string &AID, const Args &args,
                  const vector<string>& extras) {
-  fs::path resultsFile = "results-" + to_string(instance) + ".txt";
+  fs::path const resultsFile = "results-" + to_string(instance) + ".txt";
   vector<string> fields = commonFields(E, workType, status);
   fields += extras;
   fields += tailFields(AID, args);
-  string s = json(std::move(fields));
+  string const s = json(fields);
   log("%s\n", s.c_str());
   File::append(resultsFile, s + '\n');
 }
@@ -166,7 +167,7 @@ void Task::writeResultPRP(FFTConfig fft, const Args &args, u32 instance, bool is
 
   // "proof":{"version":1, "power":6, "hashsize":64, "md5":"0123456789ABCDEF"}, 
   if (!proofPath.empty()) {
-    ProofInfo info = proof::getInfo(proofPath);
+    ProofInfo const info = proof::getInfo(proofPath);
     if (info.power > 0) {
       fields.push_back(json("proof", vector<string>{
                               json("version", 1),
@@ -181,7 +182,7 @@ void Task::writeResultPRP(FFTConfig fft, const Args &args, u32 instance, bool is
 }
 
 void Task::writeResultLL(FFTConfig fft, const Args &args, u32 instance, bool isPrime, u64 res64) const {
-  vector<string> fields{json("res64", hex(res64)),
+  vector<string> const fields{json("res64", hex(res64)),
                         json("fft-type", ffttype(fft)),
                         json("fft-length", fft.size()),
                         json("shift-count", 0),
@@ -192,7 +193,7 @@ void Task::writeResultLL(FFTConfig fft, const Args &args, u32 instance, bool isP
 }
 
 void Task::writeResultCERT(FFTConfig fft, const Args &args, u32 instance, array <u64, 4> hash, u32 squarings) const {
-  string hexhash = hex(hash[3]) + hex(hash[2]) + hex(hash[1]) + hex(hash[0]);
+  string const hexhash = hex(hash[3]) + hex(hash[2]) + hex(hash[1]) + hex(hash[0]);
   vector<string> fields{json("worktype", "Cert"),
                         json("exponent", exponent),
                         json("sha3-hash", hexhash.c_str()),
@@ -203,9 +204,9 @@ void Task::writeResultCERT(FFTConfig fft, const Args &args, u32 instance, array
                         json("error-code", "00000000"), // I don't know the meaning of this
   };
   fields += tailFields(AID, args);
-  string s = json(std::move(fields));
+  string const s = json(fields);
   log("%s\n", s.c_str());
-  fs::path resultsFile = "results-" + to_string(instance) + ".txt";
+  fs::path const resultsFile = "results-" + to_string(instance) + ".txt";
   File::append(resultsFile, s + '\n');
 }
 
@@ -220,24 +221,24 @@ void Task::execute(GpuCommon shared, u32 instance) {
   // is very common to use command line argument "-prp some-random-exponent" to get a quick
   // timing.  Instead, we output a warning and test a smaller prime exponent.
   {
-    Primes primes;
+    Primes const primes;
     if (!primes.isPrime(exponent)) {
-      u64 new_exponent = primes.prevPrime(exponent);
+      u64 const new_exponent = primes.prevPrime(exponent);
       log("Warning: Exponent %" PRIu64 " is not prime.  Using exponent %" PRIu64 " instead.\n", exponent, new_exponent);
       exponent = new_exponent;
     }
   }
 
-  LogContext pushContext(std::to_string(exponent));
+  LogContext const pushContext(std::to_string(exponent));
 
-  FFTConfig fft = FFTConfig::bestFit(*shared.args, exponent, shared.args->fftSpec);
+  FFTConfig const fft = FFTConfig::bestFit(*shared.args, exponent, shared.args->fftSpec);
 
   auto gpu = Gpu::make(exponent, shared, fft);
 
   if (kind == VERIFY) {
-    Proof proof{Proof::load(verifyPath)};
+    Proof const proof{Proof::load(verifyPath)};
     assert(proof.E == exponent);
-    bool ok = proof.verify(gpu.get());
+    bool const ok = proof.verify(gpu.get());
     log("proof '%s' %s\n", verifyPath.c_str(), ok ? "verified" : "failed");
 
   } else if (kind == PRP || kind == LL) {
diff --git a/src/TimeInfo.h b/src/TimeInfo.h
index 872d1945..b99ad4b1 100644
--- a/src/TimeInfo.h
+++ b/src/TimeInfo.h
@@ -29,7 +29,7 @@ class TimeInfo {
 
   bool operator<(const TimeInfo& rhs) const { return times[2] > rhs.times[2]; }
 
-  auto secs() const {
+  [[nodiscard]] auto secs() const {
     std::array<double, 3> ret{};
     for (int i = 0; i < 3; ++i) { ret[i] = times[i] * 1e-9; }
     return ret;
diff --git a/src/Trig.cpp b/src/Trig.cpp
index 917d748f..1359d5c4 100644
--- a/src/Trig.cpp
+++ b/src/Trig.cpp
@@ -80,10 +80,10 @@ TrigCoefs trigCoefs(u32 n) {
   assert(mid % 2 == 1);
   assert(mid <= 15 || (mid % 625 == 0 && mid / 625 <= 13));
 
-  double scale = 1.0 / (twos / 4);
+  double const scale = 1.0 / (twos / 4);
   for (u32 i = 0; i < MUL_TAB.size(); ++i) {
     if (MUL_TAB[i] % mid == 0) {
-      return {MUL_TAB[i] / mid, scaleSin(SIN[i], scale), scaleCos(COS[i], scale)};
+      return {.scale=MUL_TAB[i] / mid, .sinCoefs=scaleSin(SIN[i], scale), .cosCoefs=scaleCos(COS[i], scale)};
     }
   }
   log("Trig tab not found for %u (%u * %u)\n", n, mid, twos);
diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index 67c53d73..933e3116 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -3,8 +3,10 @@
 #include <cstring>
 #include "TrigBufCache.h"
 
-#define SAVE_ONE_MORE_WIDTH_MUL  0      // I want to make saving the only option -- but rocm optimizer is inexplicably making it slower in carryfused
-#define SAVE_ONE_MORE_HEIGHT_MUL 1      // In tailSquare this is the fastest option
+enum {
+SAVE_ONE_MORE_WIDTH_MUL =  0,      // I want to make saving the only option -- but rocm optimizer is inexplicably making it slower in carryfused
+SAVE_ONE_MORE_HEIGHT_MUL = 1      // In tailSquare this is the fastest option
+};
 
 #define _USE_MATH_DEFINES
 #include <cmath>
@@ -25,7 +27,7 @@ double2 root1Fancy(u32 N, u32 k) {
   assert(k < N);
   assert(k < N/4);
 
-  long double angle = M_PIl * k / (N / 2);
+  long double const angle = M_PIl * k / (N / 2);
   return {double(cosl(angle) - 1), double(sinl(angle))};
 }
 
@@ -34,15 +36,15 @@ static double trigError(double c, double s) { return abs(trigNorm(c, s) - 1.0);
 
 // Round trig long double to double as to satisfy c^2 + s^2 == 1 as best as possible
 static double2 roundTrig(long double lc, long double ls) {
-  double c1 = lc;
-  double c2 = nexttoward(c1, lc);
-  double s1 = ls;
-  double s2 = nexttoward(s1, ls);
+  double const c1 = lc;
+  double const c2 = nexttoward(c1, lc);
+  double const s1 = ls;
+  double const s2 = nexttoward(s1, ls);
 
   double c = c1;
   double s = s1;
-  for (double tryC : {c1, c2}) {
-    for (double tryS : {s1, s2}) {
+  for (double const tryC : {c1, c2}) {
+    for (double const tryS : {s1, s2}) {
       if (trigError(tryC, tryS) < trigError(c, s)) {
         c = tryC;
         s = tryS;
@@ -58,13 +60,13 @@ double2 root1(u32 N, u32 k) {
   if (k >= N/2) {
     auto [c, s] = root1(N, k - N/2);
     return {-c, -s};
-  } else if (k > N/4) {
+  } if (k > N/4) {
     auto [c, s] = root1(N, N/2 - k);
     return {-c, s};
-  } else if (k > N/8) {
+  } if (k > N/8) {
     auto [c, s] = root1(N, N/4 - k);
     return {s, c};
-  } else {
+  } 
     assert(k <= N/8);
 
     long double angle = M_PIl * k / (N / 2);
@@ -79,17 +81,17 @@ double2 root1(u32 N, u32 k) {
       return {double(cosl(angle)), double(sinl(angle))};
     }
 #endif
-  }
+ 
 }
 
 // Epsilon value, 2^-250, should have an exact representation as a double.  Used to avoid divide-by-zero in root1over.
 const double epsilon = 5.5271478752604445602472651921923E-76;  // Protect against divide by zero
 
 // Returns the primitive root of unity of order N, to the power k.  Returned format is cosine, sine/cosine.
-double2 root1over(u32 N, u32 k) {
+static double2 root1over(u32 N, u32 k) {
   assert(k < N);
 
-  long double angle = M_PIl * k / (N / 2);
+  long double const angle = M_PIl * k / (N / 2);
   double c = cos(angle);
   long double s = sinl(angle);
 
@@ -99,10 +101,10 @@ double2 root1over(u32 N, u32 k) {
 }
 
 // Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value.
-double root1cos(u32 N, u32 k) {
+static double root1cos(u32 N, u32 k) {
   assert(k < N);
 
-  long double angle = M_PIl * k / (N / 2);
+  long double const angle = M_PIl * k / (N / 2);
   double c = cos(angle);
 
   if (c > -1.0e-15 && c < 1.0e-15) c = epsilon;
@@ -110,10 +112,10 @@ double root1cos(u32 N, u32 k) {
 }
 
 // Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value divided by another cosine value.
-double root1cosover(u32 N, u32 k, double over) {
+static double root1cosover(u32 N, u32 k, double over) {
   assert(k < N);
 
-  long double angle = M_PIl * k / (N / 2);
+  long double const angle = M_PIl * k / (N / 2);
   long double c = cosl(angle);
 
   if (c > -1.0e-15 && c < 1.0e-15) c = epsilon;
@@ -123,9 +125,9 @@ double root1cosover(u32 N, u32 k, double over) {
 static const constexpr bool LOG_TRIG_ALLOC = false;
 
 // Interleave two lines of trig values so that AMD GPUs can use global_load_dwordx4 instructions
-void T2shuffle(u32 size, u32 radix, u32 line, vector<double> &tab) {
+static void T2shuffle(u32 size, u32 radix, u32 line, vector<double> &tab) {
   vector<double> line1, line2;
-  u32 line_size = size / radix;
+  u32 const line_size = size / radix;
   for (u32 col = 0; col < line_size; ++col) {
     line1.push_back(tab[line*line_size + col]);
     line2.push_back(tab[(line+1)*line_size + col]);
@@ -136,9 +138,9 @@ void T2shuffle(u32 size, u32 radix, u32 line, vector<double> &tab) {
   }
 }
 
-vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
+static vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
   if (LOG_TRIG_ALLOC) { log("genSmallTrigFP64(%u, %u)\n", size, radix); }
-  u32 WG = size / radix;
+  u32 const WG = size / radix;
   vector<double2> tab;
 
 // old fft_WIDTH and fft_HEIGHT
@@ -160,7 +162,7 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
     // Sine/cosine values for first fft4 or fft8
     for (u32 line = 1; line < radix; ++line) {
       for (u32 col = 0; col < WG; ++col) {
-        double2 root = root1over(size, col * line);
+        double2 const root = root1over(size, col * line);
         tab1.push_back(root.second);
       }
     }
@@ -168,7 +170,7 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
     // Sine/cosine values for later fft4 or fft8
     for (u32 line = 0; line < radix; ++line) {
       for (u32 col = 0; col < WG; col += radix) {
-        double2 root = root1over(size, col * line);
+        double2 const root = root1over(size, col * line);
         tab1.push_back(root.second);
       }
     }
@@ -176,7 +178,7 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
     // Cosine values for first fft4 or fft8 (output in post-shufl order)
 //TODO: Examine why when sine is 0.0 cosine is not 1.0 or -1.0 (printf is outputting 0.999... and -0.999...)
     for (u32 grp = 0; grp < WG; ++grp) {
-      u32 line = grp / (WG/radix);  // Output "line" number, where each line multiplies a different u[i].  There are radix lines.  Each line has WG values.
+      u32 const line = grp / (WG/radix);  // Output "line" number, where each line multiplies a different u[i].  There are radix lines.  Each line has WG values.
       for (u32 col = 0; col < radix; ++col) {
         double divide_by = 1.0;
         // Compute cosine3 / cosine1
@@ -194,7 +196,7 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
     // Cosine values for later fft4 or fft8 (output in post-shufl order).  Similar to cosines above but output every radix-th value.
     for (u32 grp = 0; grp < radix; ++grp) {
       for (u32 col = 0; col < WG; col += radix) {
-        u32 line = col / (WG/radix);
+        u32 const line = col / (WG/radix);
         double divide_by = 1.0;
         // Compute cosine3 / cosine1
         if ((radix == 4 && line == 3) || (radix == 8 && save_one_more_mul && line == 3)) { 
@@ -213,7 +215,7 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
     for (u32 i = radix; i < 2*radix; i += 2) T2shuffle(size, radix, i, tab1);
 
     // Convert to a vector of double2
-    for (u32 i = 0; i < tab1.size(); i += 2) tab.push_back({tab1[i], tab1[i+1]});
+    for (u32 i = 0; i < tab1.size(); i += 2) tab.emplace_back(tab1[i], tab1[i+1]);
   }
 
   tab.resize(5*size);
@@ -221,16 +223,16 @@ vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
 }
 
 // Generate the small trig values for fft_HEIGHT plus optionally trig values used in pairSq.
-vector<double2> genSmallTrigComboFP64(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
+static vector<double2> genSmallTrigComboFP64(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   if (LOG_TRIG_ALLOC) { log("genSmallTrigComboFP64(%u, %u)\n", size, radix); }
 
   vector<double2> tab = genSmallTrigFP64(size, radix);
 
-  u32 tail_trigs = args->value("TAIL_TRIGS", 2);                   // Default is calculating from scratch, no memory accesses
+  u32 const tail_trigs = args->value("TAIL_TRIGS", 2);                   // Default is calculating from scratch, no memory accesses
 
   // From tailSquare pre-calculate some or all of these:  T2 trig = slowTrig_N(line + H * lowMe, ND / NH * 2);
   if (tail_trigs == 1) {          // Some trig values in memory, some are computed with a complex multiply.  Best option on a Radeon VII.
-    u32 height = size;
+    u32 const height = size;
     // Output line 0 trig values to be read by every u,v pair of lines
     for (u32 me = 0; me < height / radix; ++me) {
       tab.push_back(root1(width * middle * height, width * middle * me));
@@ -242,10 +244,10 @@ vector<double2> genSmallTrigComboFP64(Args *args, u32 width, u32 middle, u32 siz
     }
   }
   if (tail_trigs == 0) {          // All trig values read from memory.  Best option for GPUs with lousy DP performance.
-    u32 height = size;
+    u32 const height = size;
     for (u32 u = 0; u <= width * middle / 2; ++u) {
-      for (u32 v = 0; v < (tail_single_wide ? 1 : 2); ++v) {
-        u32 line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
+      for (u32 v = 0; std::cmp_less(v , (tail_single_wide ? 1 : 2)); ++v) {
+        u32 const line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
         for (u32 me = 0; me < height / radix; ++me) {
           tab.push_back(root1(width * middle * height, line + width * middle * me));
         }
@@ -258,9 +260,11 @@ vector<double2> genSmallTrigComboFP64(Args *args, u32 width, u32 middle, u32 siz
 
 // starting from a MIDDLE of 5 we consider angles in [0, 2Pi/MIDDLE] as worth storing with the
 // cos-1 "fancy" trick.
-#define SHARP_MIDDLE 5
+enum {
+SHARP_MIDDLE = 5
+};
 
-vector<double2> genMiddleTrigFP64(u32 smallH, u32 middle, u32 width) {
+static vector<double2> genMiddleTrigFP64(u32 smallH, u32 middle, u32 width) {
   if (LOG_TRIG_ALLOC) { log("genMiddleTrigFP64(%u, %u, %u)\n", smallH, middle, width); }
   vector<double2> tab;
   if (middle == 1) {
@@ -290,7 +294,7 @@ float2 root1FancyFP32(u32 N, u32 k) {
   assert(k < N);
   assert(k < N/4);
 
-  double angle = M_PI * k / (N / 2);
+  double const angle = M_PI * k / (N / 2);
   return {float(cos(angle) - 1), float(sin(angle))};
 }
 
@@ -299,15 +303,15 @@ static float trigError(float c, float s) { return abs(trigNorm(c, s) - 1.0f); }
 
 // Round trig double to float as to satisfy c^2 + s^2 == 1 as best as possible
 static float2 roundTrig(double lc, double ls) {
-  float c1 = lc;
-  float c2 = nexttoward(c1, lc);
-  float s1 = ls;
-  float s2 = nexttoward(s1, ls);
+  float const c1 = lc;
+  float const c2 = nexttoward(c1, lc);
+  float const s1 = ls;
+  float const s2 = nexttoward(s1, ls);
 
   float c = c1;
   float s = s1;
-  for (float tryC : {c1, c2}) {
-    for (float tryS : {s1, s2}) {
+  for (float const tryC : {c1, c2}) {
+    for (float const tryS : {s1, s2}) {
       if (trigError(tryC, tryS) < trigError(c, s)) {
         c = tryC;
         s = tryS;
@@ -323,28 +327,28 @@ float2 root1FP32(u32 N, u32 k) {
   if (k >= N/2) {
     auto [c, s] = root1FP32(N, k - N/2);
     return {-c, -s};
-  } else if (k > N/4) {
+  } if (k > N/4) {
     auto [c, s] = root1FP32(N, N/2 - k);
     return {-c, s};
-  } else if (k > N/8) {
+  } if (k > N/8) {
     auto [c, s] = root1FP32(N, N/4 - k);
     return {s, c};
-  } else {
+  } 
     assert(k <= N/8);
 
     double angle = M_PI * k / (N / 2);
     return roundTrig(cos(angle), sin(angle));
-  }
+ 
 }
 
 // Epsilon value, 2^-50, should have an exact representation as a float.  Used to avoid divide-by-zero in root1overFP32.
 const double epsilonFP32 = 8.8817841970012523233890533447266e-16;  // Protect against divide by zero
 
 // Returns the primitive root of unity of order N, to the power k.  Returned format is cosine, sine/cosine.
-float2 root1overFP32(u32 N, u32 k) {
+static float2 root1overFP32(u32 N, u32 k) {
   assert(k < N);
 
-  double angle = M_PI * k / (N / 2);
+  double const angle = M_PI * k / (N / 2);
   double c = cos(angle);
   double s = sin(angle);
 
@@ -354,10 +358,10 @@ float2 root1overFP32(u32 N, u32 k) {
 }
 
 // Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value.
-float root1cosFP32(u32 N, u32 k) {
+static float root1cosFP32(u32 N, u32 k) {
   assert(k < N);
 
-  double angle = M_PI * k / (N / 2);
+  double const angle = M_PI * k / (N / 2);
   double c = cos(angle);
 
   if (c > -1.0e-15 && c < 1.0e-15) c = epsilonFP32;
@@ -365,10 +369,10 @@ float root1cosFP32(u32 N, u32 k) {
 }
 
 // Returns the primitive root of unity of order N, to the power k.  Returns only the cosine value divided by another cosine value.
-float root1cosoverFP32(u32 N, u32 k, double over) {
+static float root1cosoverFP32(u32 N, u32 k, double over) {
   assert(k < N);
 
-  double angle = M_PI * k / (N / 2);
+  double const angle = M_PI * k / (N / 2);
   double c = cos(angle);
 
   if (c > -1.0e-15 && c < 1.0e-15) c = epsilonFP32;
@@ -376,9 +380,9 @@ float root1cosoverFP32(u32 N, u32 k, double over) {
 }
 
 // Interleave two lines of trig values so that AMD GPUs can use global_load_dwordx4 instructions
-void F2shuffle(u32 size, u32 radix, u32 line, vector<float> &tab) {
+static void F2shuffle(u32 size, u32 radix, u32 line, vector<float> &tab) {
   vector<float> line1, line2;
-  u32 line_size = size / radix;
+  u32 const line_size = size / radix;
   for (u32 col = 0; col < line_size; ++col) {
     line1.push_back(tab[line*line_size + col]);
     line2.push_back(tab[(line+1)*line_size + col]);
@@ -389,8 +393,8 @@ void F2shuffle(u32 size, u32 radix, u32 line, vector<float> &tab) {
   }
 }
 
-vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
-  u32 WG = size / radix;
+static vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
+  u32 const WG = size / radix;
   vector<float2> tab;
 
 // old fft_WIDTH and fft_HEIGHT
@@ -412,7 +416,7 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
     // Sine/cosine values for first fft4 or fft8
     for (u32 line = 1; line < radix; ++line) {
       for (u32 col = 0; col < WG; ++col) {
-        float2 root = root1overFP32(size, col * line);
+        float2 const root = root1overFP32(size, col * line);
         tab1.push_back(root.second);
       }
     }
@@ -420,14 +424,14 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
     // Sine/cosine values for later fft4 or fft8
     for (u32 line = 0; line < radix; ++line) {
       for (u32 col = 0; col < WG; col += radix) {
-        float2 root = root1overFP32(size, col * line);
+        float2 const root = root1overFP32(size, col * line);
         tab1.push_back(root.second);
       }
     }
 
     // Cosine values for first fft4 or fft8 (output in post-shufl order)
     for (u32 grp = 0; grp < WG; ++grp) {
-      u32 line = grp / (WG/radix);  // Output "line" number, where each line multiplies a different u[i].  There are radix lines.  Each line has WG values.
+      u32 const line = grp / (WG/radix);  // Output "line" number, where each line multiplies a different u[i].  There are radix lines.  Each line has WG values.
       for (u32 col = 0; col < radix; ++col) {
         float divide_by = 1.0;
         // Compute cosine3 / cosine1
@@ -445,7 +449,7 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
     // Cosine values for later fft4 or fft8 (output in post-shufl order).  Similar to cosines above but output every radix-th value.
     for (u32 grp = 0; grp < radix; ++grp) {
       for (u32 col = 0; col < WG; col += radix) {
-        u32 line = col / (WG/radix);
+        u32 const line = col / (WG/radix);
         double divide_by = 1.0;
         // Compute cosine3 / cosine1
         if ((radix == 4 && line == 3) || (radix == 8 && save_one_more_mul && line == 3)) {
@@ -464,7 +468,7 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
     for (u32 i = radix; i < 2*radix; i += 2) F2shuffle(size, radix, i, tab1);
 
     // Convert to a vector of float2
-    for (u32 i = 0; i < tab1.size(); i += 2) tab.push_back({tab1[i], tab1[i+1]});
+    for (u32 i = 0; i < tab1.size(); i += 2) tab.emplace_back(tab1[i], tab1[i+1]);
   }
 
   tab.resize(5*size);
@@ -472,14 +476,14 @@ vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
 }
 
 // Generate the small trig values for fft_HEIGHT plus optionally trig values used in pairSq.
-vector<float2> genSmallTrigComboFP32(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
+static vector<float2> genSmallTrigComboFP32(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   vector<float2> tab = genSmallTrigFP32(size, radix);
 
-  u32 tail_trigs = args->value("TAIL_TRIGS32", 2);          // Default is calculating from scratch, no memory accesses
+  u32 const tail_trigs = args->value("TAIL_TRIGS32", 2);          // Default is calculating from scratch, no memory accesses
 
   // From tailSquare pre-calculate some or all of these:  F2 trig = slowTrig_N(line + H * lowMe, ND / NH * 2);
   if (tail_trigs == 1) {          // Some trig values in memory, some are computed with a complex multiply.
-    u32 height = size;
+    u32 const height = size;
     // Output line 0 trig values to be read by every u,v pair of lines
     for (u32 me = 0; me < height / radix; ++me) {
       tab.push_back(root1FP32(width * middle * height, width * middle * me));
@@ -491,10 +495,10 @@ vector<float2> genSmallTrigComboFP32(Args *args, u32 width, u32 middle, u32 size
     }
   }
   if (tail_trigs == 0) {          // All trig values read from memory.  Best option for GPUs with lousy FP performance?
-    u32 height = size;
+    u32 const height = size;
     for (u32 u = 0; u <= width * middle / 2; ++u) {
-      for (u32 v = 0; v < (tail_single_wide ? 1 : 2); ++v) {
-        u32 line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
+      for (u32 v = 0; std::cmp_less(v , (tail_single_wide ? 1 : 2)); ++v) {
+        u32 const line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
         for (u32 me = 0; me < height / radix; ++me) {
           tab.push_back(root1FP32(width * middle * height, line + width * middle * me));
         }
@@ -505,7 +509,7 @@ vector<float2> genSmallTrigComboFP32(Args *args, u32 width, u32 middle, u32 size
   return tab;
 }
 
-vector<float2> genMiddleTrigFP32(u32 smallH, u32 middle, u32 width) {
+static vector<float2> genMiddleTrigFP32(u32 smallH, u32 middle, u32 width) {
   vector<float2> tab;
   if (middle == 1) {
     tab.resize(1);
@@ -556,10 +560,10 @@ class Z31
         }
 
 public:
-        Z31() {}
+        Z31() = default;
         explicit Z31(const uint32_t n) : _n(n) {}
 
-        uint32_t get() const { return _n; }
+        [[nodiscard]] uint32_t get() const { return _n; }
 
         bool operator!=(const Z31 & rhs) const { return (_n != rhs._n); }
 
@@ -570,7 +574,7 @@ class Z31
         Z31 operator-(const Z31 & rhs) const { return Z31(_sub(_n, rhs._n)); }
         Z31 operator*(const Z31 & rhs) const { return Z31(_mul(_n, rhs._n)); }
 
-        Z31 sqr() const { return Z31(_mul(_n, _n)); }
+        [[nodiscard]] Z31 sqr() const { return Z31(_mul(_n, _n)); }
 };
 
 
@@ -584,20 +588,20 @@ class GF31
         static const uint32_t _h_0 = 7735u, _h_1 = 748621u;
 
 public:
-        GF31() {}
+        GF31() = default;
         explicit GF31(const Z31 & s0, const Z31 & s1) : _s0(s0), _s1(s1) {}
         explicit GF31(const uint32_t n0, const uint32_t n1) : _s0(n0), _s1(n1) {}
 
-        const Z31 & s0() const { return _s0; }
-        const Z31 & s1() const { return _s1; }
+        [[nodiscard]] const Z31 & s0() const { return _s0; }
+        [[nodiscard]] const Z31 & s1() const { return _s1; }
 
         GF31 operator+(const GF31 & rhs) const { return GF31(_s0 + rhs._s0, _s1 + rhs._s1); }
         GF31 operator-(const GF31 & rhs) const { return GF31(_s0 - rhs._s0, _s1 - rhs._s1); }
 
-        GF31 sqr() const { const Z31 t = _s0 * _s1; return GF31(_s0.sqr() - _s1.sqr(), t + t); }
-        GF31 mul(const GF31 & rhs) const { return GF31(_s0 * rhs._s0 - _s1 * rhs._s1, _s1 * rhs._s0 + _s0 * rhs._s1); }
+        [[nodiscard]] GF31 sqr() const { const Z31 t = _s0 * _s1; return GF31(_s0.sqr() - _s1.sqr(), t + t); }
+        [[nodiscard]] GF31 mul(const GF31 & rhs) const { return GF31(_s0 * rhs._s0 - _s1 * rhs._s1, _s1 * rhs._s0 + _s0 * rhs._s1); }
 
-        GF31 pow(const uint64_t e) const
+        [[nodiscard]] GF31 pow(const uint64_t e) const
         {
                 if (e == 0) return GF31(1u, 0u);
                 GF31 r = GF31(1u, 0u), y = *this;
@@ -605,26 +609,26 @@ class GF31
                 return r.mul(y);
         }
 
-        static const GF31 root_one(const size_t n) { return GF31(Z31(_h_0), Z31(_h_1)).pow(_h_order / n); }
+        static GF31 root_one(const size_t n) { return GF31(Z31(_h_0), Z31(_h_1)).pow(_h_order / n); }
         static uint8_t log2_root_two(const size_t n) { return uint8_t(((uint64_t(1) << 30) / n) % 31); }
 };
 
 // Returns the primitive root of unity of order N, to the power k.
-uint2 root1GF31(GF31 root1N, u32 k) {
-  GF31 x = root1N.pow(k);
+static uint2 root1GF31(GF31 root1N, u32 k) {
+  GF31 const x = root1N.pow(k);
   return { x.s0().get(), x.s1().get() };
 }
 uint2 root1GF31(u32 N, u32 k) {
   assert(k < N);
-  GF31 root1N = GF31::root_one(N);
+  GF31 const root1N = GF31::root_one(N);
   return root1GF31(root1N, k);
 }
 
-vector<uint2> genSmallTrigGF31(u32 size, u32 radix) {
-  u32 WG = size / radix;
+static vector<uint2> genSmallTrigGF31(u32 size, u32 radix) {
+  u32 const WG = size / radix;
   vector<uint2> tab;
 
-  GF31 root1size = GF31::root_one(size);
+  GF31 const root1size = GF31::root_one(size);
   for (u32 line = 1; line < radix; ++line) {
     for (u32 col = 0; col < WG; ++col) {
       tab.push_back(root1GF31(root1size, col * line));
@@ -635,14 +639,14 @@ vector<uint2> genSmallTrigGF31(u32 size, u32 radix) {
 }
 
 // Generate the small trig values for fft_HEIGHT plus optionally trig values used in pairSq.
-vector<uint2> genSmallTrigComboGF31(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
+static vector<uint2> genSmallTrigComboGF31(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   vector<uint2> tab = genSmallTrigGF31(size, radix);
 
-  u32 tail_trigs = args->value("TAIL_TRIGS31", 0);          // Default is reading all trigs from memory
+  u32 const tail_trigs = args->value("TAIL_TRIGS31", 0);          // Default is reading all trigs from memory
 
   // From tailSquareGF31 pre-calculate some or all of these:  GF31 trig = slowTrigGF31(line + H * lowMe, ND / NH * 2);
-  u32 height = size;
-  GF31 root1wmh = GF31::root_one(width * middle * height);
+  u32 const height = size;
+  GF31 const root1wmh = GF31::root_one(width * middle * height);
   if (tail_trigs >= 1) {          // Some trig values in memory, some are computed with a complex multiply.  Best option on a Radeon VII.
     // Output line 0 trig values to be read by every u,v pair of lines
     for (u32 me = 0; me < height / radix; ++me) {
@@ -656,8 +660,8 @@ vector<uint2> genSmallTrigComboGF31(Args *args, u32 width, u32 middle, u32 size,
   }
   if (tail_trigs == 0) {          // All trig values read from memory.  Best option for GPUs with great memory performance.
     for (u32 u = 0; u <= width * middle / 2; ++u) {
-      for (u32 v = 0; v < (tail_single_wide ? 1 : 2); ++v) {
-        u32 line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
+      for (u32 v = 0; std::cmp_less(v , (tail_single_wide ? 1 : 2)); ++v) {
+        u32 const line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
         for (u32 me = 0; me < height / radix; ++me) {
           tab.push_back(root1GF31(root1wmh, line + width * middle * me));
         }
@@ -668,18 +672,18 @@ vector<uint2> genSmallTrigComboGF31(Args *args, u32 width, u32 middle, u32 size,
   return tab;
 }
 
-vector<uint2> genMiddleTrigGF31(u32 smallH, u32 middle, u32 width) {
+static vector<uint2> genMiddleTrigGF31(u32 smallH, u32 middle, u32 width) {
   vector<uint2> tab;
   if (middle == 1) {
     tab.resize(1);
   } else {
-    GF31 root1hm = GF31::root_one(smallH * middle);
+    GF31 const root1hm = GF31::root_one(smallH * middle);
     for (u32 m = 1; m < middle; ++m) {
       for (u32 k = 0; k < smallH; ++k) { tab.push_back(root1GF31(root1hm, k * m)); }
     }
-    GF31 root1mw = GF31::root_one(middle * width);
+    GF31 const root1mw = GF31::root_one(middle * width);
     for (u32 k = 0; k < width; ++k)  { tab.push_back(root1GF31(root1mw, k)); }
-    GF31 root1wmh = GF31::root_one(width * middle * smallH);
+    GF31 const root1wmh = GF31::root_one(width * middle * smallH);
     for (u32 k = 0; k < smallH; ++k)  { tab.push_back(root1GF31(root1wmh, k)); }
   }
   return tab;
@@ -714,16 +718,16 @@ class Z61
         static uint64_t _mul(const uint64_t a, const uint64_t b)
         {
                 const u128 t = a * u128(b);
-                const uint64_t lo = uint64_t(t), hi = uint64_t(t >> 64);
+                const auto lo = uint64_t(t), hi = uint64_t(t >> 64);
                 const uint64_t lo61 = lo & _p, hi61 = (lo >> 61) | (hi << 3);
                 return _add(lo61, hi61);
         }
 
 public:
-        Z61() {}
+        Z61() = default;
         explicit Z61(const uint64_t n) : _n(n) {}
 
-        uint64_t get() const { return _n; }
+        [[nodiscard]] uint64_t get() const { return _n; }
 
         bool operator!=(const Z61 & rhs) const { return (_n != rhs._n); }
 
@@ -731,7 +735,7 @@ class Z61
         Z61 operator-(const Z61 & rhs) const { return Z61(_sub(_n, rhs._n)); }
         Z61 operator*(const Z61 & rhs) const { return Z61(_mul(_n, rhs._n)); }
 
-        Z61 sqr() const { return Z61(_mul(_n, _n)); }
+        [[nodiscard]] Z61 sqr() const { return Z61(_mul(_n, _n)); }
 };
 
 // GF((2^61 - 1)^2): the prime field of order p^2, p = 2^61 - 1
@@ -746,20 +750,20 @@ class GF61
         static const uint64_t _h_order = uint64_t(1) << 62;
 
 public:
-        GF61() {}
+        GF61() = default;
         explicit GF61(const Z61 & s0, const Z61 & s1) : _s0(s0), _s1(s1) {}
         explicit GF61(const uint64_t n0, const uint64_t n1) : _s0(n0), _s1(n1) {}
 
-        const Z61 & s0() const { return _s0; }
-        const Z61 & s1() const { return _s1; }
+        [[nodiscard]] const Z61 & s0() const { return _s0; }
+        [[nodiscard]] const Z61 & s1() const { return _s1; }
 
         GF61 operator+(const GF61 & rhs) const { return GF61(_s0 + rhs._s0, _s1 + rhs._s1); }
         GF61 operator-(const GF61 & rhs) const { return GF61(_s0 - rhs._s0, _s1 - rhs._s1); }
 
-        GF61 sqr() const { const Z61 t = _s0 * _s1; return GF61(_s0.sqr() - _s1.sqr(), t + t); }
-        GF61 mul(const GF61 & rhs) const { return GF61(_s0 * rhs._s0 - _s1 * rhs._s1, _s1 * rhs._s0 + _s0 * rhs._s1); }
+        [[nodiscard]] GF61 sqr() const { const Z61 t = _s0 * _s1; return GF61(_s0.sqr() - _s1.sqr(), t + t); }
+        [[nodiscard]] GF61 mul(const GF61 & rhs) const { return GF61(_s0 * rhs._s0 - _s1 * rhs._s1, _s1 * rhs._s0 + _s0 * rhs._s1); }
 
-        GF61 pow(const uint64_t e) const
+        [[nodiscard]] GF61 pow(const uint64_t e) const
         {
                 if (e == 0) return GF61(1u, 0u);
                 GF61 r = GF61(1u, 0u), y = *this;
@@ -767,26 +771,26 @@ class GF61
                 return r.mul(y);
         }
 
-        static const GF61 root_one(const size_t n) { return GF61(Z61(_h_0), Z61(_h_1)).pow(_h_order / n); }
+        static GF61 root_one(const size_t n) { return GF61(Z61(_h_0), Z61(_h_1)).pow(_h_order / n); }
         static uint8_t log2_root_two(const size_t n) { return uint8_t(((uint64_t(1) << 60) / n) % 61); }
 };
 
 // Returns the primitive root of unity of order N, to the power k.
-ulong2 root1GF61(GF61 root1N, u32 k) {
-  GF61 x = root1N.pow(k);
+static ulong2 root1GF61(GF61 root1N, u32 k) {
+  GF61 const x = root1N.pow(k);
   return { x.s0().get(), x.s1().get() };
 }
 ulong2 root1GF61(u32 N, u32 k) {
   assert(k < N);
-  GF61 root1N = GF61::root_one(N);
+  GF61 const root1N = GF61::root_one(N);
   return root1GF61(root1N, k);
 }
 
-vector<ulong2> genSmallTrigGF61(u32 size, u32 radix) {
-  u32 WG = size / radix;
+static vector<ulong2> genSmallTrigGF61(u32 size, u32 radix) {
+  u32 const WG = size / radix;
   vector<ulong2> tab;
 
-  GF61 root1size = GF61::root_one(size);
+  GF61 const root1size = GF61::root_one(size);
   for (u32 line = 1; line < radix; ++line) {
     for (u32 col = 0; col < WG; ++col) {
       tab.push_back(root1GF61(root1size, col * line));
@@ -797,14 +801,14 @@ vector<ulong2> genSmallTrigGF61(u32 size, u32 radix) {
 }
 
 // Generate the small trig values for fft_HEIGHT plus optionally trig values used in pairSq.
-vector<ulong2> genSmallTrigComboGF61(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
+static vector<ulong2> genSmallTrigComboGF61(Args *args, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   vector<ulong2> tab = genSmallTrigGF61(size, radix);
 
-  u32 tail_trigs = args->value("TAIL_TRIGS61", 0);          // Default is reading all trigs from memory
+  u32 const tail_trigs = args->value("TAIL_TRIGS61", 0);          // Default is reading all trigs from memory
 
   // From tailSquareGF61 pre-calculate some or all of these:  GF61 trig = slowTrigGF61(line + H * lowMe, ND / NH * 2);
-  u32 height = size;
-  GF61 root1wmh = GF61::root_one(width * middle * height);
+  u32 const height = size;
+  GF61 const root1wmh = GF61::root_one(width * middle * height);
   if (tail_trigs >= 1) {          // Some trig values in memory, some are computed with a complex multiply.  Best option on a Radeon VII.
     // Output line 0 trig values to be read by every u,v pair of lines
     for (u32 me = 0; me < height / radix; ++me) {
@@ -818,8 +822,8 @@ vector<ulong2> genSmallTrigComboGF61(Args *args, u32 width, u32 middle, u32 size
   }
   if (tail_trigs == 0) {          // All trig values read from memory.  Best option for GPUs with great memory performance.
     for (u32 u = 0; u <= width * middle / 2; ++u) {
-      for (u32 v = 0; v < (tail_single_wide ? 1 : 2); ++v) {
-        u32 line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
+      for (u32 v = 0; std::cmp_less(v , (tail_single_wide ? 1 : 2)); ++v) {
+        u32 const line = (v == 0) ? u : (u ? width * middle - u : width * middle / 2);
         for (u32 me = 0; me < height / radix; ++me) {
           tab.push_back(root1GF61(root1wmh, line + width * middle * me));
         }
@@ -830,18 +834,18 @@ vector<ulong2> genSmallTrigComboGF61(Args *args, u32 width, u32 middle, u32 size
   return tab;
 }
 
-vector<ulong2> genMiddleTrigGF61(u32 smallH, u32 middle, u32 width) {
+static vector<ulong2> genMiddleTrigGF61(u32 smallH, u32 middle, u32 width) {
   vector<ulong2> tab;
   if (middle == 1) {
     tab.resize(1);
   } else {
-    GF61 root1hm = GF61::root_one(smallH * middle);
+    GF61 const root1hm = GF61::root_one(smallH * middle);
     for (u32 m = 1; m < middle; ++m) {
       for (u32 k = 0; k < smallH; ++k) { tab.push_back(root1GF61(root1hm, k * m)); }
     }
-    GF61 root1mw = GF61::root_one(middle * width);
+    GF61 const root1mw = GF61::root_one(middle * width);
     for (u32 k = 0; k < width; ++k)  { tab.push_back(root1GF61(root1mw, k)); }
-    GF61 root1wmh = GF61::root_one(width * middle * smallH);
+    GF61 const root1wmh = GF61::root_one(width * middle * smallH);
     for (u32 k = 0; k < smallH; ++k)  { tab.push_back(root1GF61(root1wmh, k)); }
   }
   return tab;
@@ -852,7 +856,7 @@ vector<ulong2> genMiddleTrigGF61(u32 smallH, u32 middle, u32 width) {
 /*  Build all the needed trig values into one big buffer  */
 /**********************************************************/
 
-vector<double2> genSmallTrig(FFTConfig fft, u32 size, u32 radix) {
+static vector<double2> genSmallTrig(FFTConfig fft, u32 size, u32 radix) {
   vector<double2> tab;
   u32 tabsize;
 
@@ -891,7 +895,7 @@ vector<double2> genSmallTrig(FFTConfig fft, u32 size, u32 radix) {
   return tab;
 }
 
-vector<double2> genSmallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
+static vector<double2> genSmallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   vector<double2> tab;
   u32 tabsize;
 
@@ -930,7 +934,7 @@ vector<double2> genSmallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 midd
   return tab;
 }
 
-vector<double2> genMiddleTrig(FFTConfig fft, u32 smallH, u32 middle, u32 width) {
+static vector<double2> genMiddleTrig(FFTConfig fft, u32 smallH, u32 middle, u32 width) {
   vector<double2> tab;
   u32 tabsize;
 
@@ -974,32 +978,32 @@ vector<double2> genMiddleTrig(FFTConfig fft, u32 smallH, u32 middle, u32 width)
 /*        Code to manage a cache of trigBuffers         */
 /********************************************************/
 
-#define make_key_part(b,tt,b31,tt31,b32,tt32,b61,tt61,tk) ((((((((b+tt) << 2) + b31+tt31) << 2) + b32+tt32) << 2) + b61+tt61) << 2) + tk
+#define make_key_part(b,tt,b31,tt31,b32,tt32,b61,tt61,tk) ((((((((((b)+(tt)) << 2) + (b31)+(tt31)) << 2) + (b32)+(tt32)) << 2) + (b61)+(tt61)) << 2) + (tk))
 
 TrigBufCache::~TrigBufCache() = default;
 
 TrigPtr TrigBufCache::smallTrig(Args *args, FFTConfig fft, u32 width, u32 nW, u32 middle, u32 height, u32 nH, bool tail_single_wide) {
-  lock_guard lock{mut};
+  std::scoped_lock const lock{mut};
   auto& m = small;
   TrigPtr p{};
 
-  u32 tail_trigs = args->value("TAIL_TRIGS", 2);                 // Default is calculating FP64 trigs from scratch, no memory accesses
-  u32 tail_trigs31 = args->value("TAIL_TRIGS31", 2);             // Default is reading GF31 trigs from memory
-  u32 tail_trigs32 = args->value("TAIL_TRIGS32", 2);             // Default is calculating FP32 trigs from scratch, no memory accesses
-  u32 tail_trigs61 = args->value("TAIL_TRIGS61", 2);             // Default is reading GF61 trigs from memory
-  u32 key_part = make_key_part(fft.FFT_FP64, tail_trigs, fft.NTT_GF31, tail_trigs31, fft.FFT_FP32, tail_trigs32, fft.NTT_GF61, tail_trigs61, tail_single_wide);
+  u32 const tail_trigs = args->value("TAIL_TRIGS", 2);                 // Default is calculating FP64 trigs from scratch, no memory accesses
+  u32 const tail_trigs31 = args->value("TAIL_TRIGS31", 2);             // Default is reading GF31 trigs from memory
+  u32 const tail_trigs32 = args->value("TAIL_TRIGS32", 2);             // Default is calculating FP32 trigs from scratch, no memory accesses
+  u32 const tail_trigs61 = args->value("TAIL_TRIGS61", 2);             // Default is reading GF61 trigs from memory
+  u32 const key_part = make_key_part(fft.FFT_FP64, tail_trigs, fft.NTT_GF31, tail_trigs31, fft.FFT_FP32, tail_trigs32, fft.NTT_GF61, tail_trigs61, tail_single_wide);
 
   // See if there is an existing smallTrigCombo that we can return (using only a subset of the data)
   // In theory, we could match any smallTrigCombo where width matches.  However, SMALLTRIG_GF31_SIZE wouldn't be able to figure out the size.
   // In practice, those cases will likely never arise.
   if (width == height && nW == nH) {
-    decay_t<decltype(m)>::key_type key{height, nH, width, middle, key_part};
+    decay_t<decltype(m)>::key_type const key{height, nH, width, middle, key_part};
     auto it = m.find(key);
     if (it != m.end() && (p = it->second.lock())) return p;
   }
 
   // See if there is an existing non-combo smallTrig that we can return
-  decay_t<decltype(m)>::key_type key{width, nW, 0, 0, key_part}; 
+  decay_t<decltype(m)>::key_type const key{width, nW, 0, 0, key_part}; 
   auto it = m.find(key);
   if (it != m.end() && (p = it->second.lock())) return p;
 
@@ -1011,19 +1015,19 @@ TrigPtr TrigBufCache::smallTrig(Args *args, FFTConfig fft, u32 width, u32 nW, u3
 }
 
 TrigPtr TrigBufCache::smallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 middle, u32 height, u32 nH, bool tail_single_wide) {
-  u32 tail_trigs = args->value("TAIL_TRIGS", 2);                 // Default is calculating FP64 trigs from scratch, no memory accesses
-  u32 tail_trigs31 = args->value("TAIL_TRIGS31", 2);             // Default is reading GF31 trigs from memory
-  u32 tail_trigs32 = args->value("TAIL_TRIGS32", 2);             // Default is calculating FP32 trigs from scratch, no memory accesses
-  u32 tail_trigs61 = args->value("TAIL_TRIGS61", 2);             // Default is reading GF61 trigs from memory
-  u32 key_part = make_key_part(fft.FFT_FP64, tail_trigs, fft.NTT_GF31, tail_trigs31, fft.FFT_FP32, tail_trigs32, fft.NTT_GF61, tail_trigs61, tail_single_wide);
+  u32 const tail_trigs = args->value("TAIL_TRIGS", 2);                 // Default is calculating FP64 trigs from scratch, no memory accesses
+  u32 const tail_trigs31 = args->value("TAIL_TRIGS31", 2);             // Default is reading GF31 trigs from memory
+  u32 const tail_trigs32 = args->value("TAIL_TRIGS32", 2);             // Default is calculating FP32 trigs from scratch, no memory accesses
+  u32 const tail_trigs61 = args->value("TAIL_TRIGS61", 2);             // Default is reading GF61 trigs from memory
+  u32 const key_part = make_key_part(fft.FFT_FP64, tail_trigs, fft.NTT_GF31, tail_trigs31, fft.FFT_FP32, tail_trigs32, fft.NTT_GF61, tail_trigs61, tail_single_wide);
 
   // If there are no pre-computed trig values we might be able to share this trig table with fft_WIDTH
   if (((tail_trigs == 2 && fft.FFT_FP64) || (tail_trigs32 == 2 && fft.FFT_FP32)) && !fft.NTT_GF31 && !fft.NTT_GF61)
     return smallTrig(args, fft, height, nH, middle, height, nH, tail_single_wide);
 
-  lock_guard lock{mut};
+  std::scoped_lock const lock{mut};
   auto& m = small;
-  decay_t<decltype(m)>::key_type key{height, nH, width, middle, key_part};
+  decay_t<decltype(m)>::key_type const key{height, nH, width, middle, key_part};
 
   TrigPtr p{};
   auto it = m.find(key);
@@ -1035,11 +1039,11 @@ TrigPtr TrigBufCache::smallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 m
   return p;
 }
 
-TrigPtr TrigBufCache::middleTrig(Args *args, FFTConfig fft, u32 SMALL_H, u32 MIDDLE, u32 width) {
-  lock_guard lock{mut};
+TrigPtr TrigBufCache::middleTrig(Args * /*args*/, FFTConfig fft, u32 SMALL_H, u32 MIDDLE, u32 width) {
+  std::scoped_lock const lock{mut};
   auto& m = middle;
-  u32 key_part = make_key_part(fft.FFT_FP64, 0, fft.NTT_GF31, 0, fft.FFT_FP32, 0, fft.NTT_GF61, 0, 0);
-  decay_t<decltype(m)>::key_type key{SMALL_H, MIDDLE, width, key_part};
+  u32 const key_part = make_key_part(fft.FFT_FP64, 0, fft.NTT_GF31, 0, fft.FFT_FP32, 0, fft.NTT_GF61, 0, 0);
+  decay_t<decltype(m)>::key_type const key{SMALL_H, MIDDLE, width, key_part};
 
   TrigPtr p{};
   auto it = m.find(key);
diff --git a/src/TrigBufCache.h b/src/TrigBufCache.h
index 1808b355..35482084 100644
--- a/src/TrigBufCache.h
+++ b/src/TrigBufCache.h
@@ -6,6 +6,7 @@
 #include "FFTConfig.h"
 
 #include <mutex>
+#include <utility>
 
 using TrigBuf = Buffer<double2>;
 using TrigPtr = shared_ptr<TrigBuf>;
@@ -18,7 +19,7 @@ class StrongCache {
   explicit StrongCache(u32 size) : ptrs(size) {}
 
   void add(TrigPtr ptr) {
-    ptrs.at(pos) = ptr;
+    ptrs.at(pos) = std::move(ptr);
     if (++pos >= ptrs.size()) { pos = 0; }
   }
 };
@@ -58,24 +59,24 @@ uint2 root1GF31(u32 N, u32 k);
 ulong2 root1GF61(u32 N, u32 k);
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of double2 values)
-#define SMALLTRIG_FP64_SIZE(W,M,H,nH)           (W != H || H == 0 ? W * 5 : SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)) // See genSmallTrigFP64
-#define SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)      (H * 5 + (W * M / 2 + 1) * 2 * H / nH)                          // See genSmallTrigComboFP64
-#define MIDDLETRIG_FP64_SIZE(W,M,H)             (H + W + H)                                                     // See genMiddleTrigFP64
+#define SMALLTRIG_FP64_SIZE(W,M,H,nH)           ((W) != (H) || (H) == 0 ? (W) * 5 : SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)) // See genSmallTrigFP64
+#define SMALLTRIGCOMBO_FP64_SIZE(W,M,H,nH)      ((H) * 5 + ((W) * (M) / 2 + 1) * 2 * (H) / (nH))                          // See genSmallTrigComboFP64
+#define MIDDLETRIG_FP64_SIZE(W,M,H)             ((H) + (W) + (H))                                                     // See genMiddleTrigFP64
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of float2 values)
-#define SMALLTRIG_FP32_SIZE(W,M,H,nH)           (W != H || H == 0 ? W * 5 : SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)) // See genSmallTrigFP32
-#define SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)      (H * 5 + (W * M / 2 + 1) * 2 * H / nH)                          // See genSmallTrigComboFP32
-#define MIDDLETRIG_FP32_SIZE(W,M,H)             (H + W + H)                                                     // See genMiddleTrigFP32
+#define SMALLTRIG_FP32_SIZE(W,M,H,nH)           ((W) != (H) || (H) == 0 ? (W) * 5 : SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)) // See genSmallTrigFP32
+#define SMALLTRIGCOMBO_FP32_SIZE(W,M,H,nH)      ((H) * 5 + ((W) * (M) / 2 + 1) * 2 * (H) / (nH))                          // See genSmallTrigComboFP32
+#define MIDDLETRIG_FP32_SIZE(W,M,H)             ((H) + (W) + (H))                                                     // See genMiddleTrigFP32
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of uint2 values)
-#define SMALLTRIG_GF31_SIZE(W,M,H,nH)           (W != H || H == 0 ? W : SMALLTRIGCOMBO_GF31_SIZE(W,M,H,nH))     // See genSmallTrigGF31
-#define SMALLTRIGCOMBO_GF31_SIZE(W,M,H,nH)      (H + (W * M / 2 + 1) * 2 * H / nH)                              // See genSmallTrigComboGF31
-#define MIDDLETRIG_GF31_SIZE(W,M,H)             (H * (M - 1) + W + H)                                           // See genMiddleTrigGF31
+#define SMALLTRIG_GF31_SIZE(W,M,H,nH)           ((W) != (H) || (H) == 0 ? (W) : SMALLTRIGCOMBO_GF31_SIZE(W,M,H,nH))     // See genSmallTrigGF31
+#define SMALLTRIGCOMBO_GF31_SIZE(W,M,H,nH)      ((H) + ((W) * (M) / 2 + 1) * 2 * (H) / (nH))                              // See genSmallTrigComboGF31
+#define MIDDLETRIG_GF31_SIZE(W,M,H)             ((H) * ((M) - 1) + (W) + (H))                                           // See genMiddleTrigGF31
 
 // Compute the size of the largest possible trig buffer given width, middle, height (in number of ulong2 values)
-#define SMALLTRIG_GF61_SIZE(W,M,H,nH)           (W != H || H == 0 ? W : SMALLTRIGCOMBO_GF61_SIZE(W,M,H,nH))     // See genSmallTrigGF61
-#define SMALLTRIGCOMBO_GF61_SIZE(W,M,H,nH)      (H + (W * M / 2 + 1) * 2 * H / nH)                              // See genSmallTrigComboGF61
-#define MIDDLETRIG_GF61_SIZE(W,M,H)             (H * (M - 1) + W + H)                                           // See genMiddleTrigGF61
+#define SMALLTRIG_GF61_SIZE(W,M,H,nH)           ((W) != (H) || (H) == 0 ? (W) : SMALLTRIGCOMBO_GF61_SIZE(W,M,H,nH))     // See genSmallTrigGF61
+#define SMALLTRIGCOMBO_GF61_SIZE(W,M,H,nH)      ((H) + ((W) * (M) / 2 + 1) * 2 * (H) / (nH))                              // See genSmallTrigComboGF61
+#define MIDDLETRIG_GF61_SIZE(W,M,H)             ((H) * ((M) - 1) + (W) + (H))                                           // See genMiddleTrigGF61
 
 // Convert above sizes to distances (in units of double2)
 #define SMALLTRIG_FP64_DIST(W,M,H,nH)           SMALLTRIG_FP64_SIZE(W,M,H,nH)
diff --git a/src/TuneEntry.cpp b/src/TuneEntry.cpp
index 68b6915d..e1a0900b 100644
--- a/src/TuneEntry.cpp
+++ b/src/TuneEntry.cpp
@@ -7,7 +7,7 @@
 
 // Returns whether *results* was updated.
 bool TuneEntry::update(vector<TuneEntry>& results) const {
-  u64 maxExp = fft.maxExp();
+  u64 const maxExp = fft.maxExp();
   [[maybe_unused]] bool didErase = false;
 
   int i{};
@@ -29,11 +29,11 @@ bool TuneEntry::update(vector<TuneEntry>& results) const {
 
 // Returns whether entry *e* represents an improvement over *results* (i.e. would update the results).
 bool TuneEntry::willUpdate(const vector<TuneEntry>& results) const {
-  u64 maxExp = fft.maxExp();
+  u64 const maxExp = fft.maxExp();
   for (const auto& r : results) {
     if (r.cost > cost) {
       break;
-    } else if (r.fft.maxExp() >= maxExp) {
+    } if (r.fft.maxExp() >= maxExp) {
       return false;
     }
   }
@@ -61,7 +61,7 @@ vector<TuneEntry> TuneEntry::readTuneFile(const Args& args) {
     if (sscanf(line.c_str(), "%lf %31s", &cost, specBuf) < 2) {
       log("tune.txt line '%s' ignored\n", line.c_str());
     }
-    FFTConfig fft{specBuf};
+    FFTConfig const fft{specBuf};
     assert(cost >= prevCost && fft.maxExp() > prevMaxExp);
     prevCost = cost;
     prevMaxExp = fft.maxExp();
@@ -76,7 +76,7 @@ void TuneEntry::writeTuneFile(const vector<TuneEntry>& results) {
   [[maybe_unused]] double prevCost{};
   CycleFile tune{"tune.txt"};
   for (const TuneEntry& r : results) {
-    u64 maxExp = r.fft.maxExp();
+    u64 const maxExp = r.fft.maxExp();
     assert(r.cost >= prevCost && maxExp > prevMaxExp);
     prevCost = r.cost;
     prevMaxExp = maxExp;
diff --git a/src/TuneEntry.h b/src/TuneEntry.h
index 79a0d06a..73a86e9e 100644
--- a/src/TuneEntry.h
+++ b/src/TuneEntry.h
@@ -14,7 +14,7 @@ class TuneEntry {
   FFTConfig fft;
 
   bool update(std::vector<TuneEntry>&) const;
-  bool willUpdate(const vector<TuneEntry>&) const;
+  [[nodiscard]] bool willUpdate(const vector<TuneEntry>&) const;
 
   static vector<TuneEntry> readTuneFile(const Args& args);
   static void writeTuneFile(const vector<TuneEntry>&);
diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 63762490..0fd025dd 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -36,7 +36,7 @@ std::optional<Task> parse(const std::string& line) {
   bool isCERT = false;
 
   if (topParts.size() == 2) {
-    string kind = topParts.front();
+    const string& kind = topParts.front();
     if (kind == "PRP" || kind == "PRPDC") {
       isPRP = true;
     } else if (kind == "Test" || kind == "DoubleCheck") {
@@ -58,14 +58,14 @@ std::optional<Task> parse(const std::string& line) {
       parts.erase(parts.begin());
     }
 
-    string s = (parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && (parts[3] == "-1" || parts[3] == "-1\n")) ? parts[2]
+    string const s = (parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && (parts[3] == "-1" || parts[3] == "-1\n")) ? parts[2]
       : (!parts.empty() ? parts[0] : "");
 
     const char *end = s.c_str() + s.size();
     u64 exp{};
     auto [ptr, _] = from_chars(s.c_str(), end, exp, 10);
     if (ptr != end) { exp = 0; }
-    if (exp > 1000) { return {{isPRP ? Task::PRP : Task::LL, u32(exp), AID, line, 0}}; }
+    if (exp > 1000) { return {{.kind=isPRP ? Task::PRP : Task::LL, .exponent=u32(exp), .AID=AID, .line=line, .squarings=0}}; }
   }
   if (isCERT) {
     vector<string> parts = split(topParts.back(), ',');
@@ -84,7 +84,7 @@ std::optional<Task> parse(const std::string& line) {
 	u64 squarings{0};
 	from_chars(s.c_str(), end, squarings, 10);
 //printf ("Exec cert %d %d \n", (int) exp, (int) squarings);
-	if (exp > 1000 && squarings > 100) { return {{Task::CERT, u32(exp), AID, line, u32(squarings) }}; }
+	if (exp > 1000 && squarings > 100) { return {{.kind=Task::CERT, .exponent=u32(exp), .AID=AID, .line=line, .squarings=u32(squarings) }}; }
       }
     }
   }
@@ -110,7 +110,7 @@ string workName(i32 instance) { return "worktodo-" + to_string(instance) + ".txt
 
 optional<Task> getWork(Args& args, i32 instance) {
   string filename = workName(instance);           // Used for printf statements.  Using fd::path is problematic because it 8-bit char in Linux and 16-bit char in Windows.
-  fs::path localWork = filename;
+  fs::path const localWork = filename;
 
   // Try to get a task from the local worktodo-<N> file.
   if (optional<Task> task = bestTask(localWork, args.smallest)) { return task; }
@@ -118,7 +118,7 @@ optional<Task> getWork(Args& args, i32 instance) {
   if (args.masterDir.empty()) { log("No work to do found.  Add work to %s.\n", filename.c_str()); return {}; }
 
   filename = "worktodo.txt";
-  fs::path worktodo = args.masterDir / filename;
+  fs::path const worktodo = args.masterDir / filename;
 
   /*
     We need to aquire a task from the global worktodo.txt, and "atomically"
@@ -139,13 +139,13 @@ optional<Task> getWork(Args& args, i32 instance) {
   */
 
   for (int retry = 0; retry < 2; ++retry) {
-    u64 initialSize = fileSize(worktodo);
+    u64 const initialSize = fileSize(worktodo);
     if (!initialSize) { return {}; }
 
     optional<Task> task = bestTask(worktodo, args.smallest);
     if (!task) { return {}; }
 
-    string workLine = task->line;
+    string const workLine = task->line;
     File::append(localWork, workLine);
 
     if (deleteLine(worktodo, workLine, initialSize)) {
@@ -153,7 +153,7 @@ optional<Task> getWork(Args& args, i32 instance) {
     }
 
     // Undo add to local worktodo. Attempt twice.
-    bool found = deleteLine(localWork, workLine) || deleteLine(localWork, workLine);
+    bool const found = deleteLine(localWork, workLine) || deleteLine(localWork, workLine);
     assert(found);
     if (!found) { return {}; }
   }
@@ -169,14 +169,14 @@ optional<Task> getWork(Args& args, i32 instance) {
 std::optional<Task> Worktodo::getTask(Args &args, i32 instance) {
   if (instance == 0) {
     if (args.prpExp) {
-      u64 exp = args.prpExp;
+      u64 const exp = args.prpExp;
       args.prpExp = 0;
-      return Task{Task::PRP, exp};
-    } else if (args.llExp) {
-      u64 exp = args.llExp;
+      return Task{.kind=Task::PRP, .exponent=exp};
+    } if (args.llExp) {
+      u64 const exp = args.llExp;
       args.llExp = 0;
-      return Task{Task::LL, exp};
-    } else if (!args.verifyPath.empty()) {
+      return Task{.kind=Task::LL, .exponent=exp};
+    } if (!args.verifyPath.empty()) {
       auto path = args.verifyPath;
       args.verifyPath.clear();
       return Task{.kind=Task::VERIFY, .verifyPath=path};
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 1152a7bb..99a7e6de 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -1,6 +1,5 @@
 // Copyright (C) 2017-2024 Mihai Preda.
 
-#include "timeutil.h"
 #include "File.h"
 #include "clwrap.h"
 
@@ -16,7 +15,7 @@
 using namespace std;
 
 // starting at 0 to -70
-array<string, 71> ERR_MES = {
+static array<string, 71> ERR_MES = {
 "SUCCESS", "DEVICE_NOT_FOUND", "DEVICE_NOT_AVAILABLE", "COMPILER_NOT_AVAILABLE",
 "MEM_OBJECT_ALLOCATION_FAILURE", "OUT_OF_RESOURCES", "OUT_OF_HOST_MEMORY", "PROFILING_INFO_NOT_AVAILABLE",
 "MEM_COPY_OVERLAP", "IMAGE_FORMAT_MISMATCH", "IMAGE_FORMAT_NOT_SUPPORTED", "BUILD_PROGRAM_FAILURE",
@@ -37,8 +36,8 @@ array<string, 71> ERR_MES = {
 };
 
 string errMes(int err) {
-  string nb = " ("s + to_string(err) + ")";
-  string mes = (err <= 0 && err >= -70) ? ERR_MES[-err] : 
+  string const nb = " ("s + to_string(err) + ")";
+  string const mes = (err <= 0 && err >= -70) ? ERR_MES[-err] : 
     (err == -1001) ? "ICD_NOT_FOUND" : ""s;
   return mes + nb;
 }
@@ -62,10 +61,10 @@ void check(int err, const char *file, int line, const char *func, string_view me
 }
 
 static void getInfo_(cl_device_id id, int what, size_t bufSize, void *buf, string_view whatStr) {
-  CHECK2(clGetDeviceInfo(id, what, bufSize, buf, NULL), whatStr);
+  CHECK2(clGetDeviceInfo(id, what, bufSize, buf, nullptr), whatStr);
 }
 
-#define GET_INFO(id, what, where) getInfo_(id, what, sizeof(where), &where, #what)
+#define GET_INFO(id, what, where) getInfo_(id, what, sizeof(where), &(where), #what)
 
 
 string getBdfFromDevice(cl_device_id id) {
@@ -215,7 +214,7 @@ cl_device_id getDevice(u32 argsDeviceId) {
 
 cl_context createContext(cl_device_id id) {  
   int err;
-  cl_context context = clCreateContext(NULL, 1, &id, NULL, NULL, &err);
+  cl_context context = clCreateContext(nullptr, 1, &id, nullptr, nullptr, &err);
   CHECK2(err, "clCreateContext");
   return context;
 }
@@ -230,7 +229,7 @@ void release(cl_event event)     { CHECK1(clReleaseEvent(event)); }
 
 Program loadSource(cl_context context, const string &source) {
   const char *ptr = source.c_str();
-  size_t size = source.size();
+  size_t const size = source.size();
   int err = 0;
   cl_program program = clCreateProgramWithSource(context, 1, &ptr, &size, &err);
   CHECK2(err, "clCreateProgramWithSource");
@@ -248,7 +247,7 @@ string getBuildLog(cl_program program, cl_device_id deviceId) {
       log("getBuildLog: log size is %lu bytes, not showing\n", (unsigned long) logSize);
       return {};
     }
-    std::unique_ptr<char[]> buf(new char[logSize + 1]);
+    std::unique_ptr<char[]> const buf(new char[logSize + 1]);
     err = clGetProgramBuildInfo(program, deviceId, CL_PROGRAM_BUILD_LOG, logSize, buf.get(), &logSize);
     CHECK2(err, "clGetProgramBuildInfo");
     buf.get()[logSize] = 0;
@@ -260,28 +259,28 @@ string getBuildLog(cl_program program, cl_device_id deviceId) {
 Program loadBinary(cl_context context, cl_device_id id, string_view fileName) {
   File f = File::openRead(fileName);
   if (!f) { return {}; }
-  string bytes = f.readAll();
-  size_t size = bytes.size();
-  const unsigned char *ptr = reinterpret_cast<const unsigned char *>(bytes.c_str());
+  string const bytes = f.readAll();
+  size_t const size = bytes.size();
+  const auto *ptr = reinterpret_cast<const unsigned char *>(bytes.c_str());
   int err = 0;
-  cl_program program = clCreateProgramWithBinary(context, 1, &id, &size, &ptr, NULL, &err);
+  cl_program program = clCreateProgramWithBinary(context, 1, &id, &size, &ptr, nullptr, &err);
   if (err) {
     log("Load binary %s : %s\n", string(fileName).c_str(), errMes(err).c_str());
     return {};
   }
-  if ((err = clBuildProgram(program, 1, &id, NULL, NULL, NULL))) {
+  if ((err = clBuildProgram(program, 1, &id, nullptr, nullptr, nullptr))) {
     log("Build binary %s : %s\n", string(fileName).c_str(), errMes(err).c_str());
     return {};
   }
   return Program{program};
 }
 
-string getBinary(cl_program program) {
+static string getBinary(cl_program program) {
   size_t size;
-  CHECK1(clGetProgramInfo(program, CL_PROGRAM_BINARY_SIZES, sizeof(size), &size, NULL));
+  CHECK1(clGetProgramInfo(program, CL_PROGRAM_BINARY_SIZES, sizeof(size), &size, nullptr));
   auto buf = make_unique<char[]>(size + 1);
-  char *ptr = buf.get();
-  CHECK1(clGetProgramInfo(program, CL_PROGRAM_BINARIES, sizeof(&buf), &ptr, NULL));
+  char  const*ptr = buf.get();
+  CHECK1(clGetProgramInfo(program, CL_PROGRAM_BINARIES, sizeof(&buf), &ptr, nullptr));
   return {buf.get(), size};
 }
 
@@ -330,27 +329,27 @@ EventHolder run(cl_queue queue, cl_kernel kernel,
                 vector<cl_event>&& waits,
                 const string &name, bool genEvent) {
   cl_event event{};
-  CHECK2(clEnqueueNDRangeKernel(queue, kernel, 1, NULL, &workSize, &groupSize,
-                                waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr),
-         name.c_str());
+  CHECK2(clEnqueueNDRangeKernel(queue, kernel, 1, nullptr, &workSize, &groupSize,
+                                waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr),
+         name);
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
 EventHolder read(cl_queue queue, vector<cl_event>&& waits,
                  bool blocking, cl_mem buf, size_t size, void *data, bool genEvent) {
-  size_t start = 0;
+  size_t const start = 0;
   cl_event event{};
   CHECK1(clEnqueueReadBuffer(queue, buf, blocking, start, size, data,
-                             waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr));
+                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
 EventHolder write(cl_queue queue, vector<cl_event>&& waits,
                   bool blocking, cl_mem buf, size_t size, const void *data, bool genEvent) {
-  size_t start = 0;
+  size_t const start = 0;
   cl_event event{};
   CHECK1(clEnqueueWriteBuffer(queue, buf, blocking, start, size, data,
-                              waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr));
+                              waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -358,7 +357,7 @@ EventHolder copyBuf(cl_queue queue, vector<cl_event>&& waits,
                     const cl_mem src, cl_mem dst, size_t size, bool genEvent) {
   cl_event event{};
   CHECK1(clEnqueueCopyBuffer(queue, src, dst, 0, 0, size,
-                             waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr));
+                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -367,19 +366,19 @@ EventHolder fillBuf(cl_queue q, vector<cl_event>&& waits,
   assert(size);
   cl_event event{};
   CHECK1(clEnqueueFillBuffer(q, buf, pat, patSize, 0 /*start*/, size,
-                             waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr));
+                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
 EventHolder enqueueMarker(cl_queue q) {
   cl_event event{};
-  CHECK1(clEnqueueMarkerWithWaitList(q, 0, 0, &event));
+  CHECK1(clEnqueueMarkerWithWaitList(q, 0, nullptr, &event));
   return EventHolder{event};
 }
 
 EventHolder enqueueMarkerWithWaits(cl_queue q, vector<cl_event>&& waits) {
   cl_event event{};
-  CHECK1(clEnqueueMarkerWithWaitList(q, waits.size(), waits.empty() ? 0 : waits.data(), &event));
+  CHECK1(clEnqueueMarkerWithWaitList(q, waits.size(), waits.empty() ? nullptr : waits.data(), &event));
   return EventHolder{event};
 }
 
@@ -391,13 +390,13 @@ void waitForEvents(vector<cl_event>&& waits) {
 
 int getKernelNumArgs(cl_kernel k) {
   int nArgs = 0;
-  CHECK1(clGetKernelInfo(k, CL_KERNEL_NUM_ARGS, sizeof(nArgs), &nArgs, NULL));
+  CHECK1(clGetKernelInfo(k, CL_KERNEL_NUM_ARGS, sizeof(nArgs), &nArgs, nullptr));
   return nArgs;
 }
 
 int getWorkGroupSize(cl_kernel k, cl_device_id device, const char *name) {
   size_t size[3];
-  CHECK2(clGetKernelWorkGroupInfo(k, device, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, sizeof(size), &size, NULL), name);
+  CHECK2(clGetKernelWorkGroupInfo(k, device, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, sizeof(size), &size, nullptr), name);
   return size[0];
 }
 
@@ -412,7 +411,7 @@ std::string getKernelArgName(cl_kernel k, int pos) {
 
 u32 getEventInfo(cl_event event) {
   u32 status = -1;
-  CHECK1(clGetEventInfo(event, CL_EVENT_COMMAND_EXECUTION_STATUS, sizeof(status), &status, 0));
+  CHECK1(clGetEventInfo(event, CL_EVENT_COMMAND_EXECUTION_STATUS, sizeof(status), &status, nullptr));
   return status;
 }
 
@@ -433,7 +432,7 @@ array<i64, 3> getEventNanos(cl_event event) {
 
   for (int i = 0; i < 4; ++i) {
     u64 t{};
-    CHECK1(clGetEventProfilingInfo(event, what[i], sizeof(t), &t, 0));
+    CHECK1(clGetEventProfilingInfo(event, what[i], sizeof(t), &t, nullptr));
     if (i) { ret[i - 1] = delta(prev, t); }
     prev = t;
   }
@@ -442,12 +441,12 @@ array<i64, 3> getEventNanos(cl_event event) {
 
 cl_context getQueueContext(cl_command_queue q) {
   cl_context ret;
-  CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_CONTEXT, sizeof(cl_context), &ret, 0));
+  CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_CONTEXT, sizeof(cl_context), &ret, nullptr));
   return ret;
 }
 
-cl_device_id getQueueDevice(cl_command_queue q) {
+static cl_device_id getQueueDevice(cl_command_queue q) {
   cl_device_id id;
-  CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_DEVICE, sizeof(id), &id, 0));
+  CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_DEVICE, sizeof(id), &id, nullptr));
   return id;
 }
diff --git a/src/clwrap.h b/src/clwrap.h
index 41b2bb93..917c03d0 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -84,7 +84,7 @@ void saveBinary(cl_program program, string_view fileName);
 
 template<typename T>
 void setArg(cl_kernel k, int pos, const T &value, const string& name) {
-  CHECK2(clSetKernelArg(k, pos, sizeof(value), &value), (name + '[' + to_string(pos) + "] size " + to_string(sizeof(value))).c_str());
+  CHECK2(clSetKernelArg(k, pos, sizeof(value), &value), name + '[' + to_string(pos) + "] size " + to_string(sizeof(value)));
 }
 
 /*
@@ -92,7 +92,7 @@ template<>
 void setArg<int>(cl_kernel k, int pos, const int &value, const string& name);
 */
 
-cl_mem makeBuf_(cl_context context, unsigned kind, size_t size, const void *ptr = 0);
+cl_mem makeBuf_(cl_context context, unsigned kind, size_t size, const void *ptr = nullptr);
 cl_queue makeQueue(cl_device_id d, cl_context c, bool enableProfile);
 
 void flush( cl_queue q);
diff --git a/src/common.cpp b/src/common.cpp
index c3a1ef80..29409bdd 100644
--- a/src/common.cpp
+++ b/src/common.cpp
@@ -1,16 +1,10 @@
 // GpuOwl Mersenne primality tester; Copyright (C) 2017-2018 Mihai Preda.
 
 #include "common.h"
-#include "File.h"
-#include "timeutil.h"
 
-#include <cstdarg>
 #include <cstdio>
-#include <vector>
-#include <memory>
 #include <sstream>
 #include <iomanip>
-#include <filesystem>
 
 string hex(u64 x) {
   ostringstream out{};
@@ -24,7 +18,7 @@ std::string rstripNewline(std::string s) {
 }
 
 u32 crc32(const void *data, size_t size) {
-  u32 tab[16] = {
+  u32 const tab[16] = {
                  0x00000000, 0x1DB71064, 0x3B6E20C8, 0x26D930AC,
                  0x76DC4190, 0x6B6B51F4, 0x4DB26158, 0x5005713C,
                  0xEDB88320, 0xF00F9344, 0xD6D6A3E8, 0xCB61B38C,
@@ -41,11 +35,11 @@ u32 crc32(const void *data, size_t size) {
 string formatBound(u32 b) {
   if (b >= 1'000'000 && b % 1'000'000 == 0) {
     return to_string(b / 1'000'000) + 'M';
-  } else if (b >= 500'000 && b % 100'000 == 0) {
+  } if (b >= 500'000 && b % 100'000 == 0) {
     char buf[32];
     snprintf(buf, sizeof(buf), "%.1fM", float(b) / 1'000'000);
     return buf;
-  } else {
+  } 
     return to_string(b);
-  }
+ 
 }
diff --git a/src/common.h b/src/common.h
index 9bd88471..3da39734 100644
--- a/src/common.h
+++ b/src/common.h
@@ -33,7 +33,7 @@ namespace fs = std::filesystem;
 
 // When using multiple primes in an NTT the size of an integer FFT "word" can be 64 bits.  Original FP64 FFT needs only 32 bits.
 // C code will use i64 integer data.  The code that reads and writes GPU buffers will downsize the integers to 32 bits when required.
-typedef i64 Word;
+using Word = i64;
 
 // Create datatype names that mimic the ones used in OpenCL code
 using double2 = pair<double, double>;
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 5df25791..f1026af5 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -8,14 +8,13 @@
 #include <cstdio>
 #include <cstring>
 #include <cassert>
+#include <ranges>
 #include <string>
+#include <utility>
 #include <vector>
 #include <map>
 #include <algorithm>
 #include <sstream>
-#include <stdexcept>
-#include <fstream>
-#include <filesystem>
 #include <unordered_set>
 #ifdef __linux__
 #include <unistd.h>
@@ -41,7 +40,7 @@ static void ensureContextCurrent() {
 static bool g_cudaInitialized = false;
 static void ensureCudaInit() {
   if (!g_cudaInitialized) {
-    CUresult err = cuInit(0);
+    CUresult const err = cuInit(0);
     if (err != CUDA_SUCCESS) {
       fprintf(stderr, "cuInit failed: %d\n", (int)err);
     }
@@ -78,7 +77,7 @@ unsigned clGetPlatformIDs(unsigned num, cl_platform_id* platforms, unsigned* num
 
 int clGetDeviceIDs(cl_platform_id, cl_device_type, unsigned num, cl_device_id* devices, unsigned* numRet) {
   enumerateDevices();
-  unsigned n = g_devices.size();
+  unsigned const n = g_devices.size();
   if (numRet) *numRet = n;
   if (devices) {
     for (unsigned i = 0; i < min(num, n); i++) {
@@ -97,7 +96,7 @@ cl_context clCreateContext(const intptr_t*, unsigned nDevices, const cl_device_i
   CUctxCreateParams params{};
   CUresult r = cuCtxCreate_v4(&ctx->ctx, &params, 0, ctx->dev);
 #else
-  CUresult r = cuCtxCreate(&ctx->ctx, 0, ctx->dev);
+  CUresult const r = cuCtxCreate(&ctx->ctx, 0, ctx->dev);
 #endif
   if (r != CUDA_SUCCESS) {
     delete ctx;
@@ -145,7 +144,7 @@ int clReleaseCommandQueue(cl_command_queue q) {
 
 // ---- Program compilation (NVRTC) ----
 
-cl_program clCreateProgramWithSource(cl_context ctx, unsigned count, const char** strings,
+cl_program clCreateProgramWithSource(cl_context  /*ctx*/, unsigned count, const char** strings,
                                       const size_t* lengths, int* err) {
   auto* prog = new _cl_program;
   for (unsigned i = 0; i < count; i++) {
@@ -159,7 +158,7 @@ cl_program clCreateProgramWithSource(cl_context ctx, unsigned count, const char*
   return prog;
 }
 
-cl_program clCreateProgramWithBinary(cl_context ctx, unsigned nDevices, const cl_device_id*,
+cl_program clCreateProgramWithBinary(cl_context  /*ctx*/, unsigned  /*nDevices*/, const cl_device_id*,
                                       const size_t* lengths, const unsigned char** binaries,
                                       int* binaryStatus, int* err) {
   // "Binary" in CUDA land = PTX string
@@ -169,7 +168,7 @@ cl_program clCreateProgramWithBinary(cl_context ctx, unsigned nDevices, const cl
     prog->compiled = true;
     // Load the module (JIT-compile PTX to SASS)
     ensureContextCurrent();
-    CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+    CUresult const r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
     if (r == CUDA_SUCCESS) {
       prog->moduleLoaded = true;
       if (binaryStatus) binaryStatus[0] = CL_SUCCESS;
@@ -187,13 +186,13 @@ cl_program clCreateProgramWithBinary(cl_context ctx, unsigned nDevices, const cl
 // Build log storage (per-program)
 static string g_lastBuildLog;
 
-int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* devices, const char* options,
+int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id* devices, const char* options,
                      unsigned numHeaders, const cl_program* headers, const char* const* headerNames,
                      void (*)(cl_program, void*), void*) {
   if (!prog) return CL_INVALID_PROGRAM;
 
   // Get device arch for NVRTC
-  CUdevice dev = devices ? devices[0]->dev : g_devices[0].dev;
+  CUdevice const dev = devices ? devices[0]->dev : g_devices[0].dev;
   int major = 0, minor = 0;
   cuDeviceGetAttribute(&major, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR, dev);
   cuDeviceGetAttribute(&minor, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR, dev);
@@ -207,17 +206,17 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
   //   -cl-finite-math-only  → --fmad=true (enable FMA contraction, the safe subset)
   //   -Dfoo=bar             → -Dfoo=bar (pass through)
   vector<string> nvrtcOpts;
-  nvrtcOpts.push_back(archOpt);
-  nvrtcOpts.push_back("-default-device");
-  nvrtcOpts.push_back("-std=c++17");
-  nvrtcOpts.push_back("-w");  // Suppress NVRTC macro redefinition warnings
+  nvrtcOpts.emplace_back(archOpt);
+  nvrtcOpts.emplace_back("-default-device");
+  nvrtcOpts.emplace_back("-std=c++17");
+  nvrtcOpts.emplace_back("-w");  // Suppress NVRTC macro redefinition warnings
 
   // FMA contraction: OpenCL uses -cl-finite-math-only + #pragma OPENCL FP_CONTRACT ON
   // to allow the compiler to contract a*b+c into FMA instructions. NVRTC's --fmad=true
   // is the safe equivalent — it ONLY enables FMA contraction without the dangerous
   // parts of -use_fast_math (no flush-to-zero, no reduced-precision division/sqrt).
   // This is critical for FFT performance: every butterfly is multiply-add pairs.
-  nvrtcOpts.push_back("--fmad=true");
+  nvrtcOpts.emplace_back("--fmad=true");
 
   // NOTE: --restrict (all kernel pointers are __restrict__) was tested but causes GPU read
   // errors — some PRPLL kernels use in-place operations where in/out buffers alias.
@@ -240,22 +239,22 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
     istringstream iss(options);
     string tok;
     while (iss >> tok) {
-      if (tok.substr(0, 2) == "-D") {
+      if (tok.starts_with("-D")) {
         // Fix AMD-only FFT variants for NVIDIA: variant_W=0 and variant_H=0 require
         // AMD builtins (__builtin_amdgcn_ds_bpermute etc). Replace with variant 2.
         // FFT_VARIANT is a 3-digit number WMH: e.g. 000, 101, 202
         if (tok.find("FFT_VARIANT=") != string::npos) {
-          size_t eqPos = tok.find('=');
+          size_t const eqPos = tok.find('=');
           string valStr = tok.substr(eqPos + 1);
           // Strip trailing 'u' suffix
           if (!valStr.empty() && valStr.back() == 'u') valStr.pop_back();
-          int val = atoi(valStr.c_str());
+          int const val = atoi(valStr.c_str());
           int vW = val / 100;
-          int vM = (val % 100) / 10;
+          int const vM = (val % 100) / 10;
           int vH = val % 10;
           if (vW == 0) vW = 2;  // AMD BCAST → NVIDIA generic
           if (vH == 0) vH = 2;
-          int newVal = vW * 100 + vM * 10 + vH;
+          int const newVal = vW * 100 + vM * 10 + vH;
           tok = "-DFFT_VARIANT=" + to_string(newVal) + "u";
         }
         nvrtcOpts.push_back(tok);
@@ -263,7 +262,7 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
         // FMA contraction already enabled above via --fmad=true.
         // Do NOT use -use_fast_math here — it enables flush-to-zero and
         // reduced-precision division/sqrt which breaks tailMul accuracy.
-      } else if (tok.substr(0, 14) == "--maxrregcount") {
+      } else if (tok.starts_with("--maxrregcount")) {
         nvrtcOpts.push_back(tok);
         maxregcount = atoi(tok.substr(15, 3).c_str());
       }
@@ -278,12 +277,12 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
   for (unsigned i = 0; i < numHeaders; i++)  {
     // First header: opencl_compat.cuh (inject as virtual NVRTC header)
     if (i == 0) {
-      nvrtcHeaders.push_back({"opencl_compat.cuh", headers[0]->source});
+      nvrtcHeaders.emplace_back("opencl_compat.cuh", headers[0]->source);
     }
     // Remaining headers need preprocessing
     else if (headers[i] && headerNames[i]) {
       // Preprocess OpenCL source for CUDA compatibility
-      string processedSrc = NvrtcProgram::preprocessOpenCL(headers[i]->source);
+      string const processedSrc = NvrtcProgram::preprocessOpenCL(headers[i]->source);
       // Debug: verify KERNEL macro replacement
 // I'm not sure what Sherpa was trying to print out here.  It prints out nothing useful.
 //      {
@@ -296,7 +295,7 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
 //          }
 //        }
 //      }
-      nvrtcHeaders.push_back({headerNames[i], processedSrc});
+      nvrtcHeaders.emplace_back(headerNames[i], processedSrc);
     }
   }
 
@@ -371,10 +370,10 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
   // If --maxrregcount is set it seems nvrtc compile ignores the setting.  Instead modify the PTX and load the modified PTX.
 
   if (maxregcount) {
-    string maxntidPattern = ".maxntid ";
-    string maxnregPattern = ".maxnreg " + to_string(maxregcount) + "\n";
+    string const maxntidPattern = ".maxntid ";
+    string const maxnregPattern = ".maxnreg " + to_string(maxregcount) + "\n";
     for (size_t startpos = 0; ; ) {
-      size_t pos = prog->ptx.find(maxntidPattern, startpos);
+      size_t const pos = prog->ptx.find(maxntidPattern, startpos);
       if (pos == string::npos) break;
       prog->ptx.insert(pos, maxnregPattern);
       startpos = pos + 20;
@@ -384,8 +383,8 @@ int clCompileProgram(cl_program prog, unsigned nDevices, const cl_device_id* dev
   return CL_SUCCESS;
 }
 
-cl_program clLinkProgram(cl_context ctx, unsigned nDevices, const cl_device_id*,
-                          const char* options, unsigned nProgs, const cl_program* progs,
+cl_program clLinkProgram(cl_context  /*ctx*/, unsigned  /*nDevices*/, const cl_device_id*,
+                          const char*  /*options*/, unsigned nProgs, const cl_program* progs,
                           void (*)(cl_program, void*), void*, int* err) {
   ensureContextCurrent();
   // In CUDA, compilation produces PTX directly — no separate link step needed.
@@ -417,7 +416,7 @@ cl_program clLinkProgram(cl_context ctx, unsigned nDevices, const cl_device_id*,
     (void*)(size_t)sizeof(jitErrorLog), (void*)jitErrorLog,
     (void*)(size_t)sizeof(jitInfoLog), (void*)jitInfoLog
   };
-  CUresult r = cuModuleLoadDataEx(&linked->module, linked->ptx.c_str(), 4, jitOpts, jitOptVals);
+  CUresult const r = cuModuleLoadDataEx(&linked->module, linked->ptx.c_str(), 4, jitOpts, jitOptVals);
   if (r != CUDA_SUCCESS) {
     const char* errName = nullptr;
     cuGetErrorName(r, &errName);
@@ -471,19 +470,19 @@ int clBuildProgram(cl_program prog, unsigned nDevices, const cl_device_id* devic
   }
 
   // clBuildProgram = compile + link in one step
-  int err = clCompileProgram(prog, nDevices, devices, options, 0, nullptr, nullptr, nullptr, nullptr);
+  int const err = clCompileProgram(prog, nDevices, devices, options, 0, nullptr, nullptr, nullptr, nullptr);
   if (err != CL_SUCCESS) return err;
 
-  CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+  CUresult const r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
   if (r != CUDA_SUCCESS) return CL_BUILD_PROGRAM_FAILURE;
   prog->moduleLoaded = true;
   return CL_SUCCESS;
 }
 
-int clGetProgramBuildInfo(cl_program prog, cl_device_id, cl_program_build_info info,
+int clGetProgramBuildInfo(cl_program  /*prog*/, cl_device_id, cl_program_build_info info,
                            size_t size, void* value, size_t* sizeRet) {
   if (info == CL_PROGRAM_BUILD_LOG) {
-    size_t len = g_lastBuildLog.size() + 1;
+    size_t const len = g_lastBuildLog.size() + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) {
       memcpy(value, g_lastBuildLog.c_str(), len);
@@ -501,7 +500,7 @@ int clGetProgramInfo(cl_program prog, cl_program_info info, size_t size, void* v
   } else if (info == CL_PROGRAM_BINARIES) {
     if (sizeRet) *sizeRet = sizeof(unsigned char*);
     if (value && size >= sizeof(unsigned char*)) {
-      unsigned char** ptrs = (unsigned char**)value;
+      auto* const* ptrs = (unsigned char**)value;
       if (ptrs[0]) memcpy(ptrs[0], prog->ptx.data(), prog->ptx.size());
     }
   }
@@ -519,7 +518,7 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   auto* k = new _cl_kernel;
   k->name = name;
   k->parentModule = prog->module;
-  CUresult r = cuModuleGetFunction(&k->func, prog->module, name);
+  CUresult const r = cuModuleGetFunction(&k->func, prog->module, name);
   if (r != CUDA_SUCCESS) {
     fprintf(stderr, "cuModuleGetFunction('%s') failed: %d, moduleLoaded=%d, module=%p\n",
             name, (int)r, prog->moduleLoaded, (void*)prog->module);
@@ -553,16 +552,16 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   k->reqWorkGroupSize = 256; // fallback
   {
     const string& ptx = prog->ptx;
-    string entryPattern = ".entry " + string(name) + "(";
-    size_t pos = ptx.find(entryPattern);
+    string const entryPattern = ".entry " + string(name) + "(";
+    size_t const pos = ptx.find(entryPattern);
     if (pos != string::npos) {
       // Found the kernel entry. Now find .maxntid before the next .entry or opening brace
       size_t searchEnd = ptx.find(".entry ", pos + 1);
       if (searchEnd == string::npos) searchEnd = ptx.size();
-      string maxntidPattern = ".maxntid ";
-      size_t mpos = ptx.find(maxntidPattern, pos);
+      string const maxntidPattern = ".maxntid ";
+      size_t const mpos = ptx.find(maxntidPattern, pos);
       if (mpos != string::npos && mpos < searchEnd) {
-        int val = atoi(ptx.c_str() + mpos + maxntidPattern.size());
+        int const val = atoi(ptx.c_str() + mpos + maxntidPattern.size());
         if (val > 0) {
           k->reqWorkGroupSize = val;
         }
@@ -588,7 +587,7 @@ int clSetKernelArg(cl_kernel k, unsigned pos, size_t size, const void* value) {
   // We need to store the CUdeviceptr (GPU address) instead of the cl_mem (host pointer).
   if (size == sizeof(cl_mem) && value) {
     cl_mem mem = *(cl_mem*)value;
-    if (mem && g_allocatedBuffers.count(mem)) {
+    if (mem && g_allocatedBuffers.contains(mem)) {
       CUdeviceptr devPtr = mem->ptr;
       k->setArg(pos, sizeof(CUdeviceptr), &devPtr);
       return CL_SUCCESS;
@@ -607,11 +606,11 @@ int clSetKernelArg(cl_kernel k, unsigned pos, size_t size, const void* value) {
 
 // ---- Buffer ----
 
-cl_mem clCreateBuffer(cl_context ctx, cl_mem_flags flags, size_t size, void* hostPtr, int* err) {
+cl_mem clCreateBuffer(cl_context  /*ctx*/, cl_mem_flags flags, size_t size, void* hostPtr, int* err) {
   auto* buf = new _cl_mem;
   buf->size = size;
   ensureContextCurrent();
-  CUresult r = cuMemAlloc(&buf->ptr, size);
+  CUresult const r = cuMemAlloc(&buf->ptr, size);
   if (r != CUDA_SUCCESS) {
     delete buf;
     if (err) *err = CL_MEM_OBJECT_ALLOCATION_FAILURE;
@@ -638,7 +637,7 @@ int clReleaseMemObject(cl_mem buf) {
 
 // ---- Command Queue ----
 
-cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id dev,
+cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id  /*dev*/,
                                                      const cl_queue_properties* props, int* err) {
   auto* q = new _cl_command_queue;
   q->context = ctx;
@@ -655,7 +654,7 @@ cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id
 
   // Make sure context is current
   cuCtxSetCurrent(ctx->ctx);
-  CUresult r = cuStreamCreate(&q->stream, CU_STREAM_NON_BLOCKING);
+  CUresult const r = cuStreamCreate(&q->stream, CU_STREAM_NON_BLOCKING);
   if (r != CUDA_SUCCESS) {
     delete q;
     if (err) *err = CL_OUT_OF_RESOURCES;
@@ -667,23 +666,23 @@ cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id
 
 // ---- Enqueue operations ----
 
-int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
-                            const size_t* globalOffset, const size_t* globalSize,
-                            const size_t* localSize, unsigned nWaits,
-                            const cl_event* waits, cl_event* event) {
+int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned  /*workDim*/,
+                            const size_t*  /*globalOffset*/, const size_t* globalSize,
+                            const size_t* localSize, unsigned  /*nWaits*/,
+                            const cl_event*  /*waits*/, cl_event* event) {
   if (!q || !k) return CL_INVALID_VALUE;
   ensureContextCurrent();
 
-  size_t gs = globalSize[0];
-  size_t ls = localSize ? localSize[0] : 256;
-  size_t numBlocks = (gs + ls - 1) / ls;
+  size_t const gs = globalSize[0];
+  size_t const ls = localSize ? localSize[0] : 256;
+  size_t const numBlocks = (gs + ls - 1) / ls;
 
   // Build args array
   void* argPtrs[_cl_kernel::MAX_ARGS];
   k->buildArgPointers(argPtrs);
 
   // Env-gated kernel profiling (PRPLL_PROFILE=1) — takes priority over event profiling
-  static bool doProfile = (getenv("PRPLL_PROFILE") != nullptr);
+  static bool const doProfile = (getenv("PRPLL_PROFILE") != nullptr);
 
   // Event handling (skipped when env profiler is active)
   if (!doProfile && event && q->profiling) {
@@ -693,7 +692,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     ev->hasTimings = true;
     ev->commandType = CL_COMMAND_NDRANGE_KERNEL;
     cuEventRecord(ev->start, q->stream);
-    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult const r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
     cuEventRecord(ev->end, q->stream);
     *event = ev;
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
@@ -708,14 +707,14 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     if (!pStart) { cuEventCreate(&pStart, CU_EVENT_DEFAULT); cuEventCreate(&pEnd, CU_EVENT_DEFAULT); }
 
     cuEventRecord(pStart, q->stream);
-    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult const r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
     cuEventRecord(pEnd, q->stream);
     cuEventSynchronize(pEnd);
     float ms = 0;
     cuEventElapsedTime(&ms, pStart, pEnd);
     kTime[k->name] += ms;
     kCount[k->name]++;
-    if (!kRegs.count(k->name)) {
+    if (!kRegs.contains(k->name)) {
       int regs = 0, shmem = 0;
       cuFuncGetAttribute(&regs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
       cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
@@ -728,7 +727,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
       fprintf(stderr, "\n=== NTT KERNEL PROFILE (%d launches) ===\n", totalLaunches);
       std::vector<std::pair<double, std::string>> sorted;
       double totalMs = 0;
-      for (auto& [n, t] : kTime) { sorted.push_back({t, n}); totalMs += t; }
+      for (auto& [n, t] : kTime) { sorted.emplace_back(t, n); totalMs += t; }
       std::sort(sorted.rbegin(), sorted.rend());
       for (auto& [t, n] : sorted) {
         fprintf(stderr, "  %6.1f ms (%5.1f%%) %5d calls  avg %.3f ms  regs=%d shmem=%d  %s\n",
@@ -740,7 +739,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
   }
 
-  CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+  CUresult const r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
   if (r != CUDA_SUCCESS) {
     const char* errName = nullptr;
     cuGetErrorName(r, &errName);
@@ -753,7 +752,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
 
 int clEnqueueReadBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
                          size_t offset, size_t size, void* ptr,
-                         unsigned nWaits, const cl_event* waits, cl_event* event) {
+                         unsigned  /*nWaits*/, const cl_event*  /*waits*/, cl_event* event) {
   // Must use stream-ordered copy because the stream was created with CU_STREAM_NON_BLOCKING,
   // which means cuMemcpyDtoH (NULL stream) won't wait for pending kernels on this stream.
   CUresult r = cuMemcpyDtoHAsync(ptr, buf->ptr + offset, size, q->stream);
@@ -766,7 +765,7 @@ int clEnqueueReadBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
 
 int clEnqueueWriteBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
                           size_t offset, size_t size, const void* ptr,
-                          unsigned nWaits, const cl_event* waits, cl_event* event) {
+                          unsigned  /*nWaits*/, const cl_event*  /*waits*/, cl_event* event) {
   // Must use stream-ordered copy (same reason as clEnqueueReadBuffer above)
   CUresult r = cuMemcpyHtoDAsync(buf->ptr + offset, ptr, size, q->stream);
   if (r == CUDA_SUCCESS && blocking) {
@@ -778,15 +777,15 @@ int clEnqueueWriteBuffer(cl_command_queue q, cl_mem buf, cl_bool blocking,
 
 int clEnqueueCopyBuffer(cl_command_queue q, cl_mem src, cl_mem dst,
                          size_t srcOffset, size_t dstOffset, size_t size,
-                         unsigned nWaits, const cl_event* waits, cl_event* event) {
-  CUresult r = cuMemcpyDtoDAsync(dst->ptr + dstOffset, src->ptr + srcOffset, size, q->stream);
+                         unsigned  /*nWaits*/, const cl_event*  /*waits*/, cl_event* event) {
+  CUresult const r = cuMemcpyDtoDAsync(dst->ptr + dstOffset, src->ptr + srcOffset, size, q->stream);
   if (event) *event = nullptr;
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
 }
 
 int clEnqueueFillBuffer(cl_command_queue q, cl_mem buf, const void* pattern,
                          size_t patternSize, size_t offset, size_t size,
-                         unsigned nWaits, const cl_event* waits, cl_event* event) {
+                         unsigned  /*nWaits*/, const cl_event*  /*waits*/, cl_event* event) {
   CUresult r;
   if (patternSize == 1) {
     unsigned char val;
@@ -820,7 +819,7 @@ int clEnqueueMarkerWithWaitList(cl_command_queue q, unsigned nWaits, const cl_ev
   return CL_SUCCESS;
 }
 
-int clFlush(cl_command_queue q) {
+int clFlush(cl_command_queue  /*q*/) {
   // CUDA streams auto-flush; no-op
   return CL_SUCCESS;
 }
@@ -851,7 +850,7 @@ int clGetEventInfo(cl_event ev, cl_event_info info, size_t size, void* value, si
   if (info == CL_EVENT_COMMAND_EXECUTION_STATUS) {
     int status = CL_COMPLETE;
     if (ev->end) {
-      CUresult r = cuEventQuery(ev->end);
+      CUresult const r = cuEventQuery(ev->end);
       if (r == CUDA_ERROR_NOT_READY) status = CL_RUNNING;
     }
     if (sizeRet) *sizeRet = sizeof(int);
@@ -893,7 +892,7 @@ int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* va
   case CL_DEVICE_NAME: {
     char name[256];
     cuDeviceGetName(name, sizeof(name), dev->dev);
-    size_t len = strlen(name) + 1;
+    size_t const len = strlen(name) + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) memcpy(value, name, len);
     break;
@@ -935,7 +934,7 @@ int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* va
     cuDriverGetVersion(&ver);
     char verStr[64];
     snprintf(verStr, sizeof(verStr), "CUDA %d.%d", ver / 1000, (ver % 1000) / 10);
-    size_t len = strlen(verStr) + 1;
+    size_t const len = strlen(verStr) + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) memcpy(value, verStr, len);
     break;
@@ -992,7 +991,7 @@ int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* va
 int clGetPlatformInfo(cl_platform_id, cl_device_info info, size_t size, void* value, size_t* sizeRet) {
   if (info == CL_PLATFORM_VERSION) {
     const char* ver = "CUDA (via PRPLL CUDA backend)";
-    size_t len = strlen(ver) + 1;
+    size_t const len = strlen(ver) + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) memcpy(value, ver, len);
     return CL_SUCCESS;
@@ -1026,19 +1025,19 @@ int clGetKernelInfo(cl_kernel k, cl_kernel_info info, size_t size, void* value,
   return CL_SUCCESS;
 }
 
-int clGetKernelArgInfo(cl_kernel k, unsigned pos, cl_kernel_arg_info info,
+int clGetKernelArgInfo(cl_kernel  /*k*/, unsigned pos, cl_kernel_arg_info info,
                         size_t size, void* value, size_t* sizeRet) {
   if (info == CL_KERNEL_ARG_NAME) {
     char name[32];
     snprintf(name, sizeof(name), "arg%u", pos);
-    size_t len = strlen(name) + 1;
+    size_t const len = strlen(name) + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) memcpy(value, name, len);
   }
   return CL_SUCCESS;
 }
 
-int clGetKernelWorkGroupInfo(cl_kernel k, cl_device_id dev, cl_kernel_work_group_info info,
+int clGetKernelWorkGroupInfo(cl_kernel k, cl_device_id  /*dev*/, cl_kernel_work_group_info info,
                               size_t size, void* value, size_t* sizeRet) {
   if (!k) return CL_INVALID_KERNEL;
   ensureContextCurrent();
@@ -1048,7 +1047,7 @@ int clGetKernelWorkGroupInfo(cl_kernel k, cl_device_id dev, cl_kernel_work_group
     // Previously we used CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK which returns the hardware max
     // based on register/shared memory usage — NOT the declared group size. This caused wrong
     // block sizes for every kernel (e.g., tailMul expected 64 threads but got 1024).
-    int wgSize = k->reqWorkGroupSize > 0 ? k->reqWorkGroupSize : 256;
+    int const wgSize = k->reqWorkGroupSize > 0 ? k->reqWorkGroupSize : 256;
     size_t wgs[3] = { (size_t)wgSize, 1, 1 };
     if (sizeRet) *sizeRet = sizeof(wgs);
     if (value && size >= sizeof(wgs)) memcpy(value, wgs, sizeof(wgs));
@@ -1071,7 +1070,7 @@ void clSVMFree(cl_context, void* ptr) {
 }
 
 int clSetKernelArgSVMPointer(cl_kernel k, unsigned pos, const void* ptr) {
-  CUdeviceptr dp = (CUdeviceptr)(uintptr_t)ptr;
+  auto dp = (CUdeviceptr)(uintptr_t)ptr;
   k->setArg(pos, sizeof(dp), &dp);
   return CL_SUCCESS;
 }
@@ -1084,7 +1083,7 @@ int clSetKernelArgSVMPointer(cl_kernel k, unsigned pos, const void* ptr) {
 // Computes the minimum address span covering all buffers, then sets one access policy
 // window with hitRatio sized so that only the actual buffer bytes get persisting treatment,
 // not the gaps between non-contiguous allocations.
-void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
+static void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
   if (!q) return;
 
   // Find address span and total data size
@@ -1094,21 +1093,21 @@ void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers)
 
   for (auto buf : buffers) {
     if (!buf || buf->size == 0) continue;
-    CUdeviceptr lo = buf->ptr;
-    CUdeviceptr hi = buf->ptr + buf->size;
-    if (lo < minAddr) minAddr = lo;
-    if (hi > maxAddr) maxAddr = hi;
+    CUdeviceptr const lo = buf->ptr;
+    CUdeviceptr const hi = buf->ptr + buf->size;
+    minAddr = std::min(lo, minAddr);
+    maxAddr = std::max(hi, maxAddr);
     totalDataBytes += buf->size;
   }
 
   if (totalDataBytes == 0 || maxAddr <= minAddr) return;
 
-  size_t spanBytes = (size_t)(maxAddr - minAddr);
+  auto spanBytes = (size_t)(maxAddr - minAddr);
 
   // Query the device's max access policy window size
   int maxWindowSize = 0;
   cuDeviceGetAttribute(&maxWindowSize, CU_DEVICE_ATTRIBUTE_MAX_ACCESS_POLICY_WINDOW_SIZE, 0);
-  if (maxWindowSize > 0 && spanBytes > (size_t)maxWindowSize) {
+  if (maxWindowSize > 0 && std::cmp_greater(spanBytes, maxWindowSize)) {
     fprintf(stderr, "L2 persist: span %zuMB exceeds max window %dMB, clamping\n",
             spanBytes / (1024*1024), maxWindowSize / (1024*1024));
     spanBytes = maxWindowSize;
@@ -1117,7 +1116,7 @@ void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers)
   // hitRatio = actual data / window span. This way only the real buffer data gets
   // persisting treatment, and any gaps between allocations get streaming treatment.
   float hitRatio = (float)totalDataBytes / (float)spanBytes;
-  if (hitRatio > 1.0f) hitRatio = 1.0f;
+  hitRatio = std::min(hitRatio, 1.0f);
 
   CUstreamAttrValue attr;
   memset(&attr, 0, sizeof(attr));
@@ -1127,7 +1126,7 @@ void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers)
   attr.accessPolicyWindow.hitProp = CU_ACCESS_PROPERTY_PERSISTING;
   attr.accessPolicyWindow.missProp = CU_ACCESS_PROPERTY_STREAMING;
 
-  CUresult r = cuStreamSetAttribute(q->stream, CU_STREAM_ATTRIBUTE_ACCESS_POLICY_WINDOW, &attr);
+  CUresult const r = cuStreamSetAttribute(q->stream, CU_STREAM_ATTRIBUTE_ACCESS_POLICY_WINDOW, &attr);
   if (r != CUDA_SUCCESS) {
     fprintf(stderr, "L2 persist: cuStreamSetAttribute failed (%d)\n", (int)r);
   } else {
diff --git a/src/cuda/cudawrap.cpp b/src/cuda/cudawrap.cpp
index 474d7522..f4b4cb6a 100644
--- a/src/cuda/cudawrap.cpp
+++ b/src/cuda/cudawrap.cpp
@@ -3,7 +3,6 @@
 #include "cudawrap.h"
 
 #include <stdexcept>
-#include <sstream>
 #include <cstdio>
 #include <cstdarg>
 #include <cstring>
@@ -76,7 +75,7 @@ float getGpuRamGB(CUdevice dev) {
   return bytes / (1024.0f * 1024.0f * 1024.0f);
 }
 
-u64 getFreeMem(CUdevice dev) {
+u64 getFreeMem(CUdevice  /*dev*/) {
   // Need a context to query free memory
   size_t free_bytes = 0, total = 0;
   CU_CHECK(cuMemGetInfo(&free_bytes, &total));
@@ -119,7 +118,7 @@ CudaModule::CudaModule(const std::string& ptx, const std::string& name) {
   char errorLog[4096] = {};
   void* optionValues[] = { (void*)(size_t)sizeof(errorLog), (void*)errorLog };
 
-  CUresult err = cuModuleLoadDataEx(&module, ptx.c_str(), 2, options, optionValues);
+  CUresult const err = cuModuleLoadDataEx(&module, ptx.c_str(), 2, options, optionValues);
   if (err != CUDA_SUCCESS) {
     cuda_log("Module load error for '%s': %s\n", name.c_str(), errorLog);
     checkCuda(err, __FILE__, __LINE__, __func__, "cuModuleLoadDataEx");
@@ -226,7 +225,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
   while (i < source.size()) {
     // Strip #pragma OPENCL ... lines
     if (i + 14 <= source.size() && source.compare(i, 14, "#pragma OPENCL") == 0) {
-      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      bool const atLineStart = (i == 0 || source[i-1] == '\n');
       if (atLineStart) {
         while (i < source.size() && source[i] != '\n') i++;
         result += "// [stripped pragma]";
@@ -238,7 +237,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
     // OpenCL: #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
     // CUDA:   #define KERNEL(x) extern "C" __global__ void __launch_bounds__(x)
     if (i + 15 <= source.size() && source.compare(i, 15, "#define KERNEL(") == 0) {
-      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      bool const atLineStart = (i == 0 || source[i-1] == '\n');
       if (atLineStart) {
         while (i < source.size() && source[i] != '\n') i++;
         result += "#ifdef CUDA_MIN_BLOCKS\n";
@@ -254,7 +253,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
     // Only strip exact OpenCL patterns (using OpenCL types like 'long', 'ulong', 'uint')
     // NOT our compat header's versions (which use 'long long', 'unsigned long long', etc.)
     if (i + 7 <= source.size() && source.compare(i, 7, "typedef") == 0) {
-      bool atLineStart = (i == 0 || source[i-1] == '\n');
+      bool const atLineStart = (i == 0 || source[i-1] == '\n');
       if (atLineStart) {
         size_t lineEnd = source.find('\n', i);
         if (lineEnd == std::string::npos) lineEnd = source.size();
@@ -289,7 +288,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
 
     // Handle __attribute__((...)) for overloadable and reqd_work_group_size
     if (i + 15 <= source.size() && source.compare(i, 15, "__attribute__((") == 0) {
-      size_t nameStart = i + 15;
+      size_t const nameStart = i + 15;
       if (nameStart + 12 <= source.size() && source.compare(nameStart, 12, "overloadable") == 0) {
         // Strip __attribute__((overloadable)) — C++ has native overloading
         i = skipBalancedParens(source, i + 13);
@@ -304,7 +303,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
         size_t numEnd = argsStart;
         while (numEnd < source.size() && source[numEnd] >= '0' && source[numEnd] <= '9') numEnd++;
         if (numEnd > argsStart) {
-          std::string wgSize = source.substr(argsStart, numEnd - argsStart);
+          std::string const wgSize = source.substr(argsStart, numEnd - argsStart);
           result += "__launch_bounds__(" + wgSize + ") ";
         }
         // Skip past the entire __attribute__((...))
@@ -325,7 +324,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
       };
       bool matched = false;
       for (int vi = 0; vecTypes[vi]; vi++) {
-        size_t tlen = strlen(vecTypes[vi]);
+        size_t const tlen = strlen(vecTypes[vi]);
         if (i + 1 + tlen <= source.size() && source.compare(i + 1, tlen, vecTypes[vi]) == 0) {
           // Check what follows: should be whitespace then '(' for a cast constructor
           size_t after = i + 1 + tlen;
@@ -363,13 +362,13 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
     // Also handles: "  local T lds[IN_WG / 2 * (MIDDLE <= 8 ? 2 * MIDDLE : MIDDLE)];"
     // But NOT: "local T2 *lds" in function params (which becomes just "T2 *lds" via macro)
     if (i + 6 <= source.size() && source.compare(i, 6, "local ") == 0) {
-      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+      bool const preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
       if (!preceded) {
         // Check if this "local" is followed by a type then a name then '['
         // i.e., it's a shared memory array declaration
         size_t lineEnd = source.find('\n', i);
         if (lineEnd == std::string::npos) lineEnd = source.size();
-        std::string line = source.substr(i, lineEnd - i);
+        std::string const line = source.substr(i, lineEnd - i);
         // Match: "local TYPE IDENT[" pattern — indicates array declaration
         // Array declarations have '[' and end with ';'. They may also contain '(' in
         // the array size expression (e.g., ternary operators). The key distinction is
@@ -386,11 +385,11 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
     }
     // Same for __local
     if (i + 8 <= source.size() && source.compare(i, 8, "__local ") == 0) {
-      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+      bool const preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
       if (!preceded) {
         size_t lineEnd = source.find('\n', i);
         if (lineEnd == std::string::npos) lineEnd = source.size();
-        std::string line = source.substr(i, lineEnd - i);
+        std::string const line = source.substr(i, lineEnd - i);
         if (line.find('[') != std::string::npos) {
           result += "__shared__ ";
           i += 8;
@@ -420,7 +419,7 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
       if (i + 8 < source.size() && source[i + 8] == '_') {
         result += source[i++];
       } else {
-        bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
+        bool const preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_'));
         if (preceded) {
           result += source[i++];
         } else {
@@ -430,8 +429,8 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
     }
     // Match standalone "global" (not inside a word or PTX instruction)
     else if (i + 6 <= source.size() && source.compare(i, 6, "global") == 0) {
-      bool preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_' || source[i-1] == '.'));
-      bool followed = (i + 6 < source.size() && (isalnum(source[i + 6]) || source[i + 6] == '_'));
+      bool const preceded = (i > 0 && (isalnum(source[i-1]) || source[i-1] == '_' || source[i-1] == '.'));
+      bool const followed = (i + 6 < source.size() && (isalnum(source[i + 6]) || source[i + 6] == '_'));
       if (!preceded && !followed) {
         i += 6;
       } else {
@@ -462,9 +461,10 @@ std::string NvrtcProgram::compile(const std::string& source, const std::string&
 
   // Convert options to char*
   std::vector<const char*> opts;
-  for (auto& o : options) opts.push_back(o.c_str());
+  opts.reserve(options.size());
+for (auto& o : options) opts.push_back(o.c_str());
 
-  nvrtcResult compileResult = nvrtcCompileProgram(prog, (int)opts.size(), opts.data());
+  nvrtcResult const compileResult = nvrtcCompileProgram(prog, (int)opts.size(), opts.data());
 
   // Get compilation log
   size_t logSize;
diff --git a/src/cuda/cudawrap.h b/src/cuda/cudawrap.h
index bd0e6e46..2be6f72b 100644
--- a/src/cuda/cudawrap.h
+++ b/src/cuda/cudawrap.h
@@ -6,6 +6,7 @@
 #include <cuda.h>
 #include <nvrtc.h>
 #include <string>
+#include <utility>
 #include <vector>
 #include <memory>
 #include <array>
@@ -47,8 +48,8 @@ class CudaContext {
   explicit CudaContext(CUdevice dev);
   ~CudaContext();
 
-  CUcontext get() const { return ctx; }
-  CUdevice getDevice() const { return device; }
+  [[nodiscard]] CUcontext get() const { return ctx; }
+  [[nodiscard]] CUdevice getDevice() const { return device; }
   void makeCurrent();
 };
 
@@ -66,7 +67,7 @@ class CudaModule {
     return *this;
   }
 
-  CUmodule get() const { return module; }
+  [[nodiscard]] CUmodule get() const { return module; }
   CUfunction getFunction(const char* name) const;
 };
 
@@ -77,7 +78,7 @@ class CudaStream {
   CudaStream();
   ~CudaStream();
 
-  CUstream get() const { return stream; }
+  [[nodiscard]] CUstream get() const { return stream; }
   void sync();
 
   CudaStream(CudaStream&& rhs) noexcept : stream(rhs.stream) { rhs.stream = nullptr; }
@@ -99,8 +100,8 @@ class CudaBuffer {
     return *this;
   }
 
-  CUdeviceptr get() const { return ptr; }
-  size_t size() const { return bytes; }
+  [[nodiscard]] CUdeviceptr get() const { return ptr; }
+  [[nodiscard]] size_t size() const { return bytes; }
 
   void readSync(void* dst, size_t n) const;
   void writeSync(const void* src, size_t n);
@@ -128,11 +129,11 @@ class CudaKernelLauncher {
 
 public:
   CudaKernelLauncher() = default;
-  CudaKernelLauncher(CUfunction f, const std::string& name, u32 blockSize)
-    : func(f), name(name), blockSize(blockSize) {}
+  CudaKernelLauncher(CUfunction f, std::string  name, u32 blockSize)
+    : func(f), name(std::move(name)), blockSize(blockSize) {}
 
   void launch(CUstream stream, u32 gridSize, void** args, u32 sharedMem = 0);
 
-  CUfunction get() const { return func; }
-  const std::string& getName() const { return name; }
+  [[nodiscard]] CUfunction get() const { return func; }
+  [[nodiscard]] const std::string& getName() const { return name; }
 };
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index d01946df..21b19fec 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -20,11 +20,11 @@
 
 // cl_device_id wraps CUdevice (int)
 struct _cl_device_id { CUdevice dev; };
-typedef _cl_device_id* cl_device_id;
+using cl_device_id = _cl_device_id*;
 
 // cl_context wraps CUcontext
 struct _cl_context { CUcontext ctx; CUdevice dev; };
-typedef _cl_context* cl_context;
+using cl_context = _cl_context*;
 
 // cl_command_queue wraps CUstream
 struct _cl_command_queue {
@@ -32,35 +32,35 @@ struct _cl_command_queue {
   cl_context context;
   bool profiling;
 };
-typedef _cl_command_queue* cl_command_queue;
+using cl_command_queue = _cl_command_queue*;
 
 // cl_mem wraps CUdeviceptr + size
 struct _cl_mem {
   CUdeviceptr ptr;
   size_t size;
 };
-typedef _cl_mem* cl_mem;
+using cl_mem = _cl_mem*;
 
 // cl_program: dual-purpose — stores either source string or compiled PTX/module
 struct _cl_program {
   std::string source;     // OpenCL source (before NVRTC compilation)
   std::string preprocessedSource; // CUDA source after preprocessOpenCL (for parsing __launch_bounds__)
   std::string ptx;        // Compiled PTX (after NVRTC compilation)
-  CUmodule module;        // Loaded module (after cuModuleLoadData)
-  bool compiled;
-  bool moduleLoaded;
+  CUmodule module{};        // Loaded module (after cuModuleLoadData)
+  bool compiled{false};
+  bool moduleLoaded{false};
 
-  _cl_program() : module{}, compiled{false}, moduleLoaded{false} {}
+  _cl_program()  {}
 };
-typedef _cl_program* cl_program;
+using cl_program = _cl_program*;
 
 // cl_kernel wraps CUfunction + accumulated arguments
 struct _cl_kernel {
-  CUfunction func;
+  CUfunction func{};
   std::string name;
-  CUmodule parentModule;  // Keep reference so module isn't unloaded
-  int numArgs;
-  int reqWorkGroupSize;   // From __launch_bounds__(N) in source, matches OpenCL reqd_work_group_size
+  CUmodule parentModule{};  // Keep reference so module isn't unloaded
+  int numArgs{0};
+  int reqWorkGroupSize{0};   // From __launch_bounds__(N) in source, matches OpenCL reqd_work_group_size
 
   // Argument accumulator for setArg/launch pattern
   static constexpr int MAX_ARGS = 32;
@@ -69,7 +69,7 @@ struct _cl_kernel {
   size_t argSizes[MAX_ARGS];
   size_t argOffsets[MAX_ARGS];
 
-  _cl_kernel() : func{}, parentModule{}, numArgs{0}, reqWorkGroupSize{0} {
+  _cl_kernel()  {
     memset(argData, 0, sizeof(argData));
     memset(argSizes, 0, sizeof(argSizes));
     memset(argOffsets, 0, sizeof(argOffsets));
@@ -82,7 +82,7 @@ struct _cl_kernel {
     // Fixed 8-byte slots per arg position. CUDA kernel args are pointers (8 bytes)
     // or small scalars (4 bytes). Using fixed slots avoids data corruption when
     // args are set out of order (e.g., setFixedArgs(2,3) then operator()(0,1)).
-    size_t offset = pos * 8;
+    size_t const offset = pos * 8;
     argOffsets[pos] = offset;
     argSizes[pos] = size;
     if (offset + size <= MAX_ARG_BYTES && value) {
@@ -97,42 +97,42 @@ struct _cl_kernel {
     }
   }
 };
-typedef _cl_kernel* cl_kernel;
+using cl_kernel = _cl_kernel*;
 
 // cl_event wraps CUevent pair (start + end for profiling)
 struct _cl_event {
-  CUevent start;
-  CUevent end;
-  bool hasTimings;
-  u32 commandType;
+  CUevent start{};
+  CUevent end{};
+  bool hasTimings{false};
+  u32 commandType{0};
 
-  _cl_event() : start{}, end{}, hasTimings{false}, commandType{0} {}
+  _cl_event()  {}
   ~_cl_event() {
     if (start) cuEventDestroy(start);
     if (end) cuEventDestroy(end);
   }
 };
-typedef _cl_event* cl_event;
+using cl_event = _cl_event*;
 
 // Unused types — just need to exist for compilation
-typedef struct _cl_platform_id* cl_platform_id;
-typedef struct _cl_sampler*     cl_sampler;
-
-typedef unsigned cl_bool;
-typedef unsigned cl_program_build_info;
-typedef unsigned cl_program_info;
-typedef unsigned cl_device_info;
-typedef unsigned cl_kernel_info;
-typedef unsigned cl_kernel_arg_info;
-typedef unsigned cl_kernel_work_group_info;
-typedef unsigned cl_profiling_info;
-typedef unsigned cl_event_info;
-typedef unsigned cl_command_queue_info;
-
-typedef u64 cl_mem_flags;
-typedef u64 cl_svm_mem_flags;
-typedef u64 cl_device_type;
-typedef u64 cl_queue_properties;
+using cl_platform_id = struct _cl_platform_id*;
+using cl_sampler = struct _cl_sampler*;
+
+using cl_bool = unsigned;
+using cl_program_build_info = unsigned;
+using cl_program_info = unsigned;
+using cl_device_info = unsigned;
+using cl_kernel_info = unsigned;
+using cl_kernel_arg_info = unsigned;
+using cl_kernel_work_group_info = unsigned;
+using cl_profiling_info = unsigned;
+using cl_event_info = unsigned;
+using cl_command_queue_info = unsigned;
+
+using cl_mem_flags = u64;
+using cl_svm_mem_flags = u64;
+using cl_device_type = u64;
+using cl_queue_properties = u64;
 
 using cl_queue = cl_command_queue;
 
@@ -217,10 +217,10 @@ using cl_queue = cl_command_queue;
 #define CL_DEVICE_BOARD_NAME_AMD        0x4038
 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
 
-typedef union {
+using cl_device_topology_amd = union {
   struct { u32 type; u32 data[5]; } raw;
   struct { u32 type; char unused[17]; char bus; char device; char function; } pcie;
-} cl_device_topology_amd;
+};
 
 // Error codes
 #define CL_DEVICE_NOT_FOUND             -1
diff --git a/src/fs.cpp b/src/fs.cpp
index 7f7ab719..8eefa860 100644
--- a/src/fs.cpp
+++ b/src/fs.cpp
@@ -4,6 +4,7 @@
 #include "File.h"
 
 #include <thread>
+#include <utility>
 
 namespace {
 
@@ -53,14 +54,14 @@ void fancyRename(const fs::path& src, const fs::path& dst) {
 u64 fileSize(const fs::path& path) {
   error_code dummy;
   auto size = fs::file_size(path, dummy);
-  if (size == decltype(size)(-1)) { size = 0; }
+  if (std::cmp_equal(size, -1)) { size = 0; }
   return size;
 }
 
 bool deleteLine(const fs::path& path, const string& targetLine, u64 initialSize) {
   if (!initialSize) { initialSize = fileSize(path); }
 
-  fs::path tmp = path + ("-"s + toString(this_thread::get_id()));
+  fs::path const tmp = path + ("-"s + toString(this_thread::get_id()));
 
   if (!copyWithout(targetLine, path, tmp) || !sizeMatches(path, initialSize)) { return false; }
 
diff --git a/src/gpuid.cpp b/src/gpuid.cpp
index 8a24590d..f27be4f3 100644
--- a/src/gpuid.cpp
+++ b/src/gpuid.cpp
@@ -1,13 +1,14 @@
 // Copyright (C) 2017-2024 Mihai Preda.
 
 #include "gpuid.h"
+#include <utility>
 #include "clwrap.h"
 #include "File.h"
 
 using namespace std;
 
 static bool startsWith(string_view a, string_view b) {
-  return a.substr(0, b.length()) == b;
+  return a.starts_with(b);
 }
 
 string getBdfFromSysfs(int pos) {
@@ -58,18 +59,18 @@ string getUidFromSysfs(int pos) {
 
 /* BDF is PCIe Bus:Device.Function e.g. "6a:00.0" */
 string getUidFromBdf(const string& bdf) {
-  int pos = getSysfsFromBdf(bdf);
+  int const pos = getSysfsFromBdf(bdf);
   return pos >= 0 ? getUidFromSysfs(pos) : "";
 }
 
 string getBdfFromUid(const string& uid) {
-  int pos = getSysfsFromUid(uid);
+  int const pos = getSysfsFromUid(uid);
   return (pos >= 0) ? getBdfFromSysfs(pos) : "";
 }
 
 int getPosFromBdf(const string& bdf) {
   auto openclIds = getAllDeviceIDs();
-  for (int pos = 0; pos < int(openclIds.size()); ++pos) {
+  for (int pos = 0; std::cmp_less(pos, openclIds.size()); ++pos) {
     auto bdfAtPos = getBdfFromDevice(openclIds[pos]);
     // log("BDF '%s' at %d\n", bdfAtPos.c_str(), pos);
     if (bdf == bdfAtPos) { return pos; }
@@ -85,7 +86,7 @@ string getBdfFromPos(int pos) {
 }
 
 int getPosFromUid(const string& uid) {
-  string bdf = getBdfFromUid(uid);
+  string const bdf = getBdfFromUid(uid);
   if (bdf.empty()) { return -1; }
   return getPosFromBdf(bdf);
 }
diff --git a/src/log.cpp b/src/log.cpp
index 1b93ee57..0f80be05 100644
--- a/src/log.cpp
+++ b/src/log.cpp
@@ -11,7 +11,7 @@ thread_local vector<string> contextParts;
 
 thread_local File logFile;
 
-File stdoutFile{stdout, "stdout"};
+static File stdoutFile{stdout, "stdout"};
 
 string logContext() { return context; }
 
@@ -20,7 +20,7 @@ void initLog(const char *logName) {
   logFile = File::openAppend(logName);
 }
 
-string longTimeStr()  { return timeStr("%Y-%m-%d %H:%M:%S %Z"); }
+static string longTimeStr()  { return timeStr("%Y-%m-%d %H:%M:%S %Z"); }
 string shortTimeStr() { return timeStr("%Y%m%d %H:%M:%S"); }
 
 static char logBuf[32 * 1024];
@@ -28,9 +28,9 @@ static char logBuf[32 * 1024];
 void log(const char *fmt, ...) {
   static std::mutex logMutex;
 
-  string prefix = shortTimeStr() + ' ' + context;
+  string const prefix = shortTimeStr() + ' ' + context;
 
-  std::unique_lock lock(logMutex);
+  std::unique_lock const lock(logMutex);
   int pos = 0;
   snprintf(logBuf, sizeof(logBuf), "%s %n", prefix.c_str(), &pos);
 
@@ -38,7 +38,7 @@ void log(const char *fmt, ...) {
   va_start(va, fmt);
   vsnprintf(logBuf + pos, sizeof(logBuf) - pos, fmt, va);
   va_end(va);
-  string_view s{logBuf};
+  string_view const s{logBuf};
 
   if (logFile) { logFile.write(s); }
   stdoutFile.write(s);
diff --git a/src/main.cpp b/src/main.cpp
index efdfc38d..c19294b8 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -18,9 +18,10 @@
 
 #include <filesystem>
 #include <thread>
+#include <utility>
 // #include <format> from GCC-13 onwards
 
-void gpuWorker(GpuCommon shared, i32 instance) {
+static void gpuWorker(GpuCommon shared, i32 instance) {
   // LogContext context{(instance ? shared.args->tailDir() : ""s) + to_string(instance) + ' '};
   // log("Starting worker %d\n", instance);
   if (instance > 0) {
@@ -50,7 +51,7 @@ int main(int argc, char **argv) {
   _set_printf_count_output(1);    // I'm not sure what this does (it's from CrazeTheDragon)
 #endif
 
-#if defined(__MSYS__)
+#ifdef __MSYS__
   // I was unable to get putenv to link in MSYS2
 #elif defined(__MINGW32__) || defined(__MINGW64__)
   putenv("ROC_SIGNAL_POOL_SIZE=32");
@@ -61,10 +62,10 @@ int main(int argc, char **argv) {
   setenv("ROC_SIGNAL_POOL_SIZE", "32", 0);
 #endif
 
-  int exitCode = 0;
+  int const exitCode = 0;
 
   try {
-    string mainLine = Args::mergeArgs(argc, argv);
+    string const mainLine = Args::mergeArgs(argc, argv);
     {
       Args args{true};
       args.parse(mainLine);
@@ -94,7 +95,7 @@ int main(int argc, char **argv) {
     if (args.maxAlloc) { AllocTrac::setMaxAlloc(args.maxAlloc); }
 
     Context context(getDevice(args.device));
-    Signal signal;
+    Signal const signal;
     Background background;
     GpuCommon shared;
     shared.context = &context;
@@ -118,7 +119,7 @@ int main(int argc, char **argv) {
     } else {
       {
         vector<jthread> threads;
-        for (int i = 1; i < int(args.workers); ++i) {
+        for (int i = 1; std::cmp_less(i, args.workers); ++i) {
           threads.emplace_back(gpuWorker, shared, i);
         }
         gpuWorker(shared, 0);
diff --git a/src/md5.cpp b/src/md5.cpp
index 2bf8329f..bbecb022 100644
--- a/src/md5.cpp
+++ b/src/md5.cpp
@@ -5,21 +5,21 @@
  * This code is in the public domain; do with it what you wish.
  */
 #include "MD5.h"
-#include <string.h>
+#include <cstring>
 
 #define byteReverse(A,B)
 
 /* The four core functions - F1 is optimized somewhat */
 
 /* #define F1(x, y, z) (x & y | ~x & z) */
-#define F1(x, y, z) (z ^ (x & (y ^ z)))
+#define F1(x, y, z) ((z) ^ ((x) & ((y) ^ (z))))
 #define F2(x, y, z) F1(z, x, y)
-#define F3(x, y, z) (x ^ y ^ z)
-#define F4(x, y, z) (y ^ (x | ~z))
+#define F3(x, y, z) ((x) ^ (y) ^ (z))
+#define F4(x, y, z) ((y) ^ ((x) | ~(z)))
 
 /* This is the central step in the MD5 algorithm. */
 #define MD5STEP(f, w, x, y, z, data, s) \
-        ( w += f(x, y, z) + data,  w = w<<s | w>>(32-s),  w += x )
+        ( (w) += f(x, y, z) + (data),  (w) = (w)<<(s) | (w)>>(32-(s)),  (w) += (x) )
 
 /*
  * The core of the MD5 algorithm, this alters an existing MD5 hash to
@@ -132,7 +132,7 @@ void MD5Update(MD5Context *ctx, const unsigned char *buf, unsigned int len){
         /* Update bitcount */
 
         t = ctx->bits[0];
-        if ((ctx->bits[0] = t + ((unsigned)len << 3)) < t)
+        if ((ctx->bits[0] = t + (len << 3)) < t)
                 ctx->bits[1]++; /* Carry from low to high */
         ctx->bits[1] += len >> 29;
 
diff --git a/src/sha3.cpp b/src/sha3.cpp
index cf0d8b10..48c4d2c0 100644
--- a/src/sha3.cpp
+++ b/src/sha3.cpp
@@ -90,7 +90,7 @@ static void KeccakF1600Step(SHA3Context *p){
 # define A42 (p->u.s[22])
 # define A43 (p->u.s[23])
 # define A44 (p->u.s[24])
-# define ROL64(a,x) ((a<<x)|(a>>(64-x)))
+# define ROL64(a,x) (((a)<<(x))|((a)>>(64-(x))))
 
   for(i=0; i<24; i+=4){
     C0 = A00^A10^A20^A30^A40;
@@ -395,7 +395,7 @@ void SHA3Update(
 ){
   unsigned int i = 0;
 #if SHA3_BYTEORDER==1234
-  if( (p->nLoaded % 8)==0 && ((aData - (const unsigned char*)0)&7)==0 ){
+  if( (p->nLoaded % 8)==0 && ((aData - (const unsigned char*)nullptr)&7)==0 ){
     for(; i+7<nData; i+=8){
       p->u.s[p->nLoaded/8] ^= *(u64*)&aData[i];
       p->nLoaded += 8;
diff --git a/src/shared.h b/src/shared.h
index 6405d9c1..33ff1113 100644
--- a/src/shared.h
+++ b/src/shared.h
@@ -1,4 +1,4 @@
 // included from both C++ and OpenCL.
 
-u32 bitposToWord(u64 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
-u32 wordToBitpos(u64 E, u32 N, u32 word) { return (word * ((u64) E) + (N - 1)) / N; }
+inline u32 bitposToWord(u64 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
+inline u32 wordToBitpos(u64 E, u32 N, u32 word) { return (word * ( E) + (N - 1)) / N; }
diff --git a/src/state.cpp b/src/state.cpp
index 942aeaab..8ac49307 100644
--- a/src/state.cpp
+++ b/src/state.cpp
@@ -2,18 +2,15 @@
 
 #include "state.h"
 #include "shared.h"
-#include "log.h"
-#include "timeutil.h"
 
 #include <cassert>
-#include <cmath>
 
 static i64 lowBits(i64 u, int bits) { return (u << (64 - bits)) >> (64 - bits); }
 
 std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
   if (dataVect.empty()) { return {}; } // Indicating all zero
 
-  u32 N = dataVect.size();
+  u32 const N = dataVect.size();
   const Word *data = dataVect.data();
 
   std::vector<u32> out;
@@ -29,14 +26,14 @@ std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
     assert(nBits > 0);
 
     //   Be careful adding in the carry -- it could overflow a 32-bit word.  Convert value into desired unsigned range.
-    i64 tmp = (i64) data[p] + carry;
+    i64 const tmp = (i64) data[p] + carry;
     carry = (int) (tmp >> nBits);
     u64 w = (u64) (tmp - ((i64) carry << nBits));
     assert(w < (1ULL << nBits));
 
     assert(haveBits < 32);
     while (nBits) {
-      int needBits = 32 - haveBits;
+      int const needBits = 32 - haveBits;
       outWord |= w << haveBits;
       if (nBits >= needBits) {
         w >>= needBits;
@@ -56,7 +53,7 @@ std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
   out.push_back(outWord);
 
   for (int p = 0; carry; ++p) {
-    i64 v = i64(out[p]) + carry;
+    i64 const v = i64(out[p]) + carry;
     out[p] = v & 0xffffffff;
     carry = v >> 32;
   }
@@ -66,10 +63,10 @@ std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
 }
 
 struct BitBucket {
-  u128 bits;
-  u32 size;
+  u128 bits{0};
+  u32 size{0};
 
-  BitBucket() : bits(0), size(0) {}
+  BitBucket()  = default;
 
   void put32(u32 b) {
     assert(size <= 96);
@@ -79,7 +76,7 @@ struct BitBucket {
   
   i64 popSigned(u32 n) {
     assert(size >= n);
-    i64 b = lowBits((i64) bits, n);
+    i64 const b = lowBits((i64) bits, n);
     size -= n;
     bits >>= n;
     bits += (b < 0); // carry fixup.
@@ -97,7 +94,7 @@ vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u64 E) {
   auto it = compactBits.cbegin();
   [[maybe_unused]] auto itEnd = compactBits.cend();
   for (u32 p = 0; p < N; ++p) {
-    u32 len = bitlen(N, E, p);
+    u32 const len = bitlen(N, E, p);
     while (bucket.size < len) {
       assert(it != itEnd);
       bucket.put32(*it++);
diff --git a/src/timeutil.cpp b/src/timeutil.cpp
index f3102145..f5fa1f8b 100644
--- a/src/timeutil.cpp
+++ b/src/timeutil.cpp
@@ -5,14 +5,14 @@
 #include <ctime>
 
 std::string timeStr(const char *format) {
-  time_t t = time(NULL);
+  time_t const t = time(nullptr);
   char buf[64];
   strftime(buf, sizeof(buf), format, localtime(&t));
   return buf;
 }
 
 std::string timeStr() {
-  time_t t = time(NULL);
+  time_t const t = time(nullptr);
   char buf[64];
   strftime(buf, sizeof(buf), "%Y-%m-%d %H:%M:%S", gmtime(&t));   // equivalent to: "%F %T"
   return buf;
diff --git a/src/timeutil.h b/src/timeutil.h
index ecc21c72..e2bbe7db 100644
--- a/src/timeutil.h
+++ b/src/timeutil.h
@@ -18,11 +18,11 @@ class Timer {
   Timer() : start(clock::now()) {}
   
 
-  double at() const { return std::chrono::duration<double>(clock::now() - start).count(); }
+  [[nodiscard]] double at() const { return std::chrono::duration<double>(clock::now() - start).count(); }
 
   double reset() {
     auto now = clock::now();
-    double ret = std::chrono::duration<double>(now - start).count();
+    double const ret = std::chrono::duration<double>(now - start).count();
     start = now;
     return ret;
   }
diff --git a/src/tinycl.h b/src/tinycl.h
index 90fa8404..6732f8aa 100644
--- a/src/tinycl.h
+++ b/src/tinycl.h
@@ -7,31 +7,31 @@
 #include <cstdint>
 #include <cstddef>
 
-typedef struct _cl_platform_id *    cl_platform_id;
-typedef struct _cl_device_id *      cl_device_id;
-typedef struct _cl_context *        cl_context;
-typedef struct _cl_command_queue *  cl_command_queue;
-typedef struct _cl_mem *            cl_mem;
-typedef struct _cl_program *        cl_program;
-typedef struct _cl_kernel *         cl_kernel;
-typedef struct _cl_event *          cl_event;
-typedef struct _cl_sampler *        cl_sampler;
-
-typedef unsigned cl_bool;
-typedef unsigned cl_program_build_info;
-typedef unsigned cl_program_info;
-typedef unsigned cl_device_info;
-typedef unsigned cl_kernel_info;
-typedef unsigned cl_kernel_arg_info;
-typedef unsigned cl_kernel_work_group_info;
-typedef unsigned cl_profiling_info;
-typedef unsigned cl_event_info;
-typedef unsigned cl_command_queue_info;
-
-typedef u64 cl_mem_flags;
-typedef u64 cl_svm_mem_flags;
-typedef u64 cl_device_type;
-typedef u64 cl_queue_properties;
+using cl_platform_id = struct _cl_platform_id *;
+using cl_device_id = struct _cl_device_id *;
+using cl_context = struct _cl_context *;
+using cl_command_queue = struct _cl_command_queue *;
+using cl_mem = struct _cl_mem *;
+using cl_program = struct _cl_program *;
+using cl_kernel = struct _cl_kernel *;
+using cl_event = struct _cl_event *;
+using cl_sampler = struct _cl_sampler *;
+
+using cl_bool = unsigned;
+using cl_program_build_info = unsigned;
+using cl_program_info = unsigned;
+using cl_device_info = unsigned;
+using cl_kernel_info = unsigned;
+using cl_kernel_arg_info = unsigned;
+using cl_kernel_work_group_info = unsigned;
+using cl_profiling_info = unsigned;
+using cl_event_info = unsigned;
+using cl_command_queue_info = unsigned;
+
+using cl_mem_flags = u64;
+using cl_svm_mem_flags = u64;
+using cl_device_type = u64;
+using cl_queue_properties = u64;
 
 extern "C" {
 
diff --git a/src/tune.cpp b/src/tune.cpp
index dea4f864..68353e95 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -12,11 +12,11 @@
 
 #include <numeric>
 #include <string>
+#include <utility>
 #include <vector>
 #include <cassert>
 #include <cinttypes>
 
-using std::accumulate;
 
 using namespace std;
 
@@ -24,13 +24,13 @@ vector<string> split(const string& s, char delim) {
   vector<string> ret;
   size_t start = 0;
   while (true) {
-    size_t p = s.find(delim, start);
+    size_t const p = s.find(delim, start);
     if (p == string::npos) {
       ret.push_back(s.substr(start));
       break;
-    } else {
+    } 
       ret.push_back(s.substr(start, p - start));
-    }
+   
     start = p + 1;
   }
   return ret;
@@ -41,12 +41,12 @@ namespace {
 vector<TuneConfig> permute(const vector<pair<string, vector<string>>>& params) {
   vector<TuneConfig> configs;
 
-  int n = params.size();
+  int const n = params.size();
   vector<int> vpos(n);
   while (true) {
     TuneConfig config;
     for (int i = 0; i < n; ++i) {
-      config.push_back({params[i].first, params[i].second[vpos[i]]});
+      config.emplace_back(params[i].first, params[i].second[vpos[i]]);
     }
     configs.push_back(config);
 
@@ -55,9 +55,9 @@ vector<TuneConfig> permute(const vector<pair<string, vector<string>>>& params) {
       if (vpos[i] < int(params[i].second.size()) - 1) {
         ++vpos[i];
         break;
-      } else {
+      } 
         vpos[i] = 0;
-      }
+     
     }
 
     if (i < 0) { return configs; }
@@ -69,14 +69,14 @@ vector<TuneConfig> getTuneConfigs(const string& tune) {
   for (auto& part : split(tune, ';')) {
     auto keyVal = split(part, '=');
     assert(keyVal.size() == 2);
-    string key = keyVal.front();
-    string val = keyVal.back();
-    params.push_back({key, split(val, ',')});
+    string const& key = keyVal.front();
+    const string& val = keyVal.back();
+    params.emplace_back(key, split(val, ','));
   }
   return permute(params);
 }
 
-string toString(TuneConfig config) {
+string toString(const TuneConfig& config) {
   string s{};
   for (const auto& [k, v] : config) { s += k + '=' + v + ','; }
   s.pop_back();
@@ -89,7 +89,7 @@ struct Entry {
   double cost;
 };
 
-string formatEntry(Entry e) {
+string formatEntry(const Entry& e) {
   char buf[256];
   snprintf(buf, sizeof(buf), "! %s %s # %.0f\n",
            e.shape.spec().c_str(), toString(e.config).c_str(), e.cost);
@@ -134,14 +134,14 @@ float Tune::maxBpw(FFTConfig fft) {
   float z1 = zForBpw(bpw1, fft, 1);
 printf ("Guess bpw for %s is %.2f first Z34 is %.2f\n", fft.spec().c_str(), bpw1, z1);
   while (z1 < 31.0f || z1 > 37.0f) {
-    float prev_bpw1 = bpw1;
-    float prev_z1 = z1;
+    float const prev_bpw1 = bpw1;
+    float const prev_z1 = z1;
     bpw1 = bpw1 + (z1 - 34.0f) * bpw_step;
     z1 = zForBpw(bpw1, fft, 1);
 printf ("Reguess bpw for %s is %.2f first Z34 is %.2f\n", fft.spec().c_str(), bpw1, z1);
     bpw_step = - (bpw1 - prev_bpw1) / (z1 - prev_z1);
-    if (bpw_step < 0.005f) bpw_step = 0.005f;
-    if (bpw_step > 0.025f) bpw_step = 0.025f;
+    bpw_step = std::max(bpw_step, 0.005f);
+    bpw_step = std::min(bpw_step, 0.025f);
   }
 
   // Get more samples for this bpw -- average in the sample we already have
@@ -152,8 +152,8 @@ printf ("Reguess bpw for %s is %.2f first Z34 is %.2f\n", fft.spec().c_str(), bp
   float z2 = zForBpw(bpw2, fft, 1);
 printf ("Guess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bpw2, z2);
   while (z2 < 20.0f || z2 > 25.0f) {
-    float prev_bpw2 = bpw2;
-    float prev_z2 = z2;
+    float const prev_bpw2 = bpw2;
+    float const prev_z2 = z2;
 //    bool error_recovery = (z2 <= 0.0);
 //    if (error_recovery) bpw2 -= bpw_step; else
     bpw2 = bpw2 + (z2 - 21.0f) * bpw_step;
@@ -161,8 +161,8 @@ printf ("Guess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bpw2
 printf ("Reguess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bpw2, z2);
 //  if (error_recovery) { if (z2 >= 20.0) break; else continue; }
     bpw_step = - (bpw2 - prev_bpw2) / (z2 - prev_z2);
-    if (bpw_step < 0.005f) bpw_step = 0.005f;
-    if (bpw_step > 0.025f) bpw_step = 0.025f;
+    bpw_step = std::max(bpw_step, 0.005f);
+    bpw_step = std::min(bpw_step, 0.025f);
   }
 
   // Get more samples for this bpw -- average in the sample we already have
@@ -177,7 +177,7 @@ float Tune::zForBpw(float bpw, FFTConfig fft, u32 count) {
   float total_z = 0.0f;
   for (u32 i = 0; i < count; i++, exponent = primes.nextPrime (exponent + 1)) {
     auto [ok, res, roeSq, roeMul] = Gpu::make(exponent, shared, fft, {}, false)->measureROE(true);
-    float z = roeSq.z();
+    float const z = roeSq.z();
     total_z += z;
 log("Zforbpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str());
     if (!ok) { log("Error at bpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str()); continue; }
@@ -187,17 +187,17 @@ log("Zforbpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str());
 }
 
 void Tune::ztune() {
-  File ztune = File::openAppend("ztune.txt");
+  File const ztune = File::openAppend("ztune.txt");
   ztune.printf("\n// %s\n\n", shortTimeStr().c_str());
 
   // Study a specific shape and variant
-  if (0) {
-    FFTShape shape = FFTShape(FFT64, 512, 15, 512);
-    u32 variant = 202;
-    u32 sample_size = 5;
-    FFTConfig fft{shape, variant, CARRY_AUTO};
+  if (false) {
+    FFTShape const shape = FFTShape(FFT64, 512, 15, 512);
+    u32 const variant = 202;
+    u32 const sample_size = 5;
+    FFTConfig const fft{shape, variant, CARRY_AUTO};
     for (float bpw = 18.18f; bpw < 18.305f; bpw += 0.02f) {
-      float z = zForBpw(bpw, fft, sample_size);
+      float const z = zForBpw(bpw, fft, sample_size);
       log ("Avg zForBpw %s %.2f %.2f\n", fft.spec().c_str(), bpw, z);
     }
   }
@@ -207,7 +207,7 @@ void Tune::ztune() {
   // Over this narrow Z range, linear curve fit should work well.  The Z data is noisy, so more samples is better.
 
   auto configs = FFTShape::multiSpec(shared.args->fftSpec);
-  for (FFTShape shape : configs) {
+  for (FFTShape const shape : configs) {
 
     // 4K widths store data on variants 100, 101, 202, 110, 111, 212
     u32 bpw_variants[NUM_BPW_ENTRIES] = {000, 101, 202, 10, 111, 212};
@@ -224,10 +224,10 @@ void Tune::ztune() {
 
     // Test specific variants needed for the maximum bpw table in fftbpw.h
     for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) {
-      FFTConfig fft{shape, bpw_variants[j], CARRY_AUTO};
+      FFTConfig const fft{shape, bpw_variants[j], CARRY_AUTO};
       bpw[j] = maxBpw(fft);
     }
-    string s = "\""s + shape.spec() + "\"";
+    string const s = "\""s + shape.spec() + "\"";
 //    ztune.printf("{%12s, {%.3f, %.3f, %.3f, %.3f, %.3f, %.3f}},\n", s.c_str(), bpw[0], bpw[1], bpw[2], bpw[3], bpw[4], bpw[5]);
     ztune.printf("{%12s, {", s.c_str());
     for (u32 j = 0; j < NUM_BPW_ENTRIES; ++j) ztune.printf("%s%.3f", j ? ", " : "", bpw[j]);
@@ -236,47 +236,48 @@ void Tune::ztune() {
 }
 
 void Tune::carryTune() {
-  File fo = File::openAppend("carrytune.txt");
+  File const fo = File::openAppend("carrytune.txt");
   fo.printf("\n// %s\n\n", shortTimeStr().c_str());
   shared.args->flags["STATS"] = "1";
   u32 prevSize = 0;
-  for (FFTShape shape : FFTShape::multiSpec(shared.args->fftSpec)) {
-    FFTConfig fft{shape, LAST_VARIANT, CARRY_AUTO};
+  for (FFTShape const shape : FFTShape::multiSpec(shared.args->fftSpec)) {
+    FFTConfig const fft{shape, LAST_VARIANT, CARRY_AUTO};
     if (prevSize == fft.size()) { continue; }
     prevSize = fft.size();
 
     vector<float> zv;
     double m = 0;
     const float mid = fft.shape.carry32BPW();
-    for (float bpw : {mid - 0.05f, mid + 0.05f}) {
-      u64 exponent = primes.nearestPrime(fft.size() * bpw);
+    for (float const bpw : {mid - 0.05f, mid + 0.05f}) {
+      u64 const exponent = primes.nearestPrime(fft.size() * bpw);
       auto [ok, carry] = Gpu::make(exponent, shared, fft, {}, false)->measureCarry();
       m = carry.max;
       if (!ok) { log("Error %s at %f\n", fft.spec().c_str(), bpw); }
       zv.push_back(carry.z());
     }
 
-    float avg = (zv[0] + zv[1]) / 2;
-    u64 exponent = fft.shape.carry32BPW() * fft.size();
-    double pErr100 = -expm1(-exp(-avg) * exponent * 100);
+    float const avg = (zv[0] + zv[1]) / 2;
+    u64 const exponent = fft.shape.carry32BPW() * fft.size();
+    double const pErr100 = -expm1(-exp(-avg) * exponent * 100);
     log("%14s %.3f : %.3f (%.3f %.3f) %f %.0f%%\n", fft.spec().c_str(), mid, avg, zv[0], zv[1], m, pErr100 * 100);
     fo.printf("%f %f\n", log2(fft.size()), avg);
   }
 }
 
 template<typename T>
-void add(vector<T>& a, const vector<T>& b) {
+static void add(vector<T>& a, const vector<T>& b) {
   a.insert(a.end(), b.begin(), b.end());
 }
 
 void Tune::ctune() {
-  Args *args = shared.args;
+  Args  const*args = shared.args;
 
   vector<string> ctune = args->ctune;
-  if (ctune.empty()) { ctune.push_back("IN_WG=256,128,64;IN_SIZEX=32,16,8;OUT_WG=256,128,64;OUT_SIZEX=32,16,8"); }
+  if (ctune.empty()) { ctune.emplace_back("IN_WG=256,128,64;IN_SIZEX=32,16,8;OUT_WG=256,128,64;OUT_SIZEX=32,16,8"); }
 
   vector<vector<TuneConfig>> configsVect;
-  for (const string& s : ctune) {
+  configsVect.reserve(ctune.size());
+for (const string& s : ctune) {
     configsVect.push_back(getTuneConfigs(s));
   }
 
@@ -290,13 +291,13 @@ void Tune::ctune() {
     log("FFTs: %s\n", str.c_str());
   }
 
-  for (FFTShape shape : shapes) {
-    FFTConfig fft{shape, 101, CARRY_32};
-    u64 exponent = primes.prevPrime(fft.maxExp());
+  for (FFTShape const shape : shapes) {
+    FFTConfig const fft{shape, 101, CARRY_32};
+    u64 const exponent = primes.prevPrime(fft.maxExp());
     // log("tuning %10s with exponent %" PRIu64 "\n", fft.shape.spec().c_str(), exponent);
 
     vector<int> bestPos(configsVect.size());
-    Entry best{{}, {}, 1e9};
+    Entry best{.shape={}, .config={}, .cost=1e9};
 
     for (u32 i = 0; i < configsVect.size(); ++i) {
       for (u32 pos = i ? 1 : 0; pos < configsVect[i].size(); ++pos) {
@@ -311,10 +312,10 @@ void Tune::ctune() {
         }
         auto cost = Gpu::make(exponent, shared, fft, c, false)->timePRP();
 
-        bool isBest = (cost < best.cost);
+        bool const isBest = (cost < best.cost);
         if (isBest) {
           bestPos[i] = pos;
-          best = {shape, c, cost};
+          best = {.shape=shape, .config=c, .cost=cost};
         }
         log("%c %6.0f : %s %s\n",
             isBest ? '*' : ' ', cost, shape.spec().c_str(), toString(c).c_str());
@@ -327,14 +328,14 @@ void Tune::ctune() {
 }
 
 // Add better -use settings to list of changes to be made to config.txt
-void configsUpdate(double current_cost, double best_cost, double threshold, const char *key, u32 value, vector<pair<string,int>> &newConfigKeyVals, vector<pair<string,int>> &suggestedConfigKeyVals) {
+static void configsUpdate(double current_cost, double best_cost, double threshold, const char *key, u32 value, vector<pair<string,int>> &newConfigKeyVals, vector<pair<string,int>> &suggestedConfigKeyVals) {
   if (best_cost == current_cost) return;
   // If best cost is better than current cost by a substantial margin (the threshold) then add the key value pair to suggestedConfigKeyVals
   if (best_cost < (1.0 - threshold) * current_cost)
-    newConfigKeyVals.push_back({key, value});
+    newConfigKeyVals.emplace_back(key, value);
   // Otherwise, add the key value pair to newConfigKeyVals
   else
-    suggestedConfigKeyVals.push_back({key, value});
+    suggestedConfigKeyVals.emplace_back(key, value);
 }
 
 void Tune::tune() {
@@ -342,15 +343,15 @@ void Tune::tune() {
   vector<FFTShape> shapes = FFTShape::multiSpec(args->fftSpec);
 
   // There are some options and variants that are different based on GPU manufacturer
-  bool AMDGPU = isAmdGpu(shared.context->deviceId());
-  bool NVIDIAGPU = isNvidiaGpu(shared.context->deviceId());
-  int NO_ASM = args->value("NO_ASM", 0);
-
-  bool tune_config = 1;
-  bool time_FFTs = 0;
-  bool time_NTTs = 0;
-  bool time_FP32 = 1;
-  bool time_inplace_only = NVIDIAGPU ? 1 : 0;           // Default is nVidia is better off with INPLACE=1, AMD GPUs need to time extra options used when INPLACE=0
+  bool const AMDGPU = isAmdGpu(shared.context->deviceId());
+  bool const NVIDIAGPU = isNvidiaGpu(shared.context->deviceId());
+  int const NO_ASM = args->value("NO_ASM", 0);
+
+  bool tune_config = true;
+  bool time_FFTs = false;
+  bool time_NTTs = false;
+  bool time_FP32 = true;
+  bool time_inplace_only = NVIDIAGPU;           // Default is nVidia is better off with INPLACE=1, AMD GPUs need to time extra options used when INPLACE=0
   int quick = 7;                                        // Run config from slowest (quick=1) to fastest (quick=10)
   u64 min_exponent = 75000000;
   u64 max_exponent = 350000000;
@@ -359,11 +360,11 @@ void Tune::tune() {
   // Parse input args
   for (const string& s : split(args->tune, ',')) {
     if (s.empty()) continue;
-    if (s == "noconfig") tune_config = 0;
-    if (s == "fp64") time_FFTs = 1;
-    if (s == "ntt") time_NTTs = 1;
-    if (s == "nofp32") time_FP32 = 0;
-    if (s == "inplace") time_inplace_only = 1;
+    if (s == "noconfig") tune_config = false;
+    if (s == "fp64") time_FFTs = true;
+    if (s == "ntt") time_NTTs = true;
+    if (s == "nofp32") time_FP32 = false;
+    if (s == "inplace") time_inplace_only = true;
     auto keyVal = split(s, '=');
     if (keyVal.size() == 2) {
       if (keyVal.front() == "quick") quick = stod(keyVal.back());
@@ -371,8 +372,8 @@ void Tune::tune() {
       if (keyVal.front() == "maxexp") max_exponent = stoull(keyVal.back());
     }
   }
-  if (quick < 1) quick = 1;
-  if (quick > 10) quick = 10;
+  quick = std::max(quick, 1);
+  quick = std::min(quick, 10);
 
   // Look for best settings of various options.  Append best settings to config.txt.
   if (tune_config) {
@@ -384,13 +385,13 @@ void Tune::tune() {
 
     // If user gave us an fft-spec, use that to time options
     if (!args->fftSpec.empty()) {
-      defaultShape = &shapes[0];
+      defaultShape = shapes.data();
       if (shapes[0].fft_type == FFT64) {
         defaultFFTShape = shapes[0];
-        time_FFTs = 1;
+        time_FFTs = true;
       } else {
         defaultNTTShape = shapes[0];
-        time_NTTs = 1;
+        time_NTTs = true;
       }
     }
     // If user specified FP64-timings, time a wavefront exponent using an 7.5M FFT
@@ -409,30 +410,30 @@ void Tune::tune() {
     else {
       log("Checking whether this GPU is better suited for double-precision FFTs or integer NTTs.\n");
       defaultFFTShape = FFTShape(FFT64, 512, 16, 512);
-      FFTConfig fft{defaultFFTShape, 101, CARRY_32};
-      double fp64_time = Gpu::make(141000001, shared, fft, {}, false)->timePRP(quick);
+      FFTConfig const fft{defaultFFTShape, 101, CARRY_32};
+      double const fp64_time = Gpu::make(141000001, shared, fft, {}, false)->timePRP(quick);
       log("Time for FP64 FFT %12s is %6.1f\n", fft.spec().c_str(), fp64_time);
       defaultNTTShape = FFTShape(FFT3161, 512, 8, 512);
-      FFTConfig ntt{defaultNTTShape, 202, CARRY_AUTO};
-      double ntt_time = Gpu::make(141000001, shared, ntt, {}, false)->timePRP(quick);
+      FFTConfig const ntt{defaultNTTShape, 202, CARRY_AUTO};
+      double const ntt_time = Gpu::make(141000001, shared, ntt, {}, false)->timePRP(quick);
       log("Time for M31*M61 NTT %12s is %6.1f\n", ntt.spec().c_str(), ntt_time);
       if (fp64_time < ntt_time) {
         defaultShape = &defaultFFTShape;
-        time_FFTs = 1;
+        time_FFTs = true;
         if (fp64_time < 0.80 * ntt_time) {
           log("FP64 FFTs are significantly faster than integer NTTs.  No NTT tuning will be performed.\n");
         } else {
           log("FP64 FFTs are not significantly faster than integer NTTs.  NTT tuning will be performed.\n");
-          time_NTTs = 1;
+          time_NTTs = true;
         }
       } else {
         defaultShape = &defaultNTTShape;
-        time_NTTs = 1;
+        time_NTTs = true;
         if (fp64_time > 1.20 * ntt_time) {
           log("FP64 FFTs are significantly slower than integer NTTs.  No FP64 tuning will be performed.\n");
         } else {
           log("FP64 FFTs are not significantly slower than integer NTTs.  FP64 tuning will be performed.\n");
-          time_FFTs = 1;
+          time_FFTs = true;
         }
       }
     }
@@ -442,28 +443,28 @@ void Tune::tune() {
     log("Please read config.txt after -tune completes.\n");
     log("\n");
 
-    u32 variant = (defaultShape == &defaultFFTShape) ? 101 : 202;
+    u32 const variant = (defaultShape == &defaultFFTShape) ? 101 : 202;
 //GW: if fft spec on the command line specifies a variant then we should use that variant (I get some interesting results with 000 vs 101 vs 201 vs 202 likely due to rocm optimizer)
 
     // IN_WG/SIZEX, OUT_WG/SIZEX, PAD, MIDDLE_IN/OUT_LDS_TRANSPOSE apply only if INPLACE=0
-    u32 current_inplace = args->value("INPLACE", 0);
+    u32 const current_inplace = args->value("INPLACE", 0);
     args->flags["INPLACE"] = to_string(0);
 
     // Find best IN_WG,IN_SIZEX,OUT_WG,OUT_SIZEX settings
     if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_in_wg = 0;
       u32 best_in_sizex = 0;
-      u32 current_in_wg = args->value("IN_WG", 128);
-      u32 current_in_sizex = args->value("IN_SIZEX", 16);
+      u32 const current_in_wg = args->value("IN_WG", 128);
+      u32 const current_in_sizex = args->value("IN_SIZEX", 16);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 in_wg : {64, 128, 256}) {
-        for (u32 in_sizex : {8, 16, 32}) {
+      for (u32 const in_wg : {64, 128, 256}) {
+        for (u32 const in_sizex : {8, 16, 32}) {
           args->flags["IN_WG"] = to_string(in_wg);
           args->flags["IN_SIZEX"] = to_string(in_sizex);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using IN_WG=%u, IN_SIZEX=%u is %6.1f\n", fft.spec().c_str(), in_wg, in_sizex, cost);
           if (in_wg == current_in_wg && in_sizex == current_in_sizex) current_cost = cost;
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_in_wg = in_wg; best_in_sizex = in_sizex; }
@@ -477,15 +478,15 @@ void Tune::tune() {
 
       u32 best_out_wg = 0;
       u32 best_out_sizex = 0;
-      u32 current_out_wg = args->value("OUT_WG", 128);
-      u32 current_out_sizex = args->value("OUT_SIZEX", 16);
+      u32 const current_out_wg = args->value("OUT_WG", 128);
+      u32 const current_out_sizex = args->value("OUT_SIZEX", 16);
       best_cost = -1.0;
       current_cost = -1.0;
-      for (u32 out_wg : {64, 128, 256}) {
-        for (u32 out_sizex : {8, 16, 32}) {
+      for (u32 const out_wg : {64, 128, 256}) {
+        for (u32 const out_sizex : {8, 16, 32}) {
           args->flags["OUT_WG"] = to_string(out_wg);
           args->flags["OUT_SIZEX"] = to_string(out_sizex);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using OUT_WG=%u, OUT_SIZEX=%u is %6.1f\n", fft.spec().c_str(), out_wg, out_sizex, cost);
           if (out_wg == current_out_wg && out_sizex == current_out_sizex) current_cost = cost;
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_out_wg = out_wg; best_out_sizex = out_sizex; }
@@ -500,15 +501,15 @@ void Tune::tune() {
 
     // Find best PAD setting.  Default is 256 bytes for AMD, 0 for all others.
     if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_pad = 0;
-      u32 current_pad = args->value("PAD", AMDGPU ? 256 : 0);
+      u32 const current_pad = args->value("PAD", AMDGPU ? 256 : 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 pad : {0, 64, 128, 256, 512}) {
+      for (u32 const pad : {0, 64, 128, 256, 512}) {
         args->flags["PAD"] = to_string(pad);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using PAD=%u is %6.1f\n", fft.spec().c_str(), pad, cost);
         if (pad == current_pad) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_pad = pad; }
@@ -520,15 +521,15 @@ void Tune::tune() {
 
     // Find best MIDDLE_IN_LDS_TRANSPOSE setting
     if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_in_lds_transpose = 0;
-      u32 current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
+      u32 const current_middle_in_lds_transpose = args->value("MIDDLE_IN_LDS_TRANSPOSE", 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 middle_in_lds_transpose : {0, 1}) {
+      for (u32 const middle_in_lds_transpose : {0, 1}) {
         args->flags["MIDDLE_IN_LDS_TRANSPOSE"] = to_string(middle_in_lds_transpose);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MIDDLE_IN_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_in_lds_transpose, cost);
         if (middle_in_lds_transpose == current_middle_in_lds_transpose) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_in_lds_transpose = middle_in_lds_transpose; }
@@ -540,15 +541,15 @@ void Tune::tune() {
 
     // Find best MIDDLE_OUT_LDS_TRANSPOSE setting
     if (!time_inplace_only) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_middle_out_lds_transpose = 0;
-      u32 current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
+      u32 const current_middle_out_lds_transpose = args->value("MIDDLE_OUT_LDS_TRANSPOSE", 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 middle_out_lds_transpose : {0, 1}) {
+      for (u32 const middle_out_lds_transpose : {0, 1}) {
         args->flags["MIDDLE_OUT_LDS_TRANSPOSE"] = to_string(middle_out_lds_transpose);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MIDDLE_OUT_LDS_TRANSPOSE=%u is %6.1f\n", fft.spec().c_str(), middle_out_lds_transpose, cost);
         if (middle_out_lds_transpose == current_middle_out_lds_transpose) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_middle_out_lds_transpose = middle_out_lds_transpose; }
@@ -561,18 +562,18 @@ void Tune::tune() {
     // If only timing INPLACE=1 options, then set INPLACE
     if (time_inplace_only) {
       args->flags["INPLACE"] = to_string(1);
-      newConfigKeyVals.push_back({"INPLACE", 1});
+      newConfigKeyVals.emplace_back("INPLACE", 1);
     }
     // Find best INPLACE setting
     else {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_inplace = 0;
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 inplace : {0, 1}) {
+      for (u32 const inplace : {0, 1}) {
         args->flags["INPLACE"] = to_string(inplace);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using INPLACE=%u is %6.1f\n", fft.spec().c_str(), inplace, cost);
         if (inplace == current_inplace) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_inplace = inplace; }
@@ -583,20 +584,20 @@ void Tune::tune() {
     }
 
     // Find best LOADS/STORES settings
-    if (1) {
+    if (true) {
       u32 loads = args->value("LOADS", 0);
       u32 stores = args->value("STORES", 0);
 
       // Find best FFT data LOADS setting
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_fft_load = 0;
         double best_cost = -1.0;
-	for (u32 fft_load : {0, 1, 2, 3, 4}) {
+	for (u32 const fft_load : {0, 1, 2, 3, 4}) {
           if (fft_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10 * 10 + fft_load);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT load=%u is %6.1f\n", fft.spec().c_str(), fft_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_load = fft_load; }
         }
@@ -606,15 +607,15 @@ void Tune::tune() {
       }
 
       // Find best FFT data STORES setting
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_fft_store = 0;
         double best_cost = -1.0;
-	for (u32 fft_store : {0, 1, 2, 3, 4}) {
+	for (u32 const fft_store : {0, 1, 2, 3, 4}) {
           if (fft_store >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using FFT store=%u is %6.1f\n", fft.spec().c_str(), fft_store, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fft_store = fft_store; }
         }
@@ -624,18 +625,18 @@ void Tune::tune() {
       }
 
       // Find best carryShuttle LOADS/STORES settings
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_cs_load = 0, best_cs_store = 0;
         double best_cost = -1.0;
-	for (u32 cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load with L2 store
+	for (u32 const cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load with L2 store
           if (cs >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
-	  u32 cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
-	  u32 cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
+	  u32 const cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
+	  u32 const cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
           args->flags["LOADS"] = to_string(loads / 100 * 100 + cs_load * 10 + loads % 10);
           args->flags["STORES"] = to_string(stores / 100 * 100 + cs_store * 10 + stores % 10);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using carry shuttle load=%u, store=%u is %6.1f\n", fft.spec().c_str(), cs_load, cs_store, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_cs_load = cs_load; best_cs_store = cs_store; }
         }
@@ -647,15 +648,15 @@ void Tune::tune() {
       }
 
       // Find best TRIG frequently used data LOADS setting
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 trig_load : {0, 5}) {
+	for (u32 const trig_load : {0, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 1000 * 1000 + trig_load * 100 + loads % 100);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig frequently used load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -665,15 +666,15 @@ void Tune::tune() {
       }
 
       // Find best TRIG several uses data LOADS setting
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
+	for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10000 * 10000 + trig_load * 1000 + loads % 1000);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig several uses load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -683,15 +684,15 @@ void Tune::tune() {
       }
 
       // Find best TRIG used once data LOADS setting
-      if (1) {
-        FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-        u64 exponent = primes.prevPrime(fft.maxExp());
+      if (true) {
+        FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+        u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 trig_load : {0, 1, 2, 3, 4, 5}) {
+	for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(trig_load * 10000 + loads % 10000);
-          double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+          double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
           log("Time for %12s using Trig used once load=%u is %6.1f\n", fft.spec().c_str(), trig_load, cost);
           if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_trig_load = trig_load; }
         }
@@ -708,16 +709,16 @@ void Tune::tune() {
     }
 
     // Find best FAST_BARRIER setting
-    if (1 /*AMDGPU*/) {                 // FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true /*AMDGPU*/) {                 // FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_fast_barrier = 0;
-      u32 current_fast_barrier = args->value("FAST_BARRIER", 0);
+      u32 const current_fast_barrier = args->value("FAST_BARRIER", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 fast_barrier : {0, 1}) {
+      for (u32 const fast_barrier : {0, 1}) {
         args->flags["FAST_BARRIER"] = to_string(fast_barrier);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using FAST_BARRIER=%u is %6.1f\n", fft.spec().c_str(), fast_barrier, cost);
         if (fast_barrier == current_fast_barrier) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_fast_barrier = fast_barrier; }
@@ -728,16 +729,16 @@ void Tune::tune() {
     }
 
     // Find best TAIL_KERNELS setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_kernels = 0;
-      u32 current_tail_kernels = args->value("TAIL_KERNELS", 2);
+      u32 const current_tail_kernels = args->value("TAIL_KERNELS", 2);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tail_kernels : {0, 1, 2, 3}) {
+      for (u32 const tail_kernels : {0, 1, 2, 3}) {
         args->flags["TAIL_KERNELS"] = to_string(tail_kernels);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_KERNELS=%u is %6.1f\n", fft.spec().c_str(), tail_kernels, cost);
         if (tail_kernels == current_tail_kernels) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_kernels = tail_kernels; }
@@ -752,15 +753,15 @@ void Tune::tune() {
 
     // Find best TAIL_TRIGS setting
     if (time_FFTs) {
-      FFTConfig fft{defaultFFTShape, 101, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{defaultFFTShape, 101, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
-      u32 current_tail_trigs = args->value("TAIL_TRIGS", 2);
+      u32 const current_tail_trigs = args->value("TAIL_TRIGS", 2);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tail_trigs : {0, 1, 2}) {
+      for (u32 const tail_trigs : {0, 1, 2}) {
         args->flags["TAIL_TRIGS"] = to_string(tail_trigs);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -774,14 +775,14 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
-      u32 current_tail_trigs = args->value("TAIL_TRIGS31", 0);
+      u32 const current_tail_trigs = args->value("TAIL_TRIGS31", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tail_trigs : {0, 1}) {
+      for (u32 const tail_trigs : {0, 1}) {
         args->flags["TAIL_TRIGS31"] = to_string(tail_trigs);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS31=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -795,14 +796,14 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 const exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tail_trigs = 0;
-      u32 current_tail_trigs = args->value("TAIL_TRIGS32", 2);
+      u32 const current_tail_trigs = args->value("TAIL_TRIGS32", 2);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tail_trigs : {0, 1, 2}) {
+      for (u32 const tail_trigs : {0, 1, 2}) {
         args->flags["TAIL_TRIGS32"] = to_string(tail_trigs);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS32=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -816,14 +817,14 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF61) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tail_trigs = 0;
-      u32 current_tail_trigs = args->value("TAIL_TRIGS61", 0);
+      u32 const current_tail_trigs = args->value("TAIL_TRIGS61", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tail_trigs : {0, 1}) {
+      for (u32 const tail_trigs : {0, 1}) {
         args->flags["TAIL_TRIGS61"] = to_string(tail_trigs);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TAIL_TRIGS61=%u is %6.1f\n", fft.spec().c_str(), tail_trigs, cost);
         if (tail_trigs == current_tail_trigs) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tail_trigs = tail_trigs; }
@@ -835,15 +836,15 @@ void Tune::tune() {
 
     // Find best TABMUL_CHAIN setting
     if (time_FFTs) {
-      FFTConfig fft{defaultFFTShape, 101, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      FFTConfig const fft{defaultFFTShape, 101, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
-      u32 current_tabmul_chain = args->value("TABMUL_CHAIN", 0);
+      u32 const current_tabmul_chain = args->value("TABMUL_CHAIN", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tabmul_chain : {0, 1}) {
+      for (u32 const tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN"] = to_string(tabmul_chain);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -857,14 +858,14 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
-      u32 current_tabmul_chain = args->value("TABMUL_CHAIN31", 0);
+      u32 const current_tabmul_chain = args->value("TABMUL_CHAIN31", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tabmul_chain : {0, 1}) {
+      for (u32 const tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN31"] = to_string(tabmul_chain);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN31=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -878,14 +879,14 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 const exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tabmul_chain = 0;
-      u32 current_tabmul_chain = args->value("TABMUL_CHAIN32", 0);
+      u32 const current_tabmul_chain = args->value("TABMUL_CHAIN32", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tabmul_chain : {0, 1}) {
+      for (u32 const tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN32"] = to_string(tabmul_chain);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN32=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -899,14 +900,14 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF61) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_tabmul_chain = 0;
-      u32 current_tabmul_chain = args->value("TABMUL_CHAIN61", 0);
+      u32 const current_tabmul_chain = args->value("TABMUL_CHAIN61", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 tabmul_chain : {0, 1}) {
+      for (u32 const tabmul_chain : {0, 1}) {
         args->flags["TABMUL_CHAIN61"] = to_string(tabmul_chain);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using TABMUL_CHAIN61=%u is %6.1f\n", fft.spec().c_str(), tabmul_chain, cost);
         if (tabmul_chain == current_tabmul_chain) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_tabmul_chain = tabmul_chain; }
@@ -920,14 +921,14 @@ void Tune::tune() {
     if (time_NTTs) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.NTT_GF31) fft = FFTConfig(FFTShape(FFT3161, 512, 8, 512), 202, CARRY_AUTO);
-      u64 exponent = primes.prevPrime(fft.maxExp());
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_modm31 = 0;
-      u32 current_modm31 = args->value("MODM31", 0);
+      u32 const current_modm31 = args->value("MODM31", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 modm31 : {0, 1, 2}) {
+      for (u32 const modm31 : {0, 1, 2}) {
         args->flags["MODM31"] = to_string(modm31);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using MODM31=%u is %6.1f\n", fft.spec().c_str(), modm31, cost);
         if (modm31 == current_modm31) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_modm31 = modm31; }
@@ -938,16 +939,16 @@ void Tune::tune() {
     }
 
     // Find best UNROLL_W setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_unroll_w = 0;
-      u32 current_unroll_w = args->value("UNROLL_W", AMDGPU ? 0 : 1);
+      u32 const current_unroll_w = args->value("UNROLL_W", AMDGPU ? 0 : 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 unroll_w : {0, 1}) {
+      for (u32 const unroll_w : {0, 1}) {
         args->flags["UNROLL_W"] = to_string(unroll_w);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using UNROLL_W=%u is %6.1f\n", fft.spec().c_str(), unroll_w, cost);
         if (unroll_w == current_unroll_w) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_unroll_w = unroll_w; }
@@ -958,16 +959,16 @@ void Tune::tune() {
     }
 
     // Find best UNROLL_H setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_unroll_h = 0;
-      u32 current_unroll_h = args->value("UNROLL_H", AMDGPU && defaultShape->height >= 1024 ? 0 : 1);
+      u32 const current_unroll_h = args->value("UNROLL_H", AMDGPU && defaultShape->height >= 1024 ? 0 : 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 unroll_h : {0, 1}) {
+      for (u32 const unroll_h : {0, 1}) {
         args->flags["UNROLL_H"] = to_string(unroll_h);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using UNROLL_H=%u is %6.1f\n", fft.spec().c_str(), unroll_h, cost);
         if (unroll_h == current_unroll_h) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_unroll_h = unroll_h; }
@@ -978,16 +979,16 @@ void Tune::tune() {
     }
 
     // Find best ZEROHACK_W setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_zerohack_w = 0;
-      u32 current_zerohack_w = args->value("ZEROHACK_W", 1);
+      u32 const current_zerohack_w = args->value("ZEROHACK_W", 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 zerohack_w : {0, 1}) {
+      for (u32 const zerohack_w : {0, 1}) {
         args->flags["ZEROHACK_W"] = to_string(zerohack_w);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using ZEROHACK_W=%u is %6.1f\n", fft.spec().c_str(), zerohack_w, cost);
         if (zerohack_w == current_zerohack_w) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_zerohack_w = zerohack_w; }
@@ -998,16 +999,16 @@ void Tune::tune() {
     }
 
     // Find best ZEROHACK_H setting
-    if (1) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_zerohack_h = 0;
-      u32 current_zerohack_h = args->value("ZEROHACK_H", 1);
+      u32 const current_zerohack_h = args->value("ZEROHACK_H", 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 zerohack_h : {0, 1}) {
+      for (u32 const zerohack_h : {0, 1}) {
         args->flags["ZEROHACK_H"] = to_string(zerohack_h);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using ZEROHACK_H=%u is %6.1f\n", fft.spec().c_str(), zerohack_h, cost);
         if (zerohack_h == current_zerohack_h) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_zerohack_h = zerohack_h; }
@@ -1018,16 +1019,16 @@ void Tune::tune() {
     }
 
     // Find best WMUL setting
-    if (1 && defaultShape->width != 4096) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (true && defaultShape->width != 4096) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_wmul = 0;
-      u32 current_wmul = args->value("WMUL", 2);
+      u32 const current_wmul = args->value("WMUL", 2);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 wmul : {1, 2, 4}) {
+      for (u32 const wmul : {1, 2, 4}) {
         args->flags["WMUL"] = to_string(wmul);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using WMUL=%u is %6.1f\n", fft.spec().c_str(), wmul, cost);
         if (wmul == current_wmul) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_wmul = wmul; }
@@ -1039,16 +1040,16 @@ void Tune::tune() {
 
     // Find best CUDA compiler options
 #if CUDA_BACKEND
-    if (0) {
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (false) {
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_noreg = 0;
-      u32 current_noreg = args->value("NOREG", 0);
+      u32 const current_noreg = args->value("NOREG", 0);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 noreg : {0, 1}) {
+      for (u32 const noreg : {0, 1}) {
         args->flags["NOREG"] = to_string(noreg);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using NOREG=%u is %6.1f\n", fft.spec().c_str(), noreg, cost);
         if (noreg == current_noreg) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_noreg = noreg; }
@@ -1060,16 +1061,16 @@ void Tune::tune() {
 #endif
 
     // Find best BIGLIT setting
-    if (0 && time_FFTs) {        // Deprecated
-      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
-      u64 exponent = primes.prevPrime(fft.maxExp());
+    if (false && time_FFTs) {        // Deprecated
+      FFTConfig const fft{*defaultShape, variant, CARRY_AUTO};
+      u64 const exponent = primes.prevPrime(fft.maxExp());
       u32 best_biglit = 0;
-      u32 current_biglit = args->value("BIGLIT", 1);
+      u32 const current_biglit = args->value("BIGLIT", 1);
       double best_cost = -1.0;
       double current_cost = -1.0;
-      for (u32 biglit : {0, 1}) {
+      for (u32 const biglit : {0, 1}) {
         args->flags["BIGLIT"] = to_string(biglit);
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
         log("Time for %12s using BIGLIT=%u is %6.1f\n", fft.spec().c_str(), biglit, cost);
         if (biglit == current_biglit) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_biglit = biglit; }
@@ -1081,7 +1082,7 @@ void Tune::tune() {
 
     // Output new settings to config.txt
     File config = File::openAppend("config.txt");
-    if (newConfigKeyVals.size()) {
+    if (!newConfigKeyVals.empty()) {
       config.write("\n# New settings based on a -tune run.");
       for (u32 i = 0; i < newConfigKeyVals.size(); ++i) {
         config.write(i == 0 ? "\n   -use " : ",");
@@ -1089,7 +1090,7 @@ void Tune::tune() {
       }
       config.write("\n");
     }
-    if (suggestedConfigKeyVals.size()) {
+    if (!suggestedConfigKeyVals.empty()) {
       config.write("\n# These settings were slightly faster in a -tune run.");
       config.write("\n# It is suggested that each setting be timed over a longer duration to see if the setting really is faster.");
       for (u32 i = 0; i < suggestedConfigKeyVals.size(); ++i) {
@@ -1118,11 +1119,11 @@ void Tune::tune() {
   int skip_some_WH_variants = 1;                // 0 = skip nothing, 1 = skip slower widths/heights unless they have better Z, 2 = only run fastest widths/heights
 
   // The width = height = 512 FFT shape is so good, we probably don't need to time the width = 1024, height = 256 shape.
-  bool skip_1K_256 = 1;
+  bool skip_1K_256 = true;
 
 // make command line args for this? 
 skip_some_WH_variants = 2;   // should default be 1??
-skip_1K_256 = 0;
+skip_1K_256 = false;
 
   // For each width, time the 001, 101, and 201 FP64 variants to find the fastest width variant.
   // In an ideal world we'd use the -time feature and look at the kCarryFused timing.  Then we'd save this info in config.txt or tune.txt.
@@ -1143,10 +1144,10 @@ skip_1K_256 = 0;
     if ((shape.fft_type == FFT3261 || shape.fft_type == FFT323161 || shape.fft_type == FFT3231 || shape.fft_type == FFT32) && !time_FP32) continue;
 
     // Time an exponent that's good for all variants and carry-config.
-    u64 exponent = primes.prevPrime(FFTConfig{shape, shape.width <= 1024 ? 0u : 100u, CARRY_32}.maxExp());
+    u64 const exponent = primes.prevPrime(FFTConfig{shape, shape.width <= 1024 ? 0u : 100u, CARRY_32}.maxExp());
     u32 adjusted_quick = (exponent < 50000000) ? quick - 1 : (exponent < 170000000) ? quick : (exponent < 350000000) ? quick + 1 : quick + 2;
-    if (adjusted_quick < 1) adjusted_quick = 1;
-    if (adjusted_quick > 10) adjusted_quick = 10;
+    adjusted_quick = std::max<u32>(adjusted_quick, 1);
+    adjusted_quick = std::min<u32>(adjusted_quick, 10);
 
     // Loop through all possible variants
     for (u32 variant = 0; variant <= LAST_VARIANT; variant = next_variant (variant)) {
@@ -1170,7 +1171,7 @@ skip_1K_256 = 0;
 
       // Reject shapes that won't be used to test exponents in the user's desired range
       {
-        FFTConfig fft{shape, variant, CARRY_AUTO};
+        FFTConfig const fft{shape, variant, CARRY_AUTO};
         if (fft.maxExp() < min_exponent) continue;
         if (fft.maxExp() > 2*max_exponent) continue;
         if (shape.fft_type == FFT64 && fft.maxExp() > 1.2*max_exponent) continue;
@@ -1192,12 +1193,12 @@ skip_1K_256 = 0;
           if (auto it = fastest_width_variants.find(shape.width); it != fastest_width_variants.end()) {
             fastest_width = it->second;
           } else {
-            FFTShape test = FFTShape(FFT64, shape.width, 12, 256);
+            FFTShape const test = FFTShape(FFT64, shape.width, 12, 256);
             double cost, min_cost = -1.0;
             for (u32 w = 0; w < N_VARIANT_W; w++) {
               if (w == 0 && !AMDGPU) continue;
               if (w == 0 && test.width > 1024) continue;
-              FFTConfig fft{test, variant_WMH (w, 0, 1), CARRY_32};
+              FFTConfig const fft{test, variant_WMH (w, 0, 1), CARRY_32};
               cost = Gpu::make(primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(adjusted_quick);
               log("Fast width search %6.1f %12s\n", cost, fft.spec().c_str());
               if (min_cost < 0.0 || cost < min_cost) { min_cost = cost; fastest_width = w; }
@@ -1214,12 +1215,12 @@ skip_1K_256 = 0;
           if (auto it = fastest_height_variants.find(shape.height); it != fastest_height_variants.end()) {
             fastest_height = it->second;
           } else {
-            FFTShape test = FFTShape(FFT64, shape.height, 12, shape.height);
+            FFTShape const test = FFTShape(FFT64, shape.height, 12, shape.height);
             double cost, min_cost = -1.0;
             for (u32 h = 0; h < N_VARIANT_H; h++) {
               if (h == 0 && !AMDGPU) continue;
               if (h == 0 && test.height > 1024) continue;
-              FFTConfig fft{test, variant_WMH (1, 0, h), CARRY_32};
+              FFTConfig const fft{test, variant_WMH (1, 0, h), CARRY_32};
               cost = Gpu::make(primes.prevPrime(fft.maxExp()), shared, fft, {}, false)->timePRP(quick);
               log("Fast height search %6.1f %12s\n", cost, fft.spec().c_str());
               if (min_cost < 0.0 || cost < min_cost) { min_cost = cost; fastest_height = h; }
@@ -1245,13 +1246,13 @@ skip_1K_256 = 0;
       }
 
       for (auto carry : carryToTest) {
-        FFTConfig fft{shape, variant, carry};
+        FFTConfig const fft{shape, variant, carry};
 
         // Skip middle = 1, CARRY_32 if maximum exponent would be the same as middle = 0, CARRY_32
         if (variant_M(variant) > 0 && carry == CARRY_32 && fft.maxExp() <= FFTConfig{shape, variant - 10, CARRY_32}.maxExp()) continue;
 
-        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
-        bool isUseful = TuneEntry{cost, fft}.update(results);
+        double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        bool const isUseful = TuneEntry{.cost=cost, .fft=fft}.update(results);
         log("%c %6.1f %12s %9" PRIu64 "\n", isUseful ? '*' : ' ', cost, fft.spec().c_str(), fft.maxExp());
         if (isUseful) TuneEntry::writeTuneFile(results);
       }

From 294cc485ac8cf53c8b69144a3039832eda573849 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 29 Jun 2026 18:40:54 +0000
Subject: [PATCH 085/214] Workaround AMD's Windows OpenCL compiler whining
 about always true if statements when WMUL=1.

---
 src/cl/carryfused.cl | 57 ++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 55 insertions(+), 2 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index d5d52610..9a887a76 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -32,7 +32,9 @@ void spin() {
 // The last WMUL workgroup's carries have been written to global memory.  Now we shuffle WMUL-1 workgroups carries up using local memory.
 void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe) {
   // If WMUL is one, there is no shuffling of carries
-  if (WMUL == 1) return;
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead of the clean looking if statement below we use the uglier #if
+  //if (WMUL == 1) return;
+#if WMUL > 1
 
   const u32 lds_i64s = LDS_BYTES / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL line
   local i64 *lds = (local i64 *) lds2;
@@ -80,12 +82,16 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
     // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
     if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
   }
+
+#endif
 }
 
 // The last WMUL workgroup's carries have been written to global memory.  Now we shuffle WMUL-1 workgroup carries up using local memory.
 void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe) {
   // If WMUL is one, there is no shuffling of carries
-  if (WMUL == 1) return;
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead of the clean looking if statement below we use the uglier #if
+  //if (WMUL == 1) return;
+#if WMUL > 1
 
   const u32 lds_i32s = LDS_BYTES / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL line
   local i32 *lds = (local i32 *) lds2;
@@ -99,6 +105,8 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
   bar();
   // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
   if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
+
+#endif
 }
 
 
@@ -199,7 +207,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -406,7 +419,12 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -619,7 +637,12 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -836,7 +859,12 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -1068,7 +1096,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
   // Tell next group that its carries are ready
@@ -1327,7 +1360,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -1582,7 +1620,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -1832,7 +1875,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
@@ -2114,7 +2162,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
+  // AMD's OpenCL Windows compiler generates warnings about always true if statements for WMUL-1.  So instead an #if is required
+#if WMUL == 1
+  if (gr < H) {
+#else
   if (gr < H / WMUL && me >= (WMUL-1) * G_W) {
+#endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready

From 14a981cbf24cdfdadba4d3d4592a854470791e68 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sat, 18 Jul 2026 19:41:06 -0600
Subject: [PATCH 086/214] CUDA backend: unload CUmodules via refcount to fix
 OOM leak

The CUDA shim never called cuModuleUnload, so every Gpu::make() leaked
its full set of ~36 kernel modules into the single process-lifetime CUDA
context. Since Gpu::make() runs once per work unit (Task.cpp) and dozens
of times during tuning (tune.cpp), device memory grew unbounded until
cuLaunchKernel failed with CUDA_ERROR_OUT_OF_MEMORY.

clReleaseProgram couldn't simply unload the module because loadAux()
releases the program while the derived kernel's CUfunction is still in
use (OpenCL keeps the program alive via clCreateKernel's implicit
retain). Reference-count the module instead: the owning program holds
one ref (at load), each kernel created from it holds another, and the
module is unloaded only when the count reaches zero.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
---
 src/cuda/clwrap_cuda.cpp | 59 ++++++++++++++++++++++++++++++++++------
 1 file changed, 50 insertions(+), 9 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 5df25791..672180af 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -37,6 +37,41 @@ static void ensureContextCurrent() {
   }
 }
 
+// Reference-count CUmodules so they get unloaded once nothing uses them.
+//
+// In OpenCL, clCreateKernel retains the program, so the underlying code object
+// stays alive until BOTH the program and every kernel derived from it are
+// released. PRPLL relies on this: KernelCompiler::loadAux() creates a kernel,
+// then releases the program while the kernel keeps running. We therefore cannot
+// unload the module in clReleaseProgram — a live CUfunction would be invalidated.
+//
+// Instead we count references: the owning program holds one ref (set when the
+// module is loaded), and each kernel created from it holds one more. The module
+// is unloaded when the count reaches zero. This is essential because Gpu::make()
+// builds a fresh set of ~36 kernels per work unit (and dozens of times during
+// tuning), all into the single process-lifetime CUDA context. Without unloading,
+// device memory grows unbounded and eventually cuLaunchKernel fails with
+// CUDA_ERROR_OUT_OF_MEMORY.
+//
+// Loading is single-threaded (KernelCompiler's async path is disabled), so a
+// plain map without locking is sufficient.
+static std::map<CUmodule, int> g_moduleRefCount;
+
+static void moduleRetain(CUmodule m) {
+  if (m) { ++g_moduleRefCount[m]; }
+}
+
+static void moduleRelease(CUmodule m) {
+  if (!m) return;
+  auto it = g_moduleRefCount.find(m);
+  if (it == g_moduleRefCount.end()) return;   // untracked module — leave as-is
+  if (--it->second <= 0) {
+    ensureContextCurrent();
+    cuModuleUnload(m);
+    g_moduleRefCount.erase(it);
+  }
+}
+
 // Global state for CUDA initialization
 static bool g_cudaInitialized = false;
 static void ensureCudaInit() {
@@ -123,13 +158,12 @@ int clReleaseContext(cl_context ctx) {
 
 int clReleaseProgram(cl_program p) {
   if (p) {
-    // NOTE: Do NOT unload the module here. PRPLL's loadAux() gets a kernel from
-    // the program, then releases the program. The kernel's CUfunction remains valid
-    // only while the CUmodule is loaded. In OpenCL, clCreateKernel retains the
-    // program. In our CUDA shim, we simply never unload modules — they persist for
-    // the process lifetime. This is safe because PRPLL creates a fixed set of kernels
-    // at startup and uses them until exit.
-    // if (p->moduleLoaded) cuModuleUnload(p->module);
+    // Drop the program's reference to its module. The module is unloaded only once
+    // every kernel created from it has also been released (see moduleRelease and the
+    // refcount rationale near the top of this file). This lets loadAux() release the
+    // program while keeping the kernel's CUfunction valid, matching OpenCL semantics,
+    // without leaking a module per Gpu::make().
+    if (p->moduleLoaded) { moduleRelease(p->module); }
     delete p;
   }
   return CL_SUCCESS;
@@ -172,6 +206,7 @@ cl_program clCreateProgramWithBinary(cl_context ctx, unsigned nDevices, const cl
     CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
     if (r == CUDA_SUCCESS) {
       prog->moduleLoaded = true;
+      moduleRetain(prog->module);  // program owns one reference
       if (binaryStatus) binaryStatus[0] = CL_SUCCESS;
     } else {
       fprintf(stderr, "cuModuleLoadData from cache failed: %d, PTX size=%zu\n", (int)r, lengths[0]);
@@ -440,6 +475,7 @@ cl_program clLinkProgram(cl_context ctx, unsigned nDevices, const cl_device_id*,
     return nullptr;
   }
   linked->moduleLoaded = true;
+  moduleRetain(linked->module);  // program owns one reference
 
   // Dump PTX to file when PRPLL_DUMP_PTX is set (e.g., PRPLL_DUMP_PTX=kernel)
   // Creates files like kernel_0.ptx, kernel_1.ptx, etc.
@@ -477,6 +513,7 @@ int clBuildProgram(cl_program prog, unsigned nDevices, const cl_device_id* devic
   CUresult r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
   if (r != CUDA_SUCCESS) return CL_BUILD_PROGRAM_FAILURE;
   prog->moduleLoaded = true;
+  moduleRetain(prog->module);  // program owns one reference
   return CL_SUCCESS;
 }
 
@@ -523,10 +560,11 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   if (r != CUDA_SUCCESS) {
     fprintf(stderr, "cuModuleGetFunction('%s') failed: %d, moduleLoaded=%d, module=%p\n",
             name, (int)r, prog->moduleLoaded, (void*)prog->module);
-    delete k;
+    delete k;  // never retained the module, so nothing to release
     if (err) *err = CL_INVALID_KERNEL_NAME;
     return nullptr;
   }
+  moduleRetain(k->parentModule);  // kernel keeps the module alive past clReleaseProgram
 
   // Shared memory carveout: default adaptive carveout is optimal for mixed kernel workloads.
 
@@ -575,7 +613,10 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
 }
 
 int clReleaseKernel(cl_kernel k) {
-  delete k;
+  if (k) {
+    moduleRelease(k->parentModule);
+    delete k;
+  }
   return CL_SUCCESS;
 }
 

From 485fdadcff4a6a28c4bc3f76ff78c939d0cd28df Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 20 Jul 2026 00:33:00 +0000
Subject: [PATCH 087/214] Created an openCL-like interface to support CUDA
 graphs. Of course, the interface is a no-op in openCL, but uses CUDA graphs
 with the CUDA backend. Also, two-dimensional kernel launches are supported
 (not presently used). Markers now enqueued without timing - a minor
 optimization.

---
 src/clwrap.cpp             | 19 ++++++++++++--
 src/clwrap.h               |  8 ++++--
 src/cuda/clwrap_cuda.cpp   | 54 +++++++++++++++++++++++++++++++++-----
 src/cuda/opencl_compat.cuh |  4 +--
 src/cuda/tinycuda.h        | 17 ++++++++++++
 src/tinycl.h               | 16 +++++++++--
 6 files changed, 103 insertions(+), 15 deletions(-)

diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 1152a7bb..6d9a6346 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -227,6 +227,7 @@ void release(cl_mem buf)         { CHECK1(clReleaseMemObject(buf)); }
 void release(cl_queue queue)     { CHECK1(clReleaseCommandQueue(queue)); }
 void release(cl_kernel k)        { CHECK1(clReleaseKernel(k)); }
 void release(cl_event event)     { CHECK1(clReleaseEvent(event)); }
+void release(cl_graph graph)     { CHECK1(clReleaseGraph(graph));}
 
 Program loadSource(cl_context context, const string &source) {
   const char *ptr = source.c_str();
@@ -326,11 +327,13 @@ void flush( cl_queue q) { CHECK1(clFlush(q)); }
 void finish(cl_queue q) { CHECK1(clFinish(q)); }
 
 EventHolder run(cl_queue queue, cl_kernel kernel,
-                size_t groupSize, size_t workSize,
+                size_t groupSizeX, size_t workSizeX, size_t workSizeY,
                 vector<cl_event>&& waits,
                 const string &name, bool genEvent) {
   cl_event event{};
-  CHECK2(clEnqueueNDRangeKernel(queue, kernel, 1, NULL, &workSize, &groupSize,
+  size_t workSizes[2] = {workSizeX, workSizeY};
+  size_t groupSizes[2] = {groupSizeX, 1};
+  CHECK2(clEnqueueNDRangeKernel(queue, kernel, workSizeY == 1 ? 1 : 2, NULL, workSizes, groupSizes,
                                 waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr),
          name.c_str());
   return genEvent ? EventHolder{event} : EventHolder{};
@@ -451,3 +454,15 @@ cl_device_id getQueueDevice(cl_command_queue q) {
   CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_DEVICE, sizeof(id), &id, 0));
   return id;
 }
+
+// OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA features.
+// These routines are defined in clwrap_cuda.cpp for the CUDA translation of openCL.
+// The dummy implementation below is for the native openCL builds.
+
+#ifndef CUDA_BACKEND
+bool clIsGraphSupported(cl_device_id dev) { return 0; }
+int clGraphBeginRecording(cl_command_queue q) { return CL_INVALID_VALUE; }
+int clGraphEndRecording(cl_command_queue q, cl_graph* g) { return CL_INVALID_VALUE; }
+int clGraphLaunch(cl_graph g) { return CL_INVALID_VALUE; }
+int clReleaseGraph(cl_graph g) { return CL_INVALID_VALUE; }
+#endif
diff --git a/src/clwrap.h b/src/clwrap.h
index 41b2bb93..018eb84c 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -15,13 +15,13 @@
 
 using cl_queue = cl_command_queue;
 
-
 void release(cl_context context);
 void release(cl_kernel k);
 void release(cl_mem buf);
 void release(cl_program program);
 void release(cl_queue queue);
 void release(cl_event event);
+void release(cl_graph graph);
 
 template<typename T>
 struct Deleter {
@@ -36,6 +36,7 @@ template<> struct default_delete<cl_mem> : public Deleter<cl_mem> {};
 template<> struct default_delete<cl_program> : public Deleter<cl_program> {};
 template<> struct default_delete<cl_queue> : public Deleter<cl_queue> {};
 template<> struct default_delete<cl_event> : public Deleter<cl_event> {};
+template<> struct default_delete<cl_graph> : public Deleter<cl_graph> {};
 }
 
 template<typename T> using Holder = std::unique_ptr<T, Deleter<T> >;
@@ -43,6 +44,7 @@ template<typename T> using Holder = std::unique_ptr<T, Deleter<T> >;
 using QueueHolder = std::unique_ptr<cl_queue>;
 using KernelHolder = std::unique_ptr<cl_kernel>;
 using EventHolder = std::unique_ptr<cl_event>;
+using GraphHolder = std::unique_ptr<cl_graph>;
 using Program = std::unique_ptr<cl_program>;
 
 class Context;
@@ -98,7 +100,7 @@ cl_queue makeQueue(cl_device_id d, cl_context c, bool enableProfile);
 void flush( cl_queue q);
 void finish(cl_queue q);
 
-EventHolder run(cl_queue queue, cl_kernel kernel, size_t groupSize, size_t workSize,
+EventHolder run(cl_queue queue, cl_kernel kernel, size_t groupSizeX, size_t workSizeX, size_t workSizeY,
                 vector<cl_event>&& waits, const string &name, bool genEvent);
 
 EventHolder read(cl_queue queue, vector<cl_event>&& waits,
@@ -136,3 +138,5 @@ cl_context getQueueContext(cl_command_queue q);
 // Buffers that are nullptr or zero-size are skipped.
 void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers);
 #endif
+
+
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 5df25791..796f2128 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -674,9 +674,12 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
   if (!q || !k) return CL_INVALID_VALUE;
   ensureContextCurrent();
 
-  size_t gs = globalSize[0];
-  size_t ls = localSize ? localSize[0] : 256;
-  size_t numBlocks = (gs + ls - 1) / ls;
+  size_t gsX = globalSize[0];
+  size_t lsX = localSize ? localSize[0] : 256;
+  size_t numBlocksX = (gsX + lsX - 1) / lsX;
+  size_t gsY = (workDim > 1) ? globalSize[1] : 1;
+  size_t lsY = (workDim > 1) ? localSize[1] : 1;
+  size_t numBlocksY = (gsY + lsY - 1) / lsY;
 
   // Build args array
   void* argPtrs[_cl_kernel::MAX_ARGS];
@@ -693,7 +696,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     ev->hasTimings = true;
     ev->commandType = CL_COMMAND_NDRANGE_KERNEL;
     cuEventRecord(ev->start, q->stream);
-    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
     cuEventRecord(ev->end, q->stream);
     *event = ev;
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
@@ -708,7 +711,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     if (!pStart) { cuEventCreate(&pStart, CU_EVENT_DEFAULT); cuEventCreate(&pEnd, CU_EVENT_DEFAULT); }
 
     cuEventRecord(pStart, q->stream);
-    CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
     cuEventRecord(pEnd, q->stream);
     cuEventSynchronize(pEnd);
     float ms = 0;
@@ -740,7 +743,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
   }
 
-  CUresult r = cuLaunchKernel(k->func, numBlocks, 1, 1, ls, 1, 1, 0, q->stream, argPtrs, nullptr);
+  CUresult r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
   if (r != CUDA_SUCCESS) {
     const char* errName = nullptr;
     cuGetErrorName(r, &errName);
@@ -812,7 +815,7 @@ int clEnqueueMarkerWithWaitList(cl_command_queue q, unsigned nWaits, const cl_ev
   }
   if (event) {
     auto* ev = new _cl_event;
-    cuEventCreate(&ev->end, CU_EVENT_DEFAULT);
+    cuEventCreate(&ev->end, CU_EVENT_DISABLE_TIMING);
     cuEventRecord(ev->end, q->stream);
     ev->commandType = CL_COMMAND_MARKER;
     *event = ev;
@@ -1137,3 +1140,40 @@ void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers)
   }
 }
 
+
+// OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA features
+
+// Interface to nVidia CUDA graphs feature
+
+bool clIsGraphSupported(cl_device_id dev) {
+  int major = 0;
+  cuDeviceGetAttribute(&major, CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR, dev->dev);
+  return (major >= 6);
+}
+
+int clGraphBeginRecording(cl_command_queue q) {
+  ensureContextCurrent();
+  CUresult r = cuStreamBeginCapture(q->stream, CU_STREAM_CAPTURE_MODE_GLOBAL);
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clGraphEndRecording(cl_command_queue q, cl_graph* graph) {
+  ensureContextCurrent();
+  auto* g = new _cl_graph;
+  g->queue = q;
+  CUresult r = cuStreamEndCapture(q->stream, &g->graph);
+  if (r == CUDA_SUCCESS) r = cuGraphInstantiate(&g->graphExec, g->graph, 0);
+  *graph = g;
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clGraphLaunch(cl_graph graph) {
+  ensureContextCurrent();
+  CUresult r = cuGraphLaunch(graph->graphExec, graph->queue->stream);
+  return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
+}
+
+int clReleaseGraph(cl_graph graph) {
+  delete graph;
+  return CL_SUCCESS;
+}
diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
index b72ef5e4..6b1a2807 100644
--- a/src/cuda/opencl_compat.cuh
+++ b/src/cuda/opencl_compat.cuh
@@ -33,8 +33,8 @@
 
 // ---- Work-item functions ----
 #define get_local_id(d)    ((unsigned int)threadIdx.x)
-#define get_group_id(d)    ((unsigned int)blockIdx.x)
-#define get_local_size(d)  ((unsigned int)blockDim.x)
+#define get_group_id(d)    ((unsigned int)(d == 0 ? blockIdx.x : blockIdx.y))
+#define get_local_size(d)  ((unsigned int)(d == 0 ? blockDim.x : blockDim.y))
 #define get_global_id(d)   ((unsigned int)(blockIdx.x * blockDim.x + threadIdx.x))
 #define get_num_groups(d)  ((unsigned int)gridDim.x)
 #define get_global_size(d) ((unsigned int)(gridDim.x * blockDim.x))
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index d01946df..55c5f79c 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -319,3 +319,20 @@ void clSVMFree(cl_context, void*);
 int clSetKernelArgSVMPointer(cl_kernel, unsigned, const void*);
 
 }
+
+// OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA features
+
+// cl_graph provides an openCL-like interface for CUgraph and CUgraphExec pair
+struct _cl_graph {
+  CUgraph graph;
+  CUgraphExec graphExec;
+  cl_command_queue queue;               // Queue to launch the graph on (same as queue that graph was recorded on)
+  _cl_graph() : graph{}, graphExec{} {}
+  ~_cl_graph() { if (graph) cuGraphDestroy(graph); if (graphExec) cuGraphExecDestroy(graphExec); }
+};
+typedef _cl_graph* cl_graph;
+bool clIsGraphSupported(cl_device_id);
+int clGraphBeginRecording(cl_command_queue);
+int clGraphEndRecording(cl_command_queue, cl_graph*);
+int clGraphLaunch(cl_graph);
+int clReleaseGraph(cl_graph);
diff --git a/src/tinycl.h b/src/tinycl.h
index 90fa8404..4fccdf7e 100644
--- a/src/tinycl.h
+++ b/src/tinycl.h
@@ -95,12 +95,12 @@ int clGetKernelWorkGroupInfo(cl_kernel, cl_device_id, cl_kernel_work_group_info,
 
 int clGetEventInfo(cl_event, cl_event_info paramName, size_t paramValueSize, void* paramValue, size_t* sizeRet);
 int clGetEventProfilingInfo(cl_event, cl_profiling_info, size_t, void*, size_t* sizeRet);
-  
+
 void* clSVMAlloc(cl_context, cl_svm_mem_flags, size_t, unsigned alignment);
 void clSVMFree(cl_context, void*);
 
 int clSetKernelArgSVMPointer(cl_kernel, unsigned, const void *);
-  
+
 }
 
 #define CL_SUCCESS              0
@@ -320,3 +320,15 @@ typedef union
 #define CL_INVALID_DEVICE_PARTITION_COUNT           -68
 #define CL_INVALID_PIPE_SIZE                        -69
 #define CL_INVALID_DEVICE_QUEUE                     -70
+
+// OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA features
+// This is only supported by our CUDA translation of openCL.  Since this file is for the
+// native openCL builds, these extension routines basicly do nothing.
+
+struct _cl_graph {};
+typedef _cl_graph* cl_graph;
+bool clIsGraphSupported(cl_device_id);
+int clGraphBeginRecording(cl_command_queue);
+int clGraphEndRecording(cl_command_queue, cl_graph*);
+int clGraphLaunch(cl_graph);
+int clReleaseGraph(cl_graph);

From b4992d6a37f3db02cb3b0ecbae32cba53212bd5b Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 20 Jul 2026 01:36:30 +0000
Subject: [PATCH 088/214] Implemented L2-striping (a lot of work that sadly was
 not faster on any GPUs I've tried). Support for CUDA graphs added (slower on
 a 3080, but a 1% gain on 5070ti). Calculate ROE without using the roePos
 argument (needed for CUDA graphs). Better algorithm for determining how long
 to sleep when queue fills (by explicit counting of squarings/muls enqueued).
 MULTI_Q and GRAPHS now supported by -tune. Support for two dimensional
 kernels added.

---
 src/Gpu.cpp            | 795 +++++++++++++++++++++++++++++------------
 src/Gpu.h              |   8 +-
 src/Kernel.cpp         |  22 +-
 src/Kernel.h           |  11 +-
 src/Queue.cpp          |  28 +-
 src/Queue.h            |  36 +-
 src/cl/base.cl         |   8 +
 src/cl/carry.cl        |  52 ++-
 src/cl/carryfused.cl   | 114 +++---
 src/cl/carryutil.cl    |  50 ++-
 src/cl/ffthin.cl       |  72 ++--
 src/cl/fftmiddlein.cl  |  90 ++++-
 src/cl/fftmiddleout.cl |  75 +++-
 src/cl/tailmul.cl      |  59 ++-
 src/cl/tailsquare.cl   | 156 ++++----
 src/tune.cpp           |  47 ++-
 16 files changed, 1138 insertions(+), 485 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index f16fe0e9..123c4dba 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -231,7 +231,7 @@ constexpr bool isInList(const string& s, initializer_list<string> list) {
   return false;
 }
 
-string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u64 E, bool doLog,
+string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u64 E, bool doLog,
                  bool &tail_single_wide, bool &tail_single_kernel, u32 &in_place, u32 &pad_size, u32 &wmul) {
   map<string, string> config;
 
@@ -287,7 +287,9 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
                               "MODM31",
                               "LOADS","STORES",
                               "NOREG",                  // CUDA - experimental
-                              "WMUL"
+                              "WMUL",
+                              "MULTI_Q",
+                              "GRAPHS"
                             });
     if (!isValid) {
       log("Warning: unrecognized -use key '%s'\n", k.c_str());
@@ -323,6 +325,29 @@ string clDefines(const Args& args, cl_device_id id, FFTConfig fft, const vector<
     }
   }
 
+  // L2_STRIPING is not allowed if INPLACE=0.  Maximum L2_STRIPING is WIDTH/64 if MULTI_Q=0 and WIDTH/128 if MULTI_Q=1.
+  // Technically, L2_STRIPING of WIDTH/32, MULTI_Q=0 could be allowed but that is just a more complicated way to implement L2_STRIPING=0.
+  // Also, WIDTH/64, MULTI_Q=1 could be allowed with some marker/sync code changes but that is very similar to L2_STRIPING=0.
+  {
+    u32 l2_striping = args.value("L2_STRIPING", 0);
+    u32 multi_q = args.value("MULTI_Q", 0);
+    if (l2_striping && !in_place) {
+      config["L2_STRIPING"] = to_string(0);
+      args.flags["L2_STRIPING"] = to_string(0);
+      log("L2_STRIPING is only allowed if INPLACE=1.  Changing to L2_STRIPING=0.\n");
+    }
+    else if (multi_q == 0 && l2_striping > fft.shape.width/64) {
+      config["L2_STRIPING"] = to_string(fft.shape.width/64);
+      args.flags["L2_STRIPING"] = to_string(fft.shape.width/64);
+      log("Max L2_STRIPING when MULTI_Q=0 exceeded.  Changing to L2_STRIPING=%u.\n", fft.shape.width/64);
+    }
+    else if (multi_q > 0 && l2_striping > fft.shape.width/128) {
+      config["L2_STRIPING"] = to_string(fft.shape.width/128);
+      args.flags["L2_STRIPING"] = to_string(fft.shape.width/128);
+      log("Max L2_STRIPING when MULTI_Q=1 exceeded.  Changing to L2_STRIPING=%u.\n", fft.shape.width/128);
+    }
+  }
+
   string defines = toDefine(config);
   if (doLog) { log("config: %s\n", defines.c_str()); }
 
@@ -850,8 +875,8 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   BUF(bufSmallOut, 256),
   BUF(bufSumOut,     1),
   BUF(bufTrue,       1),
-  BUF(bufROE, ROE_SIZE),
-  BUF(bufStatsCarry, CARRY_SIZE),
+  BUF(bufROE, ROE_SIZE + 2),
+  BUF(bufStatsCarry, CARRY_SIZE + 2),
 
   BUF(buf1, TOTAL_DATA_SIZE(fft, WIDTH, fft.shape.middle, SMALL_H, in_place, pad_size)),
   BUF(buf2, TOTAL_DATA_SIZE(fft, WIDTH, fft.shape.middle, SMALL_H, in_place, pad_size)),
@@ -862,9 +887,11 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   timeBufVect{profile.make("proofBufVect")},
 
   recorded_kernels{},
-  recorded_kernel_args{}
-{    
+  recorded_kernel_args{},
 
+  use_graphs{},
+  graph_square{}
+{    
   float bitsPerWord = E / float(N);
   if (logFftSize) {
     log("FFT: %s %s (%.2f bpw)\n", numberK(N).c_str(), fft.spec().c_str(), bitsPerWord);
@@ -886,35 +913,35 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   if (useLongCarry) { log("Using long carry!\n"); }
 
   if (fft.FFT_FP64 || fft.FFT_FP32) {
-    kfftMidIn.setFixedArgs(2, bufTrigM);
-    kfftHin.setFixedArgs(2, bufTrigH);
+    kfftMidIn.setFixedArgs(3, bufTrigM);
+    kfftHin.setFixedArgs(3, bufTrigH);
     ktailSquareZero.setFixedArgs(2, bufTrigH);
-    ktailSquare.setFixedArgs(2, bufTrigH);
-    ktailMulLow.setFixedArgs(3, bufTrigH);
-    ktailMul.setFixedArgs(3, bufTrigH);
-    kfftMidOut.setFixedArgs(2, bufTrigM);
+    ktailSquare.setFixedArgs(3, bufTrigH);
+    ktailMulLow.setFixedArgs(4, bufTrigH);
+    ktailMul.setFixedArgs(4, bufTrigH);
+    kfftMidOut.setFixedArgs(3, bufTrigM);
     kfftW.setFixedArgs(2, bufTrigW);
   }
 
   if (fft.NTT_GF31) {
-    kfftMidInGF31.setFixedArgs(2, bufTrigM);
-    kfftHinGF31.setFixedArgs(2, bufTrigH);
+    kfftMidInGF31.setFixedArgs(3, bufTrigM);
+    kfftHinGF31.setFixedArgs(3, bufTrigH);
     ktailSquareZeroGF31.setFixedArgs(2, bufTrigH);
-    ktailSquareGF31.setFixedArgs(2, bufTrigH);
-    ktailMulLowGF31.setFixedArgs(3, bufTrigH);
-    ktailMulGF31.setFixedArgs(3, bufTrigH);
-    kfftMidOutGF31.setFixedArgs(2, bufTrigM);
+    ktailSquareGF31.setFixedArgs(3, bufTrigH);
+    ktailMulLowGF31.setFixedArgs(4, bufTrigH);
+    ktailMulGF31.setFixedArgs(4, bufTrigH);
+    kfftMidOutGF31.setFixedArgs(3, bufTrigM);
     kfftWGF31.setFixedArgs(2, bufTrigW);
   }
 
   if (fft.NTT_GF61) {
-    kfftMidInGF61.setFixedArgs(2, bufTrigM);
-    kfftHinGF61.setFixedArgs(2, bufTrigH);
+    kfftMidInGF61.setFixedArgs(3, bufTrigM);
+    kfftHinGF61.setFixedArgs(3, bufTrigH);
     ktailSquareZeroGF61.setFixedArgs(2, bufTrigH);
-    ktailSquareGF61.setFixedArgs(2, bufTrigH);
-    ktailMulLowGF61.setFixedArgs(3, bufTrigH);
-    ktailMulGF61.setFixedArgs(3, bufTrigH);
-    kfftMidOutGF61.setFixedArgs(2, bufTrigM);
+    ktailSquareGF61.setFixedArgs(3, bufTrigH);
+    ktailMulLowGF61.setFixedArgs(4, bufTrigH);
+    ktailMulGF61.setFixedArgs(4, bufTrigH);
+    kfftMidOutGF61.setFixedArgs(3, bufTrigM);
     kfftWGF61.setFixedArgs(2, bufTrigW);
   }
 
@@ -953,240 +980,521 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     selftestTrig();
   }
 
-  // If MULTI_Q option is set there are fewer kernels executed in the main queue, but there are some additional syncEvents and waits.
-  // That's a total of 4 kernels (carryFused, MidIn/Out, TailSquare) plus 1 syncEvent plus 1 or more syncWaits.
-  // If MULTI_Q option is not set there is carryFused + MidIn/Out and TailSquare for each NTT modulus.
-  // NOTE: We dont take into account the optional tailSquareZero kernel.  We theoretically should.
-  if (args.value("MULTI_Q", 0))
-    queue.setSquareKernels(5 + ((fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61) - 1));
-  else
-    queue.setSquareKernels(1 + 3 * (fft.FFT_FP64 + fft.FFT_FP32 + fft.NTT_GF31 + fft.NTT_GF61));
+  // Create aux queues.  For now, we only have one auxiliary queue.  We could do more.
+  if (args.value("MULTI_Q", 0)) {
+    auxQueues.push_back(Queue{*shared.context, args.profile, true});
+  }
+
+  // Set flag indicating we're going to use CUDA graphs
+  use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1);
+
+  // Process the queue.  I don't know if this is really needed.
   queue.finish();
 }
 
-// Optionallly split some of the MiddleIn/Tail/MiddleOut kernels off od executing on the main queue to run on an auxiliary queue.
+// Optionallly split some of the MiddleIn/Tail/MiddleOut kernels off of executing on the main queue to run on an auxiliary queue.
 // This will increase GPU occupancy but will negatively impact L2 cache coherency.
 // If the L2 cache is large enough so that all FFT data fits in the cache, this ought to be a win.
 // If the L2 cache is small enough such that L2 cache hits are very low anyway, this might be a win.
-
 void Gpu::splitQueue(void) {
-
-  // If MULTI_Q -use not set, return
-  if (!args.value("MULTI_Q", 0)) return;
-
-  // Create aux queues.  For now, we only have one auxiliary queue.  We could do more.
-  if (auxQueues.size() == 0) {
-    auxQueues.push_back(Queue{*shared.context, args.profile, true});
-  }
-
   // Queue a sync event in the main queue.  Have all auxiliary queues wait on the event.
   EventHolder event = queue.createSyncEvent();
   for (size_t i = 0; i < auxQueues.size(); ++i) {
     auxQueues[i].waitForSyncEvent(&event);
   }
-
-  // Assign kernels to running on the main queue or an auxiliary queue
-
-  int which_queue = -1;
-
-  // For no particularly good reason, put a kernel that operates on 64-bit vaules in the main queue.
-  if (fft.NTT_GF61) {
-    if (which_queue != -1) {
-      kfftMidInGF61.setQueue(&auxQueues[which_queue]);
-      kfftHinGF61.setQueue(&auxQueues[which_queue]);
-      ktailSquareZeroGF61.setQueue(&auxQueues[which_queue]);
-      ktailSquareGF61.setQueue(&auxQueues[which_queue]);
-      ktailMulGF61.setQueue(&auxQueues[which_queue]);
-      ktailMulLowGF61.setQueue(&auxQueues[which_queue]);
-      kfftMidOutGF61.setQueue(&auxQueues[which_queue]);
-      kfftWGF61.setQueue(&auxQueues[which_queue]);
-    }
-    which_queue++;
-  }
-
-  if (fft.FFT_FP64 || fft.FFT_FP32) {
-    if (which_queue != -1) {
-      kfftMidIn.setQueue(&auxQueues[which_queue]);
-      kfftHin.setQueue(&auxQueues[which_queue]);
-      ktailSquareZero.setQueue(&auxQueues[which_queue]);
-      ktailSquare.setQueue(&auxQueues[which_queue]);
-      ktailMul.setQueue(&auxQueues[which_queue]);
-      ktailMulLow.setQueue(&auxQueues[which_queue]);
-      kfftMidOut.setQueue(&auxQueues[which_queue]);
-      kfftW.setQueue(&auxQueues[which_queue]);
-    }
-    // For no particularly good reason, put kernels that operate on 32-bit value in the same queue unless there are no kernels operating on 64-bit values
-    if (fft.FFT_FP64 || (fft.FFT_FP32 && which_queue == -1)) {
-      which_queue++;
-    }
-  }
-
-  if (fft.NTT_GF31) {
-    if (which_queue != -1) {
-      kfftMidInGF31.setQueue(&auxQueues[which_queue]);
-      kfftHinGF31.setQueue(&auxQueues[which_queue]);
-      ktailSquareZeroGF31.setQueue(&auxQueues[which_queue]);
-      ktailSquareGF31.setQueue(&auxQueues[which_queue]);
-      ktailMulGF31.setQueue(&auxQueues[which_queue]);
-      ktailMulLowGF31.setQueue(&auxQueues[which_queue]);
-      kfftMidOutGF31.setQueue(&auxQueues[which_queue]);
-      kfftWGF31.setQueue(&auxQueues[which_queue]);
-    }
-    //which_queue++;
-  }
 }
 
 void Gpu::mergeQueue(void) {
-
-  // If MULTI_Q -use not set, return
-  if (!args.value("MULTI_Q", 0)) return;
-
   // Queue a sync event in each auxiliary queue(s).  Wait on the event(s) in the main queue.
   for (size_t i = 0; i < auxQueues.size(); ++i) {
     EventHolder event = auxQueues[i].createSyncEvent();
     queue.waitForSyncEvent(&event);
   }
+}
 
-  // Return kernels to running on the main queue
-  // NOTE: I believe there is no need to switch queues back and forth between the main and auxiliary queues.  No one currently uses the cache_group == 0 option.
-  if (fft.NTT_GF61) {
-    kfftMidInGF61.setQueue(&queue);
-    kfftHinGF61.setQueue(&queue);
-    ktailSquareZeroGF61.setQueue(&queue);
-    ktailSquareGF61.setQueue(&queue);
-    ktailMulGF61.setQueue(&queue);
-    ktailMulLowGF61.setQueue(&queue);
-    kfftMidOutGF61.setQueue(&queue);
-    kfftWGF61.setQueue(&queue);
-  }
-  if (fft.FFT_FP64 || fft.FFT_FP32) {
-    kfftMidIn.setQueue(&queue);
-    kfftHin.setQueue(&queue);
-    ktailSquareZero.setQueue(&queue);
-    ktailSquare.setQueue(&queue);
-    ktailMul.setQueue(&queue);
-    ktailMulLow.setQueue(&queue);
-    kfftMidOut.setQueue(&queue);
-    kfftW.setQueue(&queue);
-  }
-  if (fft.NTT_GF31) {
-    kfftMidInGF31.setQueue(&queue);
-    kfftHinGF31.setQueue(&queue);
-    ktailSquareZeroGF31.setQueue(&queue);
-    ktailSquareGF31.setQueue(&queue);
-    ktailMulGF31.setQueue(&queue);
-    ktailMulLowGF31.setQueue(&queue);
-    kfftMidOutGF31.setQueue(&queue);
-    kfftWGF31.setQueue(&queue);
-  }
+// We've finished the "bottom half" of a squaring or multiply.  Replay the recorded bottom half kernel calls.
+void Gpu::endBottomHalf(void) {
+  replay();
+  // Increment the squaring count.  The queue's squarings/multiplies count determines how long to sleep when the queue is full.
+  // We only do this for the main command queue.  Auxiliary queues are not allowed to cause a CPU sleep.
+  queue.incSquareCount();
 }
 
-// Replay the recorded bottom half kernels in a cache friendly order.  We support several
-// options here using multiple openCl command queues.
+// Replay the recorded bottom half kernels in a cache friendly order.  We support several options here using multiple openCl command queues.
 void Gpu::replay(void) {
-
-  // If using multiple command queues, handle that now.
-  splitQueue();
-
-  // For better L2 cache locality, operate on all the FP data, then operate on all the GF31 data, then GF61.
-  for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
-
-    // Check for irrelevant cache gouup
-    if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
-    if (cache_group == 2 && !fft.NTT_GF31) continue;
-    if (cache_group == 3 && !fft.NTT_GF61) continue;
-
-    // Iterate over the recorded kernels
-    int arg = 0;
-    for (auto kern : recorded_kernels) {
-
-      // Call the appropriate kernel
-      if (kern == KMIDIN) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        // If not in place, the input is from the scratch buffer
-        Buffer<double> *in = in_place ? buf : &buf3;
-        Buffer<double> *out = buf;
-        if (cache_group == 1) kfftMidIn(*out, *in);
-        if (cache_group == 2) kfftMidInGF31(*out, *in);
-        if (cache_group == 3) kfftMidInGF61(*out, *in);
+  // If there are no recorded kernels to replay, we're done
+  if (recorded_kernels.size() == 0) return;
+
+  // Get MULTI_Q and L2_STRIPING settings
+  bool multi_q = args.value("MULTI_Q", 0);
+  int l2_striping = args.value("L2_STRIPING", 0);
+
+  // In the simplest case, we use one command queue and process one data type at a time.  By processing one data type at a time, we reduce maximum L2 cache used.
+  // For example, a 4M GF61+GF31 NTT needs just 32MB L2 cache during GF61 processing of fftMiddleIn, tailSquare, and fftMiddleOut (and only 16MB duing GF31 processing).
+  // Without MULTI_Q, PRPLL needs 32MB + 16MB of L2 cache by processing both fftMiddleIns, then both tailSquares, then both fftMiddleOuts.
+
+  if ((!multi_q || fft.shape.fft_type == FFT64 || fft.shape.fft_type == FFT61 || fft.shape.fft_type == FFT31 || fft.shape.fft_type == FFT32) && !l2_striping) {
+    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+      // Check for irrelevant cache group
+      if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+      if (cache_group == 2 && !fft.NTT_GF31) continue;
+      if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+      // Iterate over the recorded kernels.  Execute each.
+      int arg = 0;
+      for (auto kern : recorded_kernels) {
+        replay_one(kern, cache_group, arg);
+        arg = replay_next_arg(kern, arg);
       }
+    }
+  }
 
-      if (kern == KFFTHIN) {
-        Buffer<double> *out = recorded_kernel_args[arg++];
-        Buffer<double> *in = recorded_kernel_args[arg++];
-        if (cache_group == 1) kfftHin(*out, *in);
-        if (cache_group == 2) kfftHinGF31(*out, *in);
-        if (cache_group == 3) kfftHinGF61(*out, *in);
+  // The next simple case, we use two command queues and process one data type in each queue.  This works well for large L2 caches where all FFT data fits in the cache.
+  // The extra command queue can hide the latency in starting up kernels for each data type.  Also occupancy may benefit as the queue may be executing kernels with different
+  // workgroup size, register usage, and local memory usage.  This case requires an FFT using at least two data types.
+
+  else if (multi_q && !l2_striping) {
+    // Switch tp using multiple command queues.
+    splitQueue();
+    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+      // Check for irrelevant cache group
+      if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+      if (cache_group == 2 && !fft.NTT_GF31) continue;
+      if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+      // To better balance the load on the two command queues, put a 64-bit data type in one queue and two 32-bit data types in the other queue.
+      Queue *q;
+      if (cache_group == 1) q = &queue;
+      if (cache_group == 2) q = (fft.shape.fft_type == FFT323161 || fft.shape.fft_type == FFT3161) ? &queue : &auxQueues[0];
+      if (cache_group == 3) q = &auxQueues[0];
+
+      // Iterate over the recorded kernels.  Execute each.
+      int arg = 0;
+      for (auto kern : recorded_kernels) {
+        replay_one(kern, cache_group, arg, q);
+        arg = replay_next_arg(kern, arg);
       }
-
-      if (kern == KTAILSQUARE) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        // If not in place, the output is to the scratch buffer
-        Buffer<double> *in = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
-        if (!tail_single_kernel) {
-          if (cache_group == 1) ktailSquareZero(*out, *in);
-          if (cache_group == 2) ktailSquareZeroGF31(*out, *in);
-          if (cache_group == 3) ktailSquareZeroGF61(*out, *in);
+    }
+    // Using multiple command queues, go back to a single command queue
+    mergeQueue();
+  }
+
+  // The next case is L2 striping in one command queue.  The hope is two stripe groups plus one stripe are small enough to fit in the L2 caches
+  // for the fftMiddleIn, tailSquare, and fftMiddleOut kernels.
+  // Sadly, testing thusfar shows the extra overhead of more kernel launches and events/syncs outweighs the benefit of more L2 cache hits.
+#ifdef ORIGINAL_VERSION         // Very readable, replaced by version below which merges the teo base_lo and base_hi kernel calls into one combined kernel call
+  else if (!multi_q && l2_striping) {
+    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+      // Check for irrelevant cache group
+      if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+      if (cache_group == 2 && !fft.NTT_GF31) continue;
+      if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+      // Allow larger caches to do several L2 stripes in a single "stripe group" at a time (increases occupancy, reduces kernel launch costs).
+      u32 stripe_group_size = l2_striping;
+
+//For now, only support INPLACE with its 16x16 transpose      
+
+      // Loop over all the stripes for this data type.  Let's define a stripe as one "column" of data processed by fftMiddleIn producing 16*MIDDLE tailSquare lines.
+      // Since tailSquare operates on Hermetian pairs of lines, fftMiddleIn alternates operating on low stripes and high stripes.
+      u32 num_stripes = fft.shape.width / 16;
+      u32 num_stripe_groups = num_stripes / stripe_group_size;
+      for (u32 i = 0; i < num_stripe_groups / 2; ++i) {
+        // Base_lo refers to the starting fftMiddleIn column number (x coordinate).  When fftMiddleIn uses a 16x16 transpose, base_lo advances 16 at a time.
+        // Base_hi refers to the fftMiddleIn column number that outputs the lines needed for Hermetian matching in tailSquare.
+        u32 base_lo = i * stripe_group_size * 16;
+        u32 base_hi = (num_stripe_groups - 1 - i) * stripe_group_size * 16;
+        bool last_block = (base_hi == fft.shape.width / 2);
+
+        // Iterate over the recorded kernels.  Execute each.
+        int arg = 0;
+        for (auto kern : recorded_kernels) {
+
+          if (kern == KMIDIN) {
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            // If MIDDLE is odd, the first fftMiddleIn call must be preceeded by a fftMiddleIn call to produce the special N/2 tailSquare line from the WIDTH/2 column.
+            if (base_lo == 0 && (fft.shape.middle & 1)) {
+              replay_one(kern, cache_group, arg, &queue, fft.shape.width / 2, oneStripeKernelsToExecute);
+            }
+
+            // Produce one stripe group.  The last base value must take into account that the N/2 stripe has already been done if MIDDLE is odd.
+            u32 kernelsToExecute = stripe_group_size * oneStripeKernelsToExecute;
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecute);
+
+            u32 base = base_hi;                                                                                   // Read full base_hi stripe groups (usually)
+            if (last_block && (fft.shape.middle & 1)) base += 16, kernelsToExecute -= oneStripeKernelsToExecute;  // Skip first stripe for last block if MIDDLE is odd
+            if (kernelsToExecute) replay_one(kern, cache_group, arg, &queue, base, kernelsToExecute);
+          }
+
+          else if (kern == KFFTHIN) {
+            // fftMiddleIn produces 16 * MIDDLE lines
+            replay_one(kern, cache_group, arg, &queue, base_lo, stripe_group_size * 16 * fft.shape.middle);
+            replay_one(kern, cache_group, arg, &queue, base_hi, stripe_group_size * 16 * fft.shape.middle);
+          }
+ 
+          else if (kern == KTAILSQUARE || kern == KTAILMUL || kern == KTAILMULLOW) {
+            // fftMiddleIn produces 16 * MIDDLE lines in base_lo and base_hi.  tailSquare kernel processes 2 lines linked by Hermetian symmetry.
+            // Tail kernels use two dimensions, the X coordinate bumps line number by one, the Y coordinate bumps line number by WIDTH.
+            u32 kernelsToExecuteX = stripe_group_size * 16;
+            u32 kernelsToExecuteY = (fft.shape.middle + 1) / 2;  // For base_lo, round odd middles up.
+
+            // We can now completely process lines from the lower half of the base_lo stripe group (Hermetian mates are mostly in upper half of base_hi stripe group)
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecuteX, kernelsToExecuteY);
+
+            // We can process most lines from the lower half of the base_hi stripe group (Hermetian mates are mostly in upper half of base_lo stripe group)
+            // The first line in the stripe group is the only line that is not ready for base_hi tail processing.
+            u32 base = base_hi + 1;                                           // Skip first line in base_hi (usually)
+            if (base_lo == 0) kernelsToExecuteX--;                            // Do one fewer line for the first tail call.
+            if (base_hi == fft.shape.width / 2) base--, kernelsToExecuteX++;  // Last tail call does not skip first line
+            if (fft.shape.middle & 1) kernelsToExecuteY--;                    // For base_hi, round odd middles down.
+            replay_one(kern, cache_group, arg, &queue, base, kernelsToExecuteX, kernelsToExecuteY);
+          }
+
+          else if (kern == KMIDOUT) {
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            u32 kernelsToExecute = stripe_group_size * oneStripeKernelsToExecute;
+
+            // We've completely processed lines from the base_lo stripe group
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecute);
+
+            // The first stripe in the base_hi stripe group is not ready for output.
+            u32 base = base_hi + 16;                                                                        // Skip first stripe in base_hi (usually)
+            if (base_lo == 0) kernelsToExecute -= oneStripeKernelsToExecute;                                // Do one fewer stripe for the first midOut call.
+            if (base_hi == fft.shape.width / 2) base -= 16, kernelsToExecute += oneStripeKernelsToExecute;  // Last midOut call does not skip first stripe
+            if (kernelsToExecute) replay_one(kern, cache_group, arg, &queue, base, kernelsToExecute);
+          }
+
+          // Skip other kernels (KFFTW)
+          else;
+
+          // Advance argument index
+          arg = replay_next_arg(kern, arg);
         }
-        if (cache_group == 1) ktailSquare(*out, *in);
-        if (cache_group == 2) ktailSquareGF31(*out, *in);
-        if (cache_group == 3) ktailSquareGF61(*out, *in);
       }
 
-      if (kern == KTAILMUL) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        Buffer<double> *in2 = recorded_kernel_args[arg++];
-        // If not in place, the output is to the scratch buffer
-        Buffer<double> *in1 = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
-        if (cache_group == 1) ktailMul(*out, *in1, *in2);
-        if (cache_group == 2) ktailMulGF31(*out, *in1, *in2);
-        if (cache_group == 3) ktailMulGF61(*out, *in1, *in2);
+      // Iterate over the recorded kernels.  Execute any not already executed (KFFTW).
+      // FFTW cannot benefit from L2 striping, it can only benefit from datatype grouping.
+      int arg = 0;
+      for (auto kern : recorded_kernels) {
+        if (kern == KFFTW) replay_one(kern, cache_group, arg, &queue);
+        arg = replay_next_arg(kern, arg);
       }
+    }
+  }
+#endif
 
-      if (kern == KTAILMULLOW) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        Buffer<double> *in2 = recorded_kernel_args[arg++];
-        // If not in place, the output is to the scratch buffer
-        Buffer<double> *in1 = buf;
-        Buffer<double> *out = in_place ? buf : &buf3;
-        if (cache_group == 1) ktailMulLow(*out, *in1, *in2);
-        if (cache_group == 2) ktailMulLowGF31(*out, *in1, *in2);
-        if (cache_group == 3) ktailMulLowGF61(*out, *in1, *in2);
+  // The next case is L2 striping in one command queue.  The hope is two stripe groups plus one stripe are small enough to fit in the L2 caches
+  // for the fftMiddleIn, tailSquare, and fftMiddleOut kernels.
+  // Sadly, testing thusfar shows the extra overhead of more kernel launches and events/syncs outweighs the benefit of more L2 cache hits.
+
+  else if (!multi_q && l2_striping) {
+    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+      // Check for irrelevant cache group
+      if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+      if (cache_group == 2 && !fft.NTT_GF31) continue;
+      if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+      // Allow larger caches to do several L2 stripes in a single "stripe group" at a time (increases occupancy, reduces kernel launch costs).
+      u32 stripe_group_size = l2_striping;
+
+//For now, only support INPLACE with its 16x16 transpose      
+
+      // Loop over all the stripes for this data type.  Let's define a stripe as one "column" of data processed by fftMiddleIn producing 16*MIDDLE tailSquare lines.
+      // Since tailSquare operates on Hermetian pairs of lines, fftMiddleIn alternates operating on low stripes and high stripes.
+      u32 num_stripes = fft.shape.width / 16;
+      u32 num_stripe_groups = num_stripes / stripe_group_size;
+      for (u32 i = 0; i < num_stripe_groups / 2; ++i) {
+        bool last_block = (i == num_stripe_groups / 2 - 1);
+        // Base_lo refers to the starting fftMiddleIn column number (x coordinate).  When fftMiddleIn uses a 16x16 transpose, base_lo advances 16 at a time.
+        // Base_hi refers to the fftMiddleIn column number that outputs the lines needed for Hermetian matching in tailSquare.
+        u32 base_lo = i * stripe_group_size * 16;
+        // u32 base_hi = (num_stripe_groups - 1 - i) * stripe_group_size * 16;
+
+        // Iterate over the recorded kernels.  Execute each.
+        int arg = 0;
+        for (auto kern : recorded_kernels) {
+
+          if (kern == KMIDIN) {
+            // Do midIn on base_lo and base_hi.  If MIDDLE is odd, the first midIn call must be preceeded by a midIn call to produce the special N/2 tailSquare
+            // line from the WIDTH/2 column.  The last base pair must take into account that the N/2 stripe has already been done if MIDDLE is odd.
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            u32 kernelsToExecute = 2 * stripe_group_size * oneStripeKernelsToExecute;
+            if (base_lo == 0 && (fft.shape.middle & 1)) kernelsToExecute += oneStripeKernelsToExecute;
+            if (last_block && (fft.shape.middle & 1)) kernelsToExecute -= oneStripeKernelsToExecute;
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecute);
+          }
+
+          else if (kern == KFFTHIN) {
+            // fftMiddleIn produces 2 * stripe_group_size * 16 * MIDDLE lines
+            replay_one(kern, cache_group, arg, &queue, base_lo, 2 * stripe_group_size * 16 * fft.shape.middle);
+          }
+ 
+          else if (kern == KTAILSQUARE || kern == KTAILMUL || kern == KTAILMULLOW) {
+            // We can now completely process lines from the lower half of the base_lo stripe group (Hermetian mates are mostly in upper half of base_hi stripe group)
+            u32 half_size = (fft.shape.middle + 1) / 2;  // For base_lo, round odd middles up.
+            u32 stripeGroupLines = stripe_group_size * 16;
+            u32 kernelsToExecute = half_size * stripeGroupLines;
+            // We can process most lines from the lower half of the base_hi stripe group (Hermetian mates are mostly in upper half of base_lo stripe group)
+            // The first line in the stripe group is the only line that is not ready for base_hi tail processing.
+            if (base_lo == 0) stripeGroupLines--;               // Do one fewer line for the first tail call.
+            if (last_block) stripeGroupLines++;                 // Last tail call does not skip first line
+            if (fft.shape.middle & 1) half_size--;              // For base_hi, round odd middles down.
+            kernelsToExecute += half_size * stripeGroupLines;
+            // Call the kernel
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecute);
+          }
+
+          else if (kern == KMIDOUT) {
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            u32 kernelsToExecute = 2 * stripe_group_size * oneStripeKernelsToExecute;
+            // We've completely processed lines from the base_lo stripe group.
+            // The first stripe in the base_hi stripe group is not ready for output.
+            // The last stripe group will does an extra stripe.
+            if (base_lo == 0) kernelsToExecute -= oneStripeKernelsToExecute;  // Do one fewer stripe for the first midOut call
+            if (last_block) kernelsToExecute += oneStripeKernelsToExecute;    // Last midOut call does not skip first stripe
+            replay_one(kern, cache_group, arg, &queue, base_lo, kernelsToExecute);
+          }
+
+          // Skip other kernels (KFFTW)
+          else;
+
+          // Advance argument index
+          arg = replay_next_arg(kern, arg);
+        }
       }
 
-      if (kern == KMIDOUT) {
-        Buffer<double> *buf = recorded_kernel_args[arg++];
-        // If not in place, the input is from the scratch buffer
-        Buffer<double> *in = in_place ? buf : &buf3;
-        Buffer<double> *out = buf;
-        if (cache_group == 1) kfftMidOut(*out, *in);
-        if (cache_group == 2) kfftMidOutGF31(*out, *in);
-        if (cache_group == 3) kfftMidOutGF61(*out, *in);
+      // Iterate over the recorded kernels.  Execute any not already executed (KFFTW).
+      // FFTW cannot benefit from L2 striping, it can only benefit from datatype grouping.
+      int arg = 0;
+      for (auto kern : recorded_kernels) {
+        if (kern == KFFTW) replay_one(kern, cache_group, arg, &queue);
+        arg = replay_next_arg(kern, arg);
       }
+    }
+  }
 
-      if (kern == KFFTW) {
-        Buffer<double> *out = recorded_kernel_args[arg++];
-        Buffer<double> *in = recorded_kernel_args[arg++];
-        if (cache_group == 1) kfftW(*out, *in);
-        if (cache_group == 2) kfftWGF31(*out, *in);
-        if (cache_group == 3) kfftWGF61(*out, *in);
+  // The last case is L2 striping in two command queues.  The hope is four stripe groups plus two stripes are small enough to fit in the L2 caches for the
+  // fftMiddleIn, tailSquare, and fftMiddleOut kernels.  The hope also is the dual queue approach hides the overhead introduced by more kernel launches.
+  // Sadly, testing thusfar shows the extra overhead of more kernel launches and events/syncs outweighs the benefit of more L2 cache hits.
+
+  else if (multi_q && l2_striping) {
+    Queue *queues[2] = {&queue, &auxQueues[0]};
+    EventHolder midInEvents[2];
+    EventHolder tailEvents[2];
+
+    splitQueue();
+    for (int cache_group = 1; cache_group <= NUM_CACHE_GROUPS; ++cache_group) {
+      bool has_unexecuted_kernels = false;
+
+      // Check for irrelevant cache group
+      if (cache_group == 1 && !(fft.FFT_FP64 || fft.FFT_FP32)) continue;
+      if (cache_group == 2 && !fft.NTT_GF31) continue;
+      if (cache_group == 3 && !fft.NTT_GF61) continue;
+
+      // Allow larger caches to do several L2 stripes at a time (increases occupancy, reduces kernel launch costs).
+      u32 stripe_group_size = l2_striping;
+
+//For now, only support INPLACE with its 16x16 transpose      
+
+      // Loop over all the stripes for this data type.  Let's define a stripe as one "column" of data processed by fftMiddleIn producing 16*MIDDLE tailSquare lines.
+      // Since tailSquare operates on Hermetian pairs of lines, fftMiddleIn alternates operating on low stripes and high stripes.
+      u32 num_stripes = fft.shape.width / 16;
+      u32 num_stripe_groups = num_stripes / stripe_group_size;
+      for (u32 i = 0; i < num_stripe_groups / 2; ++i) {
+        int q = (i & 1);               // Index into which command queue to use
+        u32 i_within_queue = i >> 1;
+        bool last_i_within_queue = (i_within_queue == num_stripe_groups / 4 - 1);
+        // Base_lo refers to the starting fftMiddleIn column number (x coordinate).  When fftMiddleIn uses a 16x16 transpose, base_lo advances 16 at a time.
+        // Base_hi refers to the fftMiddleIn column number that outputs the lines needed for Hermetian matching in tailSquare.
+        u32 base_lo = (i_within_queue + q * num_stripe_groups / 4) * stripe_group_size * 16;
+        //u32 base_hi = fft.shape.width - stripe_group_size * 16 - base_lo;
+
+        // Iterate over the recorded kernels.  Execute each.
+        int arg = 0;
+        for (auto kern : recorded_kernels) {
+
+          if (kern == KMIDIN) {
+            // Do midIn on base_lo and base_hi.  If MIDDLE is odd, the first midIn call must be preceeded by a midIn call to produce the special N/2 tailSquare
+            // line from the WIDTH/2 column.  The first midIn call in the second command queue also must be preceeded by a midIn call to produce one L2 stripe.
+            // The last base_hi in each queue must take into account pre-read stripes in the other queue.
+#define q_requires_preread(q) (((q) == 0 && fft.shape.middle & 1) || ((q) == 1))
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            u32 kernelsToExecute = 2 * stripe_group_size * oneStripeKernelsToExecute;
+            if (i_within_queue == 0 && q_requires_preread(q)) kernelsToExecute += oneStripeKernelsToExecute;
+            if (last_i_within_queue && q_requires_preread(!q)) kernelsToExecute -= oneStripeKernelsToExecute;
+            replay_one(kern, cache_group, arg, queues[q], base_lo, kernelsToExecute);
+            if (i_within_queue == 0 && q_requires_preread(q)) midInEvents[q] = queues[q]->createSyncEvent();
+            // The last block must sync with a pre-read from the other command queue
+            // BUG - if block is both i_within_queue == 0 and last_block_in_queue, then midInEvents[1] does not exist!
+            // Sanity checking L2_STRIPING setting to a max of WIDTH/128 at startup eliminates this bug.
+            if (last_i_within_queue && q_requires_preread(!q)) queues[q]->waitForSyncEvent(&midInEvents[!q]);
+          }
+
+          else if (kern == KFFTHIN) {
+            // fftMiddleIn produces 2 * stripe_group_size * 16 * MIDDLE lines
+            replay_one(kern, cache_group, arg, queues[q], base_lo, 2 * stripe_group_size * 16 * fft.shape.middle);
+          }
+
+          else if (kern == KTAILSQUARE || kern == KTAILMUL || kern == KTAILMULLOW) {
+            // We can now completely process lines from the lower half of the base_lo stripe group (Hermetian mates are mostly in upper half of base_hi stripe group)
+            u32 half_size = (fft.shape.middle + 1) / 2;    // For base_lo, round odd middles up.
+            u32 stripeGroupLines = stripe_group_size * 16;
+            u32 kernelsToExecute = half_size * stripeGroupLines;
+            // We can process most lines from the lower half of the base_hi stripe group (Hermetian mates are mostly in upper half of base_lo stripe group)
+            // The first line in the stripe group is the only line that is not ready for base_hi tail processing.
+            if (i == 0) stripeGroupLines--;                         // Do one fewer line for the first tail call.
+            if (last_i_within_queue && q == 1) stripeGroupLines++;  // Last tail call does not skip first line
+            half_size = fft.shape.middle / 2;                       // For base_hi, round odd middles down.
+            kernelsToExecute += half_size * stripeGroupLines;
+            // Call the kernel
+            replay_one(kern, cache_group, arg, queues[q], base_lo, kernelsToExecute);
+            if (i_within_queue == 0 && q_requires_preread(q)) tailEvents[q] = queues[q]->createSyncEvent();
+// We could eliminate two events and syncs by having the last midIn wait on the first tailsquare.  It exposes a little less parallellism, but perhaps that is irrelevant.
+// For even middles, we only save one event and sync.
+            // The last block must sync with the first tailSquare in the other command queue
+            // BUG - if block is both i_within_queue == 0 and last_block_in_queue, then tailEvents[1] does not exist!
+            // Sanity checking L2_STRIPING setting to a max of WIDTH/128 at startup eliminates this bug.
+            if (last_i_within_queue && q_requires_preread(!q)) queues[q]->waitForSyncEvent(&tailEvents[!q]);
+          }
+
+          else if (kern == KMIDOUT) {
+            u32 oneStripeKernelsToExecute = fft.shape.height / 16;
+            u32 kernelsToExecute = 2 * stripe_group_size * oneStripeKernelsToExecute;
+            // We've completely processed lines from the base_lo stripe group.
+            // The first stripe in the base_hi stripe group is not ready for output.
+            // The last stripe group does an extra stripe.
+            if (i_within_queue == 0) kernelsToExecute -= oneStripeKernelsToExecute;  // Do one fewer stripe for the first midOut call
+            if (last_i_within_queue) kernelsToExecute += oneStripeKernelsToExecute;  // Last midOut call does not skip first stripe
+            replay_one(kern, cache_group, arg, queues[q], base_lo, kernelsToExecute);
+          }
+
+          // Skip other kernels (KFFTW)
+          else
+            has_unexecuted_kernels = true;
+
+          // Advance argument index
+          arg = replay_next_arg(kern, arg);
+        }
+      }
+
+      // Iterate over the recorded kernels again.  Execute any not already executed (KFFTW).
+      // FFTW cannot benefit from L2 striping, it can only benefit from datatype grouping.
+      if (has_unexecuted_kernels) {
+        int arg = 0;
+        mergeQueue();
+        for (auto kern : recorded_kernels) {
+          if (kern == KFFTW) replay_one(kern, cache_group, arg, &queue);
+          arg = replay_next_arg(kern, arg);
+        }
+        splitQueue();
       }
     }
+    mergeQueue();
   }
 
   // Empty the recorded kernels queue
   recorded_kernels.clear();
   recorded_kernel_args.clear();
+}
+
+// Replay one recorded kernel on the specified queue, with specified base and kernelsToExecute.  Two dimensional work groups are supported for some kernels.
+// A kernelsToExecuteX of zero is permitted - used for the default kernelsToExecute (a.k.a. workSize) set at kernel creation that operates on all the FFT data.
+void Gpu::replay_one(enum BOTTOM_HALF_KERNELS kern, int cache_group, int arg, Queue *q, int base, int kernelsToExecuteX, int kernelsToExecuteY) {
+
+  // Call the appropriate kernel
+  if (kern == KMIDIN) {
+    Buffer<double> *buf = recorded_kernel_args[arg++];
+    // If not in place, the input is from the scratch buffer
+    Buffer<double> *in = in_place ? buf : &buf3;
+    Buffer<double> *out = buf;
+    if (cache_group == 1) { kfftMidIn.setQueue(q); kfftMidIn.setKernelsToExecute(kernelsToExecuteX); kfftMidIn(*out, *in, base); }
+    if (cache_group == 2) { kfftMidInGF31.setQueue(q); kfftMidInGF31.setKernelsToExecute(kernelsToExecuteX); kfftMidInGF31(*out, *in, base); }
+    if (cache_group == 3) { kfftMidInGF61.setQueue(q); kfftMidInGF61.setKernelsToExecute(kernelsToExecuteX); kfftMidInGF61(*out, *in, base); }
+  }
+
+  if (kern == KFFTHIN) {
+    Buffer<double> *out = recorded_kernel_args[arg++];
+    Buffer<double> *in = recorded_kernel_args[arg++];
+    if (cache_group == 1) { kfftHin.setQueue(q); kfftHin.setKernelsToExecute(kernelsToExecuteX); kfftHin(*out, *in, base); }
+    if (cache_group == 2) { kfftHinGF31.setQueue(q); kfftHinGF31.setKernelsToExecute(kernelsToExecuteX); kfftHinGF31(*out, *in, base); }
+    if (cache_group == 3) { kfftHinGF61.setQueue(q); kfftHinGF61.setKernelsToExecute(kernelsToExecuteX); kfftHinGF61(*out, *in, base); }
+  }
+
+  if (kern == KTAILSQUARE) {
+    Buffer<double> *buf = recorded_kernel_args[arg++];
+    // If not in place, the output is to the scratch buffer
+    Buffer<double> *in = buf;
+    Buffer<double> *out = in_place ? buf : &buf3;
+    if (!tail_single_kernel && base == 0) {
+      if (cache_group == 1) { ktailSquareZero.setQueue(q); ktailSquareZero(*out, *in); }
+      if (cache_group == 2) { ktailSquareZeroGF31.setQueue(q); ktailSquareZeroGF31(*out, *in); }
+      if (cache_group == 3) { ktailSquareZeroGF61.setQueue(q); ktailSquareZeroGF61(*out, *in); }
+      if (kernelsToExecuteX) kernelsToExecuteX--;
+    }
+    if (cache_group == 1) { ktailSquare.setQueue(q); ktailSquare.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailSquare(*out, *in, base); }
+    if (cache_group == 2) { ktailSquareGF31.setQueue(q); ktailSquareGF31.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailSquareGF31(*out, *in, base); }
+    if (cache_group == 3) { ktailSquareGF61.setQueue(q); ktailSquareGF61.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailSquareGF61(*out, *in, base); }
+  }
+
+  if (kern == KTAILMUL) {
+    Buffer<double> *buf = recorded_kernel_args[arg++];
+    Buffer<double> *in2 = recorded_kernel_args[arg++];
+    // If not in place, the output is to the scratch buffer
+    Buffer<double> *in1 = buf;
+    Buffer<double> *out = in_place ? buf : &buf3;
+    if (cache_group == 1) { ktailMul.setQueue(q); ktailMul.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMul(*out, *in1, *in2, base); }
+    if (cache_group == 2) { ktailMulGF31.setQueue(q); ktailMulGF31.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulGF31(*out, *in1, *in2, base); }
+    if (cache_group == 3) { ktailMulGF61.setQueue(q); ktailMulGF61.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulGF61(*out, *in1, *in2, base); }
+  }
+
+  if (kern == KTAILMULLOW) {
+    Buffer<double> *buf = recorded_kernel_args[arg++];
+    Buffer<double> *in2 = recorded_kernel_args[arg++];
+    // If not in place, the output is to the scratch buffer
+    Buffer<double> *in1 = buf;
+    Buffer<double> *out = in_place ? buf : &buf3;
+    if (cache_group == 1) { ktailMulLow.setQueue(q); ktailMulLow.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLow(*out, *in1, *in2, base); }
+    if (cache_group == 2) { ktailMulLowGF31.setQueue(q); ktailMulLowGF31.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLowGF31(*out, *in1, *in2, base); }
+    if (cache_group == 3) { ktailMulLowGF61.setQueue(q); ktailMulLowGF61.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLowGF61(*out, *in1, *in2, base); }
+  }
+
+  if (kern == KMIDOUT) {
+    Buffer<double> *buf = recorded_kernel_args[arg++];
+    // If not in place, the input is from the scratch buffer
+    Buffer<double> *in = in_place ? buf : &buf3;
+    Buffer<double> *out = buf;
+    if (cache_group == 1) { kfftMidOut.setQueue(q); kfftMidOut.setKernelsToExecute(kernelsToExecuteX); kfftMidOut(*out, *in, base); }
+    if (cache_group == 2) { kfftMidOutGF31.setQueue(q); kfftMidOutGF31.setKernelsToExecute(kernelsToExecuteX); kfftMidOutGF31(*out, *in, base); }
+    if (cache_group == 3) { kfftMidOutGF61.setQueue(q); kfftMidOutGF61.setKernelsToExecute(kernelsToExecuteX); kfftMidOutGF61(*out, *in, base); }
+  }
+
+  if (kern == KFFTW) {
+    Buffer<double> *out = recorded_kernel_args[arg++];
+    Buffer<double> *in = recorded_kernel_args[arg++];
+    if (cache_group == 1) { kfftW.setQueue(q); kfftW(*out, *in); }
+    if (cache_group == 2) { kfftWGF31.setQueue(q); kfftWGF31(*out, *in); }
+    if (cache_group == 3) { kfftWGF61.setQueue(q); kfftWGF61(*out, *in); }
+  }
+}
+
+// Advance the index into the array of kernel arguments
+int Gpu::replay_next_arg(enum BOTTOM_HALF_KERNELS kern, int arg) {
+
+  if (kern == KMIDIN || kern == KTAILSQUARE || kern == KMIDOUT) {
+    return arg + 1;
+  }
 
-  // If using multiple command queues, go back to a single command queue
-  mergeQueue();
+  else { //if (kern == KFFTHIN || kern == KTAILMUL || kern == KTAILMULLOW || kern == KFFTW) {
+    return arg + 2;
+  }
 }
 
 // Call the appropriate kernels to support hybrid FFTs and NTTs
 
 void Gpu::fftP(Buffer<double>& buf, Buffer<Word>& in) {
+  // Work around a troublesome oddball case.  ModMul calls fftP and fftMidIn on one multiplication argument.  If !in_place, fftP writes to buf3, and fftMidIn is queued.
+  // Modmul then calls fftP on the other multiplication argument.  If we don't replay now, fftP overwrite buf3.
+  replay();  
   // If not in place, instead write the output to the scratch buffer
   Buffer<double> *out = in_place ? &buf : &buf3;
   kfftP(*out, in);
@@ -1237,7 +1545,7 @@ void Gpu::fftW(Buffer<double>& out, Buffer<double>& in) {
   recorded_kernel_args.push_back(&out);
   recorded_kernel_args.push_back(&in);
   // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
-  replay();
+  endBottomHalf();
 }
 
 void Gpu::carryA(Buffer<Word>& out, Buffer<double>& in) {
@@ -1258,29 +1566,29 @@ void Gpu::carryLL(Buffer<Word>& out, Buffer<double>& in) {
 
 void Gpu::carryFused(Buffer<double>& buf) {
   // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
-  replay();
-  assert(roePos <= ROE_SIZE);
+  endBottomHalf();
   // Like fftP, if not in place write the output to the scratch buffer
   Buffer<double> *in = &buf;
   Buffer<double> *out = in_place ? &buf : &buf3;
+  assert(roePos <= ROE_SIZE);
   roePos < wantROE ? kCarryFusedROE(*out, *in, roePos++)
                    : kCarryFused(*out, *in, updateCarryPos(1 << 0));
 }
 
 void Gpu::carryFusedMul(Buffer<double>& buf) {
   // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
-  replay();
-  assert(roePos <= ROE_SIZE);
+  endBottomHalf();
   // Like fftP, if not in place write the output to the scratch buffer
   Buffer<double> *in = &buf;
   Buffer<double> *out = in_place ? &buf : &buf3;
+  assert(roePos <= ROE_SIZE);
   roePos < wantROE ? kCarryFusedMulROE(*out, *in, roePos++)
                    : kCarryFusedMul(*out, *in, updateCarryPos(1 << 1));
 }
 
 void Gpu::carryFusedLL(Buffer<double>& buf) {
   // This kernel always ends the "bottom half".  Replay the recorded kernel calls.
-  replay();
+  endBottomHalf();
   // Like fftP, if not in place write the output to the scratch buffer
   Buffer<double> *in = &buf;
   Buffer<double> *out = in_place ? &buf : &buf3;
@@ -1323,11 +1631,19 @@ vector<Buffer<Word>> Gpu::makeBufVector(u32 size) {
 pair<RoeInfo, RoeInfo> Gpu::readROE() {
   assert(roePos <= ROE_SIZE);
   if (roePos) {
-    vector<float> roe = bufROE.read(roePos);
-    assert(roe.size() == roePos);
-    bufROE.zero(roePos);
-    roePos = 0;
+    vector<float> roe = bufROE.read(roePos + 2);
+    assert(roe.size() == roePos + 2);
+    // Split the roe buffer into two.  One for squarings and one for multiplications.  This is likely overkill as the multiplication ROE is not used - though
+    // it could be useful for debugging (in which case we could support getting roe for squarings or multipplications, but not both).
     auto [squareRoe, mulRoe] = split(roe, mulRoePos);
+    // Delete first two used to calculate roePos on the GPU.  Do this after splitting the vector (mulRoePos recorded indices in "+ 2" format).
+    u32 squareRoeSize = squareRoe.size() - 2;
+    roe[0] = squareRoe[squareRoeSize];
+    roe[1] = squareRoe[squareRoeSize+1];
+    squareRoe.resize(squareRoeSize);
+    // Clear the ROE buffer and mulRoePos vector
+    bufROE.zero(roePos + 2);
+    roePos = 0;
     mulRoePos.clear();
     return {roeStat(squareRoe), roeStat(mulRoe)};
   } else {
@@ -1338,9 +1654,14 @@ pair<RoeInfo, RoeInfo> Gpu::readROE() {
 RoeInfo Gpu::readCarryStats() {
   assert(carryPos <= CARRY_SIZE);
   if (carryPos == 0) { return {}; }
-  vector<float> carry = bufStatsCarry.read(carryPos);
-  assert(carry.size() == carryPos);
-  bufStatsCarry.zero(carryPos);
+  vector<float> carry = bufStatsCarry.read(carryPos + 2);
+  assert(carry.size() == carryPos + 2);
+  // Delete first two used to calculate carryPos on the GPU.
+  carry[0] = carry[carryPos];
+  carry[1] = carry[carryPos+1];
+  carry.resize(carryPos);
+  // Clear the GPU buffer
+  bufStatsCarry.zero(carryPos + 2);
   carryPos = 0;
 
   RoeInfo ret = roeStat(carry);
@@ -1412,7 +1733,7 @@ void Gpu::mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, bool
   fftW(buf3, tmp1);
 
   // Register the current ROE pos as multiplication (vs. a squaring)
-  if (mulRoePos.empty() || mulRoePos.back() < roePos) { mulRoePos.push_back(roePos); }
+  if (mulRoePos.empty() || mulRoePos.back() < roePos) { mulRoePos.push_back(roePos + 2); }
 
   if (mul3) { carryM(ioA, buf3); } else { carryA(ioA, buf3); }
   carryB(ioA);
@@ -1427,7 +1748,6 @@ void Gpu::modMul(Buffer<Word>& ioA, Buffer<Word>& inB, bool mul3) {
 void Gpu::modMul(Buffer<Word>& ioA, Buffer<Word>& inB, enum LEAD_TYPE leadInB, bool mul3) {
   if (leadInB == LEAD_NONE) fftP(buf1, inB);
   if (leadInB != LEAD_MIDDLE) fftMidIn(buf1);
-  replay();  // Work around an odd bug.  The above executed fftP writing to buf3 if !in_place and queued fftMidIn.  If we don't replay now, mul will call fftP again overwriting buf3.
   mul(ioA, buf1, buf2, mul3);
 };
 
@@ -1631,6 +1951,27 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
   // LL does not do Mul3
   assert(!(doMul3 && doLL));
 
+  // Use CUDA graphs for some common squarings
+  // NOTE: assumes that if doLL is set, it will always be set
+  bool graph_recording = false;
+  Graph *graph = NULL;
+  if (use_graphs && (&out == &bufData || &out == &bufAux) && &in == &out && leadIn == LEAD_WIDTH && leadOut == LEAD_WIDTH && !doMul3) {
+    // We have one graph for ROE and one for no-ROE and one for bufData and one for bufAux
+    bool roe = (roePos < wantROE);
+    bool srcData = (&out == &bufData);
+    graph = &graph_square[2 * roe + srcData];
+    // Execute an already recorded graph
+    if (graph->isRecorded()) {
+      graph->launch(&queue);
+      queue.incSquareCount();
+      if (roe) roePos++;   // WARNING: If we ever graph Gpu::Mul, we'll need to also maintain mulRoePos vector.
+      return;
+    }
+    // Otherwise, record a new graph
+    graph->beginRecording(&queue);
+    graph_recording = true;
+  }
+
   // In place FFTs use buf1.  Not in place FFTs also use buf3.
   // If leadIn is LEAD_NONE, in contains the input data, squaring starts at fftP
   // If leadIn is LEAD_WIDTH, buf1 (or buf3 if not in place) contains the input data, squaring starts at fftMidIn
@@ -1664,6 +2005,12 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
       carryFused(buf1);
     }
   }
+
+  // End CUDA graph recording (and execute the just recorded graph)
+  if (graph_recording) {
+    graph->endRecording(&queue);
+    graph->launch(&queue);
+  }
 }
 
 u32 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3) {
diff --git a/src/Gpu.h b/src/Gpu.h
index e7a2b810..676bd430 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -87,7 +87,7 @@ class Gpu {
   Background* background;
 
 public:
-  const Args& args;
+  Args& args;
 
 private:
   std::unique_ptr<Saver<PRPState>> saver;
@@ -223,10 +223,16 @@ class Gpu {
   vector<enum BOTTOM_HALF_KERNELS> recorded_kernels;
   vector<Buffer<double> *> recorded_kernel_args;
 
+  bool use_graphs;
+  Graph graph_square[4];
+
   const int NUM_CACHE_GROUPS = 3;
   void splitQueue(void);
   void mergeQueue(void);
+  void endBottomHalf(void);
   void replay(void);
+  void replay_one(enum BOTTOM_HALF_KERNELS kern, int cache_group, int arg, Queue *q = NULL, int base = 0, int kernelsToExecuteX = 0, int kernelsToExecuteY = 1);
+  int replay_next_arg(enum BOTTOM_HALF_KERNELS kern, int arg);
 
   void fftP(Buffer<double>& out, Buffer<double>& in) { fftP(out, reinterpret_cast<Buffer<Word>&>(in)); }
   void fftP(Buffer<double>& out, Buffer<Word>& in);
diff --git a/src/Kernel.cpp b/src/Kernel.cpp
index 5da47088..fe1cc462 100644
--- a/src/Kernel.cpp
+++ b/src/Kernel.cpp
@@ -15,7 +15,8 @@ Kernel::Kernel(string_view name, KernelCompiler* compiler, TimeInfo* timeInfo, Q
   defines{defines},
   timeInfo{timeInfo},
   queue{queue},
-  workSize{workSize}
+  workSizeX{workSize},
+  workSizeY{1}
 {}
 
 Kernel::~Kernel() = default;
@@ -33,12 +34,27 @@ void Kernel::finishLoad() {
   assert(kernel);
   groupSize = getWorkGroupSize(kernel.get(), deviceId, name.c_str());
   assert(groupSize);
-  assert(workSize % groupSize == 0);
+  assert(workSizeX % groupSize == 0);
 
   for (auto [pos, arg] : pendingArgs) { setArgs(pos, arg); }
 }
 
+void Kernel::setKernelsToExecute(size_t nX, size_t nY) {  // The rare two-dimensional kernel execution
+  if (nX == 0) return;  // Use the default work size set at object creation.
+
+  // Make sure kernel is loaded so that we have the groupSize
+  if (!kernel) {
+    startLoad(compiler);
+    finishLoad();
+  }
+  if (!kernel) { throw std::runtime_error("OpenCL kernel "s + name + " not found"); }
+
+  // For 2D kernels, we only support groupSizeY of 1.  Setting workSizeY to more than one indicates a 2D kernel execution.
+  workSizeX = nX * groupSize;
+  workSizeY = nY;
+}
+
 void Kernel::run() {
   assert(kernel);
-  queue->run(kernel.get(), groupSize, workSize, timeInfo);
+  queue->run(kernel.get(), groupSize, workSizeX, workSizeY, timeInfo);
 }
diff --git a/src/Kernel.h b/src/Kernel.h
index 67a7bf50..9f9dc8b6 100644
--- a/src/Kernel.h
+++ b/src/Kernel.h
@@ -24,7 +24,8 @@ class Kernel {
   TimeInfo *timeInfo;
 
   Queue* queue;
-  size_t workSize;
+  size_t workSizeX;
+  size_t workSizeY;
   u32 groupSize = 0;
   
   KernelHolder kernel{};
@@ -44,10 +45,14 @@ class Kernel {
   void finishLoad();
 
   // Change which queue is used to run a kernel
-  void setQueue(Queue *q) { queue = q; }
+  void setQueue(Queue *q) { if (q != NULL) queue = q; }
+
+  // Change number of kernels to execute.  Usually this is set by Gpu.cpp at object creation (by setting the total number of work-items in workSizeX).
+  // L2 striping requires the ability to change this setting on-the-fly.  One and two dimensional kernels are supported.
+  void setKernelsToExecute(size_t nX, size_t nY = 1);
 
   template<typename... Args> void setFixedArgs(int pos, const Args &...tail) { setArgs(pos, tail...); }
-  
+
   template<typename... Args> void operator()(const Args &...args) {
     if (!kernel) {
       startLoad(compiler);
diff --git a/src/Queue.cpp b/src/Queue.cpp
index 0b2d0baf..be2f8044 100644
--- a/src/Queue.cpp
+++ b/src/Queue.cpp
@@ -25,9 +25,10 @@ Queue::Queue(const Context& context, bool profile, bool auxQueue) :
   markerEvent{},
   markerQueued(false),
   queueCount(0),
+  squareCount(0),
   squareTime(50),
-  squareKernels(4),
-  firstSetTime(true)
+  firstSetTime(true),
+  graphRecording(false)
 {
   // Formerly a constant (thus the CAPS).  nVidia is 3% CPU load at 400 or 500, and 35% load at 800 on my Linux machine.
   // AMD is just over 2% load at 1600 and 3200 on the same Linux machine.  Marginally better timings(?) at 3200.
@@ -56,9 +57,9 @@ void Queue::print() {
 
 void Queue::add(EventHolder&& e, TimeInfo* ti) {
   if (hasEvents) { events.emplace_back(std::move(e), ti); }
-  if (isAuxQueue) return;
+  if (isAuxQueue || graphRecording) return;
   queueCount++;
-  if (queueCount == MAX_QUEUE_COUNT) queueMarkerEvent();
+  if (queueCount >= MAX_QUEUE_COUNT) queueMarkerEvent();
 }
 
 void Queue::readSync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo) {
@@ -74,20 +75,21 @@ void Queue::copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo) {
   add(::copyBuf(get(), {}, src, dst, size, hasEvents), tInfo);
 }
 
-void Queue::run(cl_kernel kernel, size_t groupSize, size_t workSize, TimeInfo* tInfo) {
-  add(::run(get(), kernel, groupSize, workSize, {}, tInfo->name, hasEvents), tInfo);
+void Queue::run(cl_kernel kernel, size_t groupSizeX, size_t workSizeX, size_t workSizeY, TimeInfo* tInfo) {
+  add(::run(get(), kernel, groupSizeX, workSizeX, workSizeY, {}, tInfo->name, hasEvents), tInfo);
 }
 
 void Queue::finish() {
-  assert (!isAuxQueue);
+  assert(!isAuxQueue);
   waitForMarkerEvent();
   ::finish(get());
   events.synced();
   queueCount = 0;
+  squareCount = 0;
 }
 
 void Queue::queueMarkerEvent() {
-  assert (!isAuxQueue);
+  assert(!isAuxQueue);
   waitForMarkerEvent();
   if (queueCount) {
     // AMD GPUs have no trouble waiting for a finish without a CPU busy wait.  So, instead of markers and events, simply run finish every now and then.
@@ -99,24 +101,26 @@ void Queue::queueMarkerEvent() {
       markerEvent = enqueueMarker(get());
       markerQueued = true;
       queueCount = 0;
+      squareCount = 0;
     }
   }
 }
 
 void Queue::waitForMarkerEvent() {
-  assert (!isAuxQueue);
+  assert(!isAuxQueue);
   if (!markerQueued) return;
   // By default, nVidia finish causes a CPU busy wait.  Instead, sleep for a while.  Since we know how many items are enqueued after the marker we can make an
   // educated guess of how long to sleep to keep CPU overhead low.
   while (getEventInfo(markerEvent.get()) != CL_COMPLETE) {
-    // There are 4, 7, or 10 kernels per squaring.  Don't overestimate sleep time.  Divide by much more than the number of kernels.
-    std::this_thread::sleep_for(std::chrono::microseconds(1 + queueCount * squareTime / squareKernels / 2));
+    // There are usually 4, 7, or 10 kernels per squaring.  Use a rolling average to create a very accurate kernel count.
+    // Don't overestimate sleep time.  Divide by much more than the number of kernels.
+    std::this_thread::sleep_for(std::chrono::microseconds((squareCount + 1) * squareTime / 2));
   }
   markerQueued = false;
 }
 
 void Queue::setSquareTime(int time) {
-  assert (!isAuxQueue);
+  assert(!isAuxQueue);
   if (firstSetTime) {                 // Ignore first setSquareTime call.  First measured times are wrong because of startup costs
     firstSetTime = false;
     return;
diff --git a/src/Queue.h b/src/Queue.h
index 3e0b3ab0..3066e1c6 100644
--- a/src/Queue.h
+++ b/src/Queue.h
@@ -45,26 +45,52 @@ class Queue : public QueueHolder {
   template<typename T>
   void fillBuf(cl_mem buf, T pattern, u32 size, TimeInfo* tInfo) { fillBufTE(buf, sizeof(T), &pattern, size, tInfo); }
 
-  void run(cl_kernel kernel, size_t groupSize, size_t workSize, TimeInfo* tInfo);
+  void run(cl_kernel kernel, size_t groupSizeX, size_t workSizeX, size_t workSizeY, TimeInfo* tInfo);
   void readSync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo);
   void readAsync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo);
   void copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo);
   void finish();
 
-  EventHolder createSyncEvent(void) { return enqueueMarker(get()); }                     // Enqueue a synchronization event.  Used to sync work among multiple queues.
-  void waitForSyncEvent(EventHolder* e) { enqueueMarkerWithWaits(get(), {e->get()}); }   // Wait for a synchronization event to complete.
+  EventHolder createSyncEvent(void) { if (!isAuxQueue && !graphRecording) queueCount++; return enqueueMarker(get()); }  // Enqueue a synchronization event.  Used to sync work among multiple queues.
+  void waitForSyncEvent(EventHolder* e) { if (!isAuxQueue && !graphRecording) queueCount++; enqueueMarkerWithWaits(get(), {e->get()}); }  // Wait for a synchronization event to complete.
 
+  void incSquareCount(int n = 1) { squareCount += n; }
   void setSquareTime(int);          // Update the time to do one squaring (in microseconds)
-  void setSquareKernels(int n) { squareKernels = n; firstSetTime = true; }
+
+  void beginRecording(void) { graphRecording = true; CHECK1(clGraphBeginRecording(get())); }
+  void endRecording(cl_graph *graph) { graphRecording = false; CHECK1(clGraphEndRecording(get(), graph)); }
+  void playRecording(cl_graph graph) { CHECK1(clGraphLaunch(graph)); add(EventHolder{}, NULL); }
 
 private:                            // This replaces the "call queue->finish every 400 squarings" code in Gpu.cpp.  Solves the busy wait on nVidia GPUs.
   int MAX_QUEUE_COUNT;              // Queue size before a marker will be enqueued.  Typically, 100 to 1000 squarings.
   EventHolder markerEvent;          // Event associated with an enqueued marker placed in the queue every MAX_QUEUE_COUNT entries and before r/w operations.
   bool markerQueued;                // TRUE if a marker and event have been queued
   int queueCount;                   // Count of items added to the queue since last marker
+  int squareCount;                  // Count of squarings/multiplies since last marker queued
   int squareTime;                   // Time to do one squaring (in microseconds)
-  int squareKernels;                // Number of kernels in one squaring
   bool firstSetTime;                // Flag so we can ignore first setSquareTime call (which is inaccurate because of all the initial openCL compiles)
+  bool graphRecording;              // Graph recording in progress.  waitForMarkerEvent and enqueueMarker must be avoided.
   void queueMarkerEvent();          // Queue the marker event
   void waitForMarkerEvent();        // Wait for marker event to complete
 };
+
+
+
+// Wrapper class for our OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA graphs feature
+
+class Graph {
+
+public:
+  Graph() : graph{} {}
+  ~Graph() { if (graph) release(graph); }
+
+  bool isSupported(cl_device_id id) { return clIsGraphSupported(id); }
+  void beginRecording(Queue *q) { q->beginRecording(); }
+  void endRecording(Queue *q) { q->endRecording(&graph); }
+  bool isRecorded() { return graph != NULL; }
+  void launch(Queue *q) { q->playRecording(graph); }
+
+private:
+  cl_graph graph;
+};
+
diff --git a/src/cl/base.cl b/src/cl/base.cl
index ae20149a..4add30e8 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -200,6 +200,14 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define ZEROHACK_H 1
 #endif
 
+#if !defined(MULTI_Q)
+#define MULTI_Q 0
+#endif
+
+#if !defined(L2_STRIPING)
+#define L2_STRIPING 0
+#endif
+
 // Expected defines: EXP the exponent.
 // WIDTH, SMALL_HEIGHT, MIDDLE.
 
diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index fe2ce3d3..a8ba21c1 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -41,8 +41,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
+  local u32 lds[G_W];
   updateStats(bufROE, posROE, carryMax);
 #endif
 }
@@ -98,9 +100,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -171,10 +175,12 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF31) in, u32 posROE, P(CarryABM) carryOut, P
   carryOut[G_W * g + me] = carry;
 
 #if ROE
+  local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) M31;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -245,10 +251,12 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF61) in, u32 posROE, P(CarryABM) carryOut, P
   carryOut[G_W * g + me] = carry;
 
 #if ROE
+  local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) (M61 >> 32);      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -324,9 +332,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -407,9 +417,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -490,9 +502,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -580,10 +594,12 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, P(u
   carryOut[G_W * g + me] = carry;
 
 #if ROE
+  local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) 0x1FFFFFFF;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -680,9 +696,11 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   carryOut[G_W * g + me] = carry;
 
 #if ROE
-  updateStats(bufROE, posROE, roundMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
-  updateStats(bufROE, posROE, carryMax);
+  local u32 lds[G_W];
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 9a887a76..8f70e16a 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -198,12 +198,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
   frac_bits = starting_frac_bits;     // Restore starting frac_bits for applying weights after carry propagation
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -238,6 +232,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Calculate inverse weights
   T base = optionalHalve(weights.y);
   for (u32 i = 0; i < NW; ++i) {
@@ -410,12 +410,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     frac_bits += frac_bits_bigstep;
   }
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -450,6 +444,12 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
@@ -627,13 +627,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   }
   combo_counter = starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
 
-#if ROE
-  float fltRoundMax = (float) roundMax / (float) M31;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(bufROE, posROE, fltRoundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -668,6 +661,13 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  float fltRoundMax = (float) roundMax / (float) M31;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, fltRoundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
@@ -849,13 +849,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   }
   combo_counter = starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
 
-#if ROE
-  float fltRoundMax = (float) roundMax / (float) (M61 >> 32);      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(bufROE, posROE, fltRoundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -890,6 +883,13 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  float fltRoundMax = (float) roundMax / (float) (M61 >> 32);      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, fltRoundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
@@ -1087,12 +1087,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
   combo_counter = starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -1127,6 +1121,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Calculate inverse weights
   T base = optionalHalve(weights.y);
   for (u32 i = 0; i < NW; ++i) {
@@ -1351,12 +1351,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
   combo_counter = starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -1391,6 +1385,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) ldsF2, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) ldsF2, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(ldsF2, carry, me, lowMe);
 
@@ -1611,12 +1611,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   }
   combo_counter = starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -1651,6 +1645,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
@@ -1865,13 +1865,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   m31_combo_counter = m31_starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
   m61_combo_counter = m61_starting_combo_counter;
 
-#if ROE
-  float fltRoundMax = (float) roundMax / (float) 0x1FFFFFFF;      // For speed, roundoff was computed as 32-bit integer.  Convert to float - divide by M61.
-  updateStats(bufROE, posROE, fltRoundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -1906,6 +1899,13 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  float fltRoundMax = (float) roundMax / (float) 0x1FFFFFFF;      // For speed, roundoff was computed as 32-bit integer.  Convert to float - divide by M61.
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, fltRoundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
@@ -2153,12 +2153,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   m31_combo_counter = m31_starting_combo_counter;     // Restore starting counter for applying weights after carry propagation
   m61_combo_counter = m61_starting_combo_counter;
 
-#if ROE
-  updateStats(bufROE, posROE, roundMax);
-#elif STATS & (1 << MUL3)
-  updateStats(bufROE, posROE, carryMax);
-#endif
-
   // Write out our carries for the last line in this group. Only groups 0 to H/WMUL-1 need to write carries out.
   // Group H/WMUL is a duplicate of group 0 (producing the same results) so we don't care about that group writing out,
   // but it's fine either way.
@@ -2193,6 +2187,12 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   __asm("s_setprio 0");
 #endif
 
+#if ROE
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, roundMax);
+#elif STATS & (1 << MUL3)
+  updateStats((local u32 *) lds61, G_W * WMUL, H / WMUL, bufROE, posROE, carryMax);
+#endif
+
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 57bf5adb..64c83a11 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -135,14 +135,48 @@ float OVERLOAD boundCarry(i32 c) { return ldexp(fabs((float) c), -32); }
 float OVERLOAD boundCarry(i64 c) { return ldexp(fabs((float) (i32) (c >> 8)), -24); }
 
 #if STATS || ROE
-void updateStats(global uint *bufROE, u32 posROE, float roundMax) {
+void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *bufROE, u32 posROE, float roundMax) {
   assert(roundMax >= 0);
-  // work_group_reduce_max() allocates an additional 256Bytes LDS for a 64lane workgroup, so avoid it.
-  // u32 groupRound = work_group_reduce_max(as_uint(roundMax));
-  // if (get_local_id(0) == 0) { atomic_max(bufROE + posROE, groupRound); }
 
-  // Do the reduction directly over global mem.
-  atomic_max(bufROE + posROE, as_uint(roundMax));
+  // This barrier may be needed by carryFused because this code does not partition lds memory the same way shufl does
+  bar();
+  // Reduce to a single roundMax value
+  u32 me = get_local_id(0);
+  u32 u32RoundMax = as_uint(roundMax);
+  while (num_threads > 1) {
+    // Write roundMax for high half of threads to local memory.  Ignore threads not participating in the reduction.
+   if (num_threads >= WAVEFRONT) bar();
+      __asm("bar.sync 0;");
+    if (me >= num_threads / 2 && me < num_threads) lds[me - num_threads / 2] = u32RoundMax;
+    if (num_threads > WAVEFRONT) {
+      bar();                             // work around a weird CUDA NVCC bug where two bar() calls are required???! (Titan V, CUDA 13.0, WMUL=2)
+      bar();
+    }
+    // Low half of threads do a max
+    if (me < num_threads / 2) {
+      u32 highHalfMax = lds[me];
+      if (u32RoundMax < highHalfMax) u32RoundMax = highHalfMax;
+    }
+    // Cut num threads in half, loop
+    num_threads /= 2;
+  }
+
+// We could use shfl_down_sync (and AMD's equivalent) instead of LDS memory once num_threads < WAVEFRONT (see https://github.com/mahmoudmaftah/MaxReduction-Cuda/blob/main/code/reduction_benchmarks.cu)
+// We could instead write the reduced ROE sequentially to bufROE and then do a max_reduction after last atomic_add
+
+  // Merge this max with others
+  if (me == 0) {
+    // The bufROE entry to update is stored in the first bufROE entry.  This value used to be passed into carryFused as an argument.
+    // CUDA graphs don't allow arguments to change.  Thus, calculating posROE and storing it in bufROE workd better.
+    posROE = bufROE[0];
+    atomic_max(bufROE + posROE + 2, u32RoundMax);
+    // The second bufRoe entry is a count of the number atomic_maxes performed.  When the last atomic_max is done, increment posROE and clear the counter.
+    u32 old_value = atomic_add(bufROE + 1, 1);
+    if (old_value == num_blocks - 1) {
+      bufROE[0] = posROE + 1;
+      bufROE[1] = 0;
+    }
+  }
 }
 #endif
 
@@ -685,7 +719,7 @@ Word OVERLOAD carryStepSignedSloppy(i96 x, i64 *outCarry, bool isBigWord) {
   const u32 bigwordBits = EXP / NWORDS + 1;
   u32 nBits = bitlen(isBigWord);
 #if EXP / NWORDS >= 32                                  // nBits is 32 or more
-  return carryStep(x, outCarry, isBigWord);		// Should be just as fast as code below
+  return carryStep(x, outCarry, isBigWord);             // Should be just as fast as code below
 //  u32 xmid_topbit = i96_mid32(x) & (1 << (bigwordBits - 32 - 1));
 //  i32 whi = ulowFixedBits(i96_mid32(x), bigwordBits - 32 - 1) - xmid_topbit;
 //  i64 xhi = i96_hi64(x) + xmid_topbit;
@@ -696,7 +730,7 @@ Word OVERLOAD carryStepSignedSloppy(i96 x, i64 *outCarry, bool isBigWord) {
   *outCarry = (i96_hi64(x) + (w < 0)) << (32 - nBits);
   return w;
 #else                                                   // nBits less than 32
-  return carryStep(x, outCarry, isBigWord);		// Should be faster than code below
+  return carryStep(x, outCarry, isBigWord);             // Should be faster than code below
 //  i32 w = lowFixedBits(i96_lo32(x), bigwordBits);
 //  *outCarry = (as_long((int2)(xtract32(i96_lo64(x), bigwordBits), xtract32(i96_hi64(x), bigwordBits))) + (w < 0)) << (bigwordBits - nBits);
 //  return w;
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index 02d388d3..52c39322 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -4,27 +4,52 @@
 #include "fftheight.cl"
 #include "middle.cl"
 
+// If not doing L2 stripes, process the lines in any order.
+// If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 2 * stripe_group_size * 16 * MIDDLE tailSquare lines.
+u32 get_line_number(u32 base_lo) {
+  u32 g = get_group_id(0);
+#if L2_STRIPING
+  // Old, simple L2 striping code
+  // return g / (L2_STRIPING * 16) * WIDTH + base + g % (L2_STRIPING * 16);
+
+  // Process stripe group base_lo or base_hi
+  u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
+  u32 linesInOneStripe = 16 * MIDDLE;
+  u32 stripe_group_size = L2_STRIPING;
+  u32 linesInOneStripeGroup = stripe_group_size * linesInOneStripe;
+  u32 base;
+  if (g  linesInOneStripeGroup) base = base_lo;
+  else base = base_hi, g -= linesInOneStripeGroup;
+  return g / (L2_STRIPING * 16) * WIDTH + base + g % (L2_STRIPING * 16);
+#else
+  return g;
+#endif
+}
+
 #if FFT_FP64
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
-KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES / sizeof(T2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH];
-  u32 g = get_group_id(0);
+  u32 line = get_line_number(base);
   u32 me = get_local_id(0);
 
-  readTailFusedLine(in, u, g, me);
+  readTailFusedLine(in, u, line, me);
 
-#if NH == 8
-  T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
+  T2 w = fancyTrig_N(H * me);
 #else
-  T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
+  T2 w = slowTrig_N(H * me, ND / NH);
 #endif
 
   fft_HEIGHT(lds, u, smallTrig, w, 1, me);
 
-  write(G_H, NH, u, out, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
+  write(G_H, NH, u, out, SMALL_HEIGHT * transPos(line, MIDDLE, WIDTH));
 }
 
 #endif
@@ -37,28 +62,31 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if FFT_FP32
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
-KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES / sizeof(F2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
   TrigFP32 smallTrigF2 = (TrigFP32) smallTrig;
 
   F2 u[NH];
-  u32 g = get_group_id(0);
+  u32 line = get_line_number(base);
   u32 me = get_local_id(0);
 
-  readTailFusedLine(inF2, u, g, me);
+  readTailFusedLine(inF2, u, line, me);
 
-#if NH == 8
-  F2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
+  F2 w = fancyTrig_N(H * me);
 #else
-  F2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
+  F2 w = slowTrig_N(H * me, ND / NH);
 #endif
 
   fft_HEIGHT(lds, u, smallTrigF2, 1, me);
 
-  write(G_H, NH, u, outF2, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
+  write(G_H, NH, u, outF2, SMALL_HEIGHT * transPos(line, MIDDLE, WIDTH));
 }
 
 #endif
@@ -71,7 +99,7 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF31
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
-KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES / sizeof(GF31)];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -79,14 +107,14 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   TrigGF31 smallTrig31 = (TrigGF31) (smallTrig + DISTHTRIGGF31);
 
   GF31 u[NH];
-  u32 g = get_group_id(0);
+  u32 line = get_line_number(base);
   u32 me = get_local_id(0);
 
-  readTailFusedLine(in31, u, g, me);
+  readTailFusedLine(in31, u, line, me);
 
   fft_HEIGHT(lds, u, smallTrig31, 1, me);
 
-  write(G_H, NH, u, out31, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
+  write(G_H, NH, u, out31, SMALL_HEIGHT * transPos(line, MIDDLE, WIDTH));
 }
 
 #endif
@@ -99,7 +127,7 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF61
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
-KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES / sizeof(GF61)];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -107,14 +135,14 @@ KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   TrigGF61 smallTrig61 = (TrigGF61) (smallTrig + DISTHTRIGGF61);
 
   GF61 u[NH];
-  u32 g = get_group_id(0);
+  u32 line = get_line_number(base);
   u32 me = get_local_id(0);
 
-  readTailFusedLine(in61, u, g, me);
+  readTailFusedLine(in61, u, line, me);
 
   fft_HEIGHT(lds, u, smallTrig61, 1, me);
 
-  write(G_H, NH, u, out61, SMALL_HEIGHT * transPos(g, MIDDLE, WIDTH));
+  write(G_H, NH, u, out61, SMALL_HEIGHT * transPos(line, MIDDLE, WIDTH));
 }
 
 #endif
diff --git a/src/cl/fftmiddlein.cl b/src/cl/fftmiddlein.cl
index 1c97e612..a7c34538 100644
--- a/src/cl/fftmiddlein.cl
+++ b/src/cl/fftmiddlein.cl
@@ -8,7 +8,7 @@
 
 #if FFT_FP64
 
-KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   T2 u[MIDDLE];
 
   u32 SIZEY = IN_WG / IN_SIZEX;
@@ -65,7 +65,7 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   F2 u[MIDDLE];
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -126,7 +126,7 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF31 u[MIDDLE];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -187,7 +187,7 @@ KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF61 u[MIDDLE];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -197,7 +197,7 @@ KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, Trig trig) {
   u32 SIZEY = IN_WG / IN_SIZEX;
 
   u32 N = WIDTH / IN_SIZEX;
-  
+
   u32 g = get_group_id(0);
   u32 gx = g % N;
   u32 gy = g / N;
@@ -244,18 +244,68 @@ KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, Trig trig) {
 
 
 
-
+// fftMiddleIn processes lines output by fftP or carryFused.  Call this the x coordinate with range 0..WIDTH-1.  The y coordinate ranges from 0..MIDDLE*SMALL_HEIGHT-1.
+// In place transpose processeses blocks of 16 x coordinates by 16 y coordinates.  fftMiddleIn processes processes MIDDLE blocks at a time.
+// fftMiddleIn outputs lines for tailSquare.  The y coordinate from 0..SMALL_HEIGHT-1 is transposed into the x coordinate for tailSquare.
+//
+// fftMiddleIn can work on all the FFT data, in which case we can process blocks in any order.  Sequentially through memory by increasing x coordinates first might be best.
+// More interestingly, fftMiddleIn can be configured to work on smaller amounts of FFT data in hopes that the data will stay in the L2 cache during the tailSquare and
+// fftMiddleOut kernels.  I call this L2 striping.  In this case we process "columns of FFT data" by processing all the y coordinates to create complete lines for tailSquare.
+// We must also output lines x and N-x for tailSquare handling of Hermetian symmetry.
 
 #else           // in place transpose
 
+// L2 striping processes both base_lo and base_hi (see Gpu.cpp) in one kernel call to reduce kernel launch overhead.  There is also some special handling required for the
+// first and last stripe groups.  This results in a more complicated map group_id to compute the startx and starty coordinates.
+#if L2_STRIPING
+void map_striping_group_id(u32 base_lo, u32 g, u32 *startx, u32 *starty) {
+  // Old, simple L2 striping code
+  // u32 N = SMALL_HEIGHT / 16;
+  // u32 starty = g % N * 16;
+  // u32 startx = base + g / N * 16;
+
+  // If MIDDLE is odd, the first fftMiddleIn must process the special N/2 tailSquare line from the WIDTH/2 stripe.
+  // If MULTI_Q, the first fftMiddleIn in the second queue must also process the 3*WIDTH/4 stripe.
+  u32 oneStripeKernelsToExecute = SMALL_HEIGHT / 16;
+  if ((base_lo == 0 && (MIDDLE & 1)) || (MULTI_Q && base_lo == WIDTH / 4)) {
+    if (g < oneStripeKernelsToExecute) {
+      *startx = base_lo + WIDTH / 2;
+      *starty = g * 16;
+      return;
+    }
+    g -= oneStripeKernelsToExecute;
+  }
+
+  // Process stripe group base_lo.
+  u32 stripe_group_size = L2_STRIPING;
+  u32 kernelsToExecute = stripe_group_size * oneStripeKernelsToExecute;
+  if (g < kernelsToExecute) {
+    *startx = base_lo + g / oneStripeKernelsToExecute * 16;
+    *starty = g % oneStripeKernelsToExecute * 16;
+    return;
+  }
+  g -= kernelsToExecute;
+
+  // Process stripe group base_hi.  The last group must take into account that the first stripe may have already been processed.
+  u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
+  if ((base_hi == WIDTH / 2 && (MIDDLE & 1)) || (MULTI_Q && base_hi == 3 * WIDTH / 4)) base_hi += 16;
+  *startx = base_hi + g / oneStripeKernelsToExecute * 16;
+  *starty = g % oneStripeKernelsToExecute * 16;
+}
+#endif
+
 #if FFT_FP64
 
-KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   T2 u[MIDDLE];
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+  u32 zerohack = (MIDDLE >= 16) ? 0 : g / 131072;  // Rocm optimizer goes bonkers if zerohack used when MIDDLE=16
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 starty = g % N * 16;
   u32 startx = g / N * 16;
@@ -301,7 +351,7 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   F2 u[MIDDLE];
 
@@ -310,7 +360,11 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
   TrigFP32 trigF2 = (TrigFP32) trig;
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+  u32 zerohack = 0;                                // Need to test if g / 131072 is of any benefit
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 starty = g % N * 16;
   u32 startx = g / N * 16;
@@ -356,7 +410,7 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF31 u[MIDDLE];
 
@@ -365,7 +419,11 @@ KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, Trig trig) {
   TrigGF31 trig31 = (TrigGF31) (trig + DISTMTRIGGF31);
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+  u32 zerohack = 0;                                // Need to test if g / 131072 is of any benefit
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 starty = g % N * 16;
   u32 startx = g / N * 16;
@@ -411,7 +469,7 @@ KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF61 u[MIDDLE];
 
@@ -420,7 +478,11 @@ KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, Trig trig) {
   TrigGF61 trig61 = (TrigGF61) (trig + DISTMTRIGGF61);
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+  u32 zerohack = 0;                                // Need to test if g / 131072 is of any benefit
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 starty = g % N * 16;
   u32 startx = g / N * 16;
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index b7c486cb..b3c18d96 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -8,7 +8,7 @@
 
 #if FFT_FP64
 
-KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   T2 u[MIDDLE];
 
   u32 SIZEY = OUT_WG / OUT_SIZEX;
@@ -73,7 +73,7 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   F2 u[MIDDLE];
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -139,7 +139,7 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF31 u[MIDDLE];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -202,7 +202,7 @@ KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, Trig trig) {
+KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF61 u[MIDDLE];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -260,16 +260,58 @@ KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, Trig trig) {
 
 
 
+// fftMiddleOut processes lines output by tailSquare or tailMul.  Call this the x coordinate with range 0..SMALL_HEIGHT-1
+// fftMiddleOut outputs lines for carryFused or fftW.  Call this the y coordinate with range 0..WIDTH-1
+// In place transpose processeses blocks of 16 x coordinates by 16 y coordinates.
+// fftMiddleOut processes processes MIDDLE blocks at a time.
+//
+// fftMiddleOut can work on all the FFT data, in which case we can process blocks in any order.  Sequentially through memory by increasing x coordinates first might be best.
+// More interestingly, fftMiddleOut can work on smaller amounts of FFT data in hopes that the data has stayed in the L2 cache during the fftMiddleIn/tailSquare/fftMiddleOut kernels.
+// In this case we must work through all the x coordinates to read complete lines from tailSquare.  We must also read y and N-y due to Hermetian symmetry.
+
+
 #else           // in place transpose
 
+// L2 striping processes both base_lo and base_hi (see Gpu.cpp) in one kernel call to reduce kernel launch overhead.  There is also some special handling required for the
+// first and last stripe groups.  This results in some more complicated to map group_id into startx and starty coordinates.
+#if L2_STRIPING
+void map_striping_group_id(u32 base_lo, u32 g, u32 *startx, u32 *starty) {
+  // Old, simple L2 striping code
+  // u32 N = SMALL_HEIGHT / 16;
+  // u32 startx = g % N * 16;
+  // u32 starty = base + g / N * 16;
+
+  // Process stripe group from base_lo.
+  u32 oneStripeKernelsToExecute = SMALL_HEIGHT / 16;
+  u32 stripe_group_size = L2_STRIPING;
+  u32 kernelsToExecute = stripe_group_size * oneStripeKernelsToExecute;
+  if (g < kernelsToExecute) {
+    *startx = g % oneStripeKernelsToExecute * 16;
+    *starty = base_lo + g / oneStripeKernelsToExecute * 16;
+    return;
+  }
+  g -= kernelsToExecute;
+
+  // Process stripe group from base_hi.  The first stripe in the base_hi stripe group is not ready for output (except in the last group).
+  // The last group processes the stripe that was skipped in the first base_hi group.
+  u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
+  u32 base = (base_hi == WIDTH / 2 || (MULTI_Q && base_hi == 3 * WIDTH / 4)) ? base_hi : base_hi + 16;  // Skip first stripe in base_hi (usually)
+  *startx = g % oneStripeKernelsToExecute * 16;
+  *starty = base + g / oneStripeKernelsToExecute * 16;
+}
+#endif
+
 #if FFT_FP64
 
-KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   T2 u[MIDDLE];
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 startx = g % N * 16;
   u32 starty = g / N * 16;
@@ -317,7 +359,7 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   F2 u[MIDDLE];
 
@@ -326,7 +368,10 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
   TrigFP32 trigF2 = (TrigFP32) trig;
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 startx = g % N * 16;
   u32 starty = g / N * 16;
@@ -371,7 +416,7 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF31 u[MIDDLE];
 
@@ -380,7 +425,10 @@ KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, Trig trig) {
   TrigGF31 trig31 = (TrigGF31) (trig + DISTMTRIGGF31);
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 startx = g % N * 16;
   u32 starty = g / N * 16;
@@ -422,7 +470,7 @@ KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, Trig trig) {
+KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF61 u[MIDDLE];
 
@@ -431,7 +479,10 @@ KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, Trig trig) {
   TrigGF61 trig61 = (TrigGF61) (trig + DISTMTRIGGF61);
 
   u32 g = get_group_id(0);
-#if INPLACE == 1                                   // nVidia friendly padding
+#if L2_STRIPING
+  u32 startx, starty;
+  map_striping_group_id(base, g, &startx, &starty);
+#elif INPLACE == 1                                 // nVidia friendly padding
   u32 N = SMALL_HEIGHT / 16;
   u32 startx = g % N * 16;
   u32 starty = g / N * 16;
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index decc0e61..957aace9 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -5,6 +5,33 @@
 #include "tailutil.cl"
 #include "middle.cl"
 
+// If not doing L2 stripes, process the lines in any order.
+// If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 16 * MIDDLE tailSquare lines.
+u32 get_line_number(u32 base) {
+  u32 g = get_group_id(0);
+#if L2_STRIPING
+  // Old, simple L2 striping code
+  // return get_group_id(1) * WIDTH + base + g;
+
+  // Process all lines from low half of base_lo stripe group.  One stripe group is stripe_group_size * 16 * MIDDLE lines.
+  u32 base_lo = base;
+  u32 stripe_group_size = L2_STRIPING;
+  u32 half_size = (MIDDLE + 1) / 2;  // For base_lo, round odd middles up.
+  u32 kernelsToExecute = half_size * stripe_group_size * 16;
+  if (g < kernelsToExecute) return g / (stripe_group_size * 16) * WIDTH + base_lo + g % (stripe_group_size * 16);
+  g -= kernelsToExecute;
+
+  // Process lines from low half of base_hi stripe group.  One stripe group is stripe_group_size * 16 * MIDDLE lines.
+  // The first line in the base_hi stripe group is not ready for processing (except for the last group).
+  u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
+  if (base_hi != WIDTH / 2) base_hi++;   // Skip first line in base_hi (usually)
+  half_size = MIDDLE / 2;                // For base_hi, round odd middles up.
+  return g % half_size * WIDTH + base_hi + g / half_size;
+#else
+  return g;
+#endif
+}
+
 #if FFT_FP64
 
 // Handle the final multiplication step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -48,15 +75,14 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
   }
 }
 
-KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES / sizeof(T2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH], v[NH];
   T2 p[NH], q[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
@@ -70,9 +96,9 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 #if FFT_VARIANT_H != 0
   T2 w;
 #elif NH == 8
-  T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
+  T2 w = fancyTrig_N(H * me);
 #else
-  T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
+  T2 w = slowTrig_N(H * me, ND / NH);
 #endif
 
 #if MUL_LOW
@@ -163,8 +189,9 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
   }
 }
 
-KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES / sizeof(F2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
   CP(F2) aF2 = (CP(F2)) a;
@@ -174,9 +201,7 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   F2 u[NH], v[NH];
   F2 p[NH], q[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
@@ -274,8 +299,9 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
   }
 }
 
-KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
@@ -285,9 +311,7 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   GF31 u[NH], v[NH];
   GF31 p[NH], q[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
@@ -404,8 +428,9 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
   }
 }
 
-KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
@@ -415,9 +440,7 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   GF61 u[NH], v[NH];
   GF61 p[NH], q[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 80dc0260..8d2a9a7e 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -5,6 +5,40 @@
 #include "tailutil.cl"
 #include "middle.cl"
 
+// If not doing L2 stripes, process the lines in any order.
+// If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 16 * MIDDLE tailSquare lines.
+u32 get_line_number(u32 base) {
+  u32 g = get_group_id(0);
+#if !SINGLE_KERNEL
+#if L2_STRIPING
+  if (base == 0) g = g + 1;
+#else
+  g = g + 1;
+#endif
+#endif
+#if L2_STRIPING
+  // Old, simple L2 striping code
+  // return get_group_id(1) * WIDTH + base + g;
+
+  // Process all lines from low half of base_lo stripe group.  One stripe group is stripe_group_size * 16 * MIDDLE lines.
+  u32 base_lo = base;
+  u32 stripe_group_size = L2_STRIPING;
+  u32 half_size = (MIDDLE + 1) / 2;  // For base_lo, round odd middles up.
+  u32 kernelsToExecute = half_size * stripe_group_size * 16;
+  if (g < kernelsToExecute) return g / (stripe_group_size * 16) * WIDTH + base_lo + g % (stripe_group_size * 16);
+  g -= kernelsToExecute;
+
+  // Process lines from low half of base_hi stripe group.  One stripe group is stripe_group_size * 16 * MIDDLE lines.
+  // The first line in the base_hi stripe group is not ready for processing (except for the last group).
+  u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
+  if (base_hi != WIDTH / 2) base_hi++;   // Skip first line in base_hi (usually)
+  half_size = MIDDLE / 2;                // For base_hi, round odd middles up.
+  return g % half_size * WIDTH + base_hi + g / half_size;
+#else
+  return g;
+#endif
+}
+
 #if FFT_FP64
 
 // Handle the final squaring step on a pair of complex numbers.  Swap real and imaginary results for the inverse FFT.
@@ -58,7 +92,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local T2 lds[LDS_BYTES / sizeof(T2)];
   T2 u[NH];
-  u32 H = ND / SMALL_HEIGHT;
+  const u32 H = ND / SMALL_HEIGHT;
 
   // This kernel in executed in two workgroups.
   u32 which = get_group_id(0);
@@ -75,9 +109,9 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if FFT_VARIANT_H != 0
   T2 w;
 #elif NH == 8
-  T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
+  T2 w = fancyTrig_N(H * me);
 #else
-  T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
+  T2 w = slowTrig_N(H * me, ND / NH);
 #endif
 
   T2 trig = slowTrig_N(line + me * H, ND / NH);
@@ -94,20 +128,14 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES / sizeof(T2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH], v[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
-#else
-  u32 line1 = get_group_id(0) + 1;
-  u32 line2 = H - line1;
-#endif
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
@@ -121,9 +149,9 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if FFT_VARIANT_H != 0
   T2 w;
 #elif NH == 8
-  T2 w = fancyTrig_N(ND / SMALL_HEIGHT * me);
+  T2 w = fancyTrig_N(H * me);
 #else
-  T2 w = slowTrig_N(ND / SMALL_HEIGHT * me, ND / NH);
+  T2 w = slowTrig_N(H * me, ND / NH);
 #endif
 
   u32 zerohack = ZEROHACK_H * (u32) get_group_id(0) / 131072;
@@ -207,21 +235,14 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local T2 lds[2 * LDS_BYTES / sizeof(T2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line_u = get_group_id(0);
+  u32 line_u = get_line_number(base);
   u32 line_v = line_u ? H - line_u : (H / 2);
-#else
-  u32 line_u = get_group_id(0) + 1;
-  u32 line_v = H - line_u;
-#endif
-
   u32 me = get_local_id(0);
   u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
 
@@ -348,7 +369,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local F2 lds[LDS_BYTES / sizeof(F2)];
   F2 u[NH];
-  u32 H = ND / SMALL_HEIGHT;
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -380,8 +401,9 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES / sizeof(F2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -389,15 +411,8 @@ KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 u[NH], v[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
-#else
-  u32 line1 = get_group_id(0) + 1;
-  u32 line2 = H - line1;
-#endif
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
@@ -489,8 +504,9 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local F2 lds[2 * LDS_BYTES / sizeof(F2)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -498,16 +514,8 @@ KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   F2 u[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line_u = get_group_id(0);
+  u32 line_u = get_line_number(base);
   u32 line_v = line_u ? H - line_u : (H / 2);
-#else
-  u32 line_u = get_group_id(0) + 1;
-  u32 line_v = H - line_u;
-#endif
-
   u32 me = get_local_id(0);
   u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
 
@@ -629,13 +637,13 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
   TrigGF31 smallTrig31 = (TrigGF31) (smallTrig + DISTHTRIGGF31);
 
   GF31 u[NH];
-  u32 H = ND / SMALL_HEIGHT;
 
   // This kernel in executed in two workgroups.
   u32 which = get_group_id(0);
@@ -680,8 +688,9 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -689,15 +698,8 @@ KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF31 u[NH], v[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
-#else
-  u32 line1 = get_group_id(0) + 1;
-  u32 line2 = H - line1;
-#endif
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
@@ -784,8 +786,9 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF31 lds[2 * LDS_BYTES / sizeof(GF31)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -793,16 +796,8 @@ KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF31 u[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line_u = get_group_id(0);
+  u32 line_u = get_line_number(base);
   u32 line_v = line_u ? H - line_u : (H / 2);
-#else
-  u32 line_u = get_group_id(0) + 1;
-  u32 line_v = H - line_u;
-#endif
-
   u32 me = get_local_id(0);
   u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
 
@@ -880,10 +875,10 @@ void OVERLOAD onePairSq(GF61* pa, GF61* pb, GF61 t_squared, const u32 t_squared_
 // This code should be faster (saves at least one wide mul) but the CUDA compiler makes poorer decisions regarding register usage resulting in local memory usage
 #if ENABLE_BETTER_ONEPAIRSQ
   X2qconjb(&a, &b);                             // X2(a, conjugate(b)).  a.x range is 0..2+, a.y range is -1-..1+, b.x range is -1-..1+, b.y range is 0..2+
-  a.y += 2*M61;					// a range is  0..2+ / 1-..3+
-  b.x += 2*M61;					// b range is 1-..3+ / 0..2+
+  a.y += 2*M61;                                 // a range is  0..2+ / 1-..3+
+  b.x += 2*M61;                                 // b range is 1-..3+ / 0..2+
 
-  ab = addq(a, b);				// Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
+  ab = addq(a, b);                              // Compute 2ab as (a + b)^2 - a^2 - b^2.  ab range is 1-..5+
   a2 = csqq(a, 3, 4);                           // a2 = a^2, a2 range is 0..2+
   b2 = csq(b, 4, 3);                            // b2 = b^2, b2 range is 0..1+
 
@@ -978,13 +973,13 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
   TrigGF61 smallTrig61 = (TrigGF61) (smallTrig + DISTHTRIGGF61);
 
   GF61 u[NH];
-  u32 H = ND / SMALL_HEIGHT;
 
   // This kernel in executed in two workgroups.
   u32 which = get_group_id(0);
@@ -1029,8 +1024,9 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -1038,15 +1034,8 @@ KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF61 u[NH], v[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line1 = get_group_id(0);
+  u32 line1 = get_line_number(base);
   u32 line2 = line1 ? H - line1 : (H / 2);
-#else
-  u32 line1 = get_group_id(0) + 1;
-  u32 line2 = H - line1;
-#endif
   u32 memline1 = transPos(line1, MIDDLE, WIDTH);
   u32 memline2 = transPos(line2, MIDDLE, WIDTH);
 
@@ -1133,8 +1122,9 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF61 lds[2 * LDS_BYTES / sizeof(GF61)];
+  const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
@@ -1142,16 +1132,8 @@ KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
   GF61 u[NH];
 
-  u32 H = ND / SMALL_HEIGHT;
-
-#if SINGLE_KERNEL
-  u32 line_u = get_group_id(0);
+  u32 line_u = get_line_number(base);
   u32 line_v = line_u ? H - line_u : (H / 2);
-#else
-  u32 line_u = get_group_id(0) + 1;
-  u32 line_v = H - line_u;
-#endif
-
   u32 me = get_local_id(0);
   u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
 
diff --git a/src/tune.cpp b/src/tune.cpp
index dea4f864..17d16526 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -707,7 +707,8 @@ void Tune::tune() {
       args->flags["STORES"] = to_string(stores);
     }
 
-    // Find best FAST_BARRIER setting
+    // Find best FAST_BARRIER setting.  This setting does nothing when using the CUDA backend.
+#ifndef CUDA_BACKEND
     if (1 /*AMDGPU*/) {                 // FAST_BARRIER now works for nVidia GPUs too (from what I've seen)
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
@@ -726,6 +727,7 @@ void Tune::tune() {
       configsUpdate(current_cost, best_cost, 0.000, "FAST_BARRIER", best_fast_barrier, newConfigKeyVals, suggestedConfigKeyVals);
       args->flags["FAST_BARRIER"] = to_string(best_fast_barrier);
     }
+#endif
 
     // Find best TAIL_KERNELS setting
     if (1) {
@@ -1033,12 +1035,53 @@ void Tune::tune() {
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_wmul = wmul; }
       }
       log("Best WMUL is %u.  Default WMUL is 2.\n", best_wmul);
-      configsUpdate(current_cost, best_cost, 0.003, "WMUL", best_wmul, newConfigKeyVals, suggestedConfigKeyVals);
+      configsUpdate(current_cost, best_cost, 0.000, "WMUL", best_wmul, newConfigKeyVals, suggestedConfigKeyVals);
       args->flags["WMUL"] = to_string(best_wmul);
     }
 
+    // Find best MULTI_Q setting
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_multi_q = 0;
+      u32 current_multi_q = args->value("MULTI_Q", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 multi_q : {0, 1}) {
+        args->flags["MULTI_Q"] = to_string(multi_q);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using MULTI_Q=%u is %6.1f\n", fft.spec().c_str(), multi_q, cost);
+        if (multi_q == current_multi_q) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_multi_q = multi_q; }
+      }
+      log("Best MULTI_Q is %u.  Default MULTI_Q is 0.\n", best_multi_q);
+      configsUpdate(current_cost, best_cost, 0.000, "MULTI_Q", best_multi_q, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["MULTI_Q"] = to_string(best_multi_q);
+    }
+
     // Find best CUDA compiler options
 #if CUDA_BACKEND
+    // Find best GRAPHS setting
+    if (1) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_graphs = 0;
+      u32 current_graphs = args->value("GRAPHS", 1);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 graphs : {0, 1}) {
+        args->flags["GRAPHS"] = to_string(graphs);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using GRAPHS=%u is %6.1f\n", fft.spec().c_str(), graphs, cost);
+        if (graphs == current_graphs) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_graphs = graphs; }
+      }
+      log("Best GRAPHS is %u.  Default GRAPHS is 1.\n", best_graphs);
+      configsUpdate(current_cost, best_cost, 0.000, "GRAPHS", best_graphs, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["GRAPHS"] = to_string(best_graphs);
+    }
+
+    // See if disabling our default register usage makes sense
     if (0) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());

From 8de0c2194fb7585aa8d1c1c287fc0cfcd320b8a1 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 20 Jul 2026 18:15:45 +0000
Subject: [PATCH 089/214] Fixed issues from merging tdulcet's Clang fixes.

---
 src/Gpu.cpp              | 10 +++++-----
 src/clwrap.cpp           |  2 +-
 src/cuda/clwrap_cuda.cpp |  6 +++---
 src/log.cpp              |  2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index a1c78c27..dd4e11b0 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1636,7 +1636,7 @@ for (u32 i = 0; i < size; ++i) { r.emplace_back(timeBufVect, &queue, N); }
 pair<RoeInfo, RoeInfo> Gpu::readROE() {
   assert(roePos <= ROE_SIZE);
   if (roePos) {
-    vector<float> const roe = bufROE.read(roePos + 2);
+    vector<float> roe = bufROE.read(roePos + 2);
     assert(roe.size() == roePos + 2);
     // Split the roe buffer into two.  One for squarings and one for multiplications.  This is likely overkill as the multiplication ROE is not used - though
     // it could be useful for debugging (in which case we could support getting roe for squarings or multipplications, but not both).
@@ -1651,15 +1651,15 @@ pair<RoeInfo, RoeInfo> Gpu::readROE() {
     roePos = 0;
     mulRoePos.clear();
     return {roeStat(squareRoe), roeStat(mulRoe)};
-  } 
+  } else {
     return {};
- 
+  }
 }
 
 RoeInfo Gpu::readCarryStats() {
   assert(carryPos <= CARRY_SIZE);
   if (carryPos == 0) { return {}; }
-  vector<float> const carry = bufStatsCarry.read(carryPos + 2);
+  vector<float> carry = bufStatsCarry.read(carryPos + 2);
   assert(carry.size() == carryPos + 2);
   // Delete first two used to calculate carryPos on the GPU.
   carry[0] = carry[carryPos];
@@ -2131,7 +2131,7 @@ bool Gpu::equals9(const Words& a) {
   return true;
 }
 
-static int ulps(double a, double b) {
+[[maybe_unused]] static int ulps(double a, double b) {
   if (a == 0 && b == 0) { return 0; }
 
   u64 const aa = as<u64>(a);
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 8b6a506e..aab635c5 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -448,7 +448,7 @@ cl_context getQueueContext(cl_command_queue q) {
   return ret;
 }
 
-static cl_device_id getQueueDevice(cl_command_queue q) {
+[[maybe_unused]] static cl_device_id getQueueDevice(cl_command_queue q) {
   cl_device_id id;
   CHECK1(clGetCommandQueueInfo(q, CL_QUEUE_DEVICE, sizeof(id), &id, nullptr));
   return id;
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 2bc53626..ceb91038 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -707,7 +707,7 @@ cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id
 
 // ---- Enqueue operations ----
 
-int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned  /*workDim*/,
+int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
                             const size_t*  /*globalOffset*/, const size_t* globalSize,
                             const size_t* localSize, unsigned  /*nWaits*/,
                             const cl_event*  /*waits*/, cl_event* event) {
@@ -751,7 +751,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned  /*workDim*
     if (!pStart) { cuEventCreate(&pStart, CU_EVENT_DEFAULT); cuEventCreate(&pEnd, CU_EVENT_DEFAULT); }
 
     cuEventRecord(pStart, q->stream);
-    CUresult cosnt r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult const r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
     cuEventRecord(pEnd, q->stream);
     cuEventSynchronize(pEnd);
     float ms = 0;
@@ -1127,7 +1127,7 @@ int clSetKernelArgSVMPointer(cl_kernel k, unsigned pos, const void* ptr) {
 // Computes the minimum address span covering all buffers, then sets one access policy
 // window with hitRatio sized so that only the actual buffer bytes get persisting treatment,
 // not the gaps between non-contiguous allocations.
-static void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
+[[maybe_unused]] static void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
   if (!q) return;
 
   // Find address span and total data size
diff --git a/src/log.cpp b/src/log.cpp
index 0f80be05..a5639251 100644
--- a/src/log.cpp
+++ b/src/log.cpp
@@ -20,7 +20,7 @@ void initLog(const char *logName) {
   logFile = File::openAppend(logName);
 }
 
-static string longTimeStr()  { return timeStr("%Y-%m-%d %H:%M:%S %Z"); }
+[[maybe_unused]] static string longTimeStr()  { return timeStr("%Y-%m-%d %H:%M:%S %Z"); }
 string shortTimeStr() { return timeStr("%Y%m%d %H:%M:%S"); }
 
 static char logBuf[32 * 1024];

From a5c96af835174d2bdd185efcd12bf9e584445d10 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 20 Jul 2026 18:55:55 +0000
Subject: [PATCH 090/214] Fixed issue with CUDA graps on CUDA 11
 (cuGraphInstantiate interface changes from CUDA 11 to 12)

---
 src/cuda/clwrap_cuda.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index ceb91038..f8f35fa2 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -1202,7 +1202,11 @@ int clGraphEndRecording(cl_command_queue q, cl_graph* graph) {
   auto* g = new _cl_graph;
   g->queue = q;
   CUresult r = cuStreamEndCapture(q->stream, &g->graph);
+#if CUDA_VERSION >= 12000
   if (r == CUDA_SUCCESS) r = cuGraphInstantiate(&g->graphExec, g->graph, 0);
+#else
+  if (r == CUDA_SUCCESS) r = cuGraphInstantiateWithFlags(&g->graphExec, g->graph, 0);
+#endif
   *graph = g;
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
 }

From 1bf3bd630f3825e6cd1c42acc2a8ee5f026b2e2c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 21 Jul 2026 00:04:46 +0000
Subject: [PATCH 091/214] Fixed a lot of Windows MSVC compiler warning
 messages. Lots of size_t/u32 and automatic conversion from larger to smaller
 data type issues. Not all warnings fixed

---
 src/Buffer.h             |  2 +-
 src/FFTConfig.h          |  2 +-
 src/File.cpp             |  2 +-
 src/File.h               | 26 +++++++++++++-------------
 src/Gpu.cpp              | 34 +++++++++++++++++-----------------
 src/Gpu.h                |  4 ++--
 src/Hash.h               | 10 +++++-----
 src/KernelCompiler.cpp   |  6 +++---
 src/Proof.cpp            | 28 ++++++++++++++--------------
 src/Queue.cpp            |  8 ++++----
 src/Queue.h              | 10 +++++-----
 src/TrigBufCache.cpp     | 10 +++++-----
 src/TuneEntry.cpp        |  2 +-
 src/clwrap.cpp           | 18 +++++++++---------
 src/cuda/clwrap_cuda.cpp | 14 +++++++-------
 src/shared.h             |  5 +++--
 src/state.cpp            |  4 +---
 src/state.h              |  2 +-
 src/tinycl.h             |  2 +-
 src/tune.cpp             | 36 ++++++++++++++++++------------------
 src/typeName.h           |  2 +-
 21 files changed, 113 insertions(+), 114 deletions(-)

diff --git a/src/Buffer.h b/src/Buffer.h
index 8e76dca1..b7796261 100644
--- a/src/Buffer.h
+++ b/src/Buffer.h
@@ -35,7 +35,7 @@ class Buffer {
     , tInfo{tInfo}
   {}
 
-  void fill(T value, u32 sizeOrFull = 0) {
+  void fill(T value, size_t sizeOrFull = 0) {
     assert(sizeOrFull <= size);
     auto fillSize = sizeOrFull ? sizeOrFull : size;
     queue->fillBuf(get(), value, fillSize * sizeof(T), tInfo);
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index 5bc719e7..3863ec19 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -92,7 +92,7 @@ struct FFTConfig {
   FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry);
 
   [[nodiscard]] std::string spec() const;
-  [[nodiscard]] u64 size() const { return shape.size(); }
+  [[nodiscard]] u32 size() const { return shape.size(); }
   [[nodiscard]] u64 maxExp()  const { return u64(maxBpw() * shape.size()); }
 
   [[nodiscard]] float minBpw() const { return shape.minBpw(); }
diff --git a/src/File.cpp b/src/File.cpp
index 56d258b1..fd04256e 100644
--- a/src/File.cpp
+++ b/src/File.cpp
@@ -36,7 +36,7 @@ File::~File() {
   f = nullptr;
 }
 
-i64 File::size(const fs::path &name) {
+u64 File::size(const fs::path &name) {
   error_code dummy;
   return filesystem::file_size(name, dummy);
 }
diff --git a/src/File.h b/src/File.h
index fdc3e3ac..03c7a86e 100644
--- a/src/File.h
+++ b/src/File.h
@@ -8,7 +8,7 @@
 #include <cstdio>
 #include <cstdarg>
 #include <cassert>
-#ifndef _MSC_VER		// unistd.h does not exist for MSVC
+#ifndef _MSC_VER                // unistd.h does not exist for MSVC
 #include <unistd.h>
 #endif
 #include <filesystem>
@@ -60,9 +60,9 @@ class File {
   
   File(const fs::path &path, const string& mode, bool throwOnError);
 
-  bool readNoThrow(void* data, u32 nBytes) const { return fread(data, nBytes, 1, this->get()); }
+  bool readNoThrow(void* data, size_t nBytes) const { return fread(data, nBytes, 1, this->get()); }
   
-  void read(void* data, u32 nBytes) const {
+  void read(void* data, size_t nBytes) const {
     if (!readNoThrow(data, nBytes)) { throw ReadError{name}; }
   }
 
@@ -89,7 +89,7 @@ class File {
 public:
   const std::string name;
 
-  static i64 size(const fs::path& name);
+  static u64 size(const fs::path& name);
 
   static File openRead(const fs::path& name) { return File{name, "rb", false}; }
   static File openReadThrow(const fs::path& name) { return File{name, "rb", true}; }
@@ -142,7 +142,7 @@ class File {
   template<typename T>
   void write(const T& x) const { write(&x, sizeof(T)); }
 
-  void write(const void* data, u32 nBytes) const {
+  void write(const void* data, size_t nBytes) const {
     if (!fwrite(data, nBytes, 1, this->get())) { throw WriteError{name}; }
   }
   
@@ -177,7 +177,7 @@ class File {
   
   void write(const string& s) { write(string_view(s)); }
   void write(const char* s) { write(string_view(s)); }
-  void write(string_view s) { write(s.data(), u32(s.size())); }
+  void write(string_view s) { write(s.data(), s.size()); }
 
   operator bool() const { return f != nullptr; }
   [[nodiscard]] FILE* get() const { return f; }
@@ -223,7 +223,7 @@ class File {
   }
 
   template<typename T>
-  [[nodiscard]] [[nodiscard]] std::vector<T> read(u32 nWords) const {
+  [[nodiscard]] std::vector<T> read(size_t nWords) const {
     vector<T> ret;
     ret.resize(nWords);
     read(ret.data(), nWords * sizeof(T));
@@ -231,7 +231,7 @@ class File {
   }
 
   template<typename T>
-  [[nodiscard]] std::vector<T> readChecked(u32 nWords) const {
+  [[nodiscard]] std::vector<T> readChecked(size_t nWords) const {
     u32 const expectedCRC = read<u32>(1)[0];
     return readWithCRC<T>(nWords, expectedCRC);
   }
@@ -243,7 +243,7 @@ class File {
   }
 
   template<typename T>
-  [[nodiscard]] std::vector<T> readWithCRC(u32 nWords, u32 crc) const {
+  [[nodiscard]] std::vector<T> readWithCRC(size_t nWords, u32 crc) const {
     auto data = read<T>(nWords);
     if (crc != crc32(data)) {
       log("File '%s' : CRC: expected %u, actual %u\n", name.c_str(), crc, crc32(data));
@@ -252,18 +252,18 @@ class File {
     return data;
   }
 
-  std::vector<u32> readBytesLE(u32 nBytes) {
+  std::vector<u32> readBytesLE(size_t nBytes) {
     assert(nBytes > 0);
-    u32 const nWords = (nBytes - 1) / 4 + 1;
+    size_t const nWords = (nBytes - 1) / 4 + 1;
     vector<u32> data(nWords);
     read(data.data(), nBytes);
     return data;
   }
 
-  u32 readUpTo(void* data, u32 nUpToBytes) { return u32(fread(data, 1, nUpToBytes, this->get())); }
+  size_t readUpTo(void* data, size_t nUpToBytes) { return fread(data, 1, nUpToBytes, this->get()); }
 
   string readAll() {
-    u32 const sz = u32(size());
+    u64 const sz = size();
     return {read<char>(sz).data(), sz};
   }
 };
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index dd4e11b0..5c01d6e6 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -73,19 +73,19 @@ double invWeightM1(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
 double boundUnderOne(double x) { return std::min(x, nexttoward(1, 0)); }
 
 float weight32(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2((double)(extra(N, E, kAt(H, line, col) + rep)) / N);
+  return float(exp2((double)(extra(N, E, kAt(H, line, col) + rep)) / N));
 }
 
 float invWeight32(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return exp2(-(double)(extra(N, E, kAt(H, line, col) + rep)) / N);
+  return float(exp2(-(double)(extra(N, E, kAt(H, line, col) + rep)) / N));
 }
 
 float weightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return expm1(M_LN2 * (double)(extra(N, E, kAt(H, line, col) + rep)) / N);
+  return float(expm1(M_LN2 * (double)(extra(N, E, kAt(H, line, col) + rep)) / N));
 }
 
 float invWeightM132(u32 N, u64 E, u32 H, u32 line, u32 col, u32 rep) {
-  return expm1(M_LN2 * - (double)(extra(N, E, kAt(H, line, col) + rep)) / N);
+  return float(expm1(M_LN2 * - (double)(extra(N, E, kAt(H, line, col) + rep)) / N));
 }
 
 Weights genWeights(FFTConfig fft, u64 E, u32 W, u32 H, u32 nW, bool nvidiaGpu) {
@@ -353,8 +353,8 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
   string defines = toDefine(config);
   if (doLog) { log("config: %s\n", defines.c_str()); }
 
+  defines += toDefine("EXP", u32(E));   // FIX THIS when openCL code supports 64-bit exponents!!!
   defines += toDefine(initializer_list<pair<string, u32>>{
-                    {"EXP", E},
                     {"WIDTH", fft.shape.width},
                     {"SMALL_HEIGHT", fft.shape.height},
                     {"MIDDLE", fft.shape.middle},
@@ -498,7 +498,7 @@ RoeInfo roeStat(const vector<float>& roe) {
     sumRoe  += x;
     sum2Roe += x * x;
   }
-  u32 const n = roe.size();
+  u32 const n = u32(roe.size());
 
   double const sdRoe = sqrt(n * sum2Roe - sumRoe * sumRoe) / n;
   double const meanRoe = sumRoe / n;
@@ -514,7 +514,7 @@ class IterationTimer {
   explicit IterationTimer(u64 kStart) : kStart(kStart) { }
 
   float reset(u64 k) {
-    float const secs = timer.reset();
+    float const secs = float(timer.reset());
 
     u64 const its = max(u64(1), k - kStart);
     kStart = k;
@@ -1642,7 +1642,7 @@ pair<RoeInfo, RoeInfo> Gpu::readROE() {
     // it could be useful for debugging (in which case we could support getting roe for squarings or multipplications, but not both).
     auto [squareRoe, mulRoe] = split(roe, mulRoePos);
     // Delete first two used to calculate roePos on the GPU.  Do this after splitting the vector (mulRoePos recorded indices in "+ 2" format).
-    u32 squareRoeSize = squareRoe.size() - 2;
+    u32 squareRoeSize = u32(squareRoe.size()) - 2;
     roe[0] = squareRoe[squareRoeSize];
     roe[1] = squareRoe[squareRoeSize+1];
     squareRoe.resize(squareRoeSize);
@@ -2018,7 +2018,7 @@ void Gpu::square(Buffer<Word>& out, Buffer<Word>& in, enum LEAD_TYPE leadIn, enu
   }
 }
 
-u32 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3) {
+u64 Gpu::squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3) {
   assert(from < to);
   enum LEAD_TYPE leadIn = LEAD_NONE;
   for (u64 k = from; k < to; ++k) {
@@ -2076,7 +2076,7 @@ static string formatETA(u32 secs) {
   return string(buf);  
 }
 
-static string getETA(u32 step, u32 total, float secsPerStep) {
+static string getETA(u64 step, u64 total, float secsPerStep) {
   u32 const etaSecs = max(0u, u32((total - step) * secsPerStep));
   return formatETA(etaSecs);
 }
@@ -2119,7 +2119,7 @@ void Gpu::doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u3
 
   RoeInfo const carryStats = readCarryStats();
   if (carryStats.N > 2) {
-    u32 const m = ldexp(carryStats.max, 32);
+    u32 const m = u32(ldexp(carryStats.max, 32));
     double const z = carryStats.z();
     log("Carry: %x Z(%u)=%.1f\n", m, carryStats.N, z);
   }
@@ -2137,7 +2137,7 @@ bool Gpu::equals9(const Words& a) {
   u64 const aa = as<u64>(a);
   u64 const bb = as<u64>(b);
   bool const sameSign = (aa >> 63) == (bb >> 63);
-  int const delta = sameSign ? bb - aa : bb + aa;
+  int const delta = int(sameSign ? bb - aa : bb + aa);
   return delta;
 }
 
@@ -2196,7 +2196,7 @@ void Gpu::selftestTrig() {
       [[maybe_unused]] i64 const prev = 0;
       u64 min = -1;
       u64 sum = 0;
-      for (long const x : times) {
+      for (i64 const x : times) {
         
 #if 0
         if (x != prev) {
@@ -2227,12 +2227,12 @@ static void doDiv3(u64 E, Words& words) {
   assert(topBits > 0 && topBits < 32);
   {
     u64 const w = (u64(r) << topBits) + words.back();
-    words.back() = w / 3;
+    words.back() = u32(w / 3);
     r = w % 3;
   }
   for (auto it = words.rbegin() + 1, end = words.rend(); it != end; ++it) {
     u64 const w = (u64(r) << 32) + *it;
-    *it = w / 3;
+    *it = u32(w / 3);
     r = w % 3;
   }
 }
@@ -2645,7 +2645,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
       log("   %9" PRIu64 " %016" PRIx64 " %s\n", k, res, formatSecsPerIter(secsPerIt).c_str());
       RoeInfo const carryStats = readCarryStats();
       if (carryStats.N) {
-        u32 const m = ldexp(carryStats.max, 32);
+        u32 const m = u32(ldexp(carryStats.max, 32));
         double const z = carryStats.z();
         log("Carry: %x Z(%u)=%.1f\n", m, carryStats.N, z);
       }
@@ -2832,7 +2832,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
     if (k >= kEnd) {
       fs::remove (fname);
-      return std::move(SHA3{}.update(data.data(), (E-1)/8+1)).finish();
+      return std::move(SHA3{}.update(data.data(), u32((E-1)/8+1))).finish();
     }
 
     if (doStop) { throw "stop requested"; }
diff --git a/src/Gpu.h b/src/Gpu.h
index 107732c0..ba350c71 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -265,8 +265,8 @@ class Gpu {
   void squareCERT(Buffer<Word>& io, enum LEAD_TYPE leadIn, enum LEAD_TYPE leadOut) { square(io, io, leadIn, leadOut, false, false); }
   void squareLL(Buffer<Word>& io, enum LEAD_TYPE leadIn, enum LEAD_TYPE leadOut) { square(io, io, leadIn, leadOut, false, true); }
 
-  u32 squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3);
-  u32 squareLoop(Buffer<Word>& io, u64 from, u64 to) { return squareLoop(io, io, from, to, false); }
+  u64 squareLoop(Buffer<Word>& out, Buffer<Word>& in, u64 from, u64 to, bool doTailMul3);
+  u64 squareLoop(Buffer<Word>& io, u64 from, u64 to) { return squareLoop(io, io, from, to, false); }
 
   bool isEqual(Buffer<Word>& bufCheck, Buffer<Word>& bufAux);
   u64 bufResidue(Buffer<Word>& buf);
diff --git a/src/Hash.h b/src/Hash.h
index 5144db17..87a9aa25 100644
--- a/src/Hash.h
+++ b/src/Hash.h
@@ -20,15 +20,15 @@ class Hash {
   Hash& update(const void* data, u32 size) { h.update(data, size); return *this; }
 
   template<typename T, std::size_t N>
-  Hash&& update(const array<T, N>& v) && { h.update(v.data(), N * sizeof(T)); return std::move(*this); }
+  Hash&& update(const array<T, N>& v) && { h.update(v.data(), u32(N * sizeof(T))); return std::move(*this); }
 
-  void update(u32 x) { h.update(&x, sizeof(x)); }
-  void update(u64 x) { h.update(&x, sizeof(x)); }
+  void update(u32 x) { h.update(&x, u32(sizeof(x))); }
+  void update(u64 x) { h.update(&x, u32(sizeof(x))); }
 
   template<typename T>
-  void update(const vector<T>& v) { h.update(v.data(), v.size() * sizeof(T)); }
+  void update(const vector<T>& v) { h.update(v.data(), u32(v.size() * sizeof(T))); }
 
-  void update(const string& s) {h.update(s.c_str(), s.size()); }
+  void update(const string& s) {h.update(s.c_str(), u32(s.size())); }
   
   auto finish() && { return std::move(h).finish(); }
 };
diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index a5885227..e5d22520 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -45,7 +45,7 @@ KernelCompiler::KernelCompiler(const Args& args, const Context* context, const s
   auto& clNames = getClFileNames();
   auto& clFiles = getClFiles();
   assert(clNames.size() == clFiles.size());
-  int const n = clNames.size();
+  int const n = int(clNames.size());
   for (int i = 0; i < n; ++i) {
     auto &src = clFiles[i];
     files.emplace_back(clNames[i], src);
@@ -68,12 +68,12 @@ Program KernelCompiler::compile(const string& fileName, const string& extraArgs)
   }
 #ifdef CUDA_BACKEND
   int err = clCompileProgram(p1.get(), 1, &deviceId, args.c_str(),
-                             clSources.size(), (const cl_program*) (clSources.data()), getClFileNames().data(),
+                             u32(clSources.size()), (const cl_program*) (clSources.data()), getClFileNames().data(),
                              nullptr, nullptr);
 #else
   // Skip first file (opencl_compat.cuh) if this is a standard openCL application rather than a CUDA translation
   int err = clCompileProgram(p1.get(), 1, &deviceId, args.c_str(),
-                             clSources.size()-1, (const cl_program*) (clSources.data()+1), getClFileNames().data()+1,
+                             u32(clSources.size())-1, (const cl_program*) (clSources.data()+1), getClFileNames().data()+1,
                              nullptr, nullptr);
 #endif
   if (string const mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
diff --git a/src/Proof.cpp b/src/Proof.cpp
index 1d395954..e8b3b81a 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -21,19 +21,19 @@
 namespace proof {
 
 array<u64, 4> hashWords(u64 E, const Words& words) {
-  return std::move(SHA3{}.update(words.data(), (E-1)/8+1)).finish();
+  return std::move(SHA3{}.update(words.data(), u32((E-1)/8+1))).finish();
 }
 
 array<u64, 4> hashWords(u64 E, array<u64, 4> prefix, const Words& words) {
-  return std::move(SHA3{}.update(prefix).update(words.data(), (E-1)/8+1)).finish();
+  return std::move(SHA3{}.update(prefix).update(words.data(), u32((E-1)/8+1))).finish();
 }
 
 string fileHash(const fs::path& filePath) {
   File fi = File::openReadThrow(filePath);
   char buf[64 * 1024];
   MD5 h;
-  u32 size = 0;
-  while ((size = fi.readUpTo(buf, sizeof(buf)))) { h.update(buf, size); }
+  size_t size = 0;
+  while ((size = fi.readUpTo(buf, sizeof(buf)))) { h.update(buf, u32(size)); }
   return std::move(h).finish();
 }
 
@@ -56,13 +56,13 @@ ProofInfo getInfo(const fs::path& proofFile) {
 
 fs::path Proof::file(const fs::path& proofDir) const {
   string const strE = to_string(E);
-  u32 const power = middles.size();
+  u32 const power = u32(middles.size());
   return proofDir / (strE + '-' + to_string(power) + ".proof");  
 }
 
 void Proof::save(const fs::path& proofFile) const {
   File const fo = File::openWrite(proofFile);
-  u32 const power = middles.size();
+  u32 const power = u32(middles.size());
   fo.printf(HEADER_v2, power, E, '\n');
   fo.write(B.data(), (E-1)/8+1);
   for (const Words& w : middles) { fo.write(w.data(), (E-1)/8+1); }
@@ -77,7 +77,7 @@ Proof Proof::load(const fs::path& path) {
     log("Proof file '%s' has invalid header\n", path.string().c_str());
     throw "Invalid proof header";
   }
-  u32 const nBytes = (E - 1) / 8 + 1;
+  u32 const nBytes = u32((E - 1) / 8 + 1);
   Words const B = fi.readBytesLE(nBytes);
   vector<Words> middles;
   middles.reserve(power);
@@ -89,7 +89,7 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   // log("B         %016" PRIx64 "\n", res64(B));
   // for (u32 i = 0; i < middles.size(); ++i) { log("Middle[%u] %016" PRIx64 "\n", i, res64(middles[i])); }
 
-  u32 const power = middles.size();
+  u32 const power = u32(middles.size());
   assert(power > 0);
 
   bool const isPrime = (B == makeWords(E, 9));
@@ -118,7 +118,7 @@ bool Proof::verify(Gpu *gpu, const vector<u64>& hashes) const {
   }
     
   log("proof verification: doing %" PRIu64 " iterations\n", span);
-  A = gpu->expExp2(A, span);
+  A = gpu->expExp2(A, u32(span));
 
   bool const ok = (A == B);
   if (ok) {
@@ -149,18 +149,18 @@ ProofSet::ProofSet(u64 E, u32 power)
   u32 p;
   u64 span;
   for (p = 0, span = (E + 1) / 2; p < power; ++p, span = (span + 1) / 2) {
-    for (u32 i = 0, end = points.size(); i < end; ++i) {
+    for (u32 i = 0, end = u32(points.size()); i < end; ++i) {
       points.push_back(points[i] + span);
     }
   }
 
-  assert(points.size() == (1u << power));
+  assert(u32(points.size()) == (1u << power));
   assert(points.front() == 0);
 
   points.front() = E;
   std::ranges::sort(points);
 
-  assert(points.size() == (1u << power));
+  assert(u32(points.size()) == (1u << power));
   assert(points.back() == E);
 
   points.push_back(u32(-1)); // guard element
@@ -200,7 +200,7 @@ u32 ProofSet::bestPower(u64 E) {
 
   assert(E > 0);
   // log2(x)/2 is log4(x)
-  int const power = 10 + floor(log2(E / 60e6) / 2);
+  int const power = int(10 + floor(log2(double(E) / 60e6) / 2));
   assert(power >= 2);
   return power;
 }
@@ -222,7 +222,7 @@ u32 ProofSet::effectivePower(u64 E, u32 power, u64 currentK) {
 }
     
 bool ProofSet::fileExists(u64 k) const {
-  return File::size(proofPath(E) / to_string(k)) == i64(E / 32 + 2) * 4;
+  return File::size(proofPath(E) / to_string(k)) == (E / 32 + 2) * 4;
 }
 
 bool ProofSet::isValidTo(u64 limitK) const {
diff --git a/src/Queue.cpp b/src/Queue.cpp
index 56338157..1fbd79d6 100644
--- a/src/Queue.cpp
+++ b/src/Queue.cpp
@@ -39,7 +39,7 @@ void Queue::writeTE(cl_mem buf, u64 size, const void* data, TimeInfo* tInfo) {
   events.synced();
 }
 
-void Queue::fillBufTE(cl_mem buf, u32 patSize, const void* pattern, u64 size, TimeInfo* tInfo) {
+void Queue::fillBufTE(cl_mem buf, size_t patSize, const void* pattern, size_t size, TimeInfo* tInfo) {
   add(::fillBuf(get(), {}, buf, pattern, patSize, size, hasEvents), tInfo);
 }
 
@@ -61,16 +61,16 @@ void Queue::add(EventHolder&& e, TimeInfo* ti) {
   if (queueCount >= MAX_QUEUE_COUNT) queueMarkerEvent();
 }
 
-void Queue::readSync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo) {
+void Queue::readSync(cl_mem buf, size_t size, void* out, TimeInfo* tInfo) {
   add(read(get(), {}, true, buf, size, out, hasEvents), tInfo);
   events.synced();
 }
 
-void Queue::readAsync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo) {
+void Queue::readAsync(cl_mem buf, size_t size, void* out, TimeInfo* tInfo) {
   add(read(get(), {}, false, buf, size, out, hasEvents), tInfo);
 }
 
-void Queue::copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo) {
+void Queue::copyBuf(cl_mem src, cl_mem dst, size_t size, TimeInfo* tInfo) {
   add(::copyBuf(get(), {}, src, dst, size, hasEvents), tInfo);
 }
 
diff --git a/src/Queue.h b/src/Queue.h
index 603a6c3c..65643251 100644
--- a/src/Queue.h
+++ b/src/Queue.h
@@ -26,7 +26,7 @@ class Queue : public QueueHolder {
   bool isAuxQueue;
 
   void writeTE(cl_mem buf, u64 size, const void* data, TimeInfo *tInfo);
-  void fillBufTE(cl_mem buf, u32 patSize, const void* pattern, u64 size, TimeInfo* tInfo);
+  void fillBufTE(cl_mem buf, size_t patSize, const void* pattern, size_t size, TimeInfo* tInfo);
   void flush();
   void print();
   void add(EventHolder &&e, TimeInfo* ti);
@@ -43,12 +43,12 @@ class Queue : public QueueHolder {
   void write(cl_mem buf, const vector<T>& v, TimeInfo* tInfo) { writeTE(buf, v.size() * sizeof(T), v.data(), tInfo); }
 
   template<typename T>
-  void fillBuf(cl_mem buf, T pattern, u32 size, TimeInfo* tInfo) { fillBufTE(buf, sizeof(T), &pattern, size, tInfo); }
+  void fillBuf(cl_mem buf, T pattern, size_t size, TimeInfo* tInfo) { fillBufTE(buf, sizeof(T), &pattern, size, tInfo); }
 
   void run(cl_kernel kernel, size_t groupSizeX, size_t workSizeX, size_t workSizeY, TimeInfo* tInfo);
-  void readSync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo);
-  void readAsync(cl_mem buf, u32 size, void* out, TimeInfo* tInfo);
-  void copyBuf(cl_mem src, cl_mem dst, u32 size, TimeInfo* tInfo);
+  void readSync(cl_mem buf, size_t size, void* out, TimeInfo* tInfo);
+  void readAsync(cl_mem buf, size_t size, void* out, TimeInfo* tInfo);
+  void copyBuf(cl_mem src, cl_mem dst, size_t size, TimeInfo* tInfo);
   void finish();
 
   EventHolder createSyncEvent() { if (!isAuxQueue && !graphRecording) queueCount++; return enqueueMarker(get()); }  // Enqueue a synchronization event.  Used to sync work among multiple queues.
diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index 933e3116..d46d6082 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -303,9 +303,9 @@ static float trigError(float c, float s) { return abs(trigNorm(c, s) - 1.0f); }
 
 // Round trig double to float as to satisfy c^2 + s^2 == 1 as best as possible
 static float2 roundTrig(double lc, double ls) {
-  float const c1 = lc;
+  float const c1 = float(lc);
   float const c2 = nexttoward(c1, lc);
-  float const s1 = ls;
+  float const s1 = float(ls);
   float const s2 = nexttoward(s1, ls);
 
   float c = c1;
@@ -858,7 +858,7 @@ static vector<ulong2> genMiddleTrigGF61(u32 smallH, u32 middle, u32 width) {
 
 static vector<double2> genSmallTrig(FFTConfig fft, u32 size, u32 radix) {
   vector<double2> tab;
-  u32 tabsize;
+  size_t tabsize;
 
   if (fft.FFT_FP64) {
     tab = genSmallTrigFP64(size, radix);
@@ -897,7 +897,7 @@ static vector<double2> genSmallTrig(FFTConfig fft, u32 size, u32 radix) {
 
 static vector<double2> genSmallTrigCombo(Args *args, FFTConfig fft, u32 width, u32 middle, u32 size, u32 radix, bool tail_single_wide) {
   vector<double2> tab;
-  u32 tabsize;
+  size_t tabsize;
 
   if (fft.FFT_FP64) {
     tab = genSmallTrigComboFP64(args, width, middle, size, radix, tail_single_wide);
@@ -936,7 +936,7 @@ static vector<double2> genSmallTrigCombo(Args *args, FFTConfig fft, u32 width, u
 
 static vector<double2> genMiddleTrig(FFTConfig fft, u32 smallH, u32 middle, u32 width) {
   vector<double2> tab;
-  u32 tabsize;
+  size_t tabsize;
 
   if (fft.FFT_FP64) {
     tab = genMiddleTrigFP64(smallH, middle, width);
diff --git a/src/TuneEntry.cpp b/src/TuneEntry.cpp
index e1a0900b..1ad420ea 100644
--- a/src/TuneEntry.cpp
+++ b/src/TuneEntry.cpp
@@ -10,7 +10,7 @@ bool TuneEntry::update(vector<TuneEntry>& results) const {
   u64 const maxExp = fft.maxExp();
   [[maybe_unused]] bool didErase = false;
 
-  int i{};
+  size_t i{};
   for (i = results.size() - 1; i >= 0 && results[i].cost > cost; --i) {
     if (results[i].fft.maxExp() <= maxExp) {
       results.erase(std::next(results.begin(), i));
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index aab635c5..3305f6c2 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -144,7 +144,7 @@ float getGpuRamGB(cl_device_id id) {
   try {
     u64 totSize = 0; 
     GET_INFO(id, CL_DEVICE_GLOBAL_MEM_SIZE, totSize);
-    return ldexp(totSize, -30); // to GB
+    return float(ldexp(totSize, -30)); // to GB
   } catch (const gpu_error& err) {
   }
   return 0;
@@ -333,7 +333,7 @@ EventHolder run(cl_queue queue, cl_kernel kernel,
   size_t workSizes[2] = {workSizeX, workSizeY};
   size_t groupSizes[2] = {groupSizeX, 1};
   CHECK2(clEnqueueNDRangeKernel(queue, kernel, workSizeY == 1 ? 1 : 2, nullptr, workSizes, groupSizes,
-                                waits.size(), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr),
+                                u32(waits.size()), waits.empty() ? 0 : waits.data(), genEvent ? &event : nullptr),
          name.c_str());
   return genEvent ? EventHolder{event} : EventHolder{};
 }
@@ -343,7 +343,7 @@ EventHolder read(cl_queue queue, vector<cl_event>&& waits,
   size_t const start = 0;
   cl_event event{};
   CHECK1(clEnqueueReadBuffer(queue, buf, blocking, start, size, data,
-                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
+                             u32(waits.size()), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -352,7 +352,7 @@ EventHolder write(cl_queue queue, vector<cl_event>&& waits,
   size_t const start = 0;
   cl_event event{};
   CHECK1(clEnqueueWriteBuffer(queue, buf, blocking, start, size, data,
-                              waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
+                              u32(waits.size()), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -360,7 +360,7 @@ EventHolder copyBuf(cl_queue queue, vector<cl_event>&& waits,
                     const cl_mem src, cl_mem dst, size_t size, bool genEvent) {
   cl_event event{};
   CHECK1(clEnqueueCopyBuffer(queue, src, dst, 0, 0, size,
-                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
+                             u32(waits.size()), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -369,7 +369,7 @@ EventHolder fillBuf(cl_queue q, vector<cl_event>&& waits,
   assert(size);
   cl_event event{};
   CHECK1(clEnqueueFillBuffer(q, buf, pat, patSize, 0 /*start*/, size,
-                             waits.size(), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
+                             u32(waits.size()), waits.empty() ? nullptr : waits.data(), genEvent ? &event : nullptr));
   return genEvent ? EventHolder{event} : EventHolder{};
 }
 
@@ -381,13 +381,13 @@ EventHolder enqueueMarker(cl_queue q) {
 
 EventHolder enqueueMarkerWithWaits(cl_queue q, vector<cl_event>&& waits) {
   cl_event event{};
-  CHECK1(clEnqueueMarkerWithWaitList(q, waits.size(), waits.empty() ? nullptr : waits.data(), &event));
+  CHECK1(clEnqueueMarkerWithWaitList(q, u32(waits.size()), waits.empty() ? nullptr : waits.data(), &event));
   return EventHolder{event};
 }
 
 void waitForEvents(vector<cl_event>&& waits) {
   if (!waits.empty()) {
-    CHECK1(clWaitForEvents(waits.size(), waits.data()));
+    CHECK1(clWaitForEvents(u32(waits.size()), waits.data()));
   }
 }
 
@@ -400,7 +400,7 @@ int getKernelNumArgs(cl_kernel k) {
 int getWorkGroupSize(cl_kernel k, cl_device_id device, const char *name) {
   size_t size[3];
   CHECK2(clGetKernelWorkGroupInfo(k, device, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, sizeof(size), &size, nullptr), name);
-  return size[0];
+  return int(size[0]);
 }
 
 std::string getKernelArgName(cl_kernel k, int pos) {
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index f8f35fa2..9d0f6f23 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -112,7 +112,7 @@ unsigned clGetPlatformIDs(unsigned num, cl_platform_id* platforms, unsigned* num
 
 int clGetDeviceIDs(cl_platform_id, cl_device_type, unsigned num, cl_device_id* devices, unsigned* numRet) {
   enumerateDevices();
-  unsigned const n = g_devices.size();
+  unsigned const n = u32(g_devices.size());
   if (numRet) *numRet = n;
   if (devices) {
     for (unsigned i = 0; i < min(num, n); i++) {
@@ -714,12 +714,12 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
   if (!q || !k) return CL_INVALID_VALUE;
   ensureContextCurrent();
 
-  size_t const gsX = globalSize[0];
-  size_t const lsX = localSize ? localSize[0] : 256;
-  size_t const numBlocksX = (gsX + lsX - 1) / lsX;
-  size_t const gsY = (workDim > 1) ? globalSize[1] : 1;
-  size_t const lsY = (workDim > 1) ? localSize[1] : 1;
-  size_t const numBlocksY = (gsY + lsY - 1) / lsY;
+  unsigned int const gsX = u32(globalSize[0]);
+  unsigned int const lsX = u32(localSize ? localSize[0] : 256);
+  unsigned int const numBlocksX = (gsX + lsX - 1) / lsX;
+  unsigned int const gsY = u32((workDim > 1) ? globalSize[1] : 1);
+  unsigned int const lsY = u32((workDim > 1) ? localSize[1] : 1);
+  unsigned int const numBlocksY = (gsY + lsY - 1) / lsY;
 
   // Build args array
   void* argPtrs[_cl_kernel::MAX_ARGS];
diff --git a/src/shared.h b/src/shared.h
index 33ff1113..92899b23 100644
--- a/src/shared.h
+++ b/src/shared.h
@@ -1,4 +1,5 @@
 // included from both C++ and OpenCL.
 
-inline u32 bitposToWord(u64 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
-inline u32 wordToBitpos(u64 E, u32 N, u32 word) { return (word * ( E) + (N - 1)) / N; }
+// NO LONGER USED -- and if it were would need recoding for 64-bit exponents
+//inline u32 bitposToWord(u64 E, u32 N, u32 offset) { return offset * ((u64) N) / E; }
+//inline u32 wordToBitpos(u64 E, u32 N, u32 word) { return (word * (E) + (N - 1)) / N; }
diff --git a/src/state.cpp b/src/state.cpp
index 8ac49307..637aa1cf 100644
--- a/src/state.cpp
+++ b/src/state.cpp
@@ -1,8 +1,6 @@
 // Copyright 2017 Mihai Preda.
 
 #include "state.h"
-#include "shared.h"
-
 #include <cassert>
 
 static i64 lowBits(i64 u, int bits) { return (u << (64 - bits)) >> (64 - bits); }
@@ -10,7 +8,7 @@ static i64 lowBits(i64 u, int bits) { return (u << (64 - bits)) >> (64 - bits);
 std::vector<u32> compactBits(const vector<Word> &dataVect, u64 E) {
   if (dataVect.empty()) { return {}; } // Indicating all zero
 
-  u32 const N = dataVect.size();
+  u32 const N = u32(dataVect.size());
   const Word *data = dataVect.data();
 
   std::vector<u32> out;
diff --git a/src/state.h b/src/state.h
index 02fab3fb..7254e05c 100644
--- a/src/state.h
+++ b/src/state.h
@@ -14,4 +14,4 @@ vector<Word> expandBits(const vector<u32> &compactBits, u32 N, u64 E);
 constexpr u32 step(u32 N, u64 E) { return N - (E % N); }
 constexpr u32 extra(u32 N, u64 E, u32 k) { return u64(step(N, E)) * k % N; }
 constexpr bool isBigWord(u32 N, u64 E, u32 k) { return extra(N, E, k) + step(N, E) < N; }
-constexpr u32 bitlen(u32 N, u64 E, u32 k) { return E / N + isBigWord(N, E, k); }
+constexpr u32 bitlen(u32 N, u64 E, u32 k) { return u32(E / N) + isBigWord(N, E, k); }
diff --git a/src/tinycl.h b/src/tinycl.h
index e4ee49b2..bcca2634 100644
--- a/src/tinycl.h
+++ b/src/tinycl.h
@@ -326,7 +326,7 @@ typedef union
 // native openCL builds, these extension routines basicly do nothing.
 
 struct _cl_graph {};
-typedef _cl_graph* cl_graph;
+using cl_graph = struct _cl_graph *;
 bool clIsGraphSupported(cl_device_id);
 int clGraphBeginRecording(cl_command_queue);
 int clGraphEndRecording(cl_command_queue, cl_graph*);
diff --git a/src/tune.cpp b/src/tune.cpp
index 0231f2e7..37144d71 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -41,7 +41,7 @@ namespace {
 vector<TuneConfig> permute(const vector<pair<string, vector<string>>>& params) {
   vector<TuneConfig> configs;
 
-  int const n = params.size();
+  int const n = int(params.size());
   vector<int> vpos(n);
   while (true) {
     TuneConfig config;
@@ -115,7 +115,7 @@ float Tune::maxBpw(FFTConfig fft) {
   // This doesn't need to be a very accurate estimate.
   // This estimate comes from analyzing a 4M FFT and a 7.5M FFT.
   // The 4M FFT needed a .015 step, the 7.5M FFT needed a .012 step.
-  float bpw_step = .015 + (log2(fft.size()) - log2(4.0*1024*1024)) / (log2(7.5*1024*1024) - log2(4.0*1024*1024)) * (.012 - .015);
+  float bpw_step = float(.015 + (log2(fft.size()) - log2(4.0*1024*1024)) / (log2(7.5*1024*1024) - log2(4.0*1024*1024)) * (.012 - .015));
 
   // Pick a bpw that might be close to Z=34, it is best to err on the high side of Z=34
   float bpw1 = fft.maxBpw() - 9 * bpw_step;                                      // Old bpw gave Z=28, we want Z=34 (or more)
@@ -173,11 +173,11 @@ printf ("Reguess bpw for %s is %.2f first Z22 is %.2f\n", fft.spec().c_str(), bp
 }
 
 float Tune::zForBpw(float bpw, FFTConfig fft, u32 count) {
-  u64 exponent = (count == 1) ? primes.prevPrime(fft.size() * bpw) : primes.nextPrime(fft.size() * bpw);
+  u64 exponent = (count == 1) ? primes.prevPrime(u64(fft.size() * bpw)) : primes.nextPrime(u64(fft.size() * bpw));
   float total_z = 0.0f;
   for (u32 i = 0; i < count; i++, exponent = primes.nextPrime (exponent + 1)) {
     auto [ok, res, roeSq, roeMul] = Gpu::make(exponent, shared, fft, {}, false)->measureROE(true);
-    float const z = roeSq.z();
+    float const z = float(roeSq.z());
     total_z += z;
 log("Zforbpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str());
     if (!ok) { log("Error at bpw %.2f (z %.2f) : %s\n", bpw, z, fft.spec().c_str()); continue; }
@@ -249,15 +249,15 @@ void Tune::carryTune() {
     double m = 0;
     const float mid = fft.shape.carry32BPW();
     for (float const bpw : {mid - 0.05f, mid + 0.05f}) {
-      u64 const exponent = primes.nearestPrime(fft.size() * bpw);
+      u64 const exponent = primes.nearestPrime(u64(fft.size() * bpw));
       auto [ok, carry] = Gpu::make(exponent, shared, fft, {}, false)->measureCarry();
       m = carry.max;
       if (!ok) { log("Error %s at %f\n", fft.spec().c_str(), bpw); }
-      zv.push_back(carry.z());
+      zv.push_back(float(carry.z()));
     }
 
     float const avg = (zv[0] + zv[1]) / 2;
-    u64 const exponent = fft.shape.carry32BPW() * fft.size();
+    u64 const exponent = u64(fft.shape.carry32BPW() * fft.size());
     double const pErr100 = -expm1(-exp(-avg) * exponent * 100);
     log("%14s %.3f : %.3f (%.3f %.3f) %f %.0f%%\n", fft.spec().c_str(), mid, avg, zv[0], zv[1], m, pErr100 * 100);
     fo.printf("%f %f\n", log2(fft.size()), avg);
@@ -367,7 +367,7 @@ void Tune::tune() {
     if (s == "inplace") time_inplace_only = true;
     auto keyVal = split(s, '=');
     if (keyVal.size() == 2) {
-      if (keyVal.front() == "quick") quick = stod(keyVal.back());
+      if (keyVal.front() == "quick") quick = stoi(keyVal.back());
       if (keyVal.front() == "minexp") min_exponent = stoull(keyVal.back());
       if (keyVal.front() == "maxexp") max_exponent = stoull(keyVal.back());
     }
@@ -594,7 +594,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_fft_load = 0;
         double best_cost = -1.0;
-	for (u32 const fft_load : {0, 1, 2, 3, 4}) {
+        for (u32 const fft_load : {0, 1, 2, 3, 4}) {
           if (fft_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10 * 10 + fft_load);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -612,7 +612,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_fft_store = 0;
         double best_cost = -1.0;
-	for (u32 const fft_store : {0, 1, 2, 3, 4}) {
+        for (u32 const fft_store : {0, 1, 2, 3, 4}) {
           if (fft_store >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -630,10 +630,10 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_cs_load = 0, best_cs_store = 0;
         double best_cost = -1.0;
-	for (u32 const cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load with L2 store
+        for (u32 const cs : {0, 1, 2}) {   // Test three combinations:  Default load/store, non-temporal, last-use load with L2 store
           if (cs >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
-	  u32 const cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
-	  u32 const cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
+          u32 const cs_load = cs == 0 ? 0 : cs == 1 ? 1 : 4;
+          u32 const cs_store = cs == 0 ? 0 : cs == 1 ? 1 : 2;
           args->flags["LOADS"] = to_string(loads / 100 * 100 + cs_load * 10 + loads % 10);
           args->flags["STORES"] = to_string(stores / 100 * 100 + cs_store * 10 + stores % 10);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -653,7 +653,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 const trig_load : {0, 5}) {
+        for (u32 const trig_load : {0, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 1000 * 1000 + trig_load * 100 + loads % 100);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -671,7 +671,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
+        for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(loads / 10000 * 10000 + trig_load * 1000 + loads % 1000);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -689,7 +689,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_trig_load = 0;
         double best_cost = -1.0;
-	for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
+        for (u32 const trig_load : {0, 1, 2, 3, 4, 5}) {
           if (trig_load >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["LOADS"] = to_string(trig_load * 10000 + loads % 10000);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
@@ -798,7 +798,7 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u64 const exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 const exponent = primes.prevPrime(u64(fft.maxBpw() * 0.95 * fft.shape.size()));   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tail_trigs = 0;
       u32 const current_tail_trigs = args->value("TAIL_TRIGS32", 2);
       double best_cost = -1.0;
@@ -881,7 +881,7 @@ void Tune::tune() {
     if (time_NTTs && time_FP32) {
       FFTConfig fft{defaultNTTShape, 202, CARRY_AUTO};
       if (!fft.FFT_FP32) fft = FFTConfig(FFTShape(FFT3261, 512, 8, 512), 202, CARRY_AUTO);
-      u64 const exponent = primes.prevPrime(fft.maxBpw() * 0.95 * fft.shape.size());   // Back off the maxExp as different settings will have different maxBpw
+      u64 const exponent = primes.prevPrime(u64(fft.maxBpw() * 0.95 * fft.shape.size()));   // Back off the maxExp as different settings will have different maxBpw
       u32 best_tabmul_chain = 0;
       u32 const current_tabmul_chain = args->value("TABMUL_CHAIN32", 0);
       double best_cost = -1.0;
diff --git a/src/typeName.h b/src/typeName.h
index 6ca21042..457d878b 100644
--- a/src/typeName.h
+++ b/src/typeName.h
@@ -9,7 +9,7 @@ const char* typeName(T&& v) {
   const char* ret = typeid(v).name();
   try {
     size_t pos = 0;
-    std::stoi(ret, &pos);
+    (void)std::stoi(ret, &pos);
     return ret + pos;
   } catch (...) {
     return ret;

From 47463badd732a4234ea9c6ed4df9ca94a739e714 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 21 Jul 2026 00:31:01 +0000
Subject: [PATCH 092/214] Removed CUDA debugging code accidently left in ROE
 calculations.

---
 src/cl/carryutil.cl | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 64c83a11..8c614d2b 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -146,7 +146,6 @@ void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *b
   while (num_threads > 1) {
     // Write roundMax for high half of threads to local memory.  Ignore threads not participating in the reduction.
    if (num_threads >= WAVEFRONT) bar();
-      __asm("bar.sync 0;");
     if (me >= num_threads / 2 && me < num_threads) lds[me - num_threads / 2] = u32RoundMax;
     if (num_threads > WAVEFRONT) {
       bar();                             // work around a weird CUDA NVCC bug where two bar() calls are required???! (Titan V, CUDA 13.0, WMUL=2)

From 0f03b5b07b2dc92bca19704ced4297315d6f75b5 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 21 Jul 2026 01:35:59 +0000
Subject: [PATCH 093/214] Successfully ran 2000 iterations of exponent 4.3B
 (more than 32 bits).

---
 src/Gpu.cpp   | 2 +-
 src/Proof.cpp | 9 +++++----
 src/Proof.h   | 2 +-
 3 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 5c01d6e6..35b8c1fb 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -353,7 +353,7 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
   string defines = toDefine(config);
   if (doLog) { log("config: %s\n", defines.c_str()); }
 
-  defines += toDefine("EXP", u32(E));   // FIX THIS when openCL code supports 64-bit exponents!!!
+  defines += toDefine("EXP", E);
   defines += toDefine(initializer_list<pair<string, u32>>{
                     {"WIDTH", fft.shape.width},
                     {"SMALL_HEIGHT", fft.shape.height},
diff --git a/src/Proof.cpp b/src/Proof.cpp
index e8b3b81a..d10aa8dd 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -135,7 +135,7 @@ ProofSet::ProofSet(u64 E, u32 power)
   : E{E}, power{power} {
 
   assert(E & 1); // E is supposed to be prime
-  if (power <= 0 || power > 12) {
+  if (power <= 0 || power > 13) {
     log("Invalid proof power: %u\n", power);
     throw "Invalid proof power";
   }
@@ -163,7 +163,7 @@ ProofSet::ProofSet(u64 E, u32 power)
   assert(u32(points.size()) == (1u << power));
   assert(points.back() == E);
 
-  points.push_back(u32(-1)); // guard element
+  points.push_back(u64(-1LL)); // guard element
   cacheIt = points.begin();
 
   for ([[maybe_unused]] u64 const p : points) {
@@ -188,7 +188,7 @@ bool ProofSet::isInPoints(u64 E, u32 power, u64 k) {
 }
 
 bool ProofSet::canDo(u64 E, u32 power, u64 currentK) {
-  assert(power > 0 && power <= 12);
+  assert(power > 0 && power <= 13);
   return ProofSet{E, power}.isValidTo(currentK);
 }
 
@@ -200,7 +200,8 @@ u32 ProofSet::bestPower(u64 E) {
 
   assert(E > 0);
   // log2(x)/2 is log4(x)
-  int const power = int(10 + floor(log2(double(E) / 60e6) / 2));
+  int power = int(10 + floor(log2(double(E) / 60e6) / 2));
+  if (power > 13) power = 13;
   assert(power >= 2);
   return power;
 }
diff --git a/src/Proof.h b/src/Proof.h
index bac5d295..68fc1f4d 100644
--- a/src/Proof.h
+++ b/src/Proof.h
@@ -58,7 +58,7 @@ class ProofSet {
   u32 power;
   
 private:  
-  vector<u64> points;  
+  vector<u64> points;
   
   bool isValidTo(u64 limitK) const;
 

From 84b5b9cefac7850ad0c5b17cdbea2f127af04909 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 22 Jul 2026 01:49:47 +0000
Subject: [PATCH 094/214] Allow tuning FFT6431 (FFT type 51).  TitanV may find
 this useful.

---
 src/FFTConfig.cpp |  2 +-
 src/tune.cpp      | 12 ++++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index 83603861..120bc287 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -83,7 +83,7 @@ vector<FFTShape> FFTShape::multiSpec(const string& iniSpec) {
 
 vector<FFTShape> FFTShape::allShapes(u32 sizeFrom, u32 sizeTo) {
   vector<FFTShape> configs;
-  for (enum FFT_TYPES const type : {FFT64, FFT3161, FFT3261, FFT61, FFT323161}) {
+  for (enum FFT_TYPES const type : {FFT64, FFT6431, FFT3161, FFT3261, FFT61, FFT323161}) {
     for (u32 const width : {256, 512, 1024, 4096}) {
       for (u32 const height : {256, 512, 1024}) {
         if (width == 256 && height == 1024) { continue; } // Skip because we prefer width >= height
diff --git a/src/tune.cpp b/src/tune.cpp
index 37144d71..3789860f 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -351,8 +351,9 @@ void Tune::tune() {
   bool time_FFTs = false;
   bool time_NTTs = false;
   bool time_FP32 = true;
+  bool time_FFT6431 = false;
   bool time_inplace_only = NVIDIAGPU;           // Default is nVidia is better off with INPLACE=1, AMD GPUs need to time extra options used when INPLACE=0
-  int quick = 7;                                        // Run config from slowest (quick=1) to fastest (quick=10)
+  int quick = 7;                                // Run config from slowest (quick=1) to fastest (quick=10)
   u64 min_exponent = 75000000;
   u64 max_exponent = 350000000;
   if (!args->fftSpec.empty()) { min_exponent = 0; max_exponent = 1000000000000ull; }
@@ -363,7 +364,8 @@ void Tune::tune() {
     if (s == "noconfig") tune_config = false;
     if (s == "fp64") time_FFTs = true;
     if (s == "ntt") time_NTTs = true;
-    if (s == "nofp32") time_FP32 = false;
+    if (s == "fp6431") time_FFT6431 = true;      // It is rare to have a GPU good at both FP64 and integer ops.  TitanV is one.  Allow tuning FFT6431.
+    if (s == "nofp32") time_FP32 = false;        // Workaround bug in some openCL compilers that cannot compile our FP32 openCL code
     if (s == "inplace") time_inplace_only = true;
     auto keyVal = split(s, '=');
     if (keyVal.size() == 2) {
@@ -1183,7 +1185,8 @@ skip_1K_256 = false;
 
     // Skip some FFTs and NTTs
     if (shape.fft_type == FFT64 && !time_FFTs) continue;
-    if (shape.fft_type != FFT64 && !time_NTTs) continue;
+    if (shape.fft_type == FFT6431 && !time_FFT6431) continue;
+    if (shape.fft_type != FFT64 && shape.fft_type != FFT6431 && !time_NTTs) continue;
     if ((shape.fft_type == FFT3261 || shape.fft_type == FFT323161 || shape.fft_type == FFT3231 || shape.fft_type == FFT32) && !time_FP32) continue;
 
     // Time an exponent that's good for all variants and carry-config.
@@ -1195,8 +1198,9 @@ skip_1K_256 = false;
     // Loop through all possible variants
     for (u32 variant = 0; variant <= LAST_VARIANT; variant = next_variant (variant)) {
 
-      // Only FP64 code supports variants
+      // Only FP64 code supports variants.  For FFT6431, we've not worked out how variant_M = 1 affects max exp.
       if (variant != 202 && !FFTConfig{shape, variant, CARRY_AUTO}.FFT_FP64) continue;
+      if (shape.fft_type == FFT6431 && variant_M(variant) == 1) continue;
 
       // Only AMD GPUs support variant zero (BCAST) and only if width <= 1024.  CLANG doesn't support builtins.  Let NO_ASM bypass variant zero.
       if (variant_W(variant) == 0) {

From 037067be74311274937b24c18e4a8638e797ef90 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 22 Jul 2026 16:56:40 +0000
Subject: [PATCH 095/214] Fix (hopefully) errors using CUDA graphs and
 workers=2

---
 src/cuda/clwrap_cuda.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 9d0f6f23..83cf6fcd 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -1193,7 +1193,7 @@ bool clIsGraphSupported(cl_device_id dev) {
 
 int clGraphBeginRecording(cl_command_queue q) {
   ensureContextCurrent();
-  CUresult r = cuStreamBeginCapture(q->stream, CU_STREAM_CAPTURE_MODE_GLOBAL);
+  CUresult r = cuStreamBeginCapture(q->stream, CU_STREAM_CAPTURE_MODE_THREAD_LOCAL);
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
 }
 

From 4ff6c108e8353215454866eedb775fdd3fd7bfc4 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 22 Jul 2026 18:36:22 +0000
Subject: [PATCH 096/214] Removed unused halfbar.  Fixed mis-typecast in
 shufl32.

---
 src/cl/base.cl    | 5 -----
 src/cl/fftbase.cl | 2 +-
 2 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 4add30e8..d2a5297f 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -772,11 +772,6 @@ void OVERLOAD bar(const u32 WG) {
   }
 }
 
-// A half-barrier is only needed when half-a-workgroup needs a barrier.
-// This is used e.g. by the double-wide tailSquare, where LDS is split between the halves.
-void halfBar() { if (get_enqueued_local_size(0) / 2 > WAVEFRONT) { bar(); } }
-
-
 // nVidia GPUs (Hopper architecture sm 9.0 and later) support Programatic Dependent Launch where the tail end execution of one kernel can overlap
 // with the beginning of the next kernel.  This requires a special launch kernel command that is only available in CUDA 12.0 and later.
 // These routines let us take advantage of this CUDA feature.  These routines do nothing in OpenCL.
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index e6c3c3a3..220d4527 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -1575,7 +1575,7 @@ void OVERLOAD fft_common(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 low
 #if NTT_GF31
 
 void OVERLOAD shufl(local GF31 *lds, GF31 *u, u32 f, u32 numWG, u32 lowMe) {
-  shufl32((local F2 *) lds, (local F2 *) u, f, numWG, lowMe);
+  shufl32((local F2 *) lds, (F2 *) u, f, numWG, lowMe);
 }
 
 void OVERLOAD fft_RADIX(GF31 *u) {

From 11059471aef2849c2f8a3b09069dfe7ff8b8b534 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 22 Jul 2026 23:25:23 +0000
Subject: [PATCH 097/214] Tune the NOREG option.  I'm seeing better timings
 with NOREG on TitanV CUDA 13.0.

---
 src/tune.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index 3789860f..40529793 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -1085,7 +1085,7 @@ void Tune::tune() {
     }
 
     // See if disabling our default register usage makes sense
-    if (0) {
+    if (true) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
       u32 best_noreg = 0;

From da522b3315405f3a29cc39e1bf66a0956592548a Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Thu, 23 Jul 2026 04:54:58 -0700
Subject: [PATCH 098/214] Updated CI to add MSVC builds.

---
 .github/workflows/ci.yml |  90 +++++++++++++-----
 Makefile                 |   2 +-
 PRPLL.sln                |  33 +++++++
 PRPLL.vcxproj            | 194 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 297 insertions(+), 22 deletions(-)
 create mode 100644 PRPLL.sln
 create mode 100644 PRPLL.vcxproj

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 31d60e10..ed44d7c5 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -22,7 +22,7 @@ jobs:
     env:
       CXX: ${{ matrix.cxx }}
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Install
       run: |
         sudo apt-get update -y
@@ -30,15 +30,15 @@ jobs:
         $CXX --version
     - name: Script
       run: |
-        make -O -j "$(nproc)"
-        cd build-release
+        make DEBUG=1 -O -j "$(nproc)"
+        cd build-debug
         rm -f -- *.o
         ./prpll -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
         name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
-        path: ${{ github.workspace }}
+        path: build-debug/
 
   Linux-CUDA:
     name: Linux CUDA
@@ -55,7 +55,7 @@ jobs:
     env:
       CXX: ${{ matrix.cxx }}
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Install
       run: |
         sudo apt-get update -y
@@ -63,22 +63,22 @@ jobs:
         $CXX --version
     - name: Script
       run: |
-        make CUDA=1 -O -j "$(nproc)"
-        cd build-cuda
+        make DEBUG=1 CUDA=1 -O -j "$(nproc)"
+        cd build-debug
         rm -f -- *.o
         ./prpll -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
         name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_cuda_prpll
-        path: ${{ github.workspace }}
+        path: build-debug/
 
   Cppcheck:
     name: Cppcheck
 
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Install
       run: |
         sudo apt-get update -y
@@ -91,7 +91,7 @@ jobs:
 
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Script
       run: clang-tidy -checks='bugprone-*,-bugprone-reserved-identifier,cert-*,-cert-dcl37-c,-cert-dcl51-cpp,clang-analyzer-*,concurrency-*,misc-*,-misc-no-recursion,modernize-*,-modernize-use-trailing-return-type,performance-*,portability-*,readability-const-return-type,readability-container-*,readability-duplicate-include,readability-else-after-return,readability-make-member-function-cons,readability-non-const-parameter,readability-redundant-*,readability-simplify-*,readability-string-compare,readability-use-*' -header-filter='.*' src/*.cpp -- -Wall -O3 -std=gnu++20
       continue-on-error: true
@@ -101,13 +101,13 @@ jobs:
 
     runs-on: ubuntu-latest
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Script
       run: shopt -s globstar; shellcheck -o avoid-nullary-conditions,check-set-e-suppressed,deprecate-which,quote-safe-variables,require-double-brackets -s bash **/*.sh
       continue-on-error: true
 
-  Windows:
-    name: Windows
+  Windows-MSYS2:
+    name: Windows MSYS2
 
     runs-on: ${{ matrix.os }}
     strategy:
@@ -119,7 +119,7 @@ jobs:
       CXX: ${{ matrix.cxx }}
       PACKAGE_PREFIX: mingw-w64-${{ endsWith(matrix.os, '-arm') && 'clang-aarch64' || 'x86_64' }}-
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Before Install
       run: |
         echo "C:\msys64\mingw64\bin" | Out-File -FilePath $env:GITHUB_PATH -Encoding utf8 -Append
@@ -137,15 +137,63 @@ jobs:
         & $env:CXX --version
     - name: Script
       run: |
-        make -O -j $env:NUMBER_OF_PROCESSORS
-        cd build-release
+        make DEBUG=1 -O -j $env:NUMBER_OF_PROCESSORS
+        cd build-debug
         rm *.o
         .\prpll.exe -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
         name: win_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
-        path: ${{ github.workspace }}
+        path: build-debug/
+
+  Windows-MSVC-OpenCL:
+    name: Windows MSVC OpenCL
+
+    runs-on: windows-2022
+    steps:
+    - uses: actions/checkout@v7
+    - uses: step-security/msvc-dev-cmd@v1
+    - name: Install OpenCL
+      run: |
+        vcpkg install opencl
+    - name: Before Script
+      shell: bash
+      run: |
+        bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always --match 'v/prpll/*')")" > src/version.inc
+    - name: Script
+      run: |
+        msbuild PRPLL.sln /m /p:Configuration=OpenCL-Debug /p:OpenCLRoot=C:\vcpkg\installed\x64-windows
+        & .\build-msvc\OpenCL\Debug\prpll.exe -h
+    - uses: actions/upload-artifact@v7
+      if: always()
+      with:
+        name: win_x86_msvc_opencl_prpll
+        path: build-msvc/
+
+  Windows-MSVC-CUDA:
+    name: Windows MSVC CUDA
+
+    runs-on: windows-2022
+    steps:
+    - uses: actions/checkout@v7
+    - uses: step-security/msvc-dev-cmd@v1
+    - name: Install CUDA Toolkit
+      uses: N-Storm/cuda-toolkit@v0.2.34
+    - name: Before Script
+      shell: bash
+      run: |
+        bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always --match 'v/prpll/*')")" > src/version.inc
+    - name: Script
+      run: |
+        msbuild PRPLL.sln /m /p:Configuration=CUDA-Debug
+    - uses: actions/upload-artifact@v7
+      if: always()
+      with:
+        name: win_x86_msvc_cuda_prpll
+        path: build-msvc/
 
   macOS:
     name: macOS
@@ -158,18 +206,18 @@ jobs:
     env:
       CXX: g++-15
     steps:
-    - uses: actions/checkout@v6
+    - uses: actions/checkout@v7
     - name: Install
       run: |
         $CXX --version
     - name: Script
       run: |
-        make -j "$(sysctl -n hw.ncpu)"
-        cd build-release
+        make DEBUG=1 -j "$(sysctl -n hw.ncpu)"
+        cd build-debug
         rm -f -- *.o
         ./prpll -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
         name: macos_${{ endsWith(matrix.os, '-intel') && 'x86' || 'arm' }}_prpll
-        path: ${{ github.workspace }}
+        path: build-debug/
diff --git a/Makefile b/Makefile
index 1ba62799..31400c27 100644
--- a/Makefile
+++ b/Makefile
@@ -47,7 +47,7 @@ endif
 ifeq ($(DEBUG), 1)
 
 BIN=build-debug
-CXXFLAGS = -g $(COMMON_FLAGS)
+CXXFLAGS = -g -Og $(COMMON_FLAGS)
 STRIP=
 
 else
diff --git a/PRPLL.sln b/PRPLL.sln
new file mode 100644
index 00000000..25c0cdc3
--- /dev/null
+++ b/PRPLL.sln
@@ -0,0 +1,33 @@
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Visual Studio Version 17
+VisualStudioVersion = 17.0.31903.59
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "PRPLL", "PRPLL.vcxproj", "{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		OpenCL-Debug|x64 = OpenCL-Debug|x64
+		OpenCL-Release|x64 = OpenCL-Release|x64
+		CUDA-Debug|x64 = CUDA-Debug|x64
+		CUDA-Release|x64 = CUDA-Release|x64
+		CUDA-Release-non-static|x64 = CUDA-Release-non-static|x64
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.OpenCL-Debug|x64.ActiveCfg = OpenCL-Debug|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.OpenCL-Debug|x64.Build.0 = OpenCL-Debug|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.OpenCL-Release|x64.ActiveCfg = OpenCL-Release|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.OpenCL-Release|x64.Build.0 = OpenCL-Release|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Debug|x64.ActiveCfg = CUDA-Debug|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Debug|x64.Build.0 = CUDA-Debug|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release|x64.ActiveCfg = CUDA-Release|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release|x64.Build.0 = CUDA-Release|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release-non-static|x64.ActiveCfg = CUDA-Release-non-static|x64
+		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release-non-static|x64.Build.0 = CUDA-Release-non-static|x64
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+	GlobalSection(ExtensibilityGlobals) = postSolution
+		SolutionGuid = {5185D8CA-7025-4E3B-8190-85F2B7B4A526}
+	EndGlobalSection
+EndGlobal
diff --git a/PRPLL.vcxproj b/PRPLL.vcxproj
new file mode 100644
index 00000000..d63a2737
--- /dev/null
+++ b/PRPLL.vcxproj
@@ -0,0 +1,194 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="Current" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="OpenCL-Debug|x64">
+      <Configuration>OpenCL-Debug</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="OpenCL-Release|x64">
+      <Configuration>OpenCL-Release</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="CUDA-Debug|x64">
+      <Configuration>CUDA-Debug</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="CUDA-Release|x64">
+      <Configuration>CUDA-Release</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="CUDA-Release-non-static|x64">
+      <Configuration>CUDA-Release-non-static</Configuration>
+      <Platform>x64</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <ItemGroup>
+    <ClCompile Include=".\src\AllocTrac.cpp" />
+    <ClCompile Include=".\src\Args.cpp" />
+    <ClCompile Include=".\src\bundle.cpp" />
+    <ClCompile Include=".\src\clwrap.cpp" />
+    <ClCompile Include=".\src\common.cpp" />
+    <ClCompile Include=".\src\CycleFile.cpp" />
+    <ClCompile Include=".\src\Event.cpp" />
+    <ClCompile Include=".\src\FFTConfig.cpp" />
+    <ClCompile Include=".\src\File.cpp" />
+    <ClCompile Include=".\src\fs.cpp" />
+    <ClCompile Include=".\src\Gpu.cpp" />
+    <ClCompile Include=".\src\gpuid.cpp" />
+    <ClCompile Include=".\src\Kernel.cpp" />
+    <ClCompile Include=".\src\KernelCompiler.cpp" />
+    <ClCompile Include=".\src\log.cpp" />
+    <ClCompile Include=".\src\main.cpp" />
+    <ClCompile Include=".\src\md5.cpp" />
+    <ClCompile Include=".\src\Primes.cpp" />
+    <ClCompile Include=".\src\Profile.cpp" />
+    <ClCompile Include=".\src\Proof.cpp" />
+    <ClCompile Include=".\src\Queue.cpp" />
+    <ClCompile Include=".\src\Saver.cpp" />
+    <ClCompile Include=".\src\sha3.cpp" />
+    <ClCompile Include=".\src\Signal.cpp" />
+    <ClCompile Include=".\src\state.cpp" />
+    <ClCompile Include=".\src\Task.cpp" />
+    <ClCompile Include=".\src\TimeInfo.cpp" />
+    <ClCompile Include=".\src\timeutil.cpp" />
+    <ClCompile Include=".\src\Trig.cpp" />
+    <ClCompile Include=".\src\TrigBufCache.cpp" />
+    <ClCompile Include=".\src\tune.cpp" />
+    <ClCompile Include=".\src\TuneEntry.cpp" />
+    <ClCompile Include=".\src\version.cpp" />
+    <ClCompile Include=".\src\Worktodo.cpp" />
+    <ClCompile Include=".\src\cuda\clwrap_cuda.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)'=='OpenCL-Debug' Or '$(Configuration)'=='OpenCL-Release'">true</ExcludedFromBuild>
+    </ClCompile>
+    <ClCompile Include=".\src\cuda\cudawrap.cpp">
+      <ExcludedFromBuild Condition="'$(Configuration)'=='OpenCL-Debug' Or '$(Configuration)'=='OpenCL-Release'">true</ExcludedFromBuild>
+    </ClCompile>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <VCProjectVersion>17.0</VCProjectVersion>
+    <ProjectGuid>{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}</ProjectGuid>
+    <Keyword>Win32Proj</Keyword>
+    <RootNamespace>PRPLL</RootNamespace>
+    <ProjectName>PRPLL</ProjectName>
+    <WindowsTargetPlatformVersion>10.0</WindowsTargetPlatformVersion>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Debug' Or '$(Configuration)'=='CUDA-Debug'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseDebugLibraries>true</UseDebugLibraries>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v143</PlatformToolset>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseDebugLibraries>false</UseDebugLibraries>
+    <WholeProgramOptimization>true</WholeProgramOptimization>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v143</PlatformToolset>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings" />
+  <ImportGroup Label="Shared" />
+  <ImportGroup Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Debug'">
+    <OutDir>$(ProjectDir)build-msvc\OpenCL\Debug\</OutDir>
+    <IntDir>$(ProjectDir)build-msvc\obj\OpenCL\Debug\</IntDir>
+    <TargetName>prpll</TargetName>
+    <LinkIncremental>true</LinkIncremental>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Release'">
+    <OutDir>$(ProjectDir)build-msvc\OpenCL\Release\</OutDir>
+    <IntDir>$(ProjectDir)build-msvc\obj\OpenCL\Release\</IntDir>
+    <TargetName>prpll</TargetName>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='CUDA-Debug'">
+    <OutDir>$(ProjectDir)build-msvc\CUDA\Debug\</OutDir>
+    <IntDir>$(ProjectDir)build-msvc\obj\CUDA\Debug\</IntDir>
+    <TargetName>prpll</TargetName>
+    <LinkIncremental>true</LinkIncremental>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='CUDA-Release'">
+    <OutDir>$(ProjectDir)build-msvc\CUDA\Release\</OutDir>
+    <IntDir>$(ProjectDir)build-msvc\obj\CUDA\Release\</IntDir>
+    <TargetName>prpll</TargetName>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)'=='CUDA-Release-non-static'">
+    <OutDir>$(ProjectDir)build-msvc\CUDA\Release-non-static\</OutDir>
+    <IntDir>$(ProjectDir)build-msvc\obj\CUDA\Release-non-static\</IntDir>
+    <TargetName>prpll</TargetName>
+  </PropertyGroup>
+  <ItemDefinitionGroup>
+    <ClCompile>
+      <WarningLevel>Level3</WarningLevel>
+      <PreprocessorDefinitions>WIN32;WIN64;_CONSOLE;_CRT_SECURE_NO_WARNINGS;NOMINMAX;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <LanguageStandard>stdcpp20</LanguageStandard>
+      <ExceptionHandling>Sync</ExceptionHandling>
+      <MultiProcessorCompilation>true</MultiProcessorCompilation>
+    </ClCompile>
+    <Link>
+      <SubSystem>Console</SubSystem>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Debug' Or '$(Configuration)'=='CUDA-Debug'">
+    <ClCompile>
+      <Optimization>Disabled</Optimization>
+      <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <RuntimeLibrary>MultiThreadedDebugDLL</RuntimeLibrary>
+      <DebugInformationFormat>ProgramDatabase</DebugInformationFormat>
+      <BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'">
+    <ClCompile>
+      <Optimization>MaxSpeed</Optimization>
+      <FunctionLevelLinking>true</FunctionLevelLinking>
+      <IntrinsicFunctions>true</IntrinsicFunctions>
+      <PreprocessorDefinitions>NDEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <RuntimeLibrary>MultiThreaded</RuntimeLibrary>
+    </ClCompile>
+    <Link>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <EnableCOMDATFolding>true</EnableCOMDATFolding>
+      <OptimizeReferences>true</OptimizeReferences>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Debug'">
+    <Link>
+      <AdditionalLibraryDirectories>$(OpenCLRoot)\debug\lib;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
+      <AdditionalDependencies>OpenCL.lib;%(AdditionalDependencies)</AdditionalDependencies>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Release'">
+    <Link>
+      <AdditionalLibraryDirectories>$(OpenCLRoot)\lib;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
+      <AdditionalDependencies>OpenCL.lib;%(AdditionalDependencies)</AdditionalDependencies>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'">
+    <ClCompile>
+      <PreprocessorDefinitions>CUDA_BACKEND;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <AdditionalIncludeDirectories>$(ProjectDir)\src\cuda;$(CUDA_PATH)\include;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
+    </ClCompile>
+    <Link>
+      <AdditionalLibraryDirectories>$(CUDA_PATH)\lib\x64;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release-non-static'">
+    <Link>
+      <AdditionalDependencies>cuda.lib;nvrtc.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
+    </Link>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Release'">
+    <Link>
+      <AdditionalDependencies>cuda.lib;nvrtc_static.lib;nvrtc-builtins_static.lib;nvptxcompiler_static.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
+    </Link>
+  </ItemDefinitionGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
+  <ImportGroup Label="ExtensionTargets" />
+</Project>

From d8143063ad3f52e58b6f0894ca6a18f939c12c68 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Thu, 23 Jul 2026 05:54:56 -0700
Subject: [PATCH 099/214] Removed the legacy PrimeNet script.

---
 src/Args.cpp      |   3 +-
 tools/primenet.py | 174 ----------------------------------------------
 tools/upload.py   | 114 ------------------------------
 3 files changed, 1 insertion(+), 290 deletions(-)
 delete mode 100755 tools/primenet.py
 delete mode 100755 tools/upload.py

diff --git a/src/Args.cpp b/src/Args.cpp
index 6e115a16..a11c4748 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -118,8 +118,7 @@ and should be able to run.
 Worktodo:
 PRPLL keeps the active tasks in per-worker files worktodo-0.txt, worktodo-1.txt etc in the local directory.
 These per-worker files are supplied from the global worktodo.txt file if -pool is used.
-In turn the global worktodo.txt can be supplied through the primenet.py script,
-either the one located at gpuowl/tools/primenet.py or https://download.mersenne.ca/AutoPrimeNet
+In turn the work files can be supplied through AutoPrimeNet, located at https://download.mersenne.ca/AutoPrimeNet
 
 It is also possible to manually add exponents by adding lines of the form "PRP=118063003" to worktodo-<N>.txt
 
diff --git a/tools/primenet.py b/tools/primenet.py
deleted file mode 100755
index e61e1a42..00000000
--- a/tools/primenet.py
+++ /dev/null
@@ -1,174 +0,0 @@
-#!/usr/bin/python3
-
-# Copyright (c) Mihai Preda.
-# Inspired by mlucas-primenet.py , part of Mlucas by Ernst W. Mayer.
-
-import argparse
-import time
-import urllib
-import requests
-import os
-import upload
-import getpass
-
-from http import cookiejar
-from urllib.parse import urlencode
-from urllib.request import build_opener
-from urllib.request import HTTPCookieProcessor
-from datetime import datetime
-
-baseUrl = "https://www.mersenne.org/"
-primenet = build_opener(HTTPCookieProcessor(cookiejar.CookieJar()))
-
-def login(user, password):
-    login = {"user_login": user, "user_password": password}
-    data = urlencode(login).encode('utf-8')
-    r = primenet.open(baseUrl, data).read().decode("utf-8")
-    if not user + "<br>logged in" in r:
-        print(r)
-        print("Login failed");
-        raise(PermissionError("Login failed"))
-
-def loadLines(fileName):
-    try:
-        with open(fileName, 'r') as fi:
-            return set((line.strip().strip('\n') for line in fi))
-    except FileNotFoundError as e:
-        return set()
-            
-def sendOne(line):
-    print("Sending result: ", line)
-    data = urlencode({"data": line}).encode('utf-8')
-    res = primenet.open(baseUrl + "manual_result/default.php", data).read().decode("utf-8")
-    if "Error code" in res:
-        begin = res.find("Error code")
-        end   = res.find("</div>", begin)
-        text = res[begin:end]
-        print(text)
-        already = text.startswith('Error code: 40, error text: This computer has already sent in this PRP result')
-        if already:
-            print('Already sent, will not retry')
-        return already
-    else:
-        begin = res.find("CPU credit is")
-        end   = res.find("</div>", begin);
-        if begin >= 0 and end >= 0:
-            print(res[begin:end], '\n')
-            return True
-        else:
-            return False
-
-def appendLine(fileName, line):
-    with open(fileName, 'a') as fo: print(line, file = fo, end = '\n')
-    
-def sendResults(results, sent, sentName, retryName):
-    for result in results:
-        ok = sendOne(result)
-        sent.add(result)
-        appendLine(sentName if ok else retryName, result)
-        
-def fetch(what):
-    assignment = {"cores":1, "num_to_get":1, "pref":what}
-    # res = primenet.open(baseUrl + "manual_assignment/?" + urlencode(assignment)).read().decode("utf-8")
-    res = primenet.open(baseUrl + "manual_assignment/", data=urlencode(assignment).encode()).read().decode("utf-8")
-    # print(res)
-    
-    BEGIN_MARK = "<!--BEGIN_ASSIGNMENTS_BLOCK-->"
-    # begin = res.find(BEGIN_MARK)
-    begin = res.find(">PRP=")
-    if begin == -1: begin = res.find(">LL=")
-    if begin == -1:
-        print(res)
-        raise(AssertionError("assignment no BEGIN mark"))
-    begin += 1
-    # begin += len(BEGIN_MARK)
-    end   = res.find("</", begin)
-    if end == -1: raise(AssertionError("assignemnt no END mark"))
-    line = res[begin:end].strip().strip('\n')
-    print(datetime.now(), " New assignment: ", line)
-    return line
-
-# LL_DC was 101; here we use 106 instead in order to get only LL_DC with shift != 0 which are the ones
-# that can be double-checked with a zero shift.
-workTypes = dict(PRP=150, PM1=4, LL_DC=106, PRP_DC=151, PRP_WORLD_RECORD=152, PRP_100M=153, PRP_P1=154)
-
-parser = argparse.ArgumentParser()
-parser.add_argument('-u', dest='username', default='', help="Primenet user name")
-parser.add_argument('-p', dest='password', help="Primenet password")
-parser.add_argument('-t', dest='timeout',  type=int, default=1800, help="Seconds to sleep between updates")
-parser.add_argument('--dirs', metavar='DIR', nargs='+', help="GpuOwl directories to scan", default=".")
-parser.add_argument('--tasks', dest='nTasks', type=int, default=None, help='Number of tasks to fetch ahead')
-
-choices=list(workTypes.keys())
-parser.add_argument('-w', dest='work', choices=choices, help="GIMPS work type", default="PRP")
-
-options = parser.parse_args()
-timeout = int(options.timeout)
-user = options.username
-
-worktype = workTypes[options.work] if options.work in workTypes else int(options.work)
-print("Work type:", worktype)
-
-desiredTasks = options.nTasks if options.nTasks is not None else (12 if worktype == 4 else 2)
-print("Will fetch ahead %d tasks. Check every %d sec." % (desiredTasks, timeout))
-
-if not user:
-    print("-u USER is required")
-    exit(1)
-    
-print("User: %s" % user)
-
-dirs = [(d if d[-1] == '/' else d + '/' ) for d in options.dirs if d]
-
-print("Watched dirs: ", ' '.join(dirs))
-
-password = options.password
-if not password:
-    password = getpass.getpass("Primenet password")
-
-# Initial early login, to display any login errors early
-login(user, password)
-
-def handle(folder):
-    sent = loadLines(folder + "sent.txt")
-    (resultsName, worktodoName, sentName, retryName) = (folder + name + ".txt" for name in "results worktodo sent retry".split())
-    
-    newResults = loadLines(resultsName) - sent
-    if newResults: print(datetime.now(), " found %d new result(s) in %s" % (len(newResults), resultsName))
-    
-    tasks = [line for line in loadLines(worktodoName) if line and line[0] != '#']
-    needFetch = len(tasks) < desiredTasks
-    if needFetch: print(datetime.now(), " found only %d task(s) in %s, want %d" % (len(tasks), worktodoName, desiredTasks));
-    
-    if newResults or needFetch:
-        login(user, password)
-        if newResults: sendResults(newResults, sent, sentName, retryName)
-        for _ in range(len(tasks), desiredTasks):
-            appendLine(worktodoName, fetch(worktype))
-
-    try:
-        os.mkdir(folder + 'uploaded')
-    except FileExistsError:
-        pass
-    
-    for entry in os.listdir(folder + 'proof'):
-        if entry.endswith('.proof'):
-            fileName = folder + 'proof/' + entry
-            if upload.uploadProof(user, fileName):
-                os.rename(fileName, folder + 'uploaded/' + entry)
-
-while True:
-    for folder in dirs:
-        try:
-            handle(folder)
-        except urllib.error.URLError as e:
-            print(e)
-        except requests.exceptions.ConnectionError as e:
-            print(e)
-        except requests.exceptions.RequestException as e:
-            print(e)
-
-    if timeout == 0:
-        break
-    
-    time.sleep(timeout)
diff --git a/tools/upload.py b/tools/upload.py
deleted file mode 100755
index 6792cc3e..00000000
--- a/tools/upload.py
+++ /dev/null
@@ -1,114 +0,0 @@
-#!/usr/bin/python3
-
-import requests
-import hashlib
-import sys
-import time
-
-def fileBytes(name):
-    with open(name, mode='rb') as f:
-        return f.read()
-
-def md5(data):
-    return hashlib.md5(data).digest().hex()
-
-def headerLines(fileName):
-    readLine = lambda f: f.readline().decode().strip()
-    with open(fileName, mode='rb') as f:
-        return [readLine(f) for _ in range(5)]
-
-def headerExponent(fileName):
-    header = headerLines(fileName)
-    assert(header[0] == 'PRP PROOF')
-    exponent = int(header[4].split('=')[1][1:])
-    return exponent
-
-def getNeedRegion(need):
-    #print(need)
-    firstNeed = sorted([(int(a), b) for a, b in need.items()])[0]
-    return firstNeed[0], firstNeed[1] + 1
-
-def uploadChunk(session, baseUrl, pos, chunk):
-    url = f'{baseUrl}&DataOffset={pos}&DataSize={len(chunk)}&DataMD5={md5(chunk)}'
-    response = session.post(url, files={'Data': (None, chunk)}, allow_redirects=False, timeout=120)
-    # headers={'Content-Type:': 'multipart/form-data'}
-    # print(f'Response: {response}')
-    return response
-
-def upload(userId, exponent, data, verbose):
-    fileSize = len(data)
-    fileHash = md5(data)
-    url = f'https://mersenne.org/proof_upload/?UserID={userId}&Exponent={exponent}&FileSize={fileSize}&FileMD5={fileHash}'
-    verbose and print(url)
-
-    while True:
-        result = requests.get(url, timeout=20)
-        # print(result, result.content, result.headers, result.is_redirect, result.links, result.text, result.url)
-        # print("not JSONDecodeError on Result:\n%s\nText:\n%s\n" % (result, result.text))
-        
-        try:
-            json = result.json()
-            if 'error_status' in json or 'URLToUse' not in json or 'need' not in json:
-              print(json)
-              return json['error_status'] == 409 and json['error_description'] == 'Proof already uploaded'
-              
-            origUrl = json['URLToUse']
-            verbose and print(origUrl)
-        except json.decoder.JSONDecodeError:
-            print("JSONDecodeError on Result:\n%s\nText:\n%s\n" % (result, result.text))
-            return False
-        
-        # baseUrl = 'http' + origUrl[5:] if origUrl.startswith('https:') else origUrl
-        baseUrl = 'https' + origUrl[4:] if origUrl.startswith('http:') else origUrl
-        if baseUrl != origUrl:
-            verbose and print(f'Re-written to: {baseUrl}')
-
-        baseUrl = f'{baseUrl}&FileMD5={fileHash}'
-        pos, end = getNeedRegion(json['need'])
-        verbose and print(pos, end)
-
-        with requests.session() as session:
-            timeStart = time.time()
-            bytesSent = 0
-            while pos < end:
-                size = min(end - pos, 5*1024*1024)
-                time1 = time.time()
-                response = uploadChunk(session, baseUrl, pos, data[pos:pos+size])
-                if response.status_code != 200:
-                    print(response)                
-                    return False
-                pos += size
-                bytesSent += size
-                time2 = time.time()
-                print(f'\r{int(pos/fileSize*100+0.5)}%\t{int(size/(time2 - time1)/1024+0.5)} KB/s    ', end='', flush=True)
-                if 'FileUploaded' in response.json():
-                    secs = time2 - timeStart
-                    print(f'Uploaded {bytesSent*1e-6:.0f} MB in {secs:.0f}s, {bytesSent * 8 / (secs * 1024 *1024):.1f} Mbit/s');
-                    verbose and print('Upload complete')
-                    assert(pos >= end)
-                    return True
-
-def getTask(userId):
-    url = f'http://mersenne.org/oneAssignment/&UserID={userId}&workpref=150'
-    print(url)
-    r = requests.get(url)
-    print(r)
-    print(r.json())
-
-def uploadProof(userId, fileName, verbose=False):
-    exponent = headerExponent(fileName)
-    print(f'Uploading M{exponent} from "{fileName}"')
-    data = fileBytes(fileName)
-    return upload(userId, exponent, data, verbose)
-    
-if __name__ == '__main__':
-    if len(sys.argv) < 3:
-        print(f'Usage: {sys.argv[0]} <user-id> <proof-file>')
-        exit(1)
-
-    userId = sys.argv[1]
-    fileName = sys.argv[2]
-    if uploadProof(userId, fileName, verbose=True):
-        print('Success')
-    else:
-        exit(1)

From dc18f72513173a31f19604198a7c74a3031db102 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Jul 2026 16:45:33 +0000
Subject: [PATCH 100/214] Require a clear advantage before overriding the
 default GRAPHS=1 setting.  The default setting uses less CPU time (1.7% vs.
 8% on my machine).

---
 src/tune.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index 40529793..bfef0050 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -938,7 +938,7 @@ void Tune::tune() {
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_modm31 = modm31; }
       }
       log("Best MODM31 is %u.  Default MODM31 is 0.\n", best_modm31);
-      configsUpdate(current_cost, best_cost, 0.003, "MODM31", best_modm31, newConfigKeyVals, suggestedConfigKeyVals);
+      configsUpdate(current_cost, best_cost, 0.000, "MODM31", best_modm31, newConfigKeyVals, suggestedConfigKeyVals);
       args->flags["MODM31"] = to_string(best_modm31);
     }
 
@@ -1064,7 +1064,7 @@ void Tune::tune() {
 
     // Find best CUDA compiler options
 #if CUDA_BACKEND
-    // Find best GRAPHS setting
+    // Find best GRAPHS setting.  Require a clear advantage to override the default GRAPHS setting.  GRAPHS=1 will use less CPU time.
     if (true) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());
@@ -1080,7 +1080,7 @@ void Tune::tune() {
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_graphs = graphs; }
       }
       log("Best GRAPHS is %u.  Default GRAPHS is 1.\n", best_graphs);
-      configsUpdate(current_cost, best_cost, 0.000, "GRAPHS", best_graphs, newConfigKeyVals, suggestedConfigKeyVals);
+      configsUpdate(current_cost, best_cost, 0.003, "GRAPHS", best_graphs, newConfigKeyVals, suggestedConfigKeyVals);
       args->flags["GRAPHS"] = to_string(best_graphs);
     }
 

From ce05c9ff7c20147e82913e1deff4eae1c8a87c64 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Jul 2026 17:06:57 +0000
Subject: [PATCH 101/214] Tweaked help text

---
 src/Args.cpp | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index a11c4748..256fb5af 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -167,16 +167,11 @@ named "config.txt" in the prpll run directory.
 -cache             : use binary kernel cache; useful with repeated use of -roeTune and -tune
 -roe               : measure the Round-Off Error (Z) for more iterations (slow)
 
--use <define>      : comma separated list of defines for configuring gpuowl.cl, such as:
+-use <define>      : comma separated list of defines for configuring openCL code, such as:
   -use FAST_BARRIER: on AMD Radeon VII and older AMD GPUs, use a faster barrier().  This option
                      may not work on Nvidia GPUs or on RDNA AMD GPUs where it produces errors
                      (which are nevertheless detected).
   -use NO_ASM      : do not use __asm() blocks (inline assembly)
-  -use STATS=<val> : enable carry statistics collection & logging, for the kernel according to <val>:
-                     1 = CarryFused
-                     2 = CarryFusedMul
-                     4 = CarryA
-                     8 = CarryMul
   -use TAIL_KERNELS=<val> : change how tailSquare operates according to <val>:
                      0 = single wide, single kernel
                      1 = single wide, two kernels
@@ -196,18 +191,21 @@ named "config.txt" in the prpll run directory.
                      1 = All trig values are pre-computed and read from memmory.
 
   -use DEBUG       : enable asserts in OpenCL kernels (slow, developers)
+  -use STATS=<val> : enable carry statistics collection & logging (developers), for the kernel according to <val>:
+                     1 = CarryFused, 2 = CarryFusedMul, 4 = CarryA, 8 = CarryMul
 
 -tune <options>    : Looks for best settings to include in config.txt.  Times many FFTs to find fastest one to test exponents -- written to tune.txt.
                      An -fft <spec> can be given on the command line to limit which FFTs are timed.
                      Options are not required.  If present, the options are a comma separated list from below.
                          noconfig     - Skip timings to find best config.txt settings.
-			 inplace      - Skip timings for not-in-place FFTs and NTTs.  All nVidia GPUs seem to prefer in-place FFTs and NTTs.
-			 fp64         - Tune for settings that affect FP64 FFTs.  Time FP64 FFTs for tune.txt.
+                         inplace      - Skip timings for not-in-place FFTs and NTTs.  All nVidia GPUs seem to prefer in-place FFTs and NTTs.
+                         fp64         - Tune for settings that affect FP64 FFTs.  Time FP64 FFTs for tune.txt.
                          ntt          - Tune for settings that affect integer NTTs.  Time integer NTTs for tune.txt.
                          nofp32       - Do not tune for settings that affect FP32 FFTs.  Some openCL compilers have trouble with FP32.
                          minexp=<val> - Time FFTs to find the best one for exponents greater than <val>.
                          maxexp=<val> - Time FFTs to find the best one for exponents less than <val>.
-                         quick=<val> - Higher values equals a quicker, potentially less accurate tune.  Val ranges from 1 to 10.
+                         fp6431       - Time FP64+M31 FFTs for tune.txt.  Only GPUs with great FP64 performance will find this beneficial.
+                         quick=<val>  - Use higher values for a quicker, potentially less accurate tune.  Val ranges from 1 to 10.
 -device <N>        : select the GPU at position N in the list of devices
 -uid    <UID>      : select the GPU with the given UID (on ROCm/AMDGPU, Linux)
 -pci    <BDF>      : select the GPU with the given PCI BDF, e.g. "0c:00.0"

From 9270110508b377dd5cb05ca6409118466df48eaa Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 23 Jul 2026 21:49:00 +0000
Subject: [PATCH 102/214] Output GPU name at start up.

---
 src/Args.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 256fb5af..05103425 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -420,7 +420,9 @@ void Args::parse(const string& line) {
 
 void Args::setDefaults() {
   uid = getUidFromPos(device);
-  log("device %d, OpenCL %s, unique id '%s'\n", device, getDriverVersionByPos(device).c_str(), uid.c_str());
+  cl_device_id dev = getDevice(device);
+  log("device %d, OpenCL %s, %s, unique id '%s'\n", device, getDriverVersionByPos(device).c_str(),
+      isAmdGpu(dev) ? getBoardName(dev).c_str() : getDeviceName(dev).c_str(), uid.c_str());
   
   if (!masterDir.empty()) {
     assert(masterDir.is_absolute());

From c577f9834bbd5eee0f7b376a336a6234a591737f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 24 Jul 2026 21:05:35 +0000
Subject: [PATCH 103/214] Allow changing the L1 cache config when using CUDA

---
 src/Gpu.cpp              |  6 ++++++
 src/clwrap.h             |  3 +++
 src/cuda/clwrap_cuda.cpp |  9 +++++++++
 src/tune.cpp             | 22 +++++++++++++++++++++-
 4 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 35b8c1fb..dbc72092 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -992,6 +992,12 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   // Set flag indicating we're going to use CUDA graphs
   use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1);
 
+  // Set L1 cache configuration.  Really we should only do this once rather than once per worker.
+  // However, the current way PRPLL is organized would then make this option hard to tune.
+#if CUDA_BACKEND
+    cudaSetL1Config(args.value("L1CUDA", 0));
+#endif
+
   // Process the queue.  I don't know if this is really needed.
   queue.finish();
 }
diff --git a/src/clwrap.h b/src/clwrap.h
index b42c490e..3ef3fa20 100644
--- a/src/clwrap.h
+++ b/src/clwrap.h
@@ -133,6 +133,9 @@ u32 getEventInfo(cl_event event);
 cl_context getQueueContext(cl_command_queue q);
 
 #ifdef CUDA_BACKEND
+// Set L1 cache configuration - 4 possibilities
+void cudaSetL1Config(int x);
+
 // Set L2 cache persistence for multiple read-only buffers on the given stream.
 // Computes the address span covering all buffers and sets a single access policy window.
 // Buffers that are nullptr or zero-size are skipped.
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 83cf6fcd..4f5700ea 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -1123,6 +1123,15 @@ int clSetKernelArgSVMPointer(cl_kernel k, unsigned pos, const void* ptr) {
 
 // C++ linkage — must be outside the extern "C" block above.
 
+// Set L1 cache configuration
+void cudaSetL1Config(int x) {
+  ensureContextCurrent();
+  cuCtxSetCacheConfig (x == 0 ? CU_FUNC_CACHE_PREFER_NONE :            // no preference for shared memory or L1 (default)
+                       x == 1 ? CU_FUNC_CACHE_PREFER_SHARED :          // prefer larger shared memory and smaller L1 cache
+                       x == 2 ? CU_FUNC_CACHE_PREFER_L1 :              // prefer larger L1 cache and smaller shared memory
+                       CU_FUNC_CACHE_PREFER_EQUAL);                    // prefer equal sized L1 cache and shared memory
+}
+
 // Set L2 cache persistence for multiple read-only buffers on the given stream.
 // Computes the minimum address span covering all buffers, then sets one access policy
 // window with hitRatio sized so that only the actual buffer bytes get persisting treatment,
diff --git a/src/tune.cpp b/src/tune.cpp
index bfef0050..9011b572 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -1064,6 +1064,26 @@ void Tune::tune() {
 
     // Find best CUDA compiler options
 #if CUDA_BACKEND
+    // Find best L1CUDA setting.
+    if (true) {
+      FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
+      u64 exponent = primes.prevPrime(fft.maxExp());
+      u32 best_l1cuda = 0;
+      u32 current_l1cuda = args->value("L1CUDA", 0);
+      double best_cost = -1.0;
+      double current_cost = -1.0;
+      for (u32 l1cuda : {0, 1, 2, 3}) {
+        args->flags["L1CUDA"] = to_string(l1cuda);
+        double cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);
+        log("Time for %12s using L1CUDA=%u is %6.1f\n", fft.spec().c_str(), l1cuda, cost);
+        if (l1cuda == current_l1cuda) current_cost = cost;
+        if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_l1cuda = l1cuda; }
+      }
+      log("Best L1CUDA is %u.  Default L1CUDA is 1.\n", best_l1cuda);
+      configsUpdate(current_cost, best_cost, 0.000, "L1CUDA", best_l1cuda, newConfigKeyVals, suggestedConfigKeyVals);
+      args->flags["L1CUDA"] = to_string(best_l1cuda);
+    }
+
     // Find best GRAPHS setting.  Require a clear advantage to override the default GRAPHS setting.  GRAPHS=1 will use less CPU time.
     if (true) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
@@ -1084,7 +1104,7 @@ void Tune::tune() {
       args->flags["GRAPHS"] = to_string(best_graphs);
     }
 
-    // See if disabling our default register usage makes sense
+    // See if disabling the default register usage makes sense
     if (true) {
       FFTConfig fft{*defaultShape, variant, CARRY_AUTO};
       u64 exponent = primes.prevPrime(fft.maxExp());

From b4716e9797145afbae486bc85bc42db73fd9dfe6 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 24 Jul 2026 22:24:17 +0000
Subject: [PATCH 104/214] Added L!CUDA to list of recognized -use options

---
 src/Gpu.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index dbc72092..f313cc06 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -291,7 +291,8 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
                               "NOREG",                  // CUDA - experimental
                               "WMUL",
                               "MULTI_Q",
-                              "GRAPHS"
+                              "GRAPHS",
+                              "L1CUDA"
                             });
     if (!isValid) {
       log("Warning: unrecognized -use key '%s'\n", k.c_str());

From 0852d8019ad3e1da27c3491a4edb7bcc99e5fa7f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 25 Jul 2026 00:33:14 +0000
Subject: [PATCH 105/214] Output -time timings to more precision (RTX 5090 is
 bloody fast!).  Align output better.

---
 src/Gpu.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index f313cc06..5e6f99d6 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1817,8 +1817,8 @@ void Gpu::logTimeKernels() {
     double const percent = 100.0 / total * p->times[2];
     if (!args.verbose && percent < 0.2) { break; }
     snprintf(buf, sizeof(buf),
-             args.verbose ? "%s %5.2f%% %-11s : %6.0f us/call x %5d calls  (%.3f %.0f)\n"
-                          : "%s %5.2f%% %-11s %4.0f x%6d  %.3f %.0f\n",
+             args.verbose ? "%s %5.2f%% %-18s : %6.1f us/call x %5d calls  (%.3f %.0f)\n"
+                          : "%s %5.2f%% %-18s %6.1f x%6d  %.3f %.0f\n",
              logContext().c_str(),
              percent, p->name.c_str(), p->times[2] * f, n, p->times[0] * (f * 1e-3), p->times[1] * (f * 1e-3));
     s += buf;

From 2b555a3cd580248ab043acdb6a6714f235bc46ad Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 26 Jul 2026 02:04:46 +0000
Subject: [PATCH 106/214] Fixed typo

---
 src/tune.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/tune.cpp b/src/tune.cpp
index 9011b572..3b4ee686 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -1079,7 +1079,7 @@ void Tune::tune() {
         if (l1cuda == current_l1cuda) current_cost = cost;
         if (best_cost < 0.0 || cost < best_cost) { best_cost = cost; best_l1cuda = l1cuda; }
       }
-      log("Best L1CUDA is %u.  Default L1CUDA is 1.\n", best_l1cuda);
+      log("Best L1CUDA is %u.  Default L1CUDA is 0.\n", best_l1cuda);
       configsUpdate(current_cost, best_cost, 0.000, "L1CUDA", best_l1cuda, newConfigKeyVals, suggestedConfigKeyVals);
       args->flags["L1CUDA"] = to_string(best_l1cuda);
     }

From ee9fe6395e8ac1e00f43d3bc51d72c001f1fe3e2 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Sun, 26 Jul 2026 03:18:04 -0700
Subject: [PATCH 107/214] Added CD workflow to build release executables.

---
 .github/workflows/cd.yml | 157 +++++++++++++++++++++++++++++++++++++++
 .github/workflows/ci.yml |  11 ++-
 Makefile                 |   6 +-
 PRPLL.vcxproj            |  10 ++-
 src/cuda/clwrap_cuda.cpp |   6 +-
 5 files changed, 183 insertions(+), 7 deletions(-)
 create mode 100644 .github/workflows/cd.yml

diff --git a/.github/workflows/cd.yml b/.github/workflows/cd.yml
new file mode 100644
index 00000000..017af7cb
--- /dev/null
+++ b/.github/workflows/cd.yml
@@ -0,0 +1,157 @@
+name: CD
+
+on:
+  push:
+    tags:
+      - '*'
+  workflow_dispatch:
+
+jobs:
+  Linux-OpenCL:
+    name: Linux OpenCL
+
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v7
+      with:
+        fetch-depth: 0
+        fetch-tags: true
+    - name: Script
+      run: |
+        docker run --rm -i -v "$GITHUB_WORKSPACE:/workspace" -w /workspace ubuntu:22.04 bash -s <<'EOF'
+        set -e -o pipefail
+        apt-get update -y
+        apt-get install -y build-essential git ocl-icd-opencl-dev
+        g++ --version
+
+        make -O -j "$(nproc)"
+        cd build-release
+        rm -f -- *.o
+        ./prpll -h
+        EOF
+    - uses: actions/upload-artifact@v7
+      with:
+        name: PRPLL-NTT_linux_x86_opencl
+        path: |
+          README.*
+          LICENSE
+          tools/
+          build-release/*
+
+  Linux-CUDA:
+    name: Linux CUDA
+
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        include:
+        - cuda: '13.2.1'
+          container: 'ubuntu24.04'
+        - cuda: '12.9.2'
+          container: 'ubuntu24.04'
+        - cuda: '11.8.0'
+          container: 'ubuntu22.04'
+        # - cuda: '10.2'
+        #   container: 'ubuntu18.04'
+      fail-fast: false
+    steps:
+    - uses: actions/checkout@v7
+      with:
+        fetch-depth: 0
+        fetch-tags: true
+    - name: Script
+      run: |
+        docker run --rm -i -v "$GITHUB_WORKSPACE:/workspace" -w /workspace "nvcr.io/nvidia/cuda:${{ matrix.cuda }}-devel-${{ matrix.container }}" bash -s <<'EOF'
+        set -e -o pipefail
+        apt-get update -y
+        apt-get install -y build-essential git
+        g++ --version
+
+        make CUDA=1 ${{ matrix.cuda != '10.2' && 'CUDA_STATIC=1' || '' }} -O -j "$(nproc)"
+        cd build-cuda
+        rm -f -- *.o
+        if [[ "${{ matrix.cuda }}" == "10.2" ]]; then
+          cp /usr/local/cuda/lib64/libnvrtc.so.10.2 /usr/local/cuda/lib64/libnvrtc-builtins.so.10.2 .
+        fi
+        # ./prpll -h
+        EOF
+    - uses: actions/upload-artifact@v7
+      with:
+        name: PRPLL-NTT_linux_x86_cuda_${{ matrix.cuda }}
+        path: |
+          README.*
+          LICENSE
+          tools/
+          build-cuda/*
+
+  Windows-OpenCL:
+    name: Windows OpenCL
+
+    runs-on: windows-2022
+    steps:
+    - uses: actions/checkout@v7
+      with:
+        fetch-depth: 0
+        fetch-tags: true
+    - uses: step-security/msvc-dev-cmd@v1
+    - name: Install OpenCL
+      run: |
+        vcpkg install opencl
+    - name: Before Script
+      shell: bash
+      run: |
+        bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
+    - name: Script
+      run: |
+        msbuild PRPLL.sln /m /p:Configuration=OpenCL-Release /p:OpenCLRoot=C:\vcpkg\installed\x64-windows
+        cd build-msvc\OpenCL\Release\
+        & .\prpll -h
+    - uses: actions/upload-artifact@v7
+      with:
+        name: PRPLL-NTT_win_x86_opencl
+        path: |
+          README.*
+          LICENSE
+          tools/
+          build-msvc/OpenCL/Release/*
+
+  Windows-CUDA:
+    name: Windows CUDA
+
+    runs-on: windows-2022
+    strategy:
+      matrix:
+        cuda: ['13.2.1', '12.9.2', '11.8.0', '10.2.89']
+      fail-fast: false
+    steps:
+    - uses: actions/checkout@v7
+      with:
+        fetch-depth: 0
+        fetch-tags: true
+    - uses: step-security/msvc-dev-cmd@v1
+    - name: Install CUDA Toolkit
+      uses: N-Storm/cuda-toolkit@v0.2.34
+      with:
+        cuda: ${{ matrix.cuda }}
+    - name: Before Script
+      shell: bash
+      run: |
+        bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
+    - name: Script
+      run: |
+        msbuild PRPLL.sln /m /p:Configuration=CUDA-${{ matrix.cuda != '10.2.89' && 'Release' || 'Release-non-static' }}
+        cd build-msvc\CUDA\Release*\
+        if ("${{ matrix.cuda }}" -eq "10.2.89") {
+          Copy-Item "$env:CUDA_PATH\bin\nvrtc64_102_0.dll", "$env:CUDA_PATH\bin\nvrtc-builtins64_102.dll" .
+        }
+        # & .\prpll -h
+    - uses: actions/upload-artifact@v7
+      with:
+        name: PRPLL-NTT_win_x86_cuda_${{ matrix.cuda }}
+        path: |
+          README.*
+          LICENSE
+          tools/
+          build-msvc/CUDA/Release*/*
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index ed44d7c5..b6f1c7e2 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -37,7 +37,7 @@ jobs:
     - uses: actions/upload-artifact@v7
       if: always()
       with:
-        name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_prpll
+        name: ${{ matrix.os }}_${{ endsWith(matrix.os, '-arm') && 'arm' || 'x86' }}_${{ matrix.cxx }}_opencl_prpll
         path: build-debug/
 
   Linux-CUDA:
@@ -161,11 +161,12 @@ jobs:
       shell: bash
       run: |
         bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
-        printf '"%s"\n' "$(basename "$(git describe --tags --long --always --match 'v/prpll/*')")" > src/version.inc
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
     - name: Script
       run: |
         msbuild PRPLL.sln /m /p:Configuration=OpenCL-Debug /p:OpenCLRoot=C:\vcpkg\installed\x64-windows
-        & .\build-msvc\OpenCL\Debug\prpll.exe -h
+        cd build-msvc\OpenCL\Debug\
+        & .\prpll -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
@@ -185,10 +186,12 @@ jobs:
       shell: bash
       run: |
         bash genbundle.sh src/cuda/*.cuh src/cl/*.cl > src/bundle.cpp
-        printf '"%s"\n' "$(basename "$(git describe --tags --long --always --match 'v/prpll/*')")" > src/version.inc
+        printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
     - name: Script
       run: |
         msbuild PRPLL.sln /m /p:Configuration=CUDA-Debug
+        # cd build-msvc\CUDA\Debug\
+        # & .\prpll -h
     - uses: actions/upload-artifact@v7
       if: always()
       with:
diff --git a/Makefile b/Makefile
index 31400c27..da1dabaf 100644
--- a/Makefile
+++ b/Makefile
@@ -24,7 +24,11 @@ ifeq ($(CUDA), 1)
  CUDASRCS1 = clwrap_cuda.cpp cudawrap.cpp
  CUDAFLAGS = -DCUDA_BACKEND -Isrc/cuda -I/usr/local/cuda/include
  CUDAOBJS = $(CUDASRCS1:%.cpp=$(BIN)/%.o)
- OPENCL_LIBS = -L/usr/local/cuda/lib64 -lcuda -lnvrtc
+ ifeq ($(CUDA_STATIC), 1)
+  OPENCL_LIBS = -L/usr/local/cuda/lib64 -Wl,--start-group -lnvrtc_static -lnvrtc-builtins_static -lnvptxcompiler_static -Wl,--end-group -lcuda
+ else
+  OPENCL_LIBS = -L/usr/local/cuda/lib64 -lnvrtc -lcuda
+ endif
 else
  BIN=build-release
  CUDAFLAGS =
diff --git a/PRPLL.vcxproj b/PRPLL.vcxproj
index d63a2737..49cf61fc 100644
--- a/PRPLL.vcxproj
+++ b/PRPLL.vcxproj
@@ -158,6 +158,14 @@
       <OptimizeReferences>true</OptimizeReferences>
     </Link>
   </ItemDefinitionGroup>
+  <ItemDefinitionGroup>
+    <ClCompile>
+      <PreprocessorDefinitions>WINVER=0x0601;_WIN32_WINNT=0x0601;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+    </ClCompile>
+    <Link>
+      <AdditionalOptions>/SUBSYSTEM:CONSOLE,6.01 %(AdditionalOptions)</AdditionalOptions>
+    </Link>
+  </ItemDefinitionGroup>
   <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Debug'">
     <Link>
       <AdditionalLibraryDirectories>$(OpenCLRoot)\debug\lib;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
@@ -186,7 +194,7 @@
   </ItemDefinitionGroup>
   <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Release'">
     <Link>
-      <AdditionalDependencies>cuda.lib;nvrtc_static.lib;nvrtc-builtins_static.lib;nvptxcompiler_static.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
+      <AdditionalDependencies>cuda.lib;nvrtc_static.lib;nvrtc-builtins_static.lib;nvptxcompiler_static.lib;User32.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
     </Link>
   </ItemDefinitionGroup>
   <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 4f5700ea..20cd3c21 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -1136,6 +1136,7 @@ void cudaSetL1Config(int x) {
 // Computes the minimum address span covering all buffers, then sets one access policy
 // window with hitRatio sized so that only the actual buffer bytes get persisting treatment,
 // not the gaps between non-contiguous allocations.
+#if CUDA_VERSION >= 11000
 [[maybe_unused]] static void cudaSetL2Persistent(cl_command_queue q, const std::vector<cl_mem>& buffers) {
   if (!q) return;
 
@@ -1188,6 +1189,7 @@ void cudaSetL1Config(int x) {
             buffers.size());
   }
 }
+#endif
 
 
 // OpenCL-like extensions invented to provide a clean interface to some nVidia CUDA features
@@ -1213,8 +1215,10 @@ int clGraphEndRecording(cl_command_queue q, cl_graph* graph) {
   CUresult r = cuStreamEndCapture(q->stream, &g->graph);
 #if CUDA_VERSION >= 12000
   if (r == CUDA_SUCCESS) r = cuGraphInstantiate(&g->graphExec, g->graph, 0);
-#else
+#elif CUDA_VERSION >= 11040
   if (r == CUDA_SUCCESS) r = cuGraphInstantiateWithFlags(&g->graphExec, g->graph, 0);
+#else
+  if (r == CUDA_SUCCESS) r = cuGraphInstantiate(&g->graphExec, g->graph, nullptr, nullptr, 0);
 #endif
   *graph = g;
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;

From 8b7d6ce973cc5d49a7bab0b18c766e5719f534f2 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 27 Jul 2026 16:10:49 +0000
Subject: [PATCH 108/214] The selfTest code (for developers only) was causing
 issues on some GPUs.  Changed -verbose from a true/false flag to a level. 
 SelfTest is now activated by -verbose 99.

---
 src/Args.cpp         | 9 +++++----
 src/Args.h           | 2 +-
 src/Gpu.cpp          | 2 +-
 src/KernelCompiler.h | 2 +-
 src/common.h         | 4 ++--
 5 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 05103425..179bbd83 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -15,8 +15,8 @@
 #include <sstream>
 #include <algorithm>
 
-// This is a copy of the args.verbose flag.  It allows the CUDA wrapper to access the flag.
-bool prpll_verbose = false;
+// This is a copy of the args.verbose level.  It allows the CUDA wrapper to access the value.
+int prpll_verbose = 0;
 
 int Args::value(const string& key, int valNotFound) const {
   auto it = flags.find(key);
@@ -319,8 +319,9 @@ void Args::parse(const string& line) {
     } else if (key == "-carryTune") {
       carryTune = true;
     } else if (key == "-verbose" || key == "-v") {
-      verbose = true;
-      prpll_verbose = true;
+      if (s.empty()) verbose = 1;
+      else verbose = stoi(s);
+      prpll_verbose = verbose;
     } else if (key == "-time") {
       profile = true;
     } else if (key == "-workers") {
diff --git a/src/Args.h b/src/Args.h
index d876ce79..5f1a1a0c 100644
--- a/src/Args.h
+++ b/src/Args.h
@@ -58,7 +58,7 @@ class Args {
 
   bool safeMath = true;
   bool clean = true;
-  bool verbose = false;
+  int verbose = 0;
   bool useCache = false;
   bool profile = false;
   bool smallest = false;
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 5e6f99d6..e6293f91 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -981,7 +981,7 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   bufStatsCarry.zero();
   bufTrue.write({1});
 
-  if (args.verbose) {
+  if (args.verbose >= 99) {
     selftestTrig();
   }
 
diff --git a/src/KernelCompiler.h b/src/KernelCompiler.h
index 19cd9d60..a5588331 100644
--- a/src/KernelCompiler.h
+++ b/src/KernelCompiler.h
@@ -18,7 +18,7 @@ class KernelCompiler {
   std::string baseArgs;
   std::string dump;
   const bool useCache;
-  const bool verbose;
+  const int verbose;
   
   std::vector<Program> clSources;
   std::vector<std::pair<std::string, std::string>> files;
diff --git a/src/common.h b/src/common.h
index 3da39734..13a010e9 100644
--- a/src/common.h
+++ b/src/common.h
@@ -6,8 +6,8 @@
 #include <string>
 #include <vector>
 
-// This is a copy of the args.verbose flag.  It allows the CUDA wrapper to access the flag.
-extern bool prpll_verbose;
+// This is a copy of the args.verbose level.  It allows the CUDA wrapper to access the value.
+extern int prpll_verbose;
 
 using u8  = uint8_t;
 using i32 = int32_t;

From 4a23f04fc2dacfb1b854540f14418b23e482f580 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 29 Jul 2026 03:22:36 +0000
Subject: [PATCH 109/214] Fixed typo bugs in unused LDSSWIZ code

---
 src/cl/fftbase.cl | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 220d4527..36137055 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -135,7 +135,7 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && n == 4) {
+    if (!force_default && f == 1 && RADIX == 4) {
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
       bar(WG);
@@ -312,7 +312,7 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && n == RADIX) {
+    if (!force_default && f == 4 && RADIX == 4) {
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
       bar(WG);

From 9d4be5208338a000c9c2625928cdd6c8022f3a26 Mon Sep 17 00:00:00 2001
From: Teal Dulcet <tdulcet@pdx.edu>
Date: Mon, 27 Jul 2026 05:13:03 -0700
Subject: [PATCH 110/214] Updated CD workflow based on feedback.

---
 .github/workflows/cd.yml | 86 +++++++++++++++++++++-------------------
 .github/workflows/ci.yml |  9 ++---
 Makefile                 | 45 ++++++++++++---------
 PRPLL.sln                |  3 --
 PRPLL.vcxproj            | 32 +++++++--------
 5 files changed, 89 insertions(+), 86 deletions(-)

diff --git a/.github/workflows/cd.yml b/.github/workflows/cd.yml
index 017af7cb..06dd8455 100644
--- a/.github/workflows/cd.yml
+++ b/.github/workflows/cd.yml
@@ -18,25 +18,28 @@ jobs:
         fetch-tags: true
     - name: Script
       run: |
-        docker run --rm -i -v "$GITHUB_WORKSPACE:/workspace" -w /workspace ubuntu:22.04 bash -s <<'EOF'
+        docker run --rm -i -v "$GITHUB_WORKSPACE:/workspace" -w /workspace centos:7 bash -s <<'EOF'
         set -e -o pipefail
-        apt-get update -y
-        apt-get install -y build-essential git ocl-icd-opencl-dev
+        sed -i -e '/^mirrorlist/d;/^#baseurl=/{s,^#,,;s,/mirror,/vault,;}' /etc/yum.repos.d/CentOS*.repo
+        # yum update -y
+        yum install -y centos-release-scl epel-release
+        sed -i -e '/^mirrorlist/d;/^# *baseurl=/{s,^# *,,;s,/mirror,/vault,;}' /etc/yum.repos.d/CentOS*.repo
+        yum install -y devtoolset-11-gcc-c++ devtoolset-11-libstdc++-static make git ocl-icd-devel
+
+        source /opt/rh/devtoolset-11/enable
         g++ --version
+        ldd --version
 
-        make -O -j "$(nproc)"
+        make STATIC_RUNTIME=1 -j "$(nproc)"
+        cp -vr README.* LICENSE tools/ build-release/
         cd build-release
         rm -f -- *.o
         ./prpll -h
         EOF
     - uses: actions/upload-artifact@v7
       with:
-        name: PRPLL-NTT_linux_x86_opencl
-        path: |
-          README.*
-          LICENSE
-          tools/
-          build-release/*
+        name: PRPLL-NTT_linux_x64_opencl
+        path: build-release/*
 
   Linux-CUDA:
     name: Linux CUDA
@@ -46,13 +49,13 @@ jobs:
       matrix:
         include:
         - cuda: '13.2.1'
-          container: 'ubuntu24.04'
+          container: 'rockylinux8'
         - cuda: '12.9.2'
-          container: 'ubuntu24.04'
+          container: 'rockylinux8'
         - cuda: '11.8.0'
-          container: 'ubuntu22.04'
-        # - cuda: '10.2'
-        #   container: 'ubuntu18.04'
+          container: 'centos7'
+        - cuda: '10.2'
+          container: 'centos7'
       fail-fast: false
     steps:
     - uses: actions/checkout@v7
@@ -63,26 +66,35 @@ jobs:
       run: |
         docker run --rm -i -v "$GITHUB_WORKSPACE:/workspace" -w /workspace "nvcr.io/nvidia/cuda:${{ matrix.cuda }}-devel-${{ matrix.container }}" bash -s <<'EOF'
         set -e -o pipefail
-        apt-get update -y
-        apt-get install -y build-essential git
+        if [[ "${{ matrix.container }}" == centos* ]]; then
+          sed -i -e '/^mirrorlist/d;/^#baseurl=/{s,^#,,;s,/mirror,/vault,;}' /etc/yum.repos.d/CentOS*.repo
+          # yum update -y
+          yum install -y centos-release-scl epel-release
+          sed -i -e '/^mirrorlist/d;/^# *baseurl=/{s,^# *,,;s,/mirror,/vault,;}' /etc/yum.repos.d/CentOS*.repo
+          yum install -y devtoolset-11-gcc-c++ devtoolset-11-libstdc++-static make git
+          source /opt/rh/devtoolset-11/enable
+        else
+          # dnf update -y
+          dnf install -y gcc-toolset-11-gcc-c++ make git
+          source /opt/rh/gcc-toolset-11/enable
+        fi
+
         g++ --version
+        ldd --version
 
-        make CUDA=1 ${{ matrix.cuda != '10.2' && 'CUDA_STATIC=1' || '' }} -O -j "$(nproc)"
+        make CUDA=1 STATIC_RUNTIME=1 STATIC_CUDA=${{ matrix.cuda != '10.2' && '1' || '0' }} -j "$(nproc)"
+        cp -vr README.* LICENSE tools/ build-cuda/
         cd build-cuda
         rm -f -- *.o
         if [[ "${{ matrix.cuda }}" == "10.2" ]]; then
-          cp /usr/local/cuda/lib64/libnvrtc.so.10.2 /usr/local/cuda/lib64/libnvrtc-builtins.so.10.2 .
+          cp -v /usr/local/cuda/lib64/{libnvrtc.so.10.2,libnvrtc-builtins.so.10.2} .
         fi
         # ./prpll -h
         EOF
     - uses: actions/upload-artifact@v7
       with:
-        name: PRPLL-NTT_linux_x86_cuda_${{ matrix.cuda }}
-        path: |
-          README.*
-          LICENSE
-          tools/
-          build-cuda/*
+        name: PRPLL-NTT_linux_x64_cuda_${{ matrix.cuda }}
+        path: build-cuda/*
 
   Windows-OpenCL:
     name: Windows OpenCL
@@ -104,17 +116,14 @@ jobs:
         printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
     - name: Script
       run: |
-        msbuild PRPLL.sln /m /p:Configuration=OpenCL-Release /p:OpenCLRoot=C:\vcpkg\installed\x64-windows
+        msbuild PRPLL.sln /m /p:Configuration=OpenCL-Release /p:StaticRuntime=true /p:OpenCLRoot=C:\vcpkg\installed\x64-windows
+        Copy-Item -Recurse README.*, LICENSE, tools\ build-msvc\OpenCL\Release\
         cd build-msvc\OpenCL\Release\
         & .\prpll -h
     - uses: actions/upload-artifact@v7
       with:
-        name: PRPLL-NTT_win_x86_opencl
-        path: |
-          README.*
-          LICENSE
-          tools/
-          build-msvc/OpenCL/Release/*
+        name: PRPLL-NTT_win_x64_opencl
+        path: build-msvc/OpenCL/Release/*
 
   Windows-CUDA:
     name: Windows CUDA
@@ -141,17 +150,14 @@ jobs:
         printf '"%s"\n' "$(basename "$(git describe --tags --long --always)")" > src/version.inc
     - name: Script
       run: |
-        msbuild PRPLL.sln /m /p:Configuration=CUDA-${{ matrix.cuda != '10.2.89' && 'Release' || 'Release-non-static' }}
-        cd build-msvc\CUDA\Release*\
+        msbuild PRPLL.sln /m /p:Configuration=CUDA-Release /p:StaticRuntime=true /p:StaticCUDA=${{ matrix.cuda != '10.2.89' && 'true' || 'false' }}
+        Copy-Item -Recurse README.*, LICENSE, tools\ build-msvc\CUDA\Release\
+        cd build-msvc\CUDA\Release\
         if ("${{ matrix.cuda }}" -eq "10.2.89") {
           Copy-Item "$env:CUDA_PATH\bin\nvrtc64_102_0.dll", "$env:CUDA_PATH\bin\nvrtc-builtins64_102.dll" .
         }
         # & .\prpll -h
     - uses: actions/upload-artifact@v7
       with:
-        name: PRPLL-NTT_win_x86_cuda_${{ matrix.cuda }}
-        path: |
-          README.*
-          LICENSE
-          tools/
-          build-msvc/CUDA/Release*/*
+        name: PRPLL-NTT_win_x64_cuda_${{ matrix.cuda }}
+        path: build-msvc/CUDA/Release/*
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index b6f1c7e2..d038df19 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -4,7 +4,7 @@ on:
   push:
   pull_request:
   schedule:
-    - cron:  '0 0 1 * *'
+    - cron: '0 0 1 * *'
 
 jobs:
   Linux-OpenCL:
@@ -48,9 +48,6 @@ jobs:
       matrix:
         os: [ubuntu-22.04, ubuntu-24.04, ubuntu-26.04]
         cxx: [g++, clang++]
-        exclude:
-        - os: ubuntu-22.04-arm
-          cxx: clang++
       fail-fast: false
     env:
       CXX: ${{ matrix.cxx }}
@@ -133,7 +130,7 @@ jobs:
     - name: Install Clang
       if: ${{ matrix.cxx == 'clang++' }}
       run: |
-        pacman -S --noconfirm mingw-w64-x86_64-clang
+        pacman -S --noconfirm "${env:PACKAGE_PREFIX}clang"
         & $env:CXX --version
     - name: Script
       run: |
@@ -204,7 +201,7 @@ jobs:
     runs-on: ${{ matrix.os }}
     strategy:
       matrix:
-        os: [macos-15-intel, macos-latest]
+        os: [macos-26-intel, macos-latest]
       fail-fast: false
     env:
       CXX: g++-15
diff --git a/Makefile b/Makefile
index da1dabaf..c41aa5fb 100644
--- a/Makefile
+++ b/Makefile
@@ -4,6 +4,11 @@
 
 # On Windows invoke with "make exe" or "make all"
 
+DEBUG = 0
+CUDA = 0
+STATIC_RUNTIME = 0
+STATIC_CUDA = 0
+
 # Uncomment below as desired to set a particular compiler or force a debug build:
 # CXX = g++-12
 # DEBUG = 1
@@ -12,22 +17,17 @@
 
 HOST_OS = $(shell uname -s)
 
-ifeq ($(HOST_OS), Darwin)
-# Real GCC (not clang), needed for 128-bit floats and std::filesystem::path
-CXX ?= g++-15
-else
 CXX ?= g++
-endif
 
 ifeq ($(CUDA), 1)
  BIN=build-cuda
  CUDASRCS1 = clwrap_cuda.cpp cudawrap.cpp
  CUDAFLAGS = -DCUDA_BACKEND -Isrc/cuda -I/usr/local/cuda/include
  CUDAOBJS = $(CUDASRCS1:%.cpp=$(BIN)/%.o)
- ifeq ($(CUDA_STATIC), 1)
-  OPENCL_LIBS = -L/usr/local/cuda/lib64 -Wl,--start-group -lnvrtc_static -lnvrtc-builtins_static -lnvptxcompiler_static -Wl,--end-group -lcuda
+ ifeq ($(STATIC_CUDA), 1)
+  OPENCL_LIBS = -L/usr/local/cuda/lib64 -Wl,--start-group -lnvrtc_static -lnvrtc-builtins_static -lnvptxcompiler_static -Wl,--end-group -lcuda -lpthread -ldl
  else
-  OPENCL_LIBS = -L/usr/local/cuda/lib64 -lnvrtc -lcuda
+  OPENCL_LIBS = -L/usr/local/cuda/lib64 -Wl,-rpath,'$$ORIGIN' -lnvrtc -lcuda -lpthread
  endif
 else
  BIN=build-release
@@ -36,15 +36,24 @@ else
  ifeq ($(HOST_OS), Darwin)
   OPENCL_LIBS = -framework OpenCL
  else
-  OPENCL_LIBS = -lOpenCL
+  OPENCL_LIBS = -lOpenCL -lpthread
  endif
 endif
 
-ifneq ($(findstring MINGW, $(HOST_OS)), MINGW)
- COMMON_FLAGS = -Wall $(CUDAFLAGS) -std=c++20 -static-libstdc++ -static-libgcc
-else
+COMMON_FLAGS = -Wall -Wextra $(CUDAFLAGS) -std=c++20
+
+ifeq ($(STATIC_RUNTIME),1)
+ LDFLAGS += -static-libstdc++ -static-libgcc
+
+ ifeq ($(findstring MINGW, $(HOST_OS)), MINGW)
 # For mingw-64 use this:
- COMMON_FLAGS = -Wall $(CUDAFLAGS) -std=c++20 -static-libstdc++ -static-libgcc -static
+  LDFLAGS += -static
+ endif
+endif
+
+ifeq ($(findstring MINGW, $(HOST_OS)), MINGW)
+ CPPFLAGS += -DWINVER=0x0601 -D_WIN32_WINNT=0x0601
+ LDFLAGS += -Wl,--subsystem,console:6.01
 endif
 # -fext-numeric-literals
 
@@ -52,12 +61,10 @@ ifeq ($(DEBUG), 1)
 
 BIN=build-debug
 CXXFLAGS = -g -Og $(COMMON_FLAGS)
-STRIP=
 
 else
 
-CXXFLAGS = -O3 -DNDEBUG $(COMMON_FLAGS)
-STRIP=-s
+CXXFLAGS = -O3 -flto -DNDEBUG $(COMMON_FLAGS)
 
 endif
 
@@ -81,14 +88,14 @@ prpll: $(BIN)/prpll
 amd: $(BIN)/prpll-amd
 
 #$(BIN)/test: $(BIN)/test.o
-#	$(CXX) $(CXXFLAGS) -o $@ $< $(LIBPATH) ${STRIP}
+#	$(CXX) $(CXXFLAGS) -o $@ $< $(LIBPATH)
 
 $(BIN)/prpll: ${OBJS}
-	$(CXX) $(CXXFLAGS) -o $@ ${OBJS} $(LIBPATH) $(OPENCL_LIBS) ${STRIP}
+	$(CXX) $(LDFLAGS) $(CXXFLAGS) -o $@ ${OBJS} $(LIBPATH) $(OPENCL_LIBS)
 
 # Instead of linking with libOpenCL, link with libamdocl64
 $(BIN)/prpll-amd: ${OBJS}
-	$(CXX) $(CXXFLAGS) -o $@ ${OBJS} $(LIBPATH) -lamdocl64 -L/opt/rocm/lib ${STRIP}
+	$(CXX) $(LDFLAGS) $(CXXFLAGS) -o $@ ${OBJS} $(LIBPATH) -lamdocl64 -L/opt/rocm/lib
 
 clean:
 	rm -rf build-debug build-release build-cuda
diff --git a/PRPLL.sln b/PRPLL.sln
index 25c0cdc3..6eaecdd1 100644
--- a/PRPLL.sln
+++ b/PRPLL.sln
@@ -10,7 +10,6 @@ Global
 		OpenCL-Release|x64 = OpenCL-Release|x64
 		CUDA-Debug|x64 = CUDA-Debug|x64
 		CUDA-Release|x64 = CUDA-Release|x64
-		CUDA-Release-non-static|x64 = CUDA-Release-non-static|x64
 	EndGlobalSection
 	GlobalSection(ProjectConfigurationPlatforms) = postSolution
 		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.OpenCL-Debug|x64.ActiveCfg = OpenCL-Debug|x64
@@ -21,8 +20,6 @@ Global
 		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Debug|x64.Build.0 = CUDA-Debug|x64
 		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release|x64.ActiveCfg = CUDA-Release|x64
 		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release|x64.Build.0 = CUDA-Release|x64
-		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release-non-static|x64.ActiveCfg = CUDA-Release-non-static|x64
-		{2B3F9C8E-3384-0407-D9E1-D3E86AA8823A}.CUDA-Release-non-static|x64.Build.0 = CUDA-Release-non-static|x64
 	EndGlobalSection
 	GlobalSection(SolutionProperties) = preSolution
 		HideSolutionNode = FALSE
diff --git a/PRPLL.vcxproj b/PRPLL.vcxproj
index 49cf61fc..743cb33d 100644
--- a/PRPLL.vcxproj
+++ b/PRPLL.vcxproj
@@ -17,10 +17,6 @@
       <Configuration>CUDA-Release</Configuration>
       <Platform>x64</Platform>
     </ProjectConfiguration>
-    <ProjectConfiguration Include="CUDA-Release-non-static|x64">
-      <Configuration>CUDA-Release-non-static</Configuration>
-      <Platform>x64</Platform>
-    </ProjectConfiguration>
   </ItemGroup>
   <ItemGroup>
     <ClCompile Include=".\src\AllocTrac.cpp" />
@@ -79,7 +75,7 @@
     <CharacterSet>MultiByte</CharacterSet>
     <PlatformToolset>v143</PlatformToolset>
   </PropertyGroup>
-  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'" Label="Configuration">
+  <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release'" Label="Configuration">
     <ConfigurationType>Application</ConfigurationType>
     <UseDebugLibraries>false</UseDebugLibraries>
     <WholeProgramOptimization>true</WholeProgramOptimization>
@@ -92,7 +88,10 @@
   <ImportGroup Label="PropertySheets">
     <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
   </ImportGroup>
-  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup Label="UserMacros">
+    <StaticRuntime Condition="'$(StaticRuntime)'==''">true</StaticRuntime>
+    <StaticCUDA Condition="'$(StaticCUDA)'==''">false</StaticCUDA>
+  </PropertyGroup>
   <PropertyGroup Condition="'$(Configuration)'=='OpenCL-Debug'">
     <OutDir>$(ProjectDir)build-msvc\OpenCL\Debug\</OutDir>
     <IntDir>$(ProjectDir)build-msvc\obj\OpenCL\Debug\</IntDir>
@@ -115,14 +114,9 @@
     <IntDir>$(ProjectDir)build-msvc\obj\CUDA\Release\</IntDir>
     <TargetName>prpll</TargetName>
   </PropertyGroup>
-  <PropertyGroup Condition="'$(Configuration)'=='CUDA-Release-non-static'">
-    <OutDir>$(ProjectDir)build-msvc\CUDA\Release-non-static\</OutDir>
-    <IntDir>$(ProjectDir)build-msvc\obj\CUDA\Release-non-static\</IntDir>
-    <TargetName>prpll</TargetName>
-  </PropertyGroup>
   <ItemDefinitionGroup>
     <ClCompile>
-      <WarningLevel>Level3</WarningLevel>
+      <WarningLevel>Level4</WarningLevel>
       <PreprocessorDefinitions>WIN32;WIN64;_CONSOLE;_CRT_SECURE_NO_WARNINGS;NOMINMAX;%(PreprocessorDefinitions)</PreprocessorDefinitions>
       <LanguageStandard>stdcpp20</LanguageStandard>
       <ExceptionHandling>Sync</ExceptionHandling>
@@ -136,7 +130,8 @@
     <ClCompile>
       <Optimization>Disabled</Optimization>
       <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
-      <RuntimeLibrary>MultiThreadedDebugDLL</RuntimeLibrary>
+      <RuntimeLibrary Condition="'$(StaticRuntime)'=='true'">MultiThreadedDebug</RuntimeLibrary>
+      <RuntimeLibrary Condition="'$(StaticRuntime)'!='true'">MultiThreadedDebugDLL</RuntimeLibrary>
       <DebugInformationFormat>ProgramDatabase</DebugInformationFormat>
       <BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>
     </ClCompile>
@@ -144,13 +139,14 @@
       <GenerateDebugInformation>true</GenerateDebugInformation>
     </Link>
   </ItemDefinitionGroup>
-  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'">
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='OpenCL-Release' Or '$(Configuration)'=='CUDA-Release'">
     <ClCompile>
       <Optimization>MaxSpeed</Optimization>
       <FunctionLevelLinking>true</FunctionLevelLinking>
       <IntrinsicFunctions>true</IntrinsicFunctions>
       <PreprocessorDefinitions>NDEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
-      <RuntimeLibrary>MultiThreaded</RuntimeLibrary>
+      <RuntimeLibrary Condition="'$(StaticRuntime)'=='true'">MultiThreaded</RuntimeLibrary>
+      <RuntimeLibrary Condition="'$(StaticRuntime)'!='true'">MultiThreadedDLL</RuntimeLibrary>
     </ClCompile>
     <Link>
       <GenerateDebugInformation>true</GenerateDebugInformation>
@@ -178,7 +174,7 @@
       <AdditionalDependencies>OpenCL.lib;%(AdditionalDependencies)</AdditionalDependencies>
     </Link>
   </ItemDefinitionGroup>
-  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release' Or '$(Configuration)'=='CUDA-Release-non-static'">
+  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release'">
     <ClCompile>
       <PreprocessorDefinitions>CUDA_BACKEND;%(PreprocessorDefinitions)</PreprocessorDefinitions>
       <AdditionalIncludeDirectories>$(ProjectDir)\src\cuda;$(CUDA_PATH)\include;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
@@ -187,12 +183,12 @@
       <AdditionalLibraryDirectories>$(CUDA_PATH)\lib\x64;%(AdditionalLibraryDirectories)</AdditionalLibraryDirectories>
     </Link>
   </ItemDefinitionGroup>
-  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release-non-static'">
+  <ItemDefinitionGroup Condition="('$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release') And '$(StaticCUDA)'!='true'">
     <Link>
       <AdditionalDependencies>cuda.lib;nvrtc.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
     </Link>
   </ItemDefinitionGroup>
-  <ItemDefinitionGroup Condition="'$(Configuration)'=='CUDA-Release'">
+  <ItemDefinitionGroup Condition="('$(Configuration)'=='CUDA-Debug' Or '$(Configuration)'=='CUDA-Release') And '$(StaticCUDA)'=='true'">
     <Link>
       <AdditionalDependencies>cuda.lib;nvrtc_static.lib;nvrtc-builtins_static.lib;nvptxcompiler_static.lib;User32.lib;Ws2_32.lib;%(AdditionalDependencies)</AdditionalDependencies>
     </Link>

From 8f820d856ea0ca4d46ede27460fb10d738a267df Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 29 Jul 2026 17:56:59 +0000
Subject: [PATCH 111/214] Implemented LDS padding for SHUFL_BYTES=4.  Not used.
 Will test if lower shared memory usage in tailSquareGF31 with SHUFL_BYTES=4
 is beneficial.

---
 src/cl/fftbase.cl | 94 ++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 89 insertions(+), 5 deletions(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 36137055..704e84dc 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -12,6 +12,10 @@
 #define LDS_BYTES     ((WG * RADIX + 56) * SHUFL_BYTES)
 #elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 4
 #define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
+#elif LDSPAD && SHUFL_BYTES == 4 && RADIX == 8
+#define LDS_BYTES     ((WG * RADIX + 56) * SHUFL_BYTES)
+#elif LDSPAD && SHUFL_BYTES == 4 && RADIX == 4
+#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
 #else
 #define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
 #endif
@@ -401,7 +405,7 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
@@ -430,7 +434,7 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       return;
     }
@@ -514,13 +518,93 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
     for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
   }
 
-  // If SHUFL_BYTES is 4 we split the F2 values into 2 int values.  These are written to LDS memory using two instructions.
-  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
   else if (SHUFL_BYTES == 4) {
-    // Accessing lds memory as ints might be faster than F2 accesses (halving LDS memory requirements)
     local F* lds = ((local F*) lds2);
     if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F);
 
+#if LDSPAD
+    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 2, 66..., 3, 67..., 32, 96...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 7.., 32...   lds[64..127] = +8
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 1.... ... 8...   lds[64..127] = +2
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      return;
+    }
+#endif
+
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
     bar(WG);

From 6f1e5d726fc3af0a705362e9daef42d816c4068f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 30 Jul 2026 18:15:54 +0000
Subject: [PATCH 112/214] Restored a bit of useless code.  Having the useless
 code improves performance by 1% for FP64+M31 FFTs on TitanV CUDA 13.0. I hate
 optimizer bugs.

---
 src/cl/fftbase.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 704e84dc..9416c76b 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -405,7 +405,7 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
       return;
     }

From 080df11ebbeb0f973630d12aef1a85e1c2a75c75 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 2 Aug 2026 21:21:56 +0000
Subject: [PATCH 113/214] Fixed more compiler warning messages

---
 src/Gpu.cpp    |  8 ++++----
 src/Proof.cpp  |  4 ++--
 src/Saver.cpp  |  4 ++--
 src/Saver.h    |  2 +-
 src/clwrap.cpp | 10 +++++-----
 5 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index e6293f91..ff20f0dc 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -581,7 +581,7 @@ Gpu::~Gpu() {
 // Part of GPU initialization is to compute the default number of registers each kernel should target during compilation.
 // Kernel register usage is critical for maximizing GPU occupancy.  The default values can be overrriden with command line arguments.
 // This feature currently only works for the CUDA compiler.
-string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
+string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
 #if CUDA_BACKEND
   int regs = 0;
   const char *use_override = "";
@@ -1267,7 +1267,7 @@ void Gpu::replay() {
           }
 
           // Skip other kernels (KFFTW)
-          else;
+          else {}
 
           // Advance argument index
           arg = replay_next_arg(kern, arg);
@@ -2521,7 +2521,7 @@ double Gpu::timePRP(int quick) {        // Quick varies from 1 (slowest, longest
   return secsPerIt * 1e6;
 }
 
-PRPResult Gpu::isPrimePRP(const Task& task) {
+PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
   assert(E == task.exponent);
 
   // This timer is used to measure total elapsed time to be written to the savefile.
@@ -2704,7 +2704,7 @@ PRPResult Gpu::isPrimePRP(const Task& task) {
   }
 }
 
-LLResult Gpu::isPrimeLL(const Task& task) {
+LLResult Gpu::isPrimeLL([[maybe_unused]] const Task& task) {
   assert(E == task.exponent);
   wantROE = 0;
 
diff --git a/src/Proof.cpp b/src/Proof.cpp
index d10aa8dd..6ad2987b 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -254,7 +254,7 @@ u64 ProofSet::next(u64 k) const {
   return *cacheIt;
 }
 
-void ProofSet::save(u64 E, u32 power, u64 k, const Words& words) {
+void ProofSet::save(u64 E, [[maybe_unused]] u32 power, u64 k, const Words& words) {
   assert(k && k <= E);
   assert(isInPoints(E, power, k));
 
@@ -262,7 +262,7 @@ void ProofSet::save(u64 E, u32 power, u64 k, const Words& words) {
   assert(load(E, power, k) == words);
 }
 
-Words ProofSet::load(u64 E, u32 power, u64 k) {
+Words ProofSet::load(u64 E, [[maybe_unused]] u32 power, u64 k) {
   assert(k && k <= E);
   assert(isInPoints(E, power, k));
   return File::openReadThrow(proofPath(E) / to_string(k)).readChecked<u32>(E/32 + 1);
diff --git a/src/Saver.cpp b/src/Saver.cpp
index c9663fb5..dfb2b314 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -88,7 +88,7 @@ fs::path findLast(const fs::path& dir, const string& prefix, const string& kind)
   return path;
 }
 
-PRPState readState(const PRPState& dummy, File fi) {
+PRPState readState([[maybe_unused]] const PRPState& dummy, File fi) {
   u64 exponent{}, k{};
   u32 blockSize{}, nErrors{};
   u64 res64{};
@@ -109,7 +109,7 @@ PRPState readState(const PRPState& dummy, File fi) {
   throw BadHeaderError{fi.name};
 }
 
-LLState readState(const LLState& dummy, File fi) {
+LLState readState([[maybe_unused]] const LLState& dummy, File fi) {
   u64 exponent{}, k{};
   double elapsed{};
 
diff --git a/src/Saver.h b/src/Saver.h
index 671b7025..07fc44a6 100644
--- a/src/Saver.h
+++ b/src/Saver.h
@@ -19,7 +19,7 @@ struct PRPState {
   u64 res64;
   vector<u32> check;
   u32 nErrors;
-  double elapsed;
+  double elapsed{};
 };
 
 struct LLState {
diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 3305f6c2..70a306c7 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -459,9 +459,9 @@ cl_context getQueueContext(cl_command_queue q) {
 // The dummy implementation below is for the native openCL builds.
 
 #ifndef CUDA_BACKEND
-bool clIsGraphSupported(cl_device_id dev) { return 0; }
-int clGraphBeginRecording(cl_command_queue q) { return CL_INVALID_VALUE; }
-int clGraphEndRecording(cl_command_queue q, cl_graph* g) { return CL_INVALID_VALUE; }
-int clGraphLaunch(cl_graph g) { return CL_INVALID_VALUE; }
-int clReleaseGraph(cl_graph g) { return CL_INVALID_VALUE; }
+bool clIsGraphSupported(cl_device_id) { return 0; }
+int clGraphBeginRecording(cl_command_queue) { return CL_INVALID_VALUE; }
+int clGraphEndRecording(cl_command_queue, cl_graph*) { return CL_INVALID_VALUE; }
+int clGraphLaunch(cl_graph) { return CL_INVALID_VALUE; }
+int clReleaseGraph(cl_graph) { return CL_INVALID_VALUE; }
 #endif

From 9d3716a543d846374c62b992cb73b362966de989 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 4 Aug 2026 01:15:45 +0000
Subject: [PATCH 114/214] More fixes for compiler warnings

---
 src/Task.h        | 10 +++++-----
 src/TuneEntry.cpp |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/Task.h b/src/Task.h
index 588acd3a..945172a5 100644
--- a/src/Task.h
+++ b/src/Task.h
@@ -19,12 +19,12 @@ class Task {
   enum Kind {PRP, VERIFY, LL, CERT};
 
   Kind kind;
-  u64 exponent;
-  string AID;  // Assignment ID
-  string line; // the verbatim worktodo line, used in deleteTask().
-  u32 squarings;  // For CERTs
+  u64 exponent{};
+  string AID{};  // Assignment ID
+  string line{}; // the verbatim worktodo line, used in deleteTask().
+  u32 squarings{};  // For CERTs
+  string verifyPath{}; // For Verify
 
-  string verifyPath; // For Verify
   void execute(GpuCommon shared, u32 instance);
 
   void writeResultPRP(FFTConfig fft, const Args&, u32 instance, bool isPrime, u64 res64, const std::string& res2048, u32 nErrors, const fs::path& proofPath) const;
diff --git a/src/TuneEntry.cpp b/src/TuneEntry.cpp
index 1ad420ea..da4e6dad 100644
--- a/src/TuneEntry.cpp
+++ b/src/TuneEntry.cpp
@@ -10,8 +10,8 @@ bool TuneEntry::update(vector<TuneEntry>& results) const {
   u64 const maxExp = fft.maxExp();
   [[maybe_unused]] bool didErase = false;
 
-  size_t i{};
-  for (i = results.size() - 1; i >= 0 && results[i].cost > cost; --i) {
+  int i{};
+  for (i = int(results.size()) - 1; i >= 0 && results[i].cost > cost; --i) {
     if (results[i].fft.maxExp() <= maxExp) {
       results.erase(std::next(results.begin(), i));
       didErase = true;

From 7e2421395846a8f461bcbf6c3fd29977f25aa3d8 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 6 Aug 2026 01:29:38 +0000
Subject: [PATCH 115/214] Fixed another compiler warning.

---
 src/clwrap.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index 70a306c7..dcc08f44 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -398,7 +398,7 @@ int getKernelNumArgs(cl_kernel k) {
 }
 
 int getWorkGroupSize(cl_kernel k, cl_device_id device, const char *name) {
-  size_t size[3];
+  size_t size[3]{};
   CHECK2(clGetKernelWorkGroupInfo(k, device, CL_KERNEL_COMPILE_WORK_GROUP_SIZE, sizeof(size), &size, nullptr), name);
   return int(size[0]);
 }

From f5e377c6a2706de44ed9207211acbd57de7b048c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 6 Aug 2026 02:57:45 +0000
Subject: [PATCH 116/214] Slight cleanup to max ROE calculations.

---
 src/cl/carryutil.cl | 33 ++++++++++++++++-----------------
 1 file changed, 16 insertions(+), 17 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 8c614d2b..9f7aa0b7 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -137,15 +137,15 @@ float OVERLOAD boundCarry(i64 c) { return ldexp(fabs((float) (i32) (c >> 8)), -2
 #if STATS || ROE
 void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *bufROE, u32 posROE, float roundMax) {
   assert(roundMax >= 0);
-
-  // This barrier may be needed by carryFused because this code does not partition lds memory the same way shufl does
-  bar();
-  // Reduce to a single roundMax value
   u32 me = get_local_id(0);
   u32 u32RoundMax = as_uint(roundMax);
-  while (num_threads > 1) {
+
+  // Reduce to a handful of roundMax values
+  // We could use shfl_down_sync (and AMD's equivalent) instead of LDS memory once num_threads < WAVEFRONT
+  // (see https://github.com/mahmoudmaftah/MaxReduction-Cuda/blob/main/code/reduction_benchmarks.cu)
+  while (num_threads > 8) {
     // Write roundMax for high half of threads to local memory.  Ignore threads not participating in the reduction.
-   if (num_threads >= WAVEFRONT) bar();
+    if (num_threads > WAVEFRONT) bar();
     if (me >= num_threads / 2 && me < num_threads) lds[me - num_threads / 2] = u32RoundMax;
     if (num_threads > WAVEFRONT) {
       bar();                             // work around a weird CUDA NVCC bug where two bar() calls are required???! (Titan V, CUDA 13.0, WMUL=2)
@@ -160,20 +160,19 @@ void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *b
     num_threads /= 2;
   }
 
-// We could use shfl_down_sync (and AMD's equivalent) instead of LDS memory once num_threads < WAVEFRONT (see https://github.com/mahmoudmaftah/MaxReduction-Cuda/blob/main/code/reduction_benchmarks.cu)
-// We could instead write the reduced ROE sequentially to bufROE and then do a max_reduction after last atomic_add
-
-  // Merge this max with others
-  if (me == 0) {
-    // The bufROE entry to update is stored in the first bufROE entry.  This value used to be passed into carryFused as an argument.
-    // CUDA graphs don't allow arguments to change.  Thus, calculating posROE and storing it in bufROE workd better.
+  // The bufROE entry to update is stored in the first bufROE entry.  This value used to be passed into carryFused as an argument.
+  // CUDA graphs don't allow arguments to change.  Thus, calculating posROE and storing it in bufROE works better.
+  if (me < num_threads) {
     posROE = bufROE[0];
     atomic_max(bufROE + posROE + 2, u32RoundMax);
+
     // The second bufRoe entry is a count of the number atomic_maxes performed.  When the last atomic_max is done, increment posROE and clear the counter.
-    u32 old_value = atomic_add(bufROE + 1, 1);
-    if (old_value == num_blocks - 1) {
-      bufROE[0] = posROE + 1;
-      bufROE[1] = 0;
+    if (me == 0) {
+      u32 old_value = atomic_add(bufROE + 1, 1);
+      if (old_value == num_blocks - 1) {
+        bufROE[0] = posROE + 1;
+        bufROE[1] = 0;
+      }
     }
   }
 }

From 6e38ac2341dfe5e5f272e7edd8ffa3148a201200 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 7 Aug 2026 01:01:40 +0000
Subject: [PATCH 117/214] Latest tweaks to CUDA kernel register usage.

---
 src/Gpu.cpp | 28 +++++++++++++++++-----------
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ff20f0dc..70ea4d14 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -581,6 +581,10 @@ Gpu::~Gpu() {
 // Part of GPU initialization is to compute the default number of registers each kernel should target during compilation.
 // Kernel register usage is critical for maximizing GPU occupancy.  The default values can be overrriden with command line arguments.
 // This feature currently only works for the CUDA compiler.
+// Most kernels have occupancy limited by register usage.  For reference, the following guidelines dictate where an "uptick" in occupancy occurs.
+// If kernel threads=256, register crossovers are at 128, 80, 64, 48, 40
+// If kernel threads=128, register crossovers are at 128, 96, 80, 72, 64, 56, 48, 40
+// If kernel threads=64,  register crossovers are at 128, 112, 96, 88, 80, 72, 64, 56, 48, 40
 string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
 #if CUDA_BACKEND
   int regs = 0;
@@ -596,7 +600,7 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
       use_override = "REGCF64";
       break;
     case FFT3161:
-      regs = nW == 8 ? 96 : 64;
+      regs = nW == 8 ? 96 : 64;         // Tested on 4090, nW=8, CUDA 13.0 (88 regs is possible without spilling but is slower)
       use_override = "REGCF3161";
       break;
     case FFT3261:
@@ -650,15 +654,15 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
     break;
   case MIDIN31:            // Register usage depends on MIDDLE
     if (fft.shape.middle == 16) regs = 56;
-    else if (fft.shape.middle == 8) regs = 44;
-    else if (fft.shape.middle == 4) regs = 32;
+    else if (fft.shape.middle == 8) regs = 48;         // Tested on 4090, CUDA 13.0 (40 regs is possible without spilling but is not measurably faster)
+    else if (fft.shape.middle == 4) regs = 32;         // Tested on 5070Ti, CUDA 13.2.
     else regs = -1;  
     use_override = "REGMI31";
     break;
   case MIDIN61:            // Register usage depends on MIDDLE
     if (fft.shape.middle == 16) regs = 96;
-    else if (fft.shape.middle == 8) regs = 72;
-    else if (fft.shape.middle == 4) regs = 64;
+    else if (fft.shape.middle == 8) regs = 64;         // Tested on 4090, CUDA 13.0
+    else if (fft.shape.middle == 4) regs = -1;         // Tested on 5070Ti, CUDA 13.2 (48 regs is possible without spilling but is slower), best is -1.
     else regs = -1;  
     use_override = "REGMI61";
     break;
@@ -672,11 +676,12 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
     }
     break;
   case TAIL31:             // Register usage depends on NH (assumes double-wide kernel)
-    regs = nH == 8 ? 64 : 48;
+    regs = nH == 8 ? -1 : 48;         // Tested on 4090, NH=8, CUDA 13.0.  Occupancy is limited by LDS memory use, register usage of 48 is possible, best is 64.
+                                      // Tested on 5070Ti, NH=8, CUDA 13.2.  Occupancy is limited by LDS memory use, register usage of 56 is possible, best is -1.
     use_override = "REGTS31";
     break;
   case TAIL61:             // Register usage depends on NH (assumes double-wide kernel)
-    regs = nH == 8 ? 96 : 64;
+    regs = nH == 8 ? 96 : 64;         // Tested on 4090, nH=8, CUDA 13.0 (80 regs is possible without spilling but is slower)
     use_override = "REGTS61";
     break;
   case MIDOUT:             // Register usage depends on MIDDLE and the FFT/NTT type
@@ -700,15 +705,16 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
     break;
   case MIDOUT31:           // Register usage depends on MIDDLE
     if (fft.shape.middle == 16) regs = 48;
-    else if (fft.shape.middle == 8) regs = 40;
-    else if (fft.shape.middle == 4) regs = 32;
+    else if (fft.shape.middle == 8) regs = 40;         // Tested on 4090, CUDA 13.0
+    else if (fft.shape.middle == 4) regs = -1;         // Tested on 5070Ti, CUDA 13.2 (32 regs is possible without spilling but is slower), best is -1.
     else regs = -1;
     use_override = "REGMO31";
     break;
   case MIDOUT61:           // Register usage depends on MIDDLE
     if (fft.shape.middle == 16) regs = 96;
-    else if (fft.shape.middle == 8) regs = 64;
-    else if (fft.shape.middle == 4) regs = 64;
+    else if (fft.shape.middle == 8) regs = 64;         // Tested on 4090, CUDA 13.0, best is 64.
+                                                       // Tested on 5070Ti, CUDA 13.2, best is 72.
+    else if (fft.shape.middle == 4) regs = 64;         // Tested on 5070Ti, CUDA 13.2 (48 regs is possible without spilling but is slower), best is 64.
     else regs = -1;
     use_override = "REGMO61";
     break;

From 1ef77163246d82389dbef1871a3d021d8430dcc1 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 10 Aug 2026 02:46:08 +0000
Subject: [PATCH 118/214] Wrote code to set CUDA LDS carveout.  Did not help on
 mt laptop GPU.  Default is the new code is turned off.

---
 src/cuda/clwrap_cuda.cpp | 28 ++++++++++++++++++++++++----
 src/cuda/tinycuda.h      |  1 +
 2 files changed, 25 insertions(+), 4 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 20cd3c21..77aef8cb 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -178,9 +178,10 @@ int clReleaseCommandQueue(cl_command_queue q) {
 
 // ---- Program compilation (NVRTC) ----
 
-cl_program clCreateProgramWithSource(cl_context  /*ctx*/, unsigned count, const char** strings,
+cl_program clCreateProgramWithSource(cl_context ctx, unsigned count, const char** strings,
                                       const size_t* lengths, int* err) {
   auto* prog = new _cl_program;
+  prog->context = ctx;
   for (unsigned i = 0; i < count; i++) {
     if (lengths && lengths[i]) {
       prog->source.append(strings[i], lengths[i]);
@@ -192,11 +193,12 @@ cl_program clCreateProgramWithSource(cl_context  /*ctx*/, unsigned count, const
   return prog;
 }
 
-cl_program clCreateProgramWithBinary(cl_context  /*ctx*/, unsigned  /*nDevices*/, const cl_device_id*,
+cl_program clCreateProgramWithBinary(cl_context ctx, unsigned  /*nDevices*/, const cl_device_id*,
                                       const size_t* lengths, const unsigned char** binaries,
                                       int* binaryStatus, int* err) {
   // "Binary" in CUDA land = PTX string
   auto* prog = new _cl_program;
+  prog->context = ctx;
   if (lengths && binaries && lengths[0] > 0) {
     prog->ptx.assign((const char*)binaries[0], lengths[0]);
     prog->compiled = true;
@@ -418,7 +420,7 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
   return CL_SUCCESS;
 }
 
-cl_program clLinkProgram(cl_context  /*ctx*/, unsigned  /*nDevices*/, const cl_device_id*,
+cl_program clLinkProgram(cl_context ctx, unsigned  /*nDevices*/, const cl_device_id*,
                           const char*  /*options*/, unsigned nProgs, const cl_program* progs,
                           void (*)(cl_program, void*), void*, int* err) {
   ensureContextCurrent();
@@ -430,6 +432,7 @@ cl_program clLinkProgram(cl_context  /*ctx*/, unsigned  /*nDevices*/, const cl_d
   }
 
   auto* linked = new _cl_program;
+  linked->context = ctx;
   linked->ptx = progs[0]->ptx;
   linked->compiled = true;
   // Carry preprocessed source through for KERNEL(N) parsing in clCreateKernel
@@ -566,7 +569,24 @@ cl_kernel clCreateKernel(cl_program prog, const char* name, int* err) {
   moduleRetain(k->parentModule);  // kernel keeps the module alive past clReleaseProgram
 
   // Shared memory carveout: default adaptive carveout is optimal for mixed kernel workloads.
-
+  // Remainder of memory will be used for L1 cache.
+// This was not measurably faster on my 570Ti Laptop.  We should try it on other GPUs.
+// If MULTI_Q is set, we might need to set all the middleIn, tailSquare, and middleOut kernels to use the same carveout value (which
+// negates the primary benefit since middleIn and middleOut are the kernels using low carveouts).  For now, disable the capability by default.
+if (getenv("TRY_LDS_CARVEOUT"))
+  {
+    int numRegs = 0, shmem = 0, maxThreads = 0, maxShared = 0;
+    cuFuncGetAttribute(&numRegs, CU_FUNC_ATTRIBUTE_NUM_REGS, k->func);
+    cuFuncGetAttribute(&shmem, CU_FUNC_ATTRIBUTE_SHARED_SIZE_BYTES, k->func);
+    cuFuncGetAttribute(&maxThreads, CU_FUNC_ATTRIBUTE_MAX_THREADS_PER_BLOCK, k->func);
+    cuDeviceGetAttribute(&maxShared, CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR, prog->context->dev);
+
+    int max_occupancy = 65536 / (numRegs * maxThreads);         // Maximum occupancy due to register pressure
+    int carveout = 100 * (max_occupancy * shmem) / maxShared;   // Percent of shared memory needed for max occupancy
+    if (carveout > 100) carveout = 100;
+    cuFuncSetAttribute(k->func, CU_FUNC_ATTRIBUTE_PREFERRED_SHARED_MEMORY_CARVEOUT, carveout);
+  }
+		  
   // Log register and shared memory usage per kernel when PRPLL_DUMP_PTX is set
   {
     static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index 0ebb1bf4..c8ff49ef 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -43,6 +43,7 @@ using cl_mem = _cl_mem*;
 
 // cl_program: dual-purpose — stores either source string or compiled PTX/module
 struct _cl_program {
+  cl_context context;
   std::string source;     // OpenCL source (before NVRTC compilation)
   std::string preprocessedSource; // CUDA source after preprocessOpenCL (for parsing __launch_bounds__)
   std::string ptx;        // Compiled PTX (after NVRTC compilation)

From 14e21600a614676fe06af821ea39d0793907c5f8 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Fri, 14 Aug 2026 23:47:56 +0000
Subject: [PATCH 119/214] Fixed NCLOAD TRIG31 macro.  Fixed read() and write()
 routines to use FFTLOAD and FFTSTORE.  Removed an extraneous tune of
 FFT_STORE=4.

---
 src/cl/base.cl | 69 +++++++++++++++++++++++++++++++++++++++++++-------
 src/tune.cpp   |  2 +-
 2 files changed, 61 insertions(+), 10 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index d2a5297f..11a48ddf 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -316,7 +316,7 @@ typedef global const float2* BigTabFP32;
 //
 // nVidia GPUs have lots of different caching options for loads and stores.
 // AMD GPUs have have far fewer options for loads and stores.
-// These routines let us try the different options.
+// These routines and macros let us try the different options.
 //
 
 // Basic load and store.  Presumably stored in all caches using a standard LRU algorithm.
@@ -404,7 +404,7 @@ void OVERLOAD L2STORE(i32 *mem, i32 val) {
 #define L2STORE    STORE
 #endif
 
-// Routines for loading data from memory into the L1 and L2 caches, but cache line is marked evict first.
+// Routines for loading data from memory into the L1 and L2 caches, but cache line is marked evict first to limit cache pollution.
 
 #if HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
 T2 OVERLOAD EFLOAD(CP(T2) mem) {
@@ -517,7 +517,7 @@ GF31 OVERLOAD LULOAD(TrigGF31 mem) {
 #define LULOAD    LOAD
 #endif
 
-// Routines for loading a read-only and placing it in the non-coherent texture cache.
+// Routines for loading a read-only value and placing it in the non-coherent texture cache.
 
 #if HAS_PTX >= 500         // Texture cache requires sm_50 support or higher
 T2 OVERLOAD NCLOAD(Trig mem) {
@@ -557,13 +557,60 @@ i32 OVERLOAD NCLOAD(i32 *mem) {
 }
 GF31 OVERLOAD NCLOAD(TrigGF31 mem) {
   GF31 retval;
-  __asm("ld.global.lu.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  __asm("ld.global.nc.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
   return retval;
 }
 #else
 #define NCLOAD    LOAD
 #endif
 
+// Routines for loading data from memory into the L1 and L2 caches.  This should be same as the default LOAD macro.
+
+#if HAS_PTX >= 200         // Cache hints requires sm_20 support or higher
+T2 OVERLOAD CALOAD(CP(T2) mem) {
+  T2 retval;
+  __asm("ld.global.ca.v2.f64  {%0, %1}, [%2];" : "=d"(retval.x), "=d"(retval.y) : "l"(mem));
+  return retval;
+}
+T OVERLOAD CALOAD(TrigSingle mem) {
+  T retval;
+  __asm("ld.global.ca.f64  %0, [%1];" : "=d"(retval) : "l"(mem));
+  return retval;
+}
+F2 OVERLOAD CALOAD(CP(F2) mem) {
+  F2 retval;
+  __asm("ld.global.ca.v2.f32  {%0, %1}, [%2];" : "=f"(retval.x), "=f"(retval.y) : "l"(mem));
+  return retval;
+}
+F OVERLOAD CALOAD(TrigSingleFP32 mem) {
+  F retval;
+  __asm("ld.global.ca.f32  %0, [%1];" : "=f"(retval) : "l"(mem));
+  return retval;
+}
+i64 OVERLOAD CALOAD(i64 *mem) {
+  i64 retval;
+  __asm("ld.global.ca.b64  %0, [%1];" : "=l"(retval) : "l"(mem));
+  return retval;
+}
+GF61 OVERLOAD CALOAD(TrigGF61 mem) {
+  GF61 retval;
+  __asm("ld.global.ca.v2.b64  {%0, %1}, [%2];" : "=l"(retval.x), "=l"(retval.y) : "l"(mem));
+  return retval;
+}
+i32 OVERLOAD CALOAD(i32 *mem) {
+  i32 retval;
+  __asm("ld.global.ca.b32  %0, [%1];" : "=r"(retval) : "l"(mem));
+  return retval;
+}
+GF31 OVERLOAD CALOAD(TrigGF31 mem) {
+  GF31 retval;
+  __asm("ld.global.ca.v2.b32  {%0, %1}, [%2];" : "=r"(retval.x), "=r"(retval.y) : "l"(mem));
+  return retval;
+}
+#else
+#define CALOAD    LOAD
+#endif
+
 //
 //  These macros map various types of data accesses to one of the load/store routines above
 //
@@ -588,6 +635,8 @@ GF31 OVERLOAD NCLOAD(TrigGF31 mem) {
 #define FFTLOAD    EFLOAD
 #elif FFTLOAD_TYPE == 4
 #define FFTLOAD    LULOAD
+#elif FFTLOAD_TYPE == 5
+#define FFTLOAD    NCLOAD
 #else
 #define FFTLOAD    LOAD
 #endif
@@ -613,6 +662,8 @@ GF31 OVERLOAD NCLOAD(TrigGF31 mem) {
 #define CSLOAD    EFLOAD
 #elif CSLOAD_TYPE == 4
 #define CSLOAD    LULOAD
+#elif CSLOAD_TYPE == 5
+#define CSLOAD    NCLOAD
 #else
 #define CSLOAD    LOAD
 #endif
@@ -645,7 +696,7 @@ GF31 OVERLOAD NCLOAD(TrigGF31 mem) {
 #endif
 
 // Routines for loading trig data that is used once but is smaller than a cache line.  The rest of the cache line will be needed soon.
-// If possible, data should saved in L1(?) and L2 caches and perhaps marked evict first.
+// If possible, data should be saved in L1(?) and L2 caches and perhaps marked evict first.
 // TS stands for "Trig Several reuses".
 
 #if TSLOAD_TYPE == 1
@@ -695,24 +746,24 @@ void PREFETCHL2(const __global void *addr) {
 #if FFT_FP64
 void OVERLOAD read(u32 WG, u32 N, T2 *u, const global T2 *in, u32 base) {
   in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = in[i * WG]; }
+  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
 }
 
 void OVERLOAD write(u32 WG, u32 N, T2 *u, global T2 *out, u32 base) {
   out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { out[i * WG] = u[i]; }
+  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
 }
 #endif
 
 #if FFT_FP32
 void OVERLOAD read(u32 WG, u32 N, F2 *u, const global F2 *in, u32 base) {
   in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = in[i * WG]; }
+  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
 }
 
 void OVERLOAD write(u32 WG, u32 N, F2 *u, global F2 *out, u32 base) {
   out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { out[i * WG] = u[i]; }
+  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
 }
 #endif
 
diff --git a/src/tune.cpp b/src/tune.cpp
index 3b4ee686..4558c72a 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -614,7 +614,7 @@ void Tune::tune() {
         u64 const exponent = primes.prevPrime(fft.maxExp());
         u32 best_fft_store = 0;
         double best_cost = -1.0;
-        for (u32 const fft_store : {0, 1, 2, 3, 4}) {
+        for (u32 const fft_store : {0, 1, 2, 3}) {
           if (fft_store >= 2 && (!NVIDIAGPU || NO_ASM)) continue;
           args->flags["STORES"] = to_string(stores / 10 * 10 + fft_store);
           double const cost = Gpu::make(exponent, shared, fft, {}, false)->timePRP(quick);

From 4dd32c978646e6cdb369717d0a556c7d90e4bae1 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 15 Aug 2026 19:15:35 +0000
Subject: [PATCH 120/214] Created combo datatypes such as T2_GF61.  This
 generate cleaner PTX code than sharing code via typecasting a GF61 to a T2.

---
 src/cl/base.cl     |  72 +++++++-------
 src/cl/fftbase.cl  |  50 ++++------
 src/cl/middle.cl   | 237 +++++++--------------------------------------
 src/cl/tailutil.cl | 184 +++++++++++------------------------
 4 files changed, 144 insertions(+), 399 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 11a48ddf..2059f15a 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -394,6 +394,12 @@ void OVERLOAD L2STORE(P(T2) mem, T2 val) {
 void OVERLOAD L2STORE(P(F2) mem, F2 val) {
   __asm("st.global.cg.v2.f32  [%0], {%1, %2};" : : "l"(mem), "f"(val.x), "f"(val.y));
 }
+void OVERLOAD L2STORE(P(GF61) mem, GF61 val) {
+  __asm("st.global.cg.v2.b64  [%0], {%1, %2};" : : "l"(mem), "l"(val.x), "l"(val.y));
+}
+void OVERLOAD L2STORE(P(GF31) mem, GF31 val) {
+  __asm("st.global.cg.v2.b32  [%0], {%1, %2};" : : "l"(mem), "r"(val.x), "r"(val.y));
+}
 void OVERLOAD L2STORE(i64 *mem, i64 val) {
   __asm("st.global.cg.b64  [%0], %1;" : : "l"(mem), "l"(val));
 }
@@ -460,6 +466,12 @@ void OVERLOAD EFSTORE(P(T2) mem, T2 val) {
 void OVERLOAD EFSTORE(P(F2) mem, F2 val) {
   __asm("st.global.cs.v2.f32  [%0], {%1, %2};" : : "l"(mem), "f"(val.x), "f"(val.y));
 }
+void OVERLOAD EFSTORE(P(GF61) mem, GF61 val) {
+  __asm("st.global.cs.v2.b64  [%0], {%1, %2};" : : "l"(mem), "l"(val.x), "l"(val.y));
+}
+void OVERLOAD EFSTORE(P(GF31) mem, GF31 val) {
+  __asm("st.global.cs.v2.b32  [%0], {%1, %2};" : : "l"(mem), "r"(val.x), "r"(val.y));
+}
 void OVERLOAD EFSTORE(i64 *mem, i64 val) {
   __asm("st.global.cs.b64  [%0], %1;" : : "l"(mem), "l"(val));
 }
@@ -743,51 +755,43 @@ void PREFETCHL2(const __global void *addr) {
 #endif
 }
 
-#if FFT_FP64
-void OVERLOAD read(u32 WG, u32 N, T2 *u, const global T2 *in, u32 base) {
-  in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
-}
+// Some routines can be written for any 64-bit data type (T2 or GF61).  Same for 32-bit data types (F2 or GF31).
+// Some routines can be written to work 32-bit and 64-bit data types.
+// These #defines make it easy to write those routines.  This used to be done with type-casting, but
+// this method generates better PTX code (not sure if that results in any better run times).
 
-void OVERLOAD write(u32 WG, u32 N, T2 *u, global T2 *out, u32 base) {
-  out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
-}
+#if FFT_FP64
+#define T_Z61 T
+#define T2_GF61 T2
+#define T2_F2_GF31_GF61 T2
+#define as_T2_GF61 as_double2
+#endif
+#if NTT_GF61
+#define T_Z61 Z61
+#define T2_GF61 GF61
+#define T2_F2_GF31_GF61 GF61
+#define as_T2_GF61 as_ulong2
 #endif
-
 #if FFT_FP32
-void OVERLOAD read(u32 WG, u32 N, F2 *u, const global F2 *in, u32 base) {
-  in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
-}
-
-void OVERLOAD write(u32 WG, u32 N, F2 *u, global F2 *out, u32 base) {
-  out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
-}
+#define F_Z31 F
+#define F2_GF31 F2
+#define T2_F2_GF31_GF61 F2
 #endif
-
 #if NTT_GF31
-void OVERLOAD read(u32 WG, u32 N, GF31 *u, const global GF31 *in, u32 base) {
-  in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = in[i * WG]; }
-}
-
-void OVERLOAD write(u32 WG, u32 N, GF31 *u, global GF31 *out, u32 base) {
-  out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { out[i * WG] = u[i]; }
-}
+#define F_Z31 Z31
+#define F2_GF31 GF31
+#define T2_F2_GF31_GF61 GF31
 #endif
 
-#if NTT_GF61
-void OVERLOAD read(u32 WG, u32 N, GF61 *u, const global GF61 *in, u32 base) {
+#if FFT_FP64 || NTT_GF61 || FFT_FP32 || NTT_GF31
+void OVERLOAD read(u32 WG, u32 N, T2_F2_GF31_GF61 *u, const global T2_F2_GF31_GF61 *in, u32 base) {
   in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = in[i * WG]; }
+  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
 }
 
-void OVERLOAD write(u32 WG, u32 N, GF61 *u, global GF61 *out, u32 base) {
+void OVERLOAD write(u32 WG, u32 N, T2_F2_GF31_GF61 *u, global T2_F2_GF31_GF61 *out, u32 base) {
   out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { out[i * WG] = u[i]; }
+  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
 }
 #endif
 
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 9416c76b..19bdb196 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -20,7 +20,7 @@
 #define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
 #endif
 
-#if FFT_FP64 | NTT_GF61
+#if FFT_FP64 || NTT_GF61
 
 // Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
 // Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
@@ -33,7 +33,7 @@
 // before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
 // only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
 // minor optimization would be to special case the first shufl call.
-void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
+void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -48,8 +48,8 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
   if (SHUFL_BYTES == 16) {
-    local T2* lds = ((local T2*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
+    local T2_GF61* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
 
 #if LDSPAD
     // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
@@ -170,8 +170,8 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
   else if (SHUFL_BYTES == 8) {
-    local T* lds = ((local T*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T);
+    local T_Z61* lds = ((local T_Z61*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
 
 #if LDSPAD
     // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
@@ -352,29 +352,29 @@ void OVERLOAD shufl64(local T2 *lds2, T2 *u, u32 f, u32 numWG, u32 lowMe) {
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
   }
 }
 
 #endif
 
 
-#if FFT_FP32 | NTT_GF31
+#if FFT_FP32 || NTT_GF31
 
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats.
-void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats or Z31s.
+void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -391,8 +391,8 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
   if (SHUFL_BYTES >= 8) {
-    local F2* lds = ((local F2*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
+    local F2_GF31* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
 
 #if LDSPAD
     // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
@@ -520,8 +520,8 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
 
   // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
   else if (SHUFL_BYTES == 4) {
-    local F* lds = ((local F*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F);
+    local F_Z31* lds = ((local F_Z31*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
 
 #if LDSPAD
     // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
@@ -621,10 +621,6 @@ void OVERLOAD shufl32(local F2 *lds2, F2 *u, u32 f, u32 numWG, u32 lowMe) {
 
 #if FFT_FP64
 
-void OVERLOAD shufl(local T2 *lds, T2 *u, u32 f, u32 numWG, u32 lowMe) {
-  shufl64(lds, u, f, numWG, lowMe);
-}
-
 void OVERLOAD chainMul4(T2 *u, T2 w) {
   u[1] = cmul(u[1], w);
 
@@ -1195,10 +1191,6 @@ void OVERLOAD fft_common(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 l
 
 #if FFT_FP32
 
-void OVERLOAD shufl(local F2 *lds, F2 *u, u32 f, u32 numWG, u32 lowMe) {
-  shufl32(lds, u, f, numWG, lowMe);
-}
-
 void OVERLOAD fft_RADIX(F2 *u) {
 #if RADIX == 4
   fft4(u);
@@ -1658,10 +1650,6 @@ void OVERLOAD fft_common(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 low
 
 #if NTT_GF31
 
-void OVERLOAD shufl(local GF31 *lds, GF31 *u, u32 f, u32 numWG, u32 lowMe) {
-  shufl32((local F2 *) lds, (F2 *) u, f, numWG, lowMe);
-}
-
 void OVERLOAD fft_RADIX(GF31 *u) {
 #if RADIX == 4
   fft4(u);
@@ -1744,10 +1732,6 @@ void OVERLOAD fft_common(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32
 
 #if NTT_GF61
 
-void OVERLOAD shufl(local GF61 *lds, GF61 *u, u32 f, u32 numWG, u32 lowMe) {
-  shufl64((local T2 *) lds, (T2 *) u, f, numWG, lowMe);
-}
-
 void OVERLOAD fft_RADIX(GF61 *u) {
 #if RADIX == 4
   fft4(u);
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 35a251cf..370850d1 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -54,7 +54,7 @@
 //      u[i]      i ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...SMALL_HEIGHT-1 (multiples of one)
 
-void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
+void OVERLOAD writeCarryFusedLine(T2_GF61 *u, P(T2_GF61) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
@@ -65,7 +65,7 @@ void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 #endif
 }
 
-void OVERLOAD readMiddleInLine(T2 *u, CP(T2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleInLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 #if PAD_SIZE > 0
   // Each work group reads successive y's which increments by one pad size.
   // Rather than having u[i] also increment by one, we choose a larger pad increment
@@ -90,7 +90,7 @@ void OVERLOAD readMiddleInLine(T2 *u, CP(T2) in, u32 y, u32 x) {
 //      x         ranges 0...SMALL_HEIGHT-1 (multiples of one)          (also known as 0...G_H-1 and 0...NH-1)
 //      y         ranges 0...MIDDLE*WIDTH-1 (multiples of SMALL_HEIGHT)
 
-void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleInLine (P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
 {
   //u32 SIZEY = IN_WG / IN_SIZEX;
   //u32 num_x_chunks = WIDTH / IN_SIZEX;                // Number of x chunks
@@ -125,7 +125,7 @@ void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
 
 // Read a line for tailFused or fftHin
 // This reads partially transposed data as written by fftMiddleIn
-void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
+void OVERLOAD readTailFusedLine(CP(T2_GF61) in, T2_GF61 *u, u32 line, u32 me) {
   u32 SIZEY = IN_WG / IN_SIZEX;
 
 #if PAD_SIZE > 0
@@ -200,7 +200,7 @@ void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
 //      i in u[i] ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...WIDTH-1 (multiples of BIG_HEIGHT)          (processed in batches of OUT_WG/OUT_SIZEX)
 
-void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
+void OVERLOAD writeTailFusedLine(T2_GF61 *u, P(T2_GF61) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
 #if MIDDLE == 4 || MIDDLE == 8 || MIDDLE == 16
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
@@ -215,7 +215,7 @@ void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 #endif
 }
 
-void OVERLOAD readMiddleOutLine(T2 *u, CP(T2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleOutLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 #if PAD_SIZE > 0
 #if MIDDLE == 4 || MIDDLE == 8 || MIDDLE == 16
   // Each u[i] increments by one pad size.
@@ -278,7 +278,7 @@ void OVERLOAD readMiddleOutLine(T2 *u, CP(T2) in, u32 y, u32 x) {
 // adjusted to effect a transpose.  Or caller must transpose the x and y values and send us an out pointer with thread_id added in.
 // In other words, caller is responsible for deciding the best way to transpose x and y values.
 
-void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleOutLine (P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
 {
   //u32 SIZEY = OUT_WG / OUT_SIZEX;
   //u32 num_x_chunks = SMALL_HEIGHT / OUT_SIZEX;  // Number of x chunks
@@ -311,7 +311,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 chunk_y, u32 chunk_x)
 }
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
+void OVERLOAD readCarryFusedLine(CP(T2_GF61) in, T2_GF61 *u, u32 line, u32 me) {
   u32 SIZEY = OUT_WG / OUT_SIZEX;
 
 #if PAD_SIZE > 0
@@ -375,12 +375,12 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
 
 
 /**************************************************************************/
-/*            Similar to above, but for an FFT based on FP32              */
+/*        Similar to above, but for an FFT based on FP32 or GF31          */
 /**************************************************************************/
 
 #if FFT_FP32 || NTT_GF31
 
-void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
+void OVERLOAD writeCarryFusedLine(F2_GF31 *u, P(F2_GF31) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
   out += line * WIDTH + line * PAD_SIZE + line / SMALL_HEIGHT * BIG_PAD_SIZE + me; // One pad every line + a big pad every SMALL_HEIGHT lines
@@ -391,7 +391,7 @@ void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 #endif
 }
 
-void OVERLOAD readMiddleInLine(F2 *u, CP(F2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleInLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 #if PAD_SIZE > 0
   // Each work group reads successive y's which increments by one pad size.
   // Rather than having u[i] also increment by one, we choose a larger pad increment
@@ -404,7 +404,7 @@ void OVERLOAD readMiddleInLine(F2 *u, CP(F2) in, u32 y, u32 x) {
 #endif
 }
 
-void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleInLine (P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
 {
 #if PAD_SIZE > 0
   u32 SIZEY = IN_WG / IN_SIZEX;
@@ -431,7 +431,7 @@ void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
 
 // Read a line for tailFused or fftHin
 // This reads partially transposed data as written by fftMiddleIn
-void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
+void OVERLOAD readTailFusedLine(CP(F2_GF31) in, F2_GF31 *u, u32 line, u32 me) {
   u32 SIZEY = IN_WG / IN_SIZEX;
 #if PAD_SIZE > 0
   // Adjust in pointer based on the x value used in writeMiddleInLine
@@ -480,7 +480,7 @@ void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
 #endif
 }
 
-void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
+void OVERLOAD writeTailFusedLine(F2_GF31 *u, P(F2_GF31) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
 #if MIDDLE == 4 || MIDDLE == 8 || MIDDLE == 16
   u32 BIG_PAD_SIZE = (PAD_SIZE/2+1)*PAD_SIZE;
@@ -495,7 +495,7 @@ void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 #endif
 }
 
-void OVERLOAD readMiddleOutLine(F2 *u, CP(F2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleOutLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 #if PAD_SIZE > 0
 #if MIDDLE == 4 || MIDDLE == 8 || MIDDLE == 16
   // Each u[i] increments by one pad size.
@@ -512,7 +512,7 @@ void OVERLOAD readMiddleOutLine(F2 *u, CP(F2) in, u32 y, u32 x) {
 #endif
 }
 
-void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleOutLine (P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
 {
 #if PAD_SIZE > 0
   u32 SIZEY = OUT_WG / OUT_SIZEX;
@@ -536,7 +536,7 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 chunk_y, u32 chunk_x)
 #endif
 }
 
-void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
+void OVERLOAD readCarryFusedLine(CP(F2_GF31) in, F2_GF31 *u, u32 line, u32 me) {
   u32 SIZEY = OUT_WG / OUT_SIZEX;
 #if PAD_SIZE > 0
   // Adjust in pointer based on the x value used in writeMiddleOutLine
@@ -585,90 +585,6 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
 #endif
 
 
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M31^2)           */
-/**************************************************************************/
-
-#if NTT_GF31
-
-// Since F2 and GF31 are the same size we can simply call the floats based code
-
-void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
-  writeCarryFusedLine((F2 *) u, (P(F2)) out, line, me);
-}
-
-void OVERLOAD readMiddleInLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
-  readMiddleInLine((F2 *) u, (CP(F2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleInLine (P(GF31) out, GF31 *u, u32 chunk_y, u32 chunk_x) {
-  writeMiddleInLine ((P(F2)) out, (F2 *) u, chunk_y, chunk_x);
-}
-
-void OVERLOAD readTailFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
-  readTailFusedLine((CP(F2)) in, (F2 *) u, line, me);
-}
-
-void OVERLOAD writeTailFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
-  writeTailFusedLine((F2 *) u, (P(F2)) out, line, me);
-}
-
-void OVERLOAD readMiddleOutLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
-  readMiddleOutLine((F2 *) u, (CP(F2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleOutLine (P(GF31) out, GF31 *u, u32 chunk_y, u32 chunk_x) {
-  writeMiddleOutLine ((P(F2)) out, (F2 *) u, chunk_y, chunk_x);
-}
-
-void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
-  readCarryFusedLine((CP(F2)) in, (F2 *) u, line, me);
-}
-
-#endif
-
-
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M61^2)           */
-/**************************************************************************/
-
-#if NTT_GF61
-
-// Since T2 and GF61 are the same size we can simply call the doubles based code
-
-void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
-  writeCarryFusedLine((T2 *) u, (P(T2)) out, line, me);
-}
-
-void OVERLOAD readMiddleInLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
-  readMiddleInLine((T2 *) u, (CP(T2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleInLine (P(GF61) out, GF61 *u, u32 chunk_y, u32 chunk_x) {
-  writeMiddleInLine ((P(T2)) out, (T2 *) u, chunk_y, chunk_x);
-}
-
-void OVERLOAD readTailFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
-  readTailFusedLine((CP(T2)) in, (T2 *) u, line, me);
-}
-
-void OVERLOAD writeTailFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
-  writeTailFusedLine((T2 *) u, (P(T2)) out, line, me);
-}
-
-void OVERLOAD readMiddleOutLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
-  readMiddleOutLine((T2 *) u, (CP(T2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleOutLine (P(GF61) out, GF61 *u, u32 chunk_y, u32 chunk_x) {
-  writeMiddleOutLine ((P(T2)) out, (T2 *) u, chunk_y, chunk_x);
-}
-
-void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
-  readCarryFusedLine((CP(T2)) in, (T2 *) u, line, me);
-}
-
-#endif
 
 
 
@@ -776,7 +692,7 @@ void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
 //      line      ranges 0...BIG_HEIGHT-1 (multiples of one)
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
+void OVERLOAD readCarryFusedLine(CP(T2_GF61) in, T2_GF61 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
@@ -784,7 +700,7 @@ void OVERLOAD readCarryFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
-void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {  // me is multiples of BIG_HEIGHT
+void OVERLOAD writeCarryFusedLine(T2_GF61 *u, P(T2_GF61) out, u32 line, u32 me) {  // me is multiples of BIG_HEIGHT
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW) + (middle * SIZEM) + (line % 16 * SIZEBLK) + SWIZ(line % 16, line / 16) * 16 + (me % 16);
@@ -799,13 +715,13 @@ void OVERLOAD writeCarryFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {  // me i
 //      u[i]      ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...SMALL_HEIGHT-1 (multiples of one)
 
-void OVERLOAD readMiddleInLine(T2 *u, CP(T2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleInLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
   in += (x / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM]); }
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
-void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleInLine (P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
@@ -820,14 +736,14 @@ void OVERLOAD writeMiddleInLine (P(T2) out, T2 *u, u32 y, u32 x)
 //      line      ranges 0...MIDDLE*WIDTH-1 (multiples of SMALL_HEIGHT)
 
 // Read a line for tailSquare/Mul or fftHin
-void OVERLOAD readTailFusedLine(CP(T2) in, T2 *u, u32 line, u32 me) {
+void OVERLOAD readTailFusedLine(CP(T2_GF61) in, T2_GF61 *u, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   in += (width / 16 * SIZEW) + (middle * SIZEM) + (width % 16 * SIZEBLK) + (me % 16);
   for (i32 i = 0; i < NH; ++i) { u[i] = FFTLOAD(&in[SWIZ(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
 }
 
-void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
+void OVERLOAD writeTailFusedLine(T2_GF61 *u, P(T2_GF61) out, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   out += (width / 16 * SIZEW) + (middle * SIZEM) + (width % 16 * SIZEBLK) + (me % 16);
@@ -842,13 +758,13 @@ void OVERLOAD writeTailFusedLine(T2 *u, P(T2) out, u32 line, u32 me) {
 //      u[i]      ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...WIDTH-1 (multiples of BIG_HEIGHT)
 
-void OVERLOAD readMiddleOutLine(T2 *u, CP(T2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleOutLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
   in += (y / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM]); }
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
-void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleOutLine (P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
@@ -858,7 +774,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 
 
 /**************************************************************************/
-/*            Similar to above, but for an FFT based on FP32              */
+/*        Similar to above, but for an FFT based on FP32 or GF31          */
 /**************************************************************************/
 
 #if FFT_FP32 || NTT_GF31
@@ -895,7 +811,7 @@ void OVERLOAD writeMiddleOutLine (P(T2) out, T2 *u, u32 y, u32 x)
 //      line      ranges 0...BIG_HEIGHT-1 (multiples of one)
 
 // Read a line for carryFused or FFTW.  This line was written by writeMiddleOutLine above.
-void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
+void OVERLOAD readCarryFusedLine(CP(F2_GF31) in, F2_GF31 *u, u32 line, u32 me) {
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   in += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
@@ -903,7 +819,7 @@ void OVERLOAD readCarryFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
 }
 
 // Write a line from carryFused.  This data will be read by fftMiddleIn.
-void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {   // me is multiples of BIG_HEIGHT
+void OVERLOAD writeCarryFusedLine(F2_GF31 *u, P(F2_GF31) out, u32 line, u32 me) {   // me is multiples of BIG_HEIGHT
   u32 middle = line / SMALL_HEIGHT;     // Multiples of SMALL_HEIGHT
   line = line % SMALL_HEIGHT;           // Multiples of one
   out += (me / 16 * SIZEW32) + (middle * SIZEM32) + (line % 16 * SIZEBLK32) + SWIZ32(line % 16, line / 16) * 16 + (me % 16);
@@ -918,13 +834,13 @@ void OVERLOAD writeCarryFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {   // me
 //      u[i]      ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...SMALL_HEIGHT-1 (multiples of one)
 
-void OVERLOAD readMiddleInLine(F2 *u, CP(F2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleInLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
   in += (x / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM32]); }
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
-void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleInLine (P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
@@ -939,14 +855,14 @@ void OVERLOAD writeMiddleInLine (P(F2) out, F2 *u, u32 y, u32 x)
 //      line      ranges 0...MIDDLE*WIDTH-1 (multiples of SMALL_HEIGHT)
 
 // Read a line for tailSquare/Mul or fftHin
-void OVERLOAD readTailFusedLine(CP(F2) in, F2 *u, u32 line, u32 me) {
+void OVERLOAD readTailFusedLine(CP(F2_GF31) in, F2_GF31 *u, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   in += (width / 16 * SIZEW32) + (middle * SIZEM32) + (width % 16 * SIZEBLK32) + (me % 16);
   for (i32 i = 0; i < NH; ++i) { u[i] = FFTLOAD(&in[SWIZ32(width % 16, (i * SMALL_HEIGHT / NH + me) / 16) * 16]); }
 }
 
-void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
+void OVERLOAD writeTailFusedLine(F2_GF31 *u, P(F2_GF31) out, u32 line, u32 me) {
   u32 width = line % WIDTH;            // Multiples of BIG_HEIGHT
   u32 middle = line / WIDTH;           // Multiples of SMALL_HEIGHT
   out += (width / 16 * SIZEW32) + (middle * SIZEM32) + (width % 16 * SIZEBLK32) + (me % 16);
@@ -961,13 +877,13 @@ void OVERLOAD writeTailFusedLine(F2 *u, P(F2) out, u32 line, u32 me) {
 //      u[i]      ranges 0...MIDDLE-1 (multiples of SMALL_HEIGHT)
 //      y         ranges 0...WIDTH-1 (multiples of BIG_HEIGHT)
 
-void OVERLOAD readMiddleOutLine(F2 *u, CP(F2) in, u32 y, u32 x) {
+void OVERLOAD readMiddleOutLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
   in += (y / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { u[i] = FFTLOAD(&in[i * SIZEM32]); }
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
-void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleOutLine (P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
@@ -976,89 +892,4 @@ void OVERLOAD writeMiddleOutLine (P(F2) out, F2 *u, u32 y, u32 x)
 #endif
 
 
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M31^2)           */
-/**************************************************************************/
-
-#if NTT_GF31
-
-// Since F2 and GF31 are the same size we can simply call the floats based code
-
-void OVERLOAD readCarryFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
-  readCarryFusedLine((CP(F2)) in, (F2 *) u, line, me);
-}
-
-void OVERLOAD writeCarryFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
-  writeCarryFusedLine((F2 *) u, (P(F2)) out, line, me);
-}
-
-void OVERLOAD readMiddleInLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
-  readMiddleInLine((F2 *) u, (CP(F2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleInLine (P(GF31) out, GF31 *u, u32 y, u32 x) {
-  writeMiddleInLine ((P(F2)) out, (F2 *) u, y, x);
-}
-
-void OVERLOAD readTailFusedLine(CP(GF31) in, GF31 *u, u32 line, u32 me) {
-  readTailFusedLine((CP(F2)) in, (F2 *) u, line, me);
-}
-
-void OVERLOAD writeTailFusedLine(GF31 *u, P(GF31) out, u32 line, u32 me) {
-  writeTailFusedLine((F2 *) u, (P(F2)) out, line, me);
-}
-
-void OVERLOAD readMiddleOutLine(GF31 *u, CP(GF31) in, u32 y, u32 x) {
-  readMiddleOutLine((F2 *) u, (CP(F2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleOutLine (P(GF31) out, GF31 *u, u32 y, u32 x) {
-  writeMiddleOutLine ((P(F2)) out, (F2 *) u, y, x);
-}
-
-#endif
-
-
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M61^2)           */
-/**************************************************************************/
-
-#if NTT_GF61
-
-// Since T2 and GF61 are the same size we can simply call the doubles based code
-
-void OVERLOAD readCarryFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
-  readCarryFusedLine((CP(T2)) in, (T2 *) u, line, me);
-}
-
-void OVERLOAD writeCarryFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
-  writeCarryFusedLine((T2 *) u, (P(T2)) out, line, me);
-}
-
-void OVERLOAD readMiddleInLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
-  readMiddleInLine((T2 *) u, (CP(T2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleInLine (P(GF61) out, GF61 *u, u32 y, u32 x) {
-  writeMiddleInLine ((P(T2)) out, (T2 *) u, y, x);
-}
-
-void OVERLOAD readTailFusedLine(CP(GF61) in, GF61 *u, u32 line, u32 me) {
-  readTailFusedLine((CP(T2)) in, (T2 *) u, line, me);
-}
-
-void OVERLOAD writeTailFusedLine(GF61 *u, P(GF61) out, u32 line, u32 me) {
-  writeTailFusedLine((T2 *) u, (P(T2)) out, line, me);
-}
-
-void OVERLOAD readMiddleOutLine(GF61 *u, CP(GF61) in, u32 y, u32 x) {
-  readMiddleOutLine((T2 *) u, (CP(T2)) in, y, x);
-}
-
-void OVERLOAD writeMiddleOutLine (P(GF61) out, GF61 *u, u32 y, u32 x) {
-  writeMiddleOutLine ((P(T2)) out, (T2 *) u, y, x);
-}
-
-#endif
-
 #endif
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index 1af416e7..da79b6f7 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -30,14 +30,14 @@
 
 // 64-bit implementations of reverse routines
 
-#if FFT_FP64 | NTT_GF61
+#if FFT_FP64 || NTT_GF61
 
-void OVERLOAD reverse(local T2 *lds2, T2 *u, bool bump) {
+void OVERLOAD reverse(local T2_GF61 *lds2, T2_GF61 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
   if (SHUFL_BYTES_H >= 8) {
-    local T2 *lds = lds2;
+    local T2_GF61 *lds = lds2;
     bar(WG);
 #if NH == 8
     lds[revMe + 0 * WG] = u[3];
@@ -53,7 +53,7 @@ void OVERLOAD reverse(local T2 *lds2, T2 *u, bool bump) {
   }
 
   else if (SHUFL_BYTES_H == 4) {
-    local T *lds = (local T *) lds2;
+    local T_Z61 *lds = (local T_Z61 *) lds2;
     bar(WG);
 #if NH == 8
     lds[revMe + 0 * WG] = u[3].x;
@@ -81,13 +81,13 @@ void OVERLOAD reverse(local T2 *lds2, T2 *u, bool bump) {
   }
 }
 
-void OVERLOAD reverseLine(local T2 *lds, T2 *u) {
+void OVERLOAD reverseLine(local T2_GF61 *lds, T2_GF61 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
   if (SHUFL_BYTES_H == 16) {
-    local T2 *ldsOut = lds + revMe;
-    local T2 *ldsIn = lds + me;
+    local T2_GF61 *ldsOut = lds + revMe;
+    local T2_GF61 *ldsIn = lds + me;
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i]; }
     bar(WG);
@@ -95,8 +95,8 @@ void OVERLOAD reverseLine(local T2 *lds, T2 *u) {
   }
 
   else if (SHUFL_BYTES_H == 8) {
-    local T *ldsOut = (local T *) lds + revMe;
-    local T *ldsIn = (local T *) lds + me;
+    local T_Z61 *ldsOut = (local T_Z61 *) lds + revMe;
+    local T_Z61 *ldsIn = (local T_Z61 *) lds + me;
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].x; }
     bar(WG);
@@ -113,19 +113,19 @@ void OVERLOAD reverseLine(local T2 *lds, T2 *u) {
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).x; }
     bar(WG);
-    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.x = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.x = ldsIn[WG * i]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).y; }
     bar(WG);
-    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.y = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.y = ldsIn[WG * i]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).z; }
     bar(WG);
-    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.z = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.z = ldsIn[WG * i]; u[i] = as_T2_GF61(tmp); }
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = as_int4(u[i]).w; }
     bar(WG);
-    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.w = ldsIn[WG * i]; u[i] = as_double2(tmp); }
+    for (u32 i = 0; i < NH; ++i) { int4 tmp = as_int4(u[i]); tmp.w = ldsIn[WG * i]; u[i] = as_T2_GF61(tmp); }
   }
 }
 
@@ -133,13 +133,13 @@ void OVERLOAD reverseLine(local T2 *lds, T2 *u) {
 // These versions are for the kernel(s) that use a double-wide workgroup (u in half the workgroup, v in the other half)
 //
 
-void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
+void OVERLOAD reverse2(local T2_GF61 *lds2, T2_GF61 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
 
   if (SHUFL_BYTES_H >= 8) {
-    local T2 *lds = lds2;
-    if (me >= WG) lds += LDS_BYTES / sizeof(T2);
+    local T2_GF61 *lds = lds2;
+    if (me >= WG) lds += LDS_BYTES / sizeof(T2_GF61);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
@@ -155,8 +155,8 @@ void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
   }
 
   else if (SHUFL_BYTES_H == 4) {
-    local T *lds = (local T *) lds2;
-    if (me >= WG) lds += LDS_BYTES / sizeof(T);
+    local T_Z61 *lds = (local T_Z61 *) lds2;
+    if (me >= WG) lds += LDS_BYTES / sizeof(T_Z61);
     bar(WG);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i].x; }
     bar(WG);
@@ -169,16 +169,16 @@ void OVERLOAD reverse2(local T2 *lds2, T2 *u) {
 }
 
 // This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
+void OVERLOAD revCrossLine(local T2_GF61 *lds2, T2_GF61 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
   u32 revLowMe = WG - 1 - lowMe;
 
   if (SHUFL_BYTES_H >= 8) {
-    local T2 *ldsOut = lds2;
-    local T2 *ldsIn = lds2;
-    if (me < WG) ldsOut += LDS_BYTES / sizeof(T2);     // Crossing LDS halves
-    else ldsIn += LDS_BYTES / sizeof(T2);               // Staying within LDS halves (just like shufl)
+    local T2_GF61 *ldsOut = lds2;
+    local T2_GF61 *ldsIn = lds2;
+    if (me < WG) ldsOut += LDS_BYTES / sizeof(T2_GF61); // Crossing LDS halves
+    else ldsIn += LDS_BYTES / sizeof(T2_GF61);          // Staying within LDS halves (just like shufl)
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
@@ -186,10 +186,10 @@ void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
   }
 
   else if (SHUFL_BYTES_H == 4) {
-    local T *ldsOut = (local T *) lds2;
-    local T *ldsIn = (local T *) lds2;
-    if (me < WG) ldsOut += LDS_BYTES / sizeof(T);
-    else ldsIn += LDS_BYTES / sizeof(T);
+    local T_Z61 *ldsOut = (local T_Z61 *) lds2;
+    local T_Z61 *ldsIn = (local T_Z61 *) lds2;
+    if (me < WG) ldsOut += LDS_BYTES / sizeof(T_Z61);
+    else ldsIn += LDS_BYTES / sizeof(T_Z61);
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
     bar();   // we need a full bar because we just crossed halves
@@ -211,7 +211,7 @@ void OVERLOAD revCrossLine(local T2* lds2, T2 *u) {
 //      u[2]    u[3]            // Returned in u[1]
 //      v[3]rev v[2]rev         // Returned in u[2]
 //      v[1]rev v[0]rev         // Returned in u[3]
-void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
+void OVERLOAD reverseLine2(local T2_GF61 *lds, T2_GF61 *u) {
   u32 me = get_local_id(0);
 
 // NOTE:  It is important that this routine use lds memory in coordination with shufl.  Failure to do so would require an
@@ -228,7 +228,7 @@ void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
 // That means saving to lds using index: me < WG ? me % WG + i * WG : 8*WG-1 - me % WG - i * WG
 
 #if 1
-  local T2 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  local T2_GF61 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
 
@@ -236,18 +236,18 @@ void OVERLOAD reverseLine2(local T2 *lds, T2 *u) {
   bar();
   for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*WG]; }
 #else
-  local T *ldsOut = (local T *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  local T_Z61 *ldsOut = (local T_Z61 *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*WG] = u[i].y; }
 
-  local T *ldsIn = (local T *) lds + me;
+  local T_Z61 *ldsIn = (local T_Z61 *) lds + me;
   bar();
   for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*WG]; u[i].y = ldsIn[NH*2*WG + i * 2*WG]; }
 #endif
 }
 
 // Undo a reverseLine2
-void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
+void OVERLOAD unreverseLine2(local T2_GF61 *lds, T2_GF61 *u) {
   u32 me = get_local_id(0);
 
 // NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl.  By initially
@@ -256,7 +256,7 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
 // lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
 
 #if 1
-  local T2 *ldsOut = lds + me;
+  local T2_GF61 *ldsOut = lds + me;
   for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i]; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
@@ -269,7 +269,7 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
   bar();
   for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
 #else
-  local T *ldsOut = (local T *) lds + me;
+  local T_Z61 *ldsOut = (local T_Z61 *) lds + me;
   for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i].x; ldsOut[NH*2*WG + i * 2*WG] = u[i].y; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
@@ -277,7 +277,7 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
 // 0..GH-1 +1*WG    GH-1..0 +6*WG
 // 0..GH-1 +2*WG    GH-1..0 +5*WG
 // 0..GH-1 +3*WG    GH-1..0 +4*WG
-  local T *ldsIn = (local T *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
+  local T_Z61 *ldsIn = (local T_Z61 *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
   for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*WG]; }
@@ -290,12 +290,12 @@ void OVERLOAD unreverseLine2(local T2 *lds, T2 *u) {
 
 
 /**************************************************************************/
-/*            Similar to above, but for an FFT based on FP32              */
+/*        Similar to above, but for an FFT based on FP32 or GF31          */
 /**************************************************************************/
 
-#if FFT_FP32 | NTT_GF31
+#if FFT_FP32 || NTT_GF31
 
-void OVERLOAD reverse(local F2 *lds, F2 *u, bool bump) {
+void OVERLOAD reverse(local F2_GF31 *lds, F2_GF31 *u, bool bump) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me + bump;
 
@@ -315,13 +315,13 @@ void OVERLOAD reverse(local F2 *lds, F2 *u, bool bump) {
   }
 }
 
-void OVERLOAD reverseLine(local F2 *lds, F2 *u) {
+void OVERLOAD reverseLine(local F2_GF31 *lds, F2_GF31 *u) {
   u32 me = get_local_id(0);
   u32 revMe = WG - 1 - me;
 
   if (SHUFL_BYTES_H >= 8) {
-    local F2 *ldsOut = lds + revMe;
-    local F2 *ldsIn = lds + me;
+    local F2_GF31 *ldsOut = lds + revMe;
+    local F2_GF31 *ldsIn = lds + me;
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i]; }
     bar(WG);
@@ -329,8 +329,8 @@ void OVERLOAD reverseLine(local F2 *lds, F2 *u) {
   }
 
   else if (SHUFL_BYTES_H == 4) {
-    local F *ldsOut = (local F *) lds + revMe;
-    local F *ldsIn = (local F *) lds + me;
+    local F_Z31 *ldsOut = (local F_Z31 *) lds + revMe;
+    local F_Z31 *ldsIn = (local F_Z31 *) lds + me;
     bar(WG);
     for (u32 i = 0; i < NH; ++i) { ldsOut[WG * (NH - 1 - i)] = u[i].x; }
     bar(WG);
@@ -346,7 +346,7 @@ void OVERLOAD reverseLine(local F2 *lds, F2 *u) {
 // These versions are for the kernel(s) that use a double-wide workgroup (u in half the workgroup, v in the other half)
 //
 
-void OVERLOAD reverse2(local F2 *lds, F2 *u) {
+void OVERLOAD reverse2(local F2_GF31 *lds, F2_GF31 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
 
@@ -368,14 +368,14 @@ void OVERLOAD reverse2(local F2 *lds, F2 *u) {
 }
 
 // This is used to reverse the second part of a line, and cross the reversed parts between the halves.
-void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
+void OVERLOAD revCrossLine(local F2_GF31 *lds2, F2_GF31 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
   u32 revLowMe = WG - 1 - lowMe;
 
   if (SHUFL_BYTES_H >= 4) {
-    local F2 *ldsOut = lds2;
-    local F2 *ldsIn = lds2;
+    local F2_GF31 *ldsOut = lds2;
+    local F2_GF31 *ldsIn = lds2;
     if (me < WG) ldsOut += LDS_BYTES / sizeof(F2);
     else ldsIn += LDS_BYTES / sizeof(F2);
     bar();   // we need a full bar because we're crossing halves
@@ -395,7 +395,7 @@ void OVERLOAD revCrossLine(local F2* lds2, F2 *u) {
 //      u[2]    u[3]            // Returned in u[1]
 //      v[3]rev v[2]rev         // Returned in u[2]
 //      v[1]rev v[0]rev         // Returned in u[3]
-void OVERLOAD reverseLine2(local F2 *lds, F2 *u) {
+void OVERLOAD reverseLine2(local F2_GF31 *lds, F2_GF31 *u) {
   u32 me = get_local_id(0);
 
 // NOTE:  It is important that this routine use lds memory in coordination with shufl.  Failure to do so would require an
@@ -412,7 +412,7 @@ void OVERLOAD reverseLine2(local F2 *lds, F2 *u) {
 // That means saving to lds using index: me < WG ? me % WG + i * WG : 8*WG-1 - me % WG - i * WG
 
 #if 1
-  local F2 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  local F2_GF31 *ldsOut = lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { *ldsOut = u[i]; }
 
@@ -420,18 +420,18 @@ void OVERLOAD reverseLine2(local F2 *lds, F2 *u) {
   bar();
   for (u32 i = 0; i < NH; ++i) { u[i] = lds[i * 2*WG]; }
 #else
-  local F *ldsOut = (local F *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
+  local F_Z31 *ldsOut = (local F_Z31 *) lds + (me < WG ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsOutInc = (me < WG) ? WG : -WG;
   for (u32 i = 0; i < NH; ++i, ldsOut += ldsOutInc) { ldsOut[0] = u[i].x; ldsOut[NH*2*WG] = u[i].y; }
 
-  local F *ldsIn = (local F *) lds + me;
+  local F_Z31 *ldsIn = (local F_Z31 *) lds + me;
   bar();
   for (u32 i = 0; i < NH; ++i) { u[i].x = ldsIn[i * 2*WG]; u[i].y = ldsIn[NH*2*WG + i * 2*WG]; }
 #endif
 }
 
 // Undo a reverseLine2
-void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
+void OVERLOAD unreverseLine2(local F2_GF31 *lds, F2_GF31 *u) {
   u32 me = get_local_id(0);
 
 // NOTE:  It is important that this routine use lds memory in coordination with reverseLine2 and shufl.  By initially
@@ -440,7 +440,7 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 // lds memory) we can issue a qualified bar() call before calling FFT_HEIGHT2.
 
 #if 1
-  local F2 *ldsOut = lds + me;
+  local F2_GF31 *ldsOut = lds + me;
   for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i]; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
@@ -453,7 +453,7 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
   bar();
   for (u32 i = 0; i < NH; ++i, lds += ldsInc) { u[i] = *lds; }
 #else
-  local F *ldsOut = (local F *) lds + me;
+  local F_Z31 *ldsOut = (local F_Z31 *) lds + me;
   for (u32 i = 0; i < NH; ++i) { ldsOut[i * 2*WG] = u[i].x; ldsOut[NH*2*WG + i * 2*WG] = u[i].y; }
 
 // For NH=4, the lds indices (where to read each outgoing u[i] which has v[i] in the upper threads) looks like this:
@@ -461,7 +461,7 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 // 0..GH-1 +1*WG    GH-1..0 +6*WG
 // 0..GH-1 +2*WG    GH-1..0 +5*WG
 // 0..GH-1 +3*WG    GH-1..0 +4*WG
-  local F *ldsIn = (local F *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
+  local F_Z31 *ldsIn = (local F_Z31 *) lds + ((me < WG) ? me % WG : (NH*2)*WG-1 - me % WG);
   i32 ldsInc = (me < WG) ? WG : -WG;
   bar();
   for (u32 i = 0; i < NH; ++i, ldsIn += ldsInc) { u[i].x = ldsIn[0]; u[i].y = ldsIn[NH*2*WG]; }
@@ -471,77 +471,3 @@ void OVERLOAD unreverseLine2(local F2 *lds, F2 *u) {
 #endif
 
 #endif
-
-
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M31^2)           */
-/**************************************************************************/
-
-#if NTT_GF31
-
-void OVERLOAD reverse(local GF31 *lds, GF31 *u, bool bump) {
-  reverse((local F2 *) lds, (F2 *) u, bump);
-}
-
-void OVERLOAD reverseLine(local GF31 *lds, GF31 *u) {
-  reverseLine((local F2 *) lds, (F2 *) u);
-}
-
-void OVERLOAD reverse2(local GF31 *lds, GF31 *u) {
-  reverse2((local F2 *) lds, (F2 *) u);
-}
-
-void OVERLOAD revCrossLine(local GF31* lds, GF31 *u) {
-  revCrossLine((local F2 *) lds, (F2 *) u);
-}
-
-#if 0    // Unused
-
-void OVERLOAD reverseLine2(local GF31 *lds, GF31 *u) {
-  reverseLine2((local F2 *) lds, (F2 *) u);
-}
-
-void OVERLOAD unreverseLine2(local GF31 *lds, GF31 *u) {
-  unreverseLine2((local F2 *) lds, (F2 *) u);
-}
-
-#endif
-
-#endif
-
-
-/**************************************************************************/
-/*          Similar to above, but for an NTT based on GF(M61^2)           */
-/**************************************************************************/
-
-#if NTT_GF61
-
-void OVERLOAD reverse(local GF61 *lds, GF61 *u, bool bump) {
-  reverse((local T2 *) lds, (T2 *) u, bump);
-}
-
-void OVERLOAD reverseLine(local GF61 *lds, GF61 *u) {
-  reverseLine((local T2 *) lds, (T2 *) u);
-}
-
-void OVERLOAD reverse2(local GF61 *lds, GF61 *u) {
-  reverse2((local T2 *) lds, (T2 *) u);
-}
-
-void OVERLOAD revCrossLine(local GF61* lds, GF61 *u) {
-  revCrossLine((local T2 *) lds, (T2 *) u);
-}
-
-#if 0    // Unused
-
-void OVERLOAD reverseLine2(local GF61 *lds, GF61 *u) {
-  reverseLine2((local T2 *) lds, (T2 *) u);
-}
-
-void OVERLOAD unreverseLine2(local GF61 *lds, GF61 *u) {
-  unreverseLine2((local T2 *) lds, (T2 *) u);
-}
-
-#endif
-
-#endif

From 0194d2ef0e7a3bc2691e8aa7fb47534e7000fe40 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E5=BE=90=E7=A6=8F=E3=81=A1=E3=82=83=E3=82=93?=
 <jyohuku.alterego@gmail.com>
Date: Tue, 18 Aug 2026 00:36:14 +0900
Subject: [PATCH 121/214] OpenCL: rename the Z61 fma() overload so it stops
 hiding the builtin

Declaring a user overload named fma() removes the OpenCL builtin
fma(float,float,float) from the overload set. In any build with both FFT_FP32
and NTT_GF61 -- FFT3261, FFT3231, FFT323161 -- the float call sites then
resolve to fma(Z61,Z61,Z61), convert their float arguments to ulong, and return
ulong2 where float2 is expected:

  fftbase.cl:1212: error: assigning to '__private F2' (aka '__private float2')
  from incompatible type 'ulong2' (vector of 2 'ulong' values)
   1212 |   base = U2(fma(a, -w.y, w.x), fma(a, w.x, -w.y));

That is a hard error under ROCm, so every FP32-bearing transform type fails to
build. It is also the type PRPLL picks by default on a machine with no tune.txt,
so a fresh build does not start at all.

The overload has no call sites, so renaming it costs nothing.

Reproduced on Radeon Pro V620 (gfx1030), ROCm 7.14, OpenCL 3581.0 (HSA1.1,LC):
  prpll -prp 104000021 -iters 10000        # picks 4M 4:1K:8:256

Same root cause as #2, which was opened in March and closed by its author
without review.
---
 src/cl/math.cl | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 0cd73719..a5f44b26 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -962,7 +962,12 @@ Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u128 c, const u32 a_m61_count, const u32 b
 
 Z61 OVERLOAD mul(Z61 a, Z61 b) { return modM61(weakMul(a, b, 2, 2)); }
 
-Z61 OVERLOAD fma(Z61 a, Z61 b, Z61 c) { return modM61(weakMulAdd(a, b, c, 2, 2)); }
+// Not named fma(): declaring a user overload of fma() hides the OpenCL builtin
+// fma(float,float,float), so in a build with both FFT_FP32 and NTT_GF61 the float call sites
+// (chainMul4() in fftbase.cl, for one) resolve to this overload instead, convert their float
+// arguments to ulong, and return ulong2 where float2 is expected. This overload has no call
+// sites, so the name is free to change.
+Z61 OVERLOAD fmaZ61(Z61 a, Z61 b, Z61 c) { return modM61(weakMulAdd(a, b, c, 2, 2)); }
 
 // Multiply by 2
 Z61 OVERLOAD mul2(Z61 a) { return add(a, a); }

From 46f037575ee2d05c8d98078f9d4d445e707a1e58 Mon Sep 17 00:00:00 2001
From: Dylan <quantum64development@gmail.com>
Date: Fri, 21 Aug 2026 01:06:56 -0400
Subject: [PATCH 122/214] Fix wrong residue table after reducePower()

---
 src/Proof.cpp | 13 +++++++++++--
 src/Proof.h   |  4 +++-
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/src/Proof.cpp b/src/Proof.cpp
index 6ad2987b..a869d5cc 100644
--- a/src/Proof.cpp
+++ b/src/Proof.cpp
@@ -142,8 +142,11 @@ ProofSet::ProofSet(u64 E, u32 power)
 
   fs::create_directories(proofPath(E));
 
-  vector<u64> spans;
-  for (u64 span = (E + 1) / 2; spans.size() < power; span = (span + 1) / 2) { spans.push_back(span); }
+  rebuildPoints();
+}
+
+void ProofSet::rebuildPoints() {
+  points.clear();
 
   points.push_back(0);
   u32 p;
@@ -171,6 +174,12 @@ ProofSet::ProofSet(u64 E, u32 power)
   }
 }
 
+void ProofSet::reducePower() {
+  assert(power > 0);
+  --power;
+  rebuildPoints();
+}
+
 bool ProofSet::isInPoints(u64 E, u32 power, u64 k) {
   if (k == E) { return true; } // special-case E
   u64 start = 0;
diff --git a/src/Proof.h b/src/Proof.h
index 68fc1f4d..383eaef9 100644
--- a/src/Proof.h
+++ b/src/Proof.h
@@ -59,6 +59,8 @@ class ProofSet {
   
 private:  
   vector<u64> points;
+
+  void rebuildPoints();
   
   bool isValidTo(u64 limitK) const;
 
@@ -86,6 +88,6 @@ class ProofSet {
   void save(u64 k, const Words& words) const { return save(E, power, k, words); }
   Words load(u64 k) const { return load(E, power, k); }
 
-  void reducePower() { power--; }
+  void reducePower();
   std::pair<Proof, vector<u64>> computeProof(Gpu *gpu) const;
 };

From 96646c399ad1387ebe6901709d1b857e53528af7 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 22 Aug 2026 02:02:15 +0000
Subject: [PATCH 123/214] Second attempt at using the C preprocessor to effect
 C++ templates.

---
 src/cl/base.cl         |  40 ---
 src/cl/carryfused.cl   |   4 +-
 src/cl/expand.cl       |  53 ++++
 src/cl/fftbase.cl      | 600 +---------------------------------------
 src/cl/fftmiddlein.cl  |   4 +-
 src/cl/fftmiddleout.cl |   4 +-
 src/cl/fftp.cl         |   4 +-
 src/cl/fftw.cl         |   4 +-
 src/cl/middle.cl       |  38 ++-
 src/cl/shufl.cl        | 601 +++++++++++++++++++++++++++++++++++++++++
 src/cl/tailmul.cl      |   7 +-
 src/cl/tailsquare.cl   |   7 +-
 12 files changed, 707 insertions(+), 659 deletions(-)
 create mode 100644 src/cl/expand.cl
 create mode 100644 src/cl/shufl.cl

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 2059f15a..4cf747e1 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -755,46 +755,6 @@ void PREFETCHL2(const __global void *addr) {
 #endif
 }
 
-// Some routines can be written for any 64-bit data type (T2 or GF61).  Same for 32-bit data types (F2 or GF31).
-// Some routines can be written to work 32-bit and 64-bit data types.
-// These #defines make it easy to write those routines.  This used to be done with type-casting, but
-// this method generates better PTX code (not sure if that results in any better run times).
-
-#if FFT_FP64
-#define T_Z61 T
-#define T2_GF61 T2
-#define T2_F2_GF31_GF61 T2
-#define as_T2_GF61 as_double2
-#endif
-#if NTT_GF61
-#define T_Z61 Z61
-#define T2_GF61 GF61
-#define T2_F2_GF31_GF61 GF61
-#define as_T2_GF61 as_ulong2
-#endif
-#if FFT_FP32
-#define F_Z31 F
-#define F2_GF31 F2
-#define T2_F2_GF31_GF61 F2
-#endif
-#if NTT_GF31
-#define F_Z31 Z31
-#define F2_GF31 GF31
-#define T2_F2_GF31_GF61 GF31
-#endif
-
-#if FFT_FP64 || NTT_GF61 || FFT_FP32 || NTT_GF31
-void OVERLOAD read(u32 WG, u32 N, T2_F2_GF31_GF61 *u, const global T2_F2_GF31_GF61 *in, u32 base) {
-  in += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG]); }
-}
-
-void OVERLOAD write(u32 WG, u32 N, T2_F2_GF31_GF61 *u, global T2_F2_GF31_GF61 *out, u32 base) {
-  out += base + (u32) get_local_id(0);
-  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG], u[i]); }
-}
-#endif
-
 // On "classic" AMD GCN GPUs such as Radeon VII, the wavefront size was always 64. On RDNA GPUs the wavefront can
 // be configured to be either 64 or 32. We use the FAST_BARRIER define as an indicator for GCN GPUs.
 // On Nvidia GPUs the wavefront size is 32.
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 8f70e16a..23c8fa42 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -4,7 +4,9 @@
 #include "fftwidth.cl"
 #include "carryutil.cl"
 #include "weight.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 void spin() {
 #if defined(__has_builtin) && __has_builtin(__builtin_amdgcn_s_sleep)
diff --git a/src/cl/expand.cl b/src/cl/expand.cl
new file mode 100644
index 00000000..b60c3161
--- /dev/null
+++ b/src/cl/expand.cl
@@ -0,0 +1,53 @@
+// Copyright (C) Mihai Preda
+
+// Some routines can be written for any 64-bit data type (T2 or GF61).  Same for 32-bit data types (F2 or GF31).
+// Some routines can be written to work 32-bit and 64-bit data types.
+// These #defines make it easy to write those routines.  This used to be done with type-casting, but
+// this method generates better PTX code (not sure if that results in any better run times).
+
+#if FFT_FP64
+#define T_Z61 T
+#define T2_GF61 T2
+#define T2_F2_GF31_GF61 T2
+#define as_T2_GF61 as_double2
+#include INCLUDE_FILE
+#undef T_Z61
+#undef T2_GF61
+#undef T2_F2_GF31_GF61
+#undef as_T2_GF61
+#endif 
+
+#if NTT_GF61
+#define T_Z61 Z61
+#define T2_GF61 GF61
+#define T2_F2_GF31_GF61 GF61
+#define as_T2_GF61 as_ulong2
+#include INCLUDE_FILE
+#undef T_Z61
+#undef T2_GF61
+#undef T2_F2_GF31_GF61
+#undef as_T2_GF61
+#endif 
+
+#if FFT_FP32
+#define F_Z31 F
+#define F2_GF31 F2
+#define T2_F2_GF31_GF61 F2
+#include INCLUDE_FILE
+#undef F_Z31
+#undef F2_GF31
+#undef T2_F2_GF31_GF61
+#endif 
+
+#if NTT_GF31
+#define F_Z31 Z31
+#define F2_GF31 GF31
+#define T2_F2_GF31_GF61 GF31
+#include INCLUDE_FILE
+#undef F_Z31
+#undef F2_GF31
+#undef T2_F2_GF31_GF61
+#endif 
+
+#undef INCLUDE_FILE
+
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 19bdb196..f011d792 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -20,604 +20,8 @@
 #define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
 #endif
 
-#if FFT_FP64 || NTT_GF61
-
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
-// Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
-// even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
-// WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
-// n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
-// numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
-// lowMe = me % WG
-// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
-// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
-// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
-// minor optimization would be to special case the first shufl call.
-void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  int force_default = 0;
-#if NOWG2                       // For timing tests only.  Option to not turn off LDS bank conflict code when numWG > 1.  I've not found a GPU where this is beneficial.
-  if (numWG > 1) force_default = 1;
-#endif
-#if NOLDS2                      // For timing tests only.  Option to not turn off LDS bank for second shufl calls.  I've not found a GPU where this is beneficial.
-  if (f != 1) force_default = 1;
-#endif
-
-  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES == 16) {
-    local T2_GF61* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
-
-#if LDSPAD
-    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 8, 72..., 16...   lds[64..127] = +1
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad 1 value every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 8                     + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 32 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
-    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
-    if (0 && f == 8 && RADIX == 8) {
-      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
-      bar(WG);
-      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1, 65..., 16...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad 1 value every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16... 4..  lds[64..127] = +1
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
-    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
-    // We can however save a bar() by writing to same locations that previous shufl wrote to.
-    if (!force_default && f == 8 && RADIX == 8) {
-      for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
-      return;
-    }
-#endif
-
-    // Otherwise, execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
-  else if (SHUFL_BYTES == 8) {
-    local T_Z61* lds = ((local T_Z61*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
-
-#if LDSPAD
-    // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first n == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      return;
-    }
-#endif
-
-    // Execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
-  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
-  else if (SHUFL_BYTES == 4) {
-    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
-    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
-    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-    local int* lds = (local int*) lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
-
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-  }
-}
-
-#endif
-
-
-#if FFT_FP32 || NTT_GF31
-
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats or Z31s.
-void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  //GW - would a 16 byte implementation be useful?  Less LDS conflict work?
-
-  int force_default = 0;
-#if NOWG2
-  if (numWG > 1) force_default = 1;
-#endif
-#if NOLDS2
-  if (f != 1) force_default = 1;
-#endif
-
-  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES >= 8) {
-    local F2_GF31* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
-
-#if LDSPAD
-    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      return;
-    }
-#endif
-
-    // Execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
-  else if (SHUFL_BYTES == 4) {
-    local F_Z31* lds = ((local F_Z31*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
-
-#if LDSPAD
-    // Special case first n == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 2, 66..., 3, 67..., 32, 96...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
-      return;
-    }
-
-    // Special case second n == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 7.., 32...   lds[64..127] = +8
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
-      return;
-    }
-
-    // Special case second n == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 1.... ... 8...   lds[64..127] = +2
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
-      return;
-    }
-#endif
-
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
-  }
-}
-
-#endif
-
+#define INCLUDE_FILE "shufl.cl"
+#include "expand.cl"
 
 #if FFT_FP64
 
diff --git a/src/cl/fftmiddlein.cl b/src/cl/fftmiddlein.cl
index a7c34538..5c416917 100644
--- a/src/cl/fftmiddlein.cl
+++ b/src/cl/fftmiddlein.cl
@@ -2,7 +2,9 @@
 
 #include "base.cl"
 #include "fft-middle.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 #if !INPLACE                  // Original implementation (not in place)
 
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index b3c18d96..234dadd5 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -2,7 +2,9 @@
 
 #include "base.cl"
 #include "fft-middle.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 #if !INPLACE                   // Original implementation (not in place)
 
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index f91cd99a..620b0734 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -3,7 +3,9 @@
 #include "base.cl"
 #include "fftwidth.cl"
 #include "weight.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 #if FFT_TYPE == FFT64
 
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index 72fe1ea8..14b4f5fd 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -2,7 +2,9 @@
 
 #include "base.cl"
 #include "fftwidth.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 #if FFT_FP64
 
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 370850d1..90951dc5 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -34,9 +34,23 @@
 #define MIDDLE_OUT_LDS_TRANSPOSE 1
 #endif
 
+// These were the original read/write routines for accessing FFT data.  I'm not sure if they are used anymore.
+
+#ifdef T2_F2_GF31_GF61
+void OVERLOAD read(u32 WG_SZ, u32 N, T2_F2_GF31_GF61 *u, const global T2_F2_GF31_GF61 *in, u32 base) {
+  in += base + (u32) get_local_id(0);
+  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG_SZ]); }
+}
+
+void OVERLOAD write(u32 WG_SZ, u32 N, T2_F2_GF31_GF61 *u, global T2_F2_GF31_GF61 *out, u32 base) {
+  out += base + (u32) get_local_id(0);
+  for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG_SZ], u[i]); }
+}
+#endif
+
 #if !INPLACE                       // Original implementation (not in place)
 
-#if FFT_FP64 || NTT_GF61
+#ifdef T2_GF61
 
 //****************************************************************************************
 // Pair of routines to write data from carryFused and read data into fftMiddleIn
@@ -90,7 +104,7 @@ void OVERLOAD readMiddleInLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 //      x         ranges 0...SMALL_HEIGHT-1 (multiples of one)          (also known as 0...G_H-1 and 0...NH-1)
 //      y         ranges 0...MIDDLE*WIDTH-1 (multiples of SMALL_HEIGHT)
 
-void OVERLOAD writeMiddleInLine (P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleInLine(P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
 {
   //u32 SIZEY = IN_WG / IN_SIZEX;
   //u32 num_x_chunks = WIDTH / IN_SIZEX;                // Number of x chunks
@@ -278,7 +292,7 @@ void OVERLOAD readMiddleOutLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 // adjusted to effect a transpose.  Or caller must transpose the x and y values and send us an out pointer with thread_id added in.
 // In other words, caller is responsible for deciding the best way to transpose x and y values.
 
-void OVERLOAD writeMiddleOutLine (P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleOutLine(P(T2_GF61) out, T2_GF61 *u, u32 chunk_y, u32 chunk_x)
 {
   //u32 SIZEY = OUT_WG / OUT_SIZEX;
   //u32 num_x_chunks = SMALL_HEIGHT / OUT_SIZEX;  // Number of x chunks
@@ -378,7 +392,7 @@ void OVERLOAD readCarryFusedLine(CP(T2_GF61) in, T2_GF61 *u, u32 line, u32 me) {
 /*        Similar to above, but for an FFT based on FP32 or GF31          */
 /**************************************************************************/
 
-#if FFT_FP32 || NTT_GF31
+#ifdef F2_GF31
 
 void OVERLOAD writeCarryFusedLine(F2_GF31 *u, P(F2_GF31) out, u32 line, u32 me) {
 #if PAD_SIZE > 0
@@ -404,7 +418,7 @@ void OVERLOAD readMiddleInLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 #endif
 }
 
-void OVERLOAD writeMiddleInLine (P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleInLine(P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
 {
 #if PAD_SIZE > 0
   u32 SIZEY = IN_WG / IN_SIZEX;
@@ -512,7 +526,7 @@ void OVERLOAD readMiddleOutLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 #endif
 }
 
-void OVERLOAD writeMiddleOutLine (P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
+void OVERLOAD writeMiddleOutLine(P(F2_GF31) out, F2_GF31 *u, u32 chunk_y, u32 chunk_x)
 {
 #if PAD_SIZE > 0
   u32 SIZEY = OUT_WG / OUT_SIZEX;
@@ -659,7 +673,7 @@ void OVERLOAD readCarryFusedLine(CP(F2_GF31) in, F2_GF31 *u, u32 line, u32 me) {
 // This leaves the "columns" starting at +1KB unused - suggesting a pad of +1KB before the 64Ks would yield a better distribution in the L2 cache.
 // However, if we have say an 8-way 16MB L2 cache then each way contains 2MB.  If so, we'd want to pad 1KB before the 16th 64K FFT data value.
 
-#if FFT_FP64 || NTT_GF61
+#ifdef T2_GF61
 
 //****************************************************************************************
 // Pair of routines to read/write data to/from carryFused
@@ -721,7 +735,7 @@ void OVERLOAD readMiddleInLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
-void OVERLOAD writeMiddleInLine (P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleInLine(P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
@@ -764,7 +778,7 @@ void OVERLOAD readMiddleOutLine(T2_GF61 *u, CP(T2_GF61) in, u32 y, u32 x) {
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
-void OVERLOAD writeMiddleOutLine (P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleOutLine(P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW) + (y % 16 * SIZEBLK) + (SWIZ(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM], u[i]); }
@@ -777,7 +791,7 @@ void OVERLOAD writeMiddleOutLine (P(T2_GF61) out, T2_GF61 *u, u32 y, u32 x)
 /*        Similar to above, but for an FFT based on FP32 or GF31          */
 /**************************************************************************/
 
-#if FFT_FP32 || NTT_GF31
+#ifdef F2_GF31
 
 //****************************************************************************************
 // Pair of routines to read/write data to/from carryFused
@@ -840,7 +854,7 @@ void OVERLOAD readMiddleInLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 }
 
 // NOTE:  writeMiddleInLine uses the same definition of x,y as readMiddleInLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleInLine.
-void OVERLOAD writeMiddleInLine (P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleInLine(P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
 {
   out += (x / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, y / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
@@ -883,7 +897,7 @@ void OVERLOAD readMiddleOutLine(F2_GF31 *u, CP(F2_GF31) in, u32 y, u32 x) {
 }
 
 // NOTE:  writeMiddleOutLine uses the same definition of x,y as readMiddleOutLine.  Caller transposes 16x16 blocks of FFT data before calling writeMiddleOutLine.
-void OVERLOAD writeMiddleOutLine (P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
+void OVERLOAD writeMiddleOutLine(P(F2_GF31) out, F2_GF31 *u, u32 y, u32 x)
 {
   out += (y / 16 * SIZEW32) + (y % 16 * SIZEBLK32) + (SWIZ32(y % 16, x / 16) * 16) + (x % 16);
   for (i32 i = 0; i < MIDDLE; ++i) { FFTSTORE(&out[i * SIZEM32], u[i]); }
diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
new file mode 100644
index 00000000..9ed387a9
--- /dev/null
+++ b/src/cl/shufl.cl
@@ -0,0 +1,601 @@
+// Copyright (C) Mihai Preda
+
+#ifdef T2_GF61
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
+// Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
+// even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
+// WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
+// n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
+// numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
+// lowMe = me % WG
+// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
+// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
+// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
+// minor optimization would be to special case the first shufl call.
+void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  int force_default = 0;
+#if NOWG2                       // For timing tests only.  Option to not turn off LDS bank conflict code when numWG > 1.  I've not found a GPU where this is beneficial.
+  if (numWG > 1) force_default = 1;
+#endif
+#if NOLDS2                      // For timing tests only.  Option to not turn off LDS bank for second shufl calls.  I've not found a GPU where this is beneficial.
+  if (f != 1) force_default = 1;
+#endif
+
+  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES == 16) {
+    local T2_GF61* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 8, 72..., 16...   lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad 1 value every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 8                     + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 32 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
+    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
+    if (0 && f == 8 && RADIX == 8) {
+      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
+      bar(WG);
+      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1, 65..., 16...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad 1 value every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16... 4..  lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
+    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
+    // We can however save a bar() by writing to same locations that previous shufl wrote to.
+    if (!force_default && f == 8 && RADIX == 8) {
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
+  else if (SHUFL_BYTES == 8) {
+    local T_Z61* lds = ((local T_Z61*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
+
+#if LDSPAD
+    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
+
+    // Execute the original shufl code
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
+  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  else if (SHUFL_BYTES == 4) {
+    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
+    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
+    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
+    local int* lds = (local int*) lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
+
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+  }
+}
+
+#endif
+
+
+#ifdef F2_GF31
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats or Z31s.
+void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  //GW - would a 16 byte implementation be useful?  Less LDS conflict work?
+
+  int force_default = 0;
+#if NOWG2
+  if (numWG > 1) force_default = 1;
+#endif
+#if NOLDS2
+  if (f != 1) force_default = 1;
+#endif
+
+  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES >= 8) {
+    local F2_GF31* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
+
+    // Execute the original shufl code
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
+  else if (SHUFL_BYTES == 4) {
+    local F_Z31* lds = ((local F_Z31*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 2, 66..., 3, 67..., 32, 96...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (!force_default && f == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 32 must have unique LDS banks.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 7.., 32...   lds[64..127] = +8
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (!force_default && f == 1 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 1.... ... 8...   lds[64..127] = +2
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (!force_default && f == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      return;
+    }
+#endif
+
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+}
+
+#endif
+
+
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 957aace9..15d9076e 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -2,8 +2,11 @@
 
 #include "base.cl"
 #include "fftheight.cl"
-#include "tailutil.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "tailutil.cl"
+#include "expand.cl"
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 // If not doing L2 stripes, process the lines in any order.
 // If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 16 * MIDDLE tailSquare lines.
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 8d2a9a7e..53d7d13e 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -2,8 +2,11 @@
 
 #include "base.cl"
 #include "fftheight.cl"
-#include "tailutil.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "tailutil.cl"
+#include "expand.cl"
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 // If not doing L2 stripes, process the lines in any order.
 // If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 16 * MIDDLE tailSquare lines.

From 92f92e25d536ce3a4359745fabcd19f0890cd968 Mon Sep 17 00:00:00 2001
From: Dylan <quantum64development@gmail.com>
Date: Sat, 22 Aug 2026 06:57:33 -0400
Subject: [PATCH 124/214] Try reduced power proof on CRCError

---
 src/Gpu.cpp | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 70ea4d14..204b88ea 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2259,18 +2259,22 @@ fs::path Gpu::saveProof(const Args& args, ProofSet& proofSet) {
   bool problem_proof = false;
   for ( ; ; ) {
     for (int retry = 0; retry == 0 || (retry == 1 && !problem_proof); ++retry) {
-      auto [proof, hashes] = proofSet.computeProof(this);
-      fs::path const tmpFile = proof.file(args.proofToVerifyDir);
-      proof.save(tmpFile);
-            
-      fs::path proofFile = proof.file(args.proofResultDir);
-
-      bool const ok = Proof::load(tmpFile).verify(this, hashes);
-      log("Proof '%s' verification %s\n", tmpFile.string().c_str(), ok ? "OK" : "FAILED");
-      if (ok) {
-        fancyRename(tmpFile, proofFile);
-        log("Proof '%s' generated\n", proofFile.string().c_str());
-        return proofFile;
+      try {
+        auto [proof, hashes] = proofSet.computeProof(this);
+        fs::path const tmpFile = proof.file(args.proofToVerifyDir);
+        proof.save(tmpFile);
+
+        fs::path proofFile = proof.file(args.proofResultDir);
+
+        bool const ok = Proof::load(tmpFile).verify(this, hashes);
+        log("Proof '%s' verification %s\n", tmpFile.string().c_str(), ok ? "OK" : "FAILED");
+        if (ok) {
+          fancyRename(tmpFile, proofFile);
+          log("Proof '%s' generated\n", proofFile.string().c_str());
+          return proofFile;
+        }
+      } catch (const CRCError&) {
+        break;
       }
     }
     problem_proof = true;

From d58ef5f62797d1efcde336f318cc5dd5835f91da Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 22 Aug 2026 15:00:24 +0000
Subject: [PATCH 125/214] One more include file needed fixing for new combo
 types (templating)

---
 src/cl/ffthin.cl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index 52c39322..e95eb88d 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -2,7 +2,9 @@
 
 #include "base.cl"
 #include "fftheight.cl"
-#include "middle.cl"
+
+#define INCLUDE_FILE "middle.cl"
+#include "expand.cl"
 
 // If not doing L2 stripes, process the lines in any order.
 // If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 2 * stripe_group_size * 16 * MIDDLE tailSquare lines.

From 6cf0dcdd64ff6e1af3825652bfb10346359f4a81 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 1 Sep 2026 21:18:41 +0000
Subject: [PATCH 126/214] Faster WIDTH and HEIGHT = 1K (radix 8).  Improved
 GF31 cmul.  Allow HEIGHT > WIDTH in -tune.  Faster radix-16 code.

---
 src/FFTConfig.cpp    |   13 +-
 src/FFTConfig.h      |    4 +-
 src/Gpu.cpp          |    2 +-
 src/TrigBufCache.cpp |  100 ++-
 src/cl/fft16.cl      |   75 ++-
 src/cl/fft4.cl       |   23 +-
 src/cl/fft8.cl       |  245 ++++++-
 src/cl/fftbase.cl    |  664 ++++++++++++++++++-
 src/cl/math.cl       |  408 ++++++++++--
 src/cl/shufl.cl      | 1488 +++++++++++++++++++++++++-----------------
 10 files changed, 2256 insertions(+), 766 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index 120bc287..ee13528a 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -86,9 +86,8 @@ vector<FFTShape> FFTShape::allShapes(u32 sizeFrom, u32 sizeTo) {
   for (enum FFT_TYPES const type : {FFT64, FFT6431, FFT3161, FFT3261, FFT61, FFT323161}) {
     for (u32 const width : {256, 512, 1024, 4096}) {
       for (u32 const height : {256, 512, 1024}) {
-        if (width == 256 && height == 1024) { continue; } // Skip because we prefer width >= height
         for (u32 const middle : {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}) {
-          if (type != FFT64 && (middle & (middle - 1))) continue;   // Reject non-power-of-two NTTs
+          if (type != FFT64 && type != FFT32 && (middle & (middle - 1))) continue;  // Reject non-power-of-two NTTs
           u32 const sz = width * height * middle * 2;
           if (sizeFrom <= sz && sz <= sizeTo) {
             configs.emplace_back(type, width, middle, height);
@@ -192,17 +191,15 @@ bool FFTShape::needsLargeCarry(u64 E) const {
 // Return TRUE for "favored" shapes.  That is, those that are most likely to be useful.  To save time in generating bpw data, only these favored
 // shapes have their bpw data pre-computed.  Bpw for non-favored shapes is guessed from the bpw data we do have.  Also. -tune will normally only
 // time favored shapes.  These are the rules for deciding favored shapes:
-//      WIDTH >= HEIGHT
 //      WIDTH=4K:  HEIGHT>=512, MIDDLE>=9       (2*8 combos)
 //      WIDTH=1K:  MIDDLE>=5                    (3*12 combos)
 //      WIDTH=512: MIDDLE>=4                    (2*13 combos)
 //      WIDTH=256: MIDDLE>=1                    (16 combos)
 bool FFTShape::isFavoredShape() const {
-  return width >= height &&
-        ((width == 4096 && height >= 512 && middle >= 9) ||
-         (width == 1024 && middle >= 5) ||
-         (width == 512 && middle >= 4) ||
-         (width == 256 && middle >= 1));
+  return ((width == 4096 && height >= 512 && middle >= 9) ||
+          (width == 1024 && middle >= 5) ||
+          (width == 512 && middle >= 4) ||
+          (width == 256 && middle >= 1));
 }
 
 FFTConfig::FFTConfig(const string& spec) {
diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index 3863ec19..4c5d1769 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -42,8 +42,8 @@ class FFTShape {
   explicit FFTShape(const string& spec);
 
   [[nodiscard]] u32 size() const { return width * height * middle * 2; }
-  [[nodiscard]] u32 nW() const { return (width == 1024 || width == 256 /*|| width == 4096*/) ? 4 : 8; }
-  [[nodiscard]] u32 nH() const { return (height == 1024 || height == 256 /*|| height == 4096*/) ? 4 : 8; }
+  [[nodiscard]] u32 nW() const { return (/*width == 1024 ||*/ width == 256) ? 4 : 8; }
+  [[nodiscard]] u32 nH() const { return (/*height == 1024 ||*/ height == 256) ? 4 : 8; }
 
   [[nodiscard]] float minBpw() const { return fft_type != FFT32 ? 3.0f : 1.0f; }
   [[nodiscard]] float maxBpw() const { return *std::ranges::max_element(bpw); }
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 70ea4d14..b2da45dd 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -620,7 +620,7 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
       use_override = "REGCF3231";
       break;
     case FFT6431:
-      regs = -1;
+      regs = nW == 8 ? -1 : -1;         // Tested on TitanV, NW=8, CUDA 13.0.  NW=4 not tested.
       use_override = "REGCF6431";
       break;
     case FFT31:
diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index d46d6082..f9e532c5 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -143,10 +143,26 @@ static vector<double2> genSmallTrigFP64(u32 size, u32 radix) {
   u32 const WG = size / radix;
   vector<double2> tab;
 
-// old fft_WIDTH and fft_HEIGHT
-  for (u32 line = 1; line < radix; ++line) {
-    for (u32 col = 0; col < WG; ++col) {
-      tab.push_back(radix / line >= 8 ? root1Fancy(size, col * line) : root1(size, col * line));
+  // New SIZE=256, RADIX=8 which is really mixed radix-4 and radix-8.  This is for a 4 * 8 * 8 implementation.
+  if (size == 256 && radix == 8) {
+    for (u32 line = 1; line < radix/2; ++line) {
+      for (u32 col = 0; col < WG*2; ++col) {
+        tab.push_back(0 && radix / line >= 8 ? root1Fancy(size, col * line) : root1(size, col * line));
+      }
+    }
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; col += 4) {
+        tab.push_back(0 && radix / line >= 8 ? root1Fancy(size, col * line) : root1(size, col * line));
+      }
+    }
+  }
+
+  // original fft_WIDTH and fft_HEIGHT
+  else {
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; ++col) {
+        tab.push_back(radix / line >= 8 ? root1Fancy(size, col * line) : root1(size, col * line));
+      }
     }
   }
   tab.resize(size);
@@ -397,10 +413,26 @@ static vector<float2> genSmallTrigFP32(u32 size, u32 radix) {
   u32 const WG = size / radix;
   vector<float2> tab;
 
-// old fft_WIDTH and fft_HEIGHT
-  for (u32 line = 1; line < radix; ++line) {
-    for (u32 col = 0; col < WG; ++col) {
-      tab.push_back(radix / line >= 8 ? root1FancyFP32(size, col * line) : root1FP32(size, col * line));
+  // New SIZE=256, RADIX=8 which is really mixed radix-4 and radix-8.  This is for a 4 * 8 * 8 implementation.
+  if (size == 256 && radix == 8) {
+    for (u32 line = 1; line < radix/2; ++line) {
+      for (u32 col = 0; col < WG*2; ++col) {
+        tab.push_back(0 && radix / line >= 8 ? root1FancyFP32(size, col * line) : root1FP32(size, col * line));
+      }
+    }
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; col += 4) {
+        tab.push_back(0 && radix / line >= 8 ? root1FancyFP32(size, col * line) : root1FP32(size, col * line));
+      }
+    }
+  }
+
+  // original fft_WIDTH and fft_HEIGHT
+  else {
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; ++col) {
+        tab.push_back(radix / line >= 8 ? root1FancyFP32(size, col * line) : root1FP32(size, col * line));
+      }
     }
   }
   tab.resize(size);
@@ -627,13 +659,31 @@ uint2 root1GF31(u32 N, u32 k) {
 static vector<uint2> genSmallTrigGF31(u32 size, u32 radix) {
   u32 const WG = size / radix;
   vector<uint2> tab;
-
   GF31 const root1size = GF31::root_one(size);
-  for (u32 line = 1; line < radix; ++line) {
-    for (u32 col = 0; col < WG; ++col) {
-      tab.push_back(root1GF31(root1size, col * line));
+
+  // New SIZE=256, RADIX=8 which is really mixed radix-4 and radix-8.  This is for a 4 * 8 * 8 implementation.
+  if (size == 256 && radix == 8) {
+    for (u32 line = 1; line < radix/2; ++line) {
+      for (u32 col = 0; col < WG*2; ++col) {
+        tab.push_back(root1GF31(root1size, col * line));
+      }
+    }
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; col += 4) {
+        tab.push_back(root1GF31(root1size, col * line));
+      }
+    }
+  }
+
+  // Standard roots
+  else {
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; ++col) {
+        tab.push_back(root1GF31(root1size, col * line));
+      }
     }
   }
+
   tab.resize(size);
   return tab;
 }
@@ -789,13 +839,31 @@ ulong2 root1GF61(u32 N, u32 k) {
 static vector<ulong2> genSmallTrigGF61(u32 size, u32 radix) {
   u32 const WG = size / radix;
   vector<ulong2> tab;
-
   GF61 const root1size = GF61::root_one(size);
-  for (u32 line = 1; line < radix; ++line) {
-    for (u32 col = 0; col < WG; ++col) {
-      tab.push_back(root1GF61(root1size, col * line));
+
+  // New SIZE=256, RADIX=8 which is really mixed radix-4 and radix-8.  This is for a 4 * 8 * 8 implementation.
+  if (size == 256 && radix == 8) {
+    for (u32 line = 1; line < radix/2; ++line) {
+      for (u32 col = 0; col < WG*2; ++col) {
+        tab.push_back(root1GF61(root1size, col * line));
+      }
+    }
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; col += 4) {
+        tab.push_back(root1GF61(root1size, col * line));
+      }
     }
   }
+
+  // Standard roots
+  else {
+    for (u32 line = 1; line < radix; ++line) {
+      for (u32 col = 0; col < WG; ++col) {
+        tab.push_back(root1GF61(root1size, col * line));
+      }
+    }
+  }
+
   tab.resize(size);
   return tab;
 }
diff --git a/src/cl/fft16.cl b/src/cl/fft16.cl
index 7cbbb24b..edb494be 100644
--- a/src/cl/fft16.cl
+++ b/src/cl/fft16.cl
@@ -2,33 +2,53 @@
 
 #if FFT_FP64
 
-#if 0
+#if 1
 
 #if 1
 
 #include "fft4.cl"
 
-// 24 FMA (of which 16 MUL) + 136 ADD
+// 56 FMA + 96 ADD
 void OVERLOAD fft16(T2 *u) {
   double
       C1 = 0.92387953251128674, // cos(tau/16)
-      S1 = 0.38268343236508978; // sin(tau/16)
+      S1 = 0.38268343236508978, // sin(tau/16)
+      S1_over_C1 = 0.4142135623730950488017,
+      C1_over_S1 = 2.4142135623730950488017;
 
   for (int i = 0; i < 4; ++i) { fft4by(u, i, 4, 16); }
 
-  u[5]  = cmul(u[ 5],  U2(C1, S1));
-  u[7]  = cmul(u[ 7],  U2(S1, C1));
-  u[13] = cmul(u[13],  U2(S1, C1));
-  u[15] = cmul(u[15], -U2(C1, S1));
-
-  u[6]  = mul_t8(u[6]);
-  u[9]  = mul_t8(u[9]);
-  u[11] = mul_3t8(u[11]);
-  u[14] = mul_3t8(u[14]);
-
-  u[10] = mul_t4(u[10]);
-
-  for (int i = 0; i < 4; ++i) { fft4by(u, 4 * i, 1, 16); }
+  X2(u[0], u[2]);
+  X2_mul_t4(u[1], u[3]);
+  X2(u[0], u[1]);
+  X2(u[2], u[3]);
+  SWAP(u[1], u[2]);
+
+  u[9]  = mul_t8_delayed(u[9]);              // delays a mul by M_SQRT1_2
+  u[11] = mul_t8_delayed(u[11]);             // delays a mul by i*M_SQRT1_2 (a negation cheaper than mul_3t8_delayed)
+  X2t4(u[8], u[10]);
+  X2t4_mul_t4(u[9], u[11]);
+  X2ad(u[8], u[9], M_SQRT1_2);
+  X2ad(u[10], u[11], M_SQRT1_2);
+  SWAP(u[9], u[10]);
+
+  u[5]  = partial_cmul(u[5], S1_over_C1);    // delays a mul by C1
+  u[6]  = mul_t8_delayed(u[6]);              // delays a mul by M_SQRT1_2
+  u[7]  = partial_cmul(u[7], C1_over_S1);    // delays a mul by S1
+  X2ad(u[4], u[6], M_SQRT1_2);
+  X2ad_mul_t4(u[5], u[7], S1_over_C1);       // mul by S1/C1, now both are delaying a mul by C1
+  X2ad(u[4], u[5], C1);                      // apply delayed mul by C1
+  X2ad(u[6], u[7], C1);                      // apply delayed mul by C1
+  SWAP(u[5], u[6]);
+
+  u[13] = partial_cmul(u[13], C1_over_S1);   // delays a mul by S1
+  u[14] = mul_t8_delayed(u[14]);             // delays a mul by i*M_SQRT1_2 (a negation cheaper than mul_3t8_delayed)
+  u[15] = partial_cmul(u[15], S1_over_C1);   // delays a mul by -C1
+  X2t4ad(u[12], u[14], M_SQRT1_2);
+  X2ad_mul_t4(u[13], u[15], -C1_over_S1);    // mul by -C1/S1, now both are delaying a mul by S1
+  X2ad(u[12], u[13], S1);                    // apply delayed mul by S1
+  X2ad(u[14], u[15], S1);                    // apply delayed mul by S1
+  SWAP(u[13], u[14]);
 
   SWAP(u[1], u[4]);
   SWAP(u[2], u[8]);
@@ -36,8 +56,6 @@ void OVERLOAD fft16(T2 *u) {
   SWAP(u[6], u[9]);
   SWAP(u[7], u[13]);
   SWAP(u[11], u[14]);
-
-  // for (int i = 0; i < 4; ++i) { fft4by(u, i, 4, 16); }
 }
 
 #else
@@ -207,6 +225,8 @@ void OVERLOAD fft16(F2 *u) {
 void OVERLOAD fft16(GF31 *u) {
   const Z31 C1 = 1556715293;
   const Z31 S1 = 978592373;
+  const Z31 negC1 = M31 - C1;
+  const Z31 negS1 = M31 - S1;
 
   X2(u[0], u[8]);
   X2(u[1], u[9]);
@@ -217,10 +237,10 @@ void OVERLOAD fft16(GF31 *u) {
   X2_mul_3t8(u[6], u[14]);
   X2(u[7], u[15]);
 
-  u[ 9] = cmul(u[ 9], U2( C1, S1)); // 1t16
-  u[11] = cmul(u[11], U2( S1, C1)); // 3t16
-  u[13] = cmul(u[13], U2(neg(S1), C1)); // 5t16		//GWBUG - check if optimizer is eliminating the neg (or better yet perhaps tweak follow up code to expect a negative)
-  u[15] = cmul(u[15], U2(neg(C1), S1)); // 7t16
+  u[ 9] = cmul_const(u[ 9], U2( C1, S1)); // 1t16
+  u[11] = cmul_const(u[11], U2( S1, C1)); // 3t16
+  u[13] = cmul_const(u[13], U2(negS1, C1)); // 5t16
+  u[15] = cmul_const(u[15], U2(negC1, S1)); // 7t16
 
   fft8Core(u);
   fft8Core(u + 8);
@@ -247,9 +267,6 @@ void OVERLOAD fft16(GF31 *u) {
 #include "fft8.cl"
 
 void OVERLOAD fft16(GF61 *u) {
-  const Z61 C1 = 22027337052962166ULL;
-  const Z61 S1 = 1693317751237720973ULL;
-
   X2(u[0], u[8]);
   X2(u[1], u[9]);
   X2_mul_t8(u[2], u[10]);
@@ -259,10 +276,10 @@ void OVERLOAD fft16(GF61 *u) {
   X2_mul_3t8(u[6], u[14]);
   X2(u[7], u[15]);
 
-  u[ 9] = cmul(u[ 9], U2( C1, S1)); // 1t16
-  u[11] = cmul(u[11], U2( S1, C1)); // 3t16
-  u[13] = cmul(u[13], U2(neg(S1), C1)); // 5t16		//GWBUG - check if optimizer is eliminating the neg (or better yet perhaps tweak follow up code to expect a negative)
-  u[15] = cmul(u[15], U2(neg(C1), S1)); // 7t16
+  u[9] = mul_t16(u[9]);
+  u[11] = mul_3t16(u[11]);
+  u[13] = mul_5t16(u[13]);
+  u[15] = mul_7t16(u[15]);
 
   fft8Core(u);
   fft8Core(u + 8);
diff --git a/src/cl/fft4.cl b/src/cl/fft4.cl
index 1aafbb69..80b2c3af 100644
--- a/src/cl/fft4.cl
+++ b/src/cl/fft4.cl
@@ -6,7 +6,7 @@
 
 void OVERLOAD fft4Core(T2 *u) {
   X2(u[0], u[2]);
-  X2(u[1], u[3]); u[3] = mul_t4(u[3]);
+  X2_mul_t4(u[1], u[3]);
 
   X2(u[0], u[1]);
   X2(u[2], u[3]);
@@ -26,7 +26,7 @@ void OVERLOAD fft4by(T2 *u, u32 base, u32 step, u32 M) {
   double x1 = A(1).x + A(3).x;
   double y3 = A(1).x - A(3).x;
   double y1 = A(1).y + A(3).y;
-  double x3 = -(A(1).y - A(3).y);
+  double x3 = A(3).y - A(1).y;
 
   double a0 = x0 + x1;
   double a1 = x0 - x1;
@@ -48,10 +48,9 @@ void OVERLOAD fft4by(T2 *u, u32 base, u32 step, u32 M) {
 #else
 
   X2(A(0), A(2));
-  X2(A(1), A(3));
+  X2_mul_t4(A(1), A(3));
   X2(A(0), A(1));
 
-  A(3) = mul_t4(A(3));
   X2(A(2), A(3));
   SWAP(A(1), A(2));
 
@@ -74,7 +73,7 @@ void OVERLOAD fft4(T2 *u) { fft4by(u, 0, 1, 4); }
 
 void OVERLOAD fft4Core(F2 *u) {
   X2(u[0], u[2]);
-  X2(u[1], u[3]); u[3] = mul_t4(u[3]);
+  X2_mul_t4(u[1], u[3]);
 
   X2(u[0], u[1]);
   X2(u[2], u[3]);
@@ -94,7 +93,7 @@ void OVERLOAD fft4by(F2 *u, u32 base, u32 step, u32 M) {
   float x1 = A(1).x + A(3).x;
   float y3 = A(1).x - A(3).x;
   float y1 = A(1).y + A(3).y;
-  float x3 = -(A(1).y - A(3).y);
+  float x3 = A(3).y - A(1).y;
 
   float a0 = x0 + x1;
   float a1 = x0 - x1;
@@ -116,10 +115,9 @@ void OVERLOAD fft4by(F2 *u, u32 base, u32 step, u32 M) {
 #else
 
   X2(A(0), A(2));
-  X2(A(1), A(3));
+  X2_mul_t4(A(1), A(3));
   X2(A(0), A(1));
 
-  A(3) = mul_t4(A(3));
   X2(A(2), A(3));
   SWAP(A(1), A(2));
 
@@ -194,6 +192,15 @@ void OVERLOAD fft4(GF31 *u) { fft4by(u, 0, 1, 4); }
 
 #if NTT_GF61
 
+void OVERLOAD fft4Core(GF61 *u) {
+  X2q(&u[0], &u[2]);           // u[0] = 0..2+, u[2] = -1-..1+
+  X2q_mul_t4(&u[1], &u[3]);    // u[1] = 0..2+, u[3] = -1-..1+
+  X2q(&u[0], &u[1]);           // u[0] = 0..4+, u[1] = -2-..2+
+  X2q(&u[2], &u[3]);           // u[2] = -2..2+, u[0] = -2-..2+
+  u[0] = modM61q(u[0], 0);
+  for (u32 i = 1; i <= 3; ++i) u[i] = modM61q(u[i], 3);
+}
+
 // 16 ADD
 void OVERLOAD fft4by(GF61 *u, u32 base, u32 step, u32 M) {
 
diff --git a/src/cl/fft8.cl b/src/cl/fft8.cl
index 99ffa23c..6a9bb104 100644
--- a/src/cl/fft8.cl
+++ b/src/cl/fft8.cl
@@ -6,23 +6,18 @@
 
 #if FFT_FP64
 
-T2 mul_t8_delayed(T2 a) { return U2(a.x - a.y, a.x + a.y); }
-T2 mul_3t8_delayed(T2 a) { return U2(-(a.x + a.y), a.x - a.y); }
-//#define X2_apply_delay(a, b) { T2 t = a; a = t + M_SQRT1_2 * b; b = t - M_SQRT1_2 * b; }
-#define X2_apply_delay(a, b) { T2 t = a; a.x = fma(b.x, M_SQRT1_2, a.x); a.y = fma(b.y, M_SQRT1_2, a.y); b.x = fma(-M_SQRT1_2, b.x, t.x); b.y = fma(-M_SQRT1_2, b.y, t.y); }
-
 void OVERLOAD fft4CoreSpecial(T2 *u) {
   X2(u[0], u[2]);
-  X2_mul_t4(u[1], u[3]);                                        // X2(u[1], u[3]); u[3] = mul_t4(u[3]);
-  X2_apply_delay(u[0], u[1]);
-  X2_apply_delay(u[2], u[3]);
+  X2t4_mul_t4(u[1], u[3]);                                      // u[3] = mul_t4(u[3]); X2(u[1], u[3]); u[3] = mul_t4(u[3]);
+  X2ad(u[0], u[1], M_SQRT1_2);
+  X2ad(u[2], u[3], M_SQRT1_2);
 }
 
 void OVERLOAD fft8Core(T2 *u) {
   X2(u[0], u[4]);
-  X2(u[1], u[5]);   u[5] = mul_t8_delayed(u[5]);
-  X2_mul_t4(u[2], u[6]);                                        // X2(u[2], u[6]);   u[6] = mul_t4(u[6]);
-  X2(u[3], u[7]);   u[7] = mul_3t8_delayed(u[7]);
+  X2(u[1], u[5]);   u[5] = mul_t8_delayed(u[5]);                // Delays a mul by M_SQRT1_2
+  X2_mul_t4(u[2], u[6]);                                        // X2(u[2], u[6]); u[6] = mul_t4(u[6]);
+  X2(u[3], u[7]);   u[7] = mul_t8_delayed(u[7]);                // Delays a mul by i*M_SQRT1_2 (cheaper than calling mul_3t8_delayed)
   fft4Core(u);
   fft4CoreSpecial(u + 4);
 }
@@ -44,23 +39,18 @@ void OVERLOAD fft8(T2 *u) {
 
 #if FFT_FP32
 
-F2 mul_t8_delayed(F2 a) { return U2(a.x - a.y, a.x + a.y); }
-F2 mul_3t8_delayed(F2 a) { return U2(-(a.x + a.y), a.x - a.y); }
-//#define X2_apply_delay(a, b) { F2 t = a; a = t + M_SQRT1_2 * b; b = t - M_SQRT1_2 * b; }
-#define X2_apply_delay(a, b) { F2 t = a; a.x = fma(b.x, (float) M_SQRT1_2, a.x); a.y = fma(b.y, (float) M_SQRT1_2, a.y); b.x = fma((float) -M_SQRT1_2, b.x, t.x); b.y = fma((float) -M_SQRT1_2, b.y, t.y); }
-
 void OVERLOAD fft4CoreSpecial(F2 *u) {
   X2(u[0], u[2]);
-  X2_mul_t4(u[1], u[3]);                                        // X2(u[1], u[3]); u[3] = mul_t4(u[3]);
-  X2_apply_delay(u[0], u[1]);
-  X2_apply_delay(u[2], u[3]);
+  X2t4_mul_t4(u[1], u[3]);                                      // u[3] = mul_t4(u[3]); X2(u[1], u[3]); u[3] = mul_t4(u[3]);
+  X2ad(u[0], u[1], M_SQRT1_2);
+  X2ad(u[2], u[3], M_SQRT1_2);
 }
 
 void OVERLOAD fft8Core(F2 *u) {
   X2(u[0], u[4]);
-  X2(u[1], u[5]);   u[5] = mul_t8_delayed(u[5]);
-  X2_mul_t4(u[2], u[6]);                                        // X2(u[2], u[6]);   u[6] = mul_t4(u[6]);
-  X2(u[3], u[7]);   u[7] = mul_3t8_delayed(u[7]);
+  X2(u[1], u[5]);   u[5] = mul_t8_delayed(u[5]);                // Delays a mul by M_SQRT1_2
+  X2_mul_t4(u[2], u[6]);                                        // X2(u[2], u[6]); u[6] = mul_t4(u[6]);
+  X2(u[3], u[7]);   u[7] = mul_t8_delayed(u[7]);                // Delays a mul by i*M_SQRT1_2 (cheaper than calling mul_3t8_delayed)
   fft4Core(u);
   fft4CoreSpecial(u + 4);
 }
@@ -151,3 +141,214 @@ void OVERLOAD fft8(GF61 *u) {
 }
 
 #endif
+
+
+
+
+//***********************************************************************************************************************
+//     In a primarily radix 8 FFT, support other some other options such as radix-4 and radix-16
+//***********************************************************************************************************************
+
+#if FFT_FP64
+
+// Do two fft4s on eight FFT values
+void OVERLOAD fft8_4(T2 *u) {
+  fft4by(u, 0, 2, 8);
+  fft4by(u, 1, 2, 8);
+}
+
+// Perform the last three levels of a radix-16 butterfly.  The initial radix-2 has already been performed and shufl'ed.
+// This is used by SIZE=1K, RADIX=8 fft.  There are two versions, one for the first eight radix-16 values and one for the second eight radix-16 values.
+void OVERLOAD fft8_16a(T2 *u) {
+  fft8(u);
+}
+void OVERLOAD fft8_16b(T2 *u) {
+  const double C1 = 0.92387953251128674, // cos(tau/16)
+               S1 = 0.38268343236508978, // sin(tau/16)
+               S1_over_C1 = 0.4142135623730950488017,
+               C1_over_S1 = 2.4142135623730950488017;
+
+  X2t4(u[0], u[4]);
+  X2t4(u[1], u[5]);
+  X2t4(u[2], u[6]);
+  X2t4(u[3], u[7]);
+
+  u[1] = partial_cmul(u[1], S1_over_C1);  // delays a mul by C1
+  u[2] = mul_t8_delayed(u[2]);            // delays a mul by M_SQRT1_2
+  u[3] = partial_cmul(u[3], C1_over_S1);  // delays a mul by S1
+  X2ad(u[0], u[2], M_SQRT1_2);
+  X2ad_mul_t4(u[1], u[3], S1_over_C1);    // mul by S1/C1, now both are delaying a mul by C1
+  X2ad(u[0], u[1], C1);                   // apply delayed mul by C1
+  X2ad(u[2], u[3], C1);                   // apply delayed mul by C1
+
+  u[5] = partial_cmul(u[5], C1_over_S1);  // delays a mul by S1
+  u[6] = mul_t8_delayed(u[6]);            // delays a mul by i*M_SQRT1_2 (a negation cheaper than mul_3t8_delayed)
+  u[7] = partial_cmul(u[7], S1_over_C1);  // delays a mul by -C1
+  X2t4ad(u[4], u[6], M_SQRT1_2);
+  X2ad_mul_t4(u[5], u[7], -C1_over_S1);   // mul by -C1/S1, now both are delaying a mul by S1
+  X2ad(u[4], u[5], S1);                   // apply delayed mul by S1
+  X2ad(u[6], u[7], S1);                   // apply delayed mul by S1
+
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+
+#endif
+
+#if FFT_FP32
+
+// Do two fft4s on eight FFT values
+void OVERLOAD fft8_4(F2 *u) {
+  fft4by(u, 0, 2, 8);
+  fft4by(u, 1, 2, 8);
+}
+
+// Perform the last three levels of a radix-16 butterfly.  The initial radix-2 has already been performed and shufl'ed.
+// This is used by SIZE=1K, RADIX=8 fft.  There are two versions, one for the first eight radix-16 values and one for the second eight radix-16 values.
+void OVERLOAD fft8_16a(F2 *u) {
+  fft8(u);
+}
+void OVERLOAD fft8_16b(F2 *u) {
+  const float C1 = 0.92387953251128674, // cos(tau/16)
+              S1 = 0.38268343236508978, // sin(tau/16)
+              S1_over_C1 = 0.4142135623730950488017,
+              C1_over_S1 = 2.4142135623730950488017;
+
+  X2t4(u[0], u[4]);
+  X2t4(u[1], u[5]);
+  X2t4(u[2], u[6]);
+  X2t4(u[3], u[7]);
+
+  u[1] = partial_cmul(u[1], S1_over_C1);  // delays a mul by C1
+  u[2] = mul_t8_delayed(u[2]);            // delays a mul by M_SQRT1_2
+  u[3] = partial_cmul(u[3], C1_over_S1);  // delays a mul by S1
+  X2ad(u[0], u[2], M_SQRT1_2);
+  X2ad_mul_t4(u[1], u[3], S1_over_C1);    // mul by S1/C1, now both are delaying a mul by C1
+  X2ad(u[0], u[1], C1);                   // apply delayed mul by C1
+  X2ad(u[2], u[3], C1);                   // apply delayed mul by C1
+
+  u[5] = partial_cmul(u[5], C1_over_S1);  // delays a mul by S1
+  u[6] = mul_t8_delayed(u[6]);            // delays a mul by i*M_SQRT1_2 (a negation cheaper than mul_3t8_delayed)
+  u[7] = partial_cmul(u[7], S1_over_C1);  // delays a mul by -C1
+  X2t4ad(u[4], u[6], M_SQRT1_2);
+  X2ad_mul_t4(u[5], u[7], -C1_over_S1);   // mul by -C1/S1, now both are delaying a mul by S1
+  X2ad(u[4], u[5], S1);                   // apply delayed mul by S1
+  X2ad(u[6], u[7], S1);                   // apply delayed mul by S1
+
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+
+#endif
+
+#if NTT_GF31
+
+// Do two fft4s on eight FFT values
+void OVERLOAD fft8_4(GF31 *u) {
+  fft4by(u, 0, 2, 8);
+  fft4by(u, 1, 2, 8);
+}
+
+// Perform the last three levels of a radix-16 butterfly.  The initial radix-2 has already been performed and shufl'ed.
+// This is used by SIZE=1K, RADIX=8 fft.  There are two versions, one for the first eight radix-16 values and one for the second eight radix-16 values.
+void OVERLOAD fft8_16a(GF31 *u) {
+  fft8(u);
+}
+void OVERLOAD fft8_16b(GF31 *u) {
+  const Z31 C1 = 1556715293;
+  const Z31 S1 = 978592373;
+  const Z31 negC1 = M31 - C1;
+  const Z31 negS1 = M31 - S1;
+
+  X2t4(u[0], u[4]);
+  X2t4(u[1], u[5]);
+  X2t4(u[2], u[6]);
+  X2t4(u[3], u[7]);
+
+  u[1] = cmul_const(u[1], U2(C1, S1));
+  u[2] = mul_t8(u[2]);
+  u[3] = cmul_const(u[3], U2(S1, C1));
+  X2(u[0], u[2]);
+  X2_mul_t4(u[1], u[3]);
+  X2(u[0], u[1]);
+  X2(u[2], u[3]);
+
+  u[5] = cmul_const(u[5], U2(S1, C1));
+  u[6] = mul_3t8(u[6]);
+  u[7] = cmul_const(u[7], U2(negC1, negS1));
+  X2(u[4], u[6]);
+  X2_mul_t4(u[5], u[7]);
+  X2(u[4], u[5]);
+  X2(u[6], u[7]);
+
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+
+#endif
+
+#if NTT_GF61
+
+// Do two fft4s on eight FFT values
+void OVERLOAD fft8_4(GF61 *u) {
+  fft4by(u, 0, 2, 8);
+  fft4by(u, 1, 2, 8);
+}
+
+// Perform the last three levels of a radix-16 butterfly.  The initial radix-2 has already been performed and shufl'ed.
+// This is used by SIZE=1K, RADIX=8 fft.  There are two versions, one for the first eight radix-16 values and one for the second eight radix-16 values.
+void OVERLOAD fft8_16a(GF61 *u) {
+  // shufl_and_fft2 performed "quick" adds, u[0-7] are in range 0..2+
+  X2q(&u[0], &u[4]);               // X2(u[0], u[4]);  No reductions mod M61.  u[0,4] range is 0..4+, -2-..2+
+  X2q(&u[1], &u[5]);               // X2(u[1], u[5]);  Delay mul_t8 on u[5].   u[1,5] range is 0..4+, -2-..2+
+  X2q_mul_t4(&u[2], &u[6]);        // X2(u[2], u[6]);  u[6] = mul_t4(u[6]);    u[2,6] range is 0..4+, -2-..2+
+  X2q_mul_t4(&u[3], &u[7]);        // X2(u[3], u[7]);  u[7] = mul_t4(u[7]);    u[3,7] range is 0..4+, -2-..2+   Delay mul_t8 on u[7].
+
+  // Must normalize values.  The delayed mul_t8s can help with that (half of the complex number needs normalizing before mul_t8).
+  for (u32 i = 0; i <= 3; ++i) u[i] = modM61q(u[i], 0);
+  u[4] = modM61q(u[4], 3);
+  u[5].x = optional_add((i64)u[5].x, 2*M61);   // u[5] now 0-..2+, -2..2+
+  u[5] = mul_t8q(u[5], 5);                     // Perform delayed mul_t8 (count of 5 based on u[5].y - u[5].x range of -4-..2+
+  u[6] = modM61q(u[6], 3);
+  u[7].x = optional_add((i64)u[7].x, 2*M61);   // u[7] now 0-..2+, -2..2+
+  u[7] = mul_t8q(u[7], 5);                     // Perform delayed mul_t8.
+
+  fft4Core(u);
+  fft4Core(u + 4);
+
+  // revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+void OVERLOAD fft8_16b(GF61 *u) {
+  // shufl_and_fft2 performed "quick" subtracts, u[0-7] are in range -1-..1+
+  X2qt4(&u[0], &u[4]);            // -2..2+
+  X2qt4(&u[1], &u[5]);
+  X2qt4(&u[2], &u[6]);
+  X2qt4(&u[3], &u[7]);
+
+  // Must normalize values.  Some mul_t8s can help with that (only half of the complex number needs normalizing before mul_t8).
+  u[0] = modM61q(u[0], 3);
+  u[1] = modM61q(u[1], 3);
+  u[2].x = optional_add((i64)u[2].x, 2*M61);   // u[2] now 0-..2+, -2..2+
+  u[3] = modM61q(u[3], 3);
+  u[4] = modM61q(u[4], 3);
+  u[5] = modM61q(u[5], 3);
+  u[6].y = optional_add((i64)u[6].y, 2*M61);   // u[6] now -2-..2+, 0-..2+
+  u[7] = modM61q(u[7], 3);
+
+  u[1] = mul_t16(u[1]);
+  u[2] = mul_t8q(u[2], 5);                     // Perform mul_t8 (count of 5 based on u[2].y - u[2].x range of -4-..2+, -(u[2].x + u[2].y) range of -4-..2+
+  u[3] = mul_3t16(u[3]);
+  fft4Core(u);
+
+  u[5] = mul_3t16(u[5]);
+  u[6] = mul_3t8q(u[6], 3);                    // Perform mul_3t8 (count of 5 based on u[6].y - u[6].x range of -2-..4+, u[6].y + u[6].x range of -2-..4+
+  u[7] = mul_9t16(u[7]);
+  fft4Core(u + 4);
+
+  SWAP(u[1], u[4]);
+  SWAP(u[3], u[6]);
+}
+
+#endif
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index f011d792..f0b6d37c 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -183,18 +183,128 @@ void OVERLOAD tabMul(Trig trig, T2 *u, u32 f, u32 me) {
   }
 }
 
+// Tabmul after doing an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4a(Trig trig, T2 *u, u32 f, u32 me) {
+
+  if (f == 1) {                      // fft8_4 is performed first
+    u32 p = me;
+
+// This code uses chained complex multiplies which could be faster on GPUs with great DP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Perform two length=4 chain muls.
+
+    if (TABMUL_CHAIN) {
+      T2 w  = TFLOAD(&trig[p]);
+      T2 w2 = TFLOAD(&trig[WG + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      T2 base  = csqTrig(w);
+      T2 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+// Radeon VII loves this case, it is faster than the chainmul case.  nVidia Titan V hates this case.
+
+    if (!TABMUL_CHAIN) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG + p]));
+      }
+    }
+  }
+
+  else {                      // fft8_4 is performed after an initial fft8
+
+// This code uses chained complex multiplies which could be faster on GPUs with great DP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Perform two length=4 chain muls.
+
+    u32 p = me / 8;                 // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 7 * WG;                 // Skip over the trig values used in the first tabmul
+    if (TABMUL_CHAIN) {
+      T2 w  = TFLOAD(&trig[p]);
+      T2 w2 = TFLOAD(&trig[WG/8 + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      T2 base  = csqTrig(w);
+      T2 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+// Radeon VII loves this case, it is faster than the chainmul case.  nVidia Titan V hates this case.
+
+    if (!TABMUL_CHAIN) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG/8 + p]));
+      }
+    }
+  }
+}
+
+// Later tabmuls after starting with an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4b(Trig trig, T2 *u, u32 f, u32 me) {
+
+// This code uses chained complex multiplies which could be faster on GPUs with great DP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Apparently, chained Fancy muls at n=8 lengths are very accurate.
+
+  if (TABMUL_CHAIN) {
+    u32 p = me & ~(f - 1);
+    T2 w = TFLOAD(&trig[p]);
+
+//    u[1] = cmulFancy(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+//    T2 w2 = csqTrigFancy(w);
+//    u[2] = cmulFancy(u[2], w2);
+//    T2 w3 = ccubeTrigFancy(w2, w);
+//    u[3] = cmulFancy(u[3], w3);
+//    w3.x += 1;
+//    T2 base = cmulFancy(w3, w);
+//    for (int i = 4; i < 8; ++i) {
+//      u[i] = cmul(u[i], base);
+//      base = cmulFancy(base, w);
+//    }
+
+    u[1] = cmul(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+    T2 w2 = csqTrig(w);
+    u[2] = cmul(u[2], w2);
+    T2 w3 = ccubeTrig(w2, w);
+    u[3] = cmul(u[3], w3);
+    T2 base = cmul(w3, w);
+    for (int i = 4; i < 8; ++i) {
+      u[i] = cmul(u[i], base);
+      base = cmul(base, w);
+    }
+  }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+// Radeon VII loves this case, it is faster than the chainmul case.  nVidia Titan V hates this case.
+
+  if (!TABMUL_CHAIN) {
+    u32 p = (me/4) & ~(f/4 - 1);     // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 6 * WG;                  // Skip over the trig values used in tabmul8_4a
+
+//GW:  Can any of these be Fancy? Yes, u[1] and u[2]
+    for (u32 i = 1; i < RADIX; ++i) {
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*(WG/4) + p]));
+    }
+  }
+}
+
 //************************************************************************************
 // New fft WIDTH and HEIGHT macros to support radix-4 FFTs with more FMA instructions
 //************************************************************************************
 
-// Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
-// We're trying to calculate u * U2(cosine,sine).
-// real = (u.x - u.y*sine_over_cosine) * cosine
-// imag = (u.x*sine_over_cosine + u.y) * cosine
-T2 partial_cmul(T2 u, T sine_over_cosine) {
-  return U2(fma(-u.y, sine_over_cosine, u.x), fma(u.x, sine_over_cosine, u.y));
-}
-
 // Copy of macro from fft4 and fft8 with FMAs added
 #define X2_via_FMA(a, c, b) { T2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
 
@@ -411,8 +521,8 @@ void finish_tabMul8_fft8(Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me
     // Do last level of fft8
     X2(u[0], u[1]);
     X2(u[2], u[3]);
-    X2_apply_delay(u[4], u[5]);
-    X2_apply_delay(u[6], u[7]);
+    X2ad(u[4], u[5], M_SQRT1_2);
+    X2ad(u[6], u[7], M_SQRT1_2);
   }
 
   // revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
@@ -569,6 +679,128 @@ void OVERLOAD fft_common(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 l
   // Finish third tabMul and perform final fft8.
   finish_tabMul8_fft8(trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
 
+
+// Custom code for SIZE=256, RADIX=8, threads=32.  Performed as 4 * 8 * 8.  Radix-8 allows fewer
+// shufls and tabmuls than radix-4.  Fewer instructions, but more registers.
+// Uses only 32 threads which is fine on nVidia, lousy on radeon VII (use WMUL=2, TAIL_KERNELS=2).
+//
+// Details for memory layout, trig data, and shufls:
+// Mem:   0     1...  31
+//        32
+//        ...
+//        196
+//        224   ...  255
+// Only do a radix-4 fft.  Non-standard TABMUL:    (64 3/4 cmuls in blocks of 1 duplicated trig values)
+// trig powers are: 0*0 0*1 .. 0*31
+//                  0*32    .. 0*63
+//                  1*0 1*1 .. 1*31
+//                  1*32    .. 1*63
+//                  2*0 2*1 .. 2*31
+//                  2*32    .. 2*63
+//                  3*0 3*1 .. 3*31
+//                  3*32    .. 3*63           total trig data (6*32*16=3KB)
+// non-standard shufl out:
+//        0  64 .. 192   1... 7...
+//        8
+//        16
+//        ...
+//        48
+//        56
+// standard TABMUL:   (8 7/8 cmuls in blocks of 4 duplicated trig values)
+// trig powers are: 0000 0000 .. 0000*7
+//                  0000 4444 .. 4444*7
+//                  0000 8888 .. 8888*7
+//                  0000 12 ...
+//                  0000 16 ...
+//                  0000 20 ...
+//                  0000 24 ...
+//                  0000 28 ...           total trig data (7*8*16=896B)
+// standard shufl out:
+//        0  64 .. 192   8...  56...
+//        1
+//        2
+//        ...
+//        6
+//        7
+//
+// FP64 and FP32 could benefit by starting the next fft8 after the radix-4 tabmul (easy FMA opportunities).
+
+// Code for SIZE=256, RADIX=8
+#elif WG == 32 && NW == 8
+
+  fft8_4(u);
+  tabMul8_4a(trig, u, 1, lowMe);
+  shufl(lds, u, 1, 4, numWG, lowMe);
+
+  fft8(u);
+  tabMul8_4b(trig, u, 4, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  fft8(u);
+
+// Custom code for SIZE=1024, RADIX=8, threads=128.  Performed as 8 * 8 * 2 * 8.  Radix-8 allows fewer
+// shufls and tabmuls than radix-4.  Fewer instructions, but more registers.  If we process 4 (or 8)
+// independent width lines then we should be able to avoid the mul by w^0 in the next to last radix-8 step.
+//
+// Details for memory layout, trig data, and shufls:
+// Mem:   0     1 ...  127
+//        128
+//        256
+//        384
+//        512
+//        640
+//        768
+//        896   ...  1023
+// standard TABMUL:    (128 7/8 cmuls in blocks of 1 duplicated trig values)
+// trig powers are: 0 0 0  .. 0*127
+//                  0 1 2  .. 1*127
+//                  0 2 4  .. 2*127
+//                  0 3 6  .. 3*127
+//                  0 4 8  .. 4*127
+//                  0 5 10 .. 5*127
+//                  0 6 12 .. 6*127
+//                  0 7 14 .. 7*127           total trig data (7*128*16=14KB)
+// standard shufl out:
+//        0   128 .. 896   1... 15...
+//        16
+//        32
+//        48
+//        64
+//        80
+//        96
+//        112
+// standard TABMUL:   (16 7/8 cmuls in blocks of 8 duplicated trig values)
+// trig powers are: 00000000 00000000 .. 00000000*15
+//                  00000000 11111111 .. 11111111*15
+//                  00000000 22222222 .. 22222222*15
+//                  00000000 33333333 .. 33333333*15
+//                  00000000 44444444 .. 44444444*15
+//                  00000000 55555555 .. 55555555*15
+//                  00000000 66666666 .. 66666666*15
+//                  00000000 77777777 .. 77777777*15           total trig data (7*16*16=1.75KB)
+// shufl out with an fft2:
+//        0  128 .. 896  16 .. 112...  8...
+//        1
+//        2
+//        3
+//        4
+//        5
+//        6
+//        7
+
+// Code for SIZE=1024, RADIX=8
+#elif WG == 128 && RADIX == 8
+
+  fft8(u);
+  tabMul(trig, u, 1, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  fft8(u);
+  tabMul(trig, u, 8, lowMe);
+  shufl_and_fft2(lds, u, 8, numWG, lowMe);
+
+  if (lowMe < WG / 2) fft8_16a(u); else fft8_16b(u);
+
 #else
 
   // Old / original version
@@ -665,6 +897,121 @@ void OVERLOAD tabMul(TrigFP32 trig, F2 *u, u32 f, u32 me) {
   }
 }
 
+// Tabmul after doing an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4a(TrigFP32 trig, F2 *u, u32 f, u32 me) {
+
+  if (f == 1) {                      // fft8_4 is performed first
+    u32 p = me;
+
+// This code uses chained complex multiplies which could be faster on GPUs with great SP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Perform two length=4 chain muls.
+
+    if (TABMUL_CHAIN32) {
+      F2 w  = TFLOAD(&trig[p]);
+      F2 w2 = TFLOAD(&trig[WG + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      F2 base  = csqTrig(w);
+      F2 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN32) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG + p]));
+      }
+    }
+  }
+
+  else {                      // fft8_4 is performed after an initial fft8
+
+// This code uses chained complex multiplies which could be faster on GPUs with great SP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Perform two length=4 chain muls.
+
+    u32 p = me / 8;                 // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 7 * WG;                 // Skip over the trig values used in the first tabmul
+    if (TABMUL_CHAIN32) {
+      F2 w  = TFLOAD(&trig[p]);
+      F2 w2 = TFLOAD(&trig[WG/8 + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      F2 base  = csqTrig(w);
+      F2 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN32) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG/8 + p]));
+      }
+    }
+  }
+}
+
+// Later tabmuls after starting with an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4b(TrigFP32 trig, F2 *u, u32 f, u32 me) {
+
+// This code uses chained complex multiplies which could be faster on GPUs with great SP throughput or poor memory bandwidth or caching.
+// This ought to be the least accurate version of Tabmul.  In practice, this is just as accurate as reading precomputed values from memory.
+// Apparently, chained Fancy muls at n=8 lengths are very accurate.
+
+  if (TABMUL_CHAIN32) {
+    u32 p = me & ~(f - 1);
+    F2 w = TFLOAD(&trig[p]);
+
+//    u[1] = cmulFancy(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+//    T2 w2 = csqTrigFancy(w);
+//    u[2] = cmulFancy(u[2], w2);
+//    T2 w3 = ccubeTrigFancy(w2, w);
+//    u[3] = cmulFancy(u[3], w3);
+//    w3.x += 1;
+//    T2 base = cmulFancy(w3, w);
+//    for (int i = 4; i < 8; ++i) {
+//      u[i] = cmul(u[i], base);
+//      base = cmulFancy(base, w);
+//    }
+
+    u[1] = cmul(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+    F2 w2 = csqTrig(w);
+    u[2] = cmul(u[2], w2);
+    F2 w3 = ccubeTrig(w2, w);
+    u[3] = cmul(u[3], w3);
+    F2 base = cmul(w3, w);
+    for (int i = 4; i < 8; ++i) {
+      u[i] = cmul(u[i], base);
+      base = cmul(base, w);
+    }
+  }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+  if (!TABMUL_CHAIN32) {
+    u32 p = (me/4) & ~(f/4 - 1);     // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 6 * WG;                  // Skip over the trig values used in tabmul8_4a
+
+//GW:  Can any of these be Fancy? Yes, u[1] and u[2]
+    for (u32 i = 1; i < RADIX; ++i) {
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*(WG/4) + p]));
+    }
+  }
+}
+
 //************************************************************************************
 // New fft WIDTH and HEIGHT macros to support radix-4 FFTs with more FMA instructions
 //************************************************************************************
@@ -674,14 +1021,6 @@ void OVERLOAD tabMul(TrigFP32 trig, F2 *u, u32 f, u32 me) {
 
 #if ENABLE_FP32_VARIANT_2
 
-// Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
-// We're trying to calculate u * U2(cosine,sine).
-// real = (u.x - u.y*sine_over_cosine) * cosine
-// imag = (u.x*sine_over_cosine + u.y) * cosine
-F2 partial_cmul(F2 u, F sine_over_cosine) {
-  return U2(fma(-u.y, sine_over_cosine, u.x), fma(u.x, sine_over_cosine, u.y));
-}
-
 // Copy of macro from fft4 and fft8 with FMAs added
 #define X2_via_FMA(a, c, b) { F2 t = a; a = fma(c, b, t); b = fma(-c, b, t); }
 
@@ -898,8 +1237,8 @@ void finish_tabMul8_fft8(TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u3
     // Do last level of fft8
     X2(u[0], u[1]);
     X2(u[2], u[3]);
-    X2_apply_delay(u[4], u[5]);
-    X2_apply_delay(u[6], u[7]);
+    X2ad(u[4], u[5], M_SQRT1_2);
+    X2ad(u[6], u[7], M_SQRT1_2);
   }
 
   // revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
@@ -1028,6 +1367,32 @@ void OVERLOAD fft_common(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 low
   // Finish third tabMul and perform final fft8.
   finish_tabMul8_fft8(trig, preloads, u, 64, numWG, lowMe, 0);  // We'd rather set save_one_more_mul to 1
 
+// Code for SIZE=256, RADIX=8
+#elif WG == 32 && NW == 8
+
+  fft8_4(u);
+  tabMul8_4a(trig, u, 1, lowMe);
+  shufl(lds, u, 1, 4, numWG, lowMe);
+
+  fft8(u);
+  tabMul8_4b(trig, u, 4, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  fft8(u);
+
+// Code for SIZE=1024, RADIX=8
+#elif WG == 128 && RADIX == 8
+
+  fft8(u);
+  tabMul(trig, u, 1, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  fft8(u);
+  tabMul(trig, u, 8, lowMe);
+  shufl_and_fft2(lds, u, 8, numWG, lowMe);
+
+  if (lowMe < WG / 2) fft8_16a(u); else fft8_16b(u);
+
 #else
 
   // Old / original version
@@ -1114,8 +1479,134 @@ void OVERLOAD tabMul(TrigGF31 trig, GF31 *u, u32 f, u32 me) {
   }
 }
 
+// Tabmul after doing an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4a(TrigGF31 trig, GF31 *u, u32 f, u32 me) {
+
+  if (f == 1) {                      // fft8_4 is performed first
+    u32 p = me;
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+// Perform two length=4 chain muls.
+
+    if (TABMUL_CHAIN31) {
+      GF31 w  = TFLOAD(&trig[p]);
+      GF31 w2 = TFLOAD(&trig[WG + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      GF31 base  = csqTrig(w);
+      GF31 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN31) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG + p]));
+      }
+    }
+  }
+
+  else {                      // fft8_4 is performed after an initial fft8
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+// Perform two length=4 chain muls.
+
+    u32 p = me / 8;                 // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 7 * WG;                 // Skip over the trig values used in the first tabmul
+    if (TABMUL_CHAIN31) {
+      GF31 w  = TFLOAD(&trig[p]);
+      GF31 w2 = TFLOAD(&trig[WG/8 + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      GF31 base  = csqTrig(w);
+      GF31 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN31) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG/8 + p]));
+      }
+    }
+  }
+}
+
+// Later tabmuls after starting with an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4b(TrigGF31 trig, GF31 *u, u32 f, u32 me) {
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+
+  if (TABMUL_CHAIN31) {
+    u32 p = me & ~(f - 1);
+    GF31 w = TFLOAD(&trig[p]);
+
+    u[1] = cmul(u[1], w);
+    GF31 w2 = csqTrig(w);
+    u[2] = cmul(u[2], w2);
+    GF31 w3 = ccubeTrig(w2, w);
+    u[3] = cmul(u[3], w3);
+    GF31 base = cmul(w3, w);
+    for (int i = 4; i < 8; ++i) {
+      u[i] = cmul(u[i], base);
+      base = cmul(base, w);
+    }
+  }
+
+// Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+  if (!TABMUL_CHAIN31) {
+    u32 p = (me/4) & ~(f/4 - 1);     // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 6 * WG;                  // Skip over the trig values used in tabmul8_4a
+
+    for (u32 i = 1; i < RADIX; ++i) {
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*(WG/4) + p]));
+    }
+  }
+}
+
 void OVERLOAD fft_common(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32 lowMe) {
 
+// Code for SIZE=256, RADIX=8
+#if WG == 32 && NW == 8
+
+  fft8_4(u);
+  tabMul8_4a(trig, u, 1, lowMe);
+  shufl(lds, u, 1, 4, numWG, lowMe);
+
+  fft8(u);
+  tabMul8_4b(trig, u, 4, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  fft8(u);
+
+// Code for SIZE=1024, RADIX=8
+#elif WG == 128 && RADIX == 8
+
+  fft8(u);
+  tabMul(trig, u, 1, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  fft8(u);
+  tabMul(trig, u, 8, lowMe);
+  shufl_and_fft2(lds, u, 8, numWG, lowMe);
+
+  if (lowMe < WG / 2) fft8_16a(u); else fft8_16b(u);
+
+#else
+
 #if !UNROLL
   __attribute__((opencl_unroll_hint(1)))
 #endif
@@ -1125,6 +1616,9 @@ void OVERLOAD fft_common(local GF31 *lds, GF31 *u, TrigGF31 trig, u32 numWG, u32
     shufl(lds, u, s, numWG, lowMe);
   }
   fft_RADIX(u);
+
+#endif
+
 }
 
 #endif
@@ -1196,8 +1690,135 @@ void OVERLOAD tabMul(TrigGF61 trig, GF61 *u, u32 f, u32 me) {
   }
 }
 
+// Tabmul after doing an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4a(TrigGF61 trig, GF61 *u, u32 f, u32 me) {
+
+  if (f == 1) {                      // fft8_4 is performed first
+    u32 p = me;
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+// Perform two length=4 chain muls.
+
+    if (TABMUL_CHAIN61) {
+      GF61 w  = TFLOAD(&trig[p]);
+      GF61 w2 = TFLOAD(&trig[WG + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      GF61 base  = csqTrig(w);
+      GF61 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN61) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG + p]));
+      }
+    }
+  }
+
+  else {                      // fft8_4 is performed after an initial fft8
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+// Perform two length=4 chain muls.
+
+    u32 p = me / 8;                 // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 7 * WG;                 // Skip over the trig values used in the first tabmul
+    if (TABMUL_CHAIN61) {
+      GF61 w  = TFLOAD(&trig[p]);
+      GF61 w2 = TFLOAD(&trig[WG/8 + p]);
+      u[2] = cmul(u[2], w);
+      u[3] = cmul(u[3], w2);
+      GF61 base  = csqTrig(w);
+      GF61 base2 = csqTrig(w2);
+      u[4] = cmul(u[4], base);
+      u[5] = cmul(u[5], base2);
+      base  = ccubeTrig(base, w);
+      base2 = ccubeTrig(base2, w2);
+      u[6] = cmul(u[6], base);
+      u[7] = cmul(u[7], base2);
+    }
+
+// Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+
+    if (!TABMUL_CHAIN61) {
+      for (u32 i = 2; i < RADIX; ++i) {
+        u[i] = cmul(u[i], TFLOAD(&trig[(i-2)*WG/8 + p]));
+      }
+    }
+  }
+}
+
+// Later tabmuls after starting with an fft4 when RADIX=8.  See the SIZE=256 code for example memory and trig layout.
+void OVERLOAD tabMul8_4b(TrigGF61 trig, GF61 *u, u32 f, u32 me) {
+
+// This code uses chained complex multiplies which could be faster on GPUs with great throughput or poor memory bandwidth or caching.
+
+  if (TABMUL_CHAIN61) {
+    u32 p = me & ~(f - 1);
+    GF61 w = TFLOAD(&trig[p]);
+
+    u[1] = cmul(u[1], w);
+    GF61 w2 = csqTrig(w);
+    u[2] = cmul(u[2], w2);
+    GF61 w3 = ccubeTrig(w2, w);
+    u[3] = cmul(u[3], w3);
+    GF61 base = cmul(w3, w);
+    for (int i = 4; i < 8; ++i) {
+      u[i] = cmul(u[i], base);
+      base = cmul(base, w);
+    }
+  }
+
+// Theoretically, maximum accuracy.  Use memory accesses (probably cached) to reduce complex muls.  Beneficial when memory bandwidth is not the bottleneck.
+// Radeon VII loves this case, it is faster than the chainmul case.  nVidia Titan V hates this case.
+
+  if (!TABMUL_CHAIN61) {
+    u32 p = (me/4) & ~(f/4 - 1);     // Generate index into condensed trig table that does not have duplicated trig values
+    trig += 6 * WG;                  // Skip over the trig values used in tabmul8_4a
+
+    for (u32 i = 1; i < RADIX; ++i) {
+      u[i] = cmul(u[i], TFLOAD(&trig[(i-1)*(WG/4) + p]));
+    }
+  }
+}
+
 void OVERLOAD fft_common(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32 lowMe) {
 
+// Code for SIZE=256, RADIX=8
+#if WG == 32 && NW == 8
+
+  fft8_4(u);
+  tabMul8_4a(trig, u, 1, lowMe);
+  shufl(lds, u, 1, 4, numWG, lowMe);
+
+  fft8(u);
+  tabMul8_4b(trig, u, 4, lowMe);
+  shufl(lds, u, 4, numWG, lowMe);
+
+  fft8(u);
+
+// Code for SIZE=1024, RADIX=8
+#elif WG == 128 && RADIX == 8
+
+  fft8(u);
+  tabMul(trig, u, 1, lowMe);
+  shufl(lds, u, 1, numWG, lowMe);
+
+  fft8(u);
+  tabMul(trig, u, 8, lowMe);
+  shufl_and_fft2(lds, u, 8, numWG, lowMe);
+
+  if (lowMe < WG / 2) fft8_16a(u); else fft8_16b(u);
+
+#else
+
 #if !UNROLL
   __attribute__((opencl_unroll_hint(1)))
 #endif
@@ -1207,6 +1828,9 @@ void OVERLOAD fft_common(local GF61 *lds, GF61 *u, TrigGF61 trig, u32 numWG, u32
     shufl(lds, u, s, numWG, lowMe);
   }
   fft_RADIX(u);
+
+#endif
+
 }
 
 #endif
diff --git a/src/cl/math.cl b/src/cl/math.cl
index a5f44b26..07182c42 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -112,6 +112,7 @@ i128 OVERLOAD sub(i128 a, i64 b) { i128 val; val.x = a.x - (__int128)b; return v
 u128 OVERLOAD make_u128(u64 hi, u64 lo) { u128 val; val.x = ((unsigned __int128)hi << 64) | lo; return val; }
 u64 u128_lo64(u128 val) { return val.x; }
 u64 u128_hi64(u128 val) { return val.x >> 64; }
+u64 u128_shrlo64(u128 val, u32 bits) { return val.x >> bits; }
 u128 OVERLOAD add(u128 a, u128 b) { u128 val; val.x = a.x + b.x; return val; }
 #else           // UNTESTED!
 typedef struct { i64 hi64; u64 lo64; } i128;
@@ -129,6 +130,7 @@ i128 OVERLOAD sub(i128 a, i64 b) { i128 val; val.lo64 = a.lo64 - (u64)b; val.hi6
 u128 OVERLOAD make_u128(u64 hi, u64 lo) { u128 val; val.hi64 = hi; val.lo64 = lo; return val; }
 u64 u128_lo64(u128 val) { return val.lo64; }
 u64 u128_hi64(u128 val) { return val.hi64; }
+u64 u128_shrlo64(u128 val, u32 bits) { return (val.hi64 << (64 - bits)) | (val.lo64 >> bits); }
 u128 OVERLOAD add(u128 a, u128 b) { u128 val; val.lo64 = a.lo64 + b.lo64; val.hi64 = a.hi64 + b.hi64 + (val.lo64 < a.lo64); return val; }
 #endif
 
@@ -182,6 +184,8 @@ i32 OVERLOAD optional_mod(i32 a, const i32 b) {
   return a;
 }
 
+#define M61 ((((Z61) 1) << 61) - 1)
+
 // Optionally add a constant value if first arg is negative.
 i64 OVERLOAD optional_addM61(i64 a) {
 #if HAS_PTX >= 100        // setp/add instruction requires sm_10 support or higher
@@ -190,7 +194,7 @@ i64 OVERLOAD optional_addM61(i64 a) {
         " @%%p add.s64 %0, %0, 2305843009213693951;}"   // if (a < 0) a = a + M61
         : "+l"(a));
 #else
-  if (a < 0) a = a + 2305843009213693951;
+  if (a < 0) a = a + M61;
 #endif
   return a;
 }
@@ -258,7 +262,7 @@ i64 OVERLOAD optional_sub(i64 a, const i32 b, const i64 c) {
 
 // Multiply and add primitives
 
-u64 OVERLOAD mul3264(u32 a, u64 b) {            // 3 32-bit multiplies (instead of 4 for a u64 * u64 multiply)
+u64 OVERLOAD mul3264(u32 a, u64 b) {            // 3 32-bit multiplies (instead of 4 for a u32 * u64 multiply)
   u32 blo = lo32(b);
   u32 bhi = hi32(b);
   return make_u64(mul_hi(a, blo) + a * bhi, a * blo);
@@ -300,12 +304,12 @@ u128 OVERLOAD mul64(u64 a, u64 b) {
   uint2 b2 = as_uint2(b);
   uint2 rlo2, rhi2;
   __asm("mul.lo.u32     %0, %4, %6;\n\t"
-	"mul.hi.u32     %1, %4, %6;\n\t"
+        "mul.hi.u32     %1, %4, %6;\n\t"
         "mul.lo.u32     %2, %5, %7;\n\t"
-	"mad.lo.cc.u32  %1, %5, %6, %1;\n\t"
+        "mad.lo.cc.u32  %1, %5, %6, %1;\n\t"
         "madc.hi.cc.u32 %2, %5, %6, %2;\n\t"
         "madc.hi.u32    %3, %5, %7, 0;\n\t"
-	"mad.lo.cc.u32  %1, %4, %7, %1;\n\t"
+        "mad.lo.cc.u32  %1, %4, %7, %1;\n\t"
         "madc.hi.cc.u32 %2, %4, %7, %2;\n\t"
         "addc.u32       %3, %3, 0;"
         : "=r"(rlo2.x), "=r"(rlo2.y), "=r"(rhi2.x), "=r"(rhi2.y)
@@ -375,10 +379,11 @@ u128 OVERLOAD mad64(u64 a, u64 b, u128 c) {
 #endif
 }
 
-
 // The X2 family of macros and SWAP are #defines because OpenCL does not allow pass by reference.
 // With NTT support added, we need to turn these macros into overloaded routines.
 #define X2(a, b)              X2_internal(&(a), &(b))                 // a = a + b, b = a - b
+#define X2t4(a, b)            X2t4_internal(&(a), &(b))               // X2(a, mul_t4(b))
+#define X2t4_mul_t4(a, b)     X2t4_mul_t4_internal(&(a), &(b))        // X2(a, mul_t4(b)), b = mul_t4(b)
 #define X2conjb(a, b)         X2conjb_internal(&(a), &(b))            // X2(a, conjugate(b))
 #define X2_mul_t4(a, b)       X2_mul_t4_internal(&(a), &(b))          // X2(a, b), b = mul_t4(b)
 #define X2_mul_t8(a, b)       X2_mul_t8_internal(&(a), &(b))          // X2(a, b), b = mul_t8(b)
@@ -386,9 +391,18 @@ u128 OVERLOAD mad64(u64 a, u64 b, u128 c) {
 #define X2_conjb(a, b)        X2_conjb_internal(&(a), &(b))           // X2(a, b), b = conjugate(b)
 #define SWAP(a, b)            SWAP_internal(&(a), &(b))               // a = b, b = a
 #define SWAP_XY(a)            U2((a).y, (a).x)                        // Swap real and imaginary components of a
+// Macros for FP64 and FP32 only.  They allow some optimizations using FMA.  NOTE: "ad" stands for "apply delayed" mul (see partial_cmul).
+#define X2ad(a, b, d)         X2ad_internal(&(a), &(b), d)            // b = d * b, X2(a, b)
+#define X2t4ad(a, b, d)       X2t4ad_internal(&(a), &(b), d)          // b = mul_t4(b), b = d * b, X2(a, b)
+#define X2ad_mul_t4(a, b, d)  X2ad_mul_t4_internal(&(a), &(b), d)     // b = d * b, X2(a, b), b = mul_t4(b)
 
 #if FFT_FP64
 
+T OVERLOAD add(T a, T b) { return a + b; }
+T2 OVERLOAD add(T2 a, T2 b) { return U2(add(a.x, b.x), add(a.y, b.y)); }
+T OVERLOAD sub(T a, T b) { return a - b; }
+T2 OVERLOAD sub(T2 a, T2 b) { return U2(sub(a.x, b.x), sub(a.y, b.y)); }
+
 T2 OVERLOAD conjugate(T2 a) { return U2(a.x, -a.y); }
 
 // Multiply by 2 without using floating point instructions.  This is a little sloppy as an input of zero returns 2^-1022.
@@ -469,12 +483,18 @@ T2 OVERLOAD mul_3t8(T2 a) { // mul(a, U2(-1, 1)) * (T)(M_SQRT1_2); }
 // Return a+b and a-b
 void OVERLOAD X2_internal(T2 *a, T2 *b) { T2 t = *a; *a = t + *b; *b = t - *b; }
 
-// Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(T2 *a, T2 *b) { T2 t = *a; *a = *a + *b; t.x = t.x - b->x; b->x = b->y - t.y; b->y = t.x; }
+// Same as X2(a, mul_t4(b))
+void OVERLOAD X2t4_internal(T2 *a, T2 *b) { T by = b->y; b->y = sub(a->y, b->x); a->y = add(a->y, b->x); b->x = add(a->x, by); a->x = sub(a->x, by); }
+
+// Same as X2(a, mul_t4(b)), b = mul_t4(b)
+void OVERLOAD X2t4_mul_t4_internal(T2 *a, T2 *b) { T2 t = *a; a->x = sub(a->x, b->y); a->y = add(a->y, b->x); b->x = sub(b->x, t.y); b->y = add(t.x, b->y); }
 
 // Same as X2(a, conjugate(b))
 void OVERLOAD X2conjb_internal(T2 *a, T2 *b) { T2 t = *a; a->x = a->x + b->x; a->y = a->y - b->y; b->x = t.x - b->x; b->y = t.y + b->y; }
 
+// Same as X2(a, b), b = mul_t4(b)
+void OVERLOAD X2_mul_t4_internal(T2 *a, T2 *b) { T by = b->y; b->y = sub(a->x, b->x); a->x = add(a->x, b->x); b->x = sub(by, a->y); a->y = add(a->y, by); }
+
 // Same as X2(a, b), b = conjugate(b)
 void OVERLOAD X2_conjb_internal(T2 *a, T2 *b) { T2 t = *a; *a = t + *b; b->x = t.x - b->x; b->y = b->y - t.y; }
 
@@ -494,6 +514,29 @@ T2 OVERLOAD foo2(T2 a, T2 b) { a = addsub(a); b = addsub(b); return addsub(U2(RE
 // computes 2*[x^2+y^2 + i*(2*x*y)]. i.e. 2 * cyclical autoconvolution of (x, y)
 T2 OVERLOAD foo(T2 a) { return foo2(a, a); }
 
+// Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
+// We're trying to calculate u * U2(cosine,sine).  Instead calculate u * U2(1,sine/cosine).
+// real = (u.x - u.y*sine_over_cosine) * cosine
+// imag = (u.x*sine_over_cosine + u.y) * cosine
+T2 partial_cmul(T2 u, T sine_over_cosine) {
+  return U2(fma(-u.y, sine_over_cosine, u.x), fma(u.x, sine_over_cosine, u.y));
+}
+
+T2 mul_t8_delayed(T2 a) { return U2(a.x - a.y, a.x + a.y); }            // Apply mul by M_SQRT1_2 later
+T2 mul_3t8_delayed(T2 a) { return U2(-(a.x + a.y), a.x - a.y); }        // Apply mul by M_SQRT1_2 later.  Alternatively, use mul_t8_delayed and mul by i*M_SQRT1_2 later.
+
+// Compute a + d * b and a - d * b
+void X2ad_internal(T2 *a, T2 *b, T d) { T2 t = *a; a->x = fma(b->x, d, a->x); a->y = fma(b->y, d, a->y); b->x = fma(-d, b->x, t.x); b->y = fma(-d, b->y, t.y); }
+void X2t4ad_internal(T2 *a, T2 *b, T d) { T bx = b->x; b->x = fma(d, b->y, a->x); a->x = fma(b->y, -d, a->x); b->y = fma(-d, bx, a->y); a->y = fma(bx, d, a->y); }
+void X2ad_mul_t4_internal(T2 *a, T2 *b, T d) { T by = b->y; b->y = fma(-d, b->x, a->x); a->x = fma(b->x, d, a->x); b->x = -fma(-d, by, a->y); a->y = fma(by, d, a->y); }
+
+// Create "quick" routines for compatibility with shufl_and_fft2 and the GF61 data type.
+
+T OVERLOAD addq(T a, T b) { return add(a, b); }
+T OVERLOAD subq(T a, T b) { return sub(a, b); }
+T2 OVERLOAD addq(T2 a, T2 b) { return add(a, b); }
+T2 OVERLOAD subq(T2 a, T2 b) { return sub(a, b); }
+
 #endif
 
 
@@ -503,6 +546,11 @@ T2 OVERLOAD foo(T2 a) { return foo2(a, a); }
 
 #if FFT_FP32
 
+F OVERLOAD add(F a, F b) { return a + b; }
+F2 OVERLOAD add(F2 a, F2 b) { return U2(add(a.x, b.x), add(a.y, b.y)); }
+F OVERLOAD sub(F a, F b) { return a - b; }
+F2 OVERLOAD sub(F2 a, F2 b) { return U2(sub(a.x, b.x), sub(a.y, b.y)); }
+
 F2 OVERLOAD conjugate(F2 a) { return U2(a.x, -a.y); }
 
 // Multiply by 2 without using floating point instructions.  This is a little sloppy as an input of zero returns 2^-126.
@@ -583,12 +631,18 @@ F2 OVERLOAD mul_3t8(F2 a) { // mul(a, U2(-1, 1)) * (F)(M_SQRT1_2); }
 // Return a+b and a-b
 void OVERLOAD X2_internal(F2 *a, F2 *b) { F2 t = *a; *a = t + *b; *b = t - *b; }
 
-// Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(F2 *a, F2 *b) { F2 t = *a; *a = *a + *b; t.x = t.x - b->x; b->x = b->y - t.y; b->y = t.x; }
+// Same as X2(a, mul_t4(b))
+void OVERLOAD X2t4_internal(F2 *a, F2 *b) { F by = b->y; b->y = sub(a->y, b->x); a->y = add(a->y, b->x); b->x = add(a->x, by); a->x = sub(a->x, by); }
+
+// Same as X2(a, mul_t4(b)), b = mul_t4(b)
+void OVERLOAD X2t4_mul_t4_internal(F2 *a, F2 *b) { F2 t = *a; a->x = sub(a->x, b->y); a->y = add(a->y, b->x); b->x = sub(b->x, t.y); b->y = add(t.x, b->y); }
 
 // Same as X2(a, conjugate(b))
 void OVERLOAD X2conjb_internal(F2 *a, F2 *b) { F2 t = *a; a->x = a->x + b->x; a->y = a->y - b->y; b->x = t.x - b->x; b->y = t.y + b->y; }
 
+// Same as X2(a, b), b = mul_t4(b)
+void OVERLOAD X2_mul_t4_internal(F2 *a, F2 *b) { F by = b->y; b->y = sub(a->x, b->x); a->x = add(a->x, b->x); b->x = sub(by, a->y); a->y = add(a->y, by); }
+
 // Same as X2(a, b), b = conjugate(b)
 void OVERLOAD X2_conjb_internal(F2 *a, F2 *b) { F2 t = *a; *a = t + *b; b->x = t.x - b->x; b->y = b->y - t.y; }
 
@@ -608,6 +662,29 @@ F2 OVERLOAD foo2(F2 a, F2 b) { a = addsub(a); b = addsub(b); return addsub(U2(RE
 // computes 2*[x^2+y^2 + i*(2*x*y)]. i.e. 2 * cyclical autoconvolution of (x, y)
 F2 OVERLOAD foo(F2 a) { return foo2(a, a); }
 
+// Partial complex-multiply that delays the mul-by-cosine so it can be part of an FMA.
+// We're trying to calculate u * U2(cosine,sine).  Instead calculate u * U2(1,sine/cosine).
+// real = (u.x - u.y*sine_over_cosine) * cosine
+// imag = (u.x*sine_over_cosine + u.y) * cosine
+F2 partial_cmul(F2 u, F sine_over_cosine) {
+  return U2(fma(-u.y, sine_over_cosine, u.x), fma(u.x, sine_over_cosine, u.y));
+}
+
+F2 mul_t8_delayed(F2 a) { return U2(a.x - a.y, a.x + a.y); }            // Apply mul by M_SQRT1_2 later
+F2 mul_3t8_delayed(F2 a) { return U2(-(a.x + a.y), a.x - a.y); }        // Apply mul by M_SQRT1_2 later.  Alternatively, use mul_t8_delayed and mul by i*M_SQRT1_2 later.
+
+// Compute a + d * b and a - d * b
+void X2ad_internal(F2 *a, F2 *b, F d) { F2 t = *a; a->x = fma(b->x, d, a->x); a->y = fma(b->y, d, a->y); b->x = fma(-d, b->x, t.x); b->y = fma(-d, b->y, t.y); }
+void X2t4ad_internal(F2 *a, F2 *b, F d) { F bx = b->x; b->x = fma(d, b->y, a->x); a->x = fma(b->y, -d, a->x); b->y = fma(-d, bx, a->y); a->y = fma(bx, d, a->y); }
+void X2ad_mul_t4_internal(F2 *a, F2 *b, F d) { F by = b->y; b->y = fma(-d, b->x, a->x); a->x = fma(b->x, d, a->x); b->x = -fma(-d, by, a->y); a->y = fma(by, d, a->y); }
+
+// Create "quick" routines for compatibility with shufl_and_fft2 and the GF61 data type.
+
+F OVERLOAD addq(F a, F b) { return add(a, b); }
+F OVERLOAD subq(F a, F b) { return sub(a, b); }
+F2 OVERLOAD addq(F2 a, F2 b) { return add(a, b); }
+F2 OVERLOAD subq(F2 a, F2 b) { return sub(a, b); }
+
 #endif
 
 
@@ -682,11 +759,14 @@ GF31 OVERLOAD mul_3t8(GF31 a) { return U2(shl(neg(add(a.x, a.y)), 15), shl(sub(a
 // Return a+b and a-b
 void OVERLOAD X2_internal(GF31 *a, GF31 *b) { GF31 t = *a; *a = add(t, *b); *b = sub(t, *b); }
 
+// Same as X2(a, mul_t4(b))
+void OVERLOAD X2t4_internal(GF31 *a, GF31 *b) { Z31 by = b->y; b->y = sub(a->y, b->x); a->y = add(a->y, b->x); b->x = add(a->x, by); a->x = sub(a->x, by); }
+
 // Same as X2(a, conjugate(b))
 void OVERLOAD X2conjb_internal(GF31 *a, GF31 *b) { GF31 t = *a; a->x = add(a->x, b->x); a->y = sub(a->y, b->y); b->x = sub(t.x, b->x); b->y = add(t.y, b->y); }
 
 // Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(GF31 *a, GF31 *b) { GF31 t = *a; *a = add(*a, *b); t.x = sub(t.x, b->x); b->x = sub(b->y, t.y); b->y = t.x; }
+void OVERLOAD X2_mul_t4_internal(GF31 *a, GF31 *b) { Z31 by = b->y; b->y = sub(a->x, b->x); a->x = add(a->x, b->x); b->x = sub(by, a->y); a->y = add(a->y, by); }
 
 // Same as X2(a, b), b = mul_t8(b)
 void OVERLOAD X2_mul_t8_internal(GF31 *a, GF31 *b) { X2(*a, *b); *b = mul_t8(*b); }
@@ -727,6 +807,19 @@ Z31 OVERLOAD modM31(u64 a) {                                          // a must
   u32 ahi = a >> 62;
   return modM31(ahi + amid + alo);                                    // 32-bit overflow does not occur due to restrictions on input
 }
+Z31 OVERLOAD modM31(u64 a, u32 maxbits) {
+  if (maxbits <= 62) {
+    u32 alo = lo32(a) & M31;            // 31 bits
+    u32 ahi = hi32(a + a);              // 31 bits
+    return modM31(ahi + alo);
+  }
+  else if (maxbits == 63) {
+    u32 alo = lo32(a) & M31;            // 31 bits
+    u32 ahi = hi32(a + a);              // 32 bits
+    return modM31(modM31(ahi) + alo);
+  }
+  return modM31(a);
+}
 Z31 OVERLOAD modM31(i64 a) {                                          // abs(a) must be less than 0x7FFFFFFF80000000
   u32 alo = a & M31;
   u32 amid = ((u64) a >> 31) & M31;                                   // Unsigned shift might be faster than signed shift
@@ -761,7 +854,7 @@ GF31 OVERLOAD shr(GF31 a, u32 k) { return U2(shr(a.x, k), shr(a.y, k)); }
 Z31 OVERLOAD shl(Z31 a, u32 k) { return shr(a, 31 - k); }
 GF31 OVERLOAD shl(GF31 a, u32 k) { return U2(shl(a.x, k), shl(a.y, k)); }
 
-Z31 OVERLOAD mul(Z31 a, Z31 b) { u64 t = a * (u64) b; return modM31(add((Z31)(t & M31), (Z31)(t >> 31))); }
+Z31 OVERLOAD mul(Z31 a, Z31 b) { u64 t = a * (u64) b; return modM31(t, 62); }
 
 // Multiply by 2
 Z31 OVERLOAD mul2(Z31 a) { return add(a, a); }
@@ -771,39 +864,79 @@ GF31 OVERLOAD mul2(GF31 a) { return U2(mul2(a.x), mul2(a.y)); }
 GF31 OVERLOAD conjugate(GF31 a) { return U2(a.x, neg(a.y)); }
 
 // Complex square.  input, output 31 bits. Uses (a + i*b)^2 == ((a+b)*(a-b) + i*2*a*b).
+#if 0
 GF31 OVERLOAD csq(GF31 a) {
-  u64 r = (a.x + a.y) * (u64) (a.x + neg(a.y));      // 64-bit value, max = FFFF FFFE 0000 0004 (actually cannot exceed 9000 0000 0000 0000)
-  u64 i = (a.x + a.x) * (u64) a.y;                   // 63-bit value, max = 7FFF FFFE 0000 0002
-  return U2(modM31(r), modM31(i));
+  u64 r = (a.x + a.y) * (u64) (a.x + neg(a.y));      // 64-bit value, max = FFFF FFFE 8000 0003 (actually cannot exceed 9000 0000 0000 0000)
+  u64 i = (a.x + a.x) * (u64) a.y;                   // 63-bit value, max = 7FFF FFFE 8000 0001
+  return U2(modM31(r), modM31(i, 63));
 }
+#else
+GF31 OVERLOAD csq(GF31 a) {
+  u64 r = mad32(a.x, a.x, neg(a.y) * (u64) a.y);     // Max value is 2*M31^2 = 7FFF FFFE 0000 0002
+  u64 i = (a.x + a.x) * (u64) a.y;                   // Max value is 2*M31^2 = 7FFF FFFE 0000 0002
+  return U2(modM31(r, 63), modM31(i, 63));
+}
+#endif
 
 // a^2 + c
+#if 0
+GF31 OVERLOAD csq_add(GF31 a, GF31 c) {
+  u64 r = mad32(a.x + a.y, a.x + neg(a.y), c.x);      // 64-bit value, mul max = FFFF FFFE 8000 0003 (actually cannot exceed 9000 0000 0000 0000)
+  u64 i = mad32(a.x + a.x, a.y, c.y);                 // 63-bit value, mul max = 7FFF FFFE 8000 0001
+  return U2(modM31(r), modM31(i, 63));
+}
+#else
 GF31 OVERLOAD csq_add(GF31 a, GF31 c) {
-  u64 r = mad32(a.x + a.y, a.x + neg(a.y), c.x);      // 64-bit value, mul max = FFFF FFFE 0000 0004 (actually cannot exceed 9000 0000 0000 0000)
-  u64 i = mad32(a.x + a.x, a.y, c.y);                 // 63-bit value, mul max = 7FFF FFFE 0000 0002
-  return U2(modM31(r), modM31(i));
+  u64 r = mad32(a.x, a.x, mad32(neg(a.y), a.y, c.x));       // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  u64 i = mad32(a.x + a.x, a.y, c.y);                       // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  return U2(modM31(r, 63), modM31(i, 63));
 }
+#endif
 
 // a^2 - c
+#if 0
 GF31 OVERLOAD csq_sub(GF31 a, GF31 c) {
-  u64 r = mad32(a.x + a.y, a.x + neg(a.y), neg(c.x)); // 64-bit value, mul max = FFFF FFFE 0000 0004 (actually cannot exceed 9000 0000 0000 0000)
-  u64 i = mad32(a.x + a.x, a.y, neg(c.y));            // 63-bit value, mul max = 7FFF FFFE 0000 0002
-  return U2(modM31(r), modM31(i));
+  u64 r = mad32(a.x + a.y, a.x + neg(a.y), neg(c.x));       // 64-bit value, mul max = FFFF FFFE 8000 0003 (actually cannot exceed 9000 0000 0000 0000)
+  u64 i = mad32(a.x + a.x, a.y, neg(c.y));                  // 63-bit value, mul max = 7FFF FFFE 8000 0001
+  return U2(modM31(r), modM31(i, 63));
 }
+#else
+GF31 OVERLOAD csq_sub(GF31 a, GF31 c) {
+  u64 r = mad32(a.x, a.x, mad32(neg(a.y), a.y, neg(c.x)));  // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  u64 i = mad32(a.x + a.x, a.y, neg(c.y));                  // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  return U2(modM31(r, 63), modM31(i, 63));
+}
+#endif
 
 // a^2 + i*c
+#if 0
+GF31 OVERLOAD csq_addi(GF31 a, GF31 c) {
+  u64 r = mad32(a.x + a.y, a.x + neg(a.y), neg(c.y));       // 64-bit value, mul max = FFFF FFFE 8000 0003 (actually cannot exceed 9000 0000 0000 0000)
+  u64 i = mad32(a.x + a.x, a.y, c.x);                       // 63-bit value, mul max = 7FFF FFFE 8000 0001
+  return U2(modM31(r), modM31(i, 63));
+}
+#else
 GF31 OVERLOAD csq_addi(GF31 a, GF31 c) {
-  u64 r = mad32(a.x + a.y, a.x + neg(a.y), neg(c.y)); // 64-bit value, mul max = FFFF FFFE 0000 0004 (actually cannot exceed 9000 0000 0000 0000)
-  u64 i = mad32(a.x + a.x, a.y, c.x);                 // 63-bit value, mul max = 7FFF FFFE 0000 0002
-  return U2(modM31(r), modM31(i));
+  u64 r = mad32(a.x, a.x, mad32(neg(a.y), a.y, neg(c.y)));  // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  u64 i = mad32(a.x + a.x, a.y, c.x);                       // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  return U2(modM31(r, 63), modM31(i, 63));
 }
+#endif
 
 // a^2 - i*c
+#if 0
+GF31 OVERLOAD csq_subi(GF31 a, GF31 c) {
+  u64 r = mad32(a.x + a.y, a.x + neg(a.y), c.y);            // 64-bit value, mul max = FFFF FFFE 8000 0003 (actually cannot exceed 9000 0000 0000 0000)
+  u64 i = mad32(a.x + a.x, a.y, neg(c.x));                  // 63-bit value, max = 7FFF FFFE 8000 0001
+  return U2(modM31(r), modM31(i, 63));
+}
+#else
 GF31 OVERLOAD csq_subi(GF31 a, GF31 c) {
-  u64 r = mad32(a.x + a.y, a.x + neg(a.y), c.y);      // 64-bit value, mul max = FFFF FFFE 0000 0004 (actually cannot exceed 9000 0000 0000 0000)
-  u64 i = mad32(a.x + a.x, a.y, neg(c.x));            // 63-bit value, max = 7FFF FFFE 0000 0002
-  return U2(modM31(r), modM31(i));
+  u64 r = mad32(a.x, a.x, mad32(neg(a.y), a.y, c.y));       // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  u64 i = mad32(a.x + a.x, a.y, neg(c.x));                  // Max value is 2*M31^2+M31 = 7FFF FFFE 8000 0001
+  return U2(modM31(r, 63), modM31(i, 63));
 }
+#endif
 
 // Complex mul
 #if 0                                           // One less negation, requires signed shifts.  Seems microscopically faster on TitanV.
@@ -815,7 +948,7 @@ GF31 OVERLOAD cmul(GF31 a, GF31 b) {
   u64 k1k2 = k1 + k2;                           // unsigned 64-bit value, max = FFFF FFFC 0000 0004
   return U2(modM31(k1k3), modM31(k1k2));
 }
-#else
+#elif 0
 GF31 OVERLOAD cmul(GF31 a, GF31 b) {
   u32 negbx = neg(b.x);                         // Negate and add b values as much as possible in case b is used several times (as in a chainmul)
   u64 k1 = b.x * (u64)(a.x + a.y);              // 63-bit value, max = 7FFF FFFE 0000 0002
@@ -823,8 +956,29 @@ GF31 OVERLOAD cmul(GF31 a, GF31 b) {
   u64 k1k3 = mad32(a.y, neg(b.y) + negbx, k1);  // unsigned 64-bit value, max = FFFF FFFC 0000 0004
   return U2(modM31(k1k3), modM31(k1k2));
 }
+#else                                           // Straight forward 4 multiply version
+GF31 OVERLOAD cmul(GF31 a, GF31 b) {
+  u64 ayby = (u64) a.y * (u64) neg(b.y);
+  u64 aybx = (u64) a.y * (u64) b.x;
+  u64 r = mad32(a.x, b.x, ayby);                // Max value is 2*M31^2 = 7FFF FFFE 0000 0002
+  u64 i = mad32(a.x, b.y, aybx);                // Max value is 2*M31^2 = 7FFF FFFE 0000 0002
+  return U2(modM31(r, 63), modM31(i, 63));
+}
 #endif
 
+// Complex mul where 2nd argument is a constant.  Allows cheaper modM31 in some cases.
+GF31 OVERLOAD cmul_const(GF31 a, GF31 b) {
+#if 0
+  return cmul(a, b);
+#else
+  u64 ayby = (u64) a.y * (u64) neg(b.y);
+  u64 aybx = (u64) a.y * (u64) b.x;
+  u64 r = mad32(a.x, b.x, ayby);                // Max value is (M31 - b.y + b.x)*M31
+  u64 i = mad32(a.x, b.y, aybx);                // Max value is (b.x + b.y)*M31
+  return U2(modM31(r, (M31 - b.y + b.x <= M31) ? 62 : 63), modM31(i, (b.x + b.y <= M31) ? 62 : 63));
+#endif
+}
+
 // Square a root of unity complex number
 GF31 OVERLOAD csqTrig(GF31 a) { u32 two_ay = a.y + a.y; return U2(modM31(mad32(two_ay, neg(a.y), (u32)1)), modM31(a.x * (u64)two_ay)); }
 
@@ -843,11 +997,14 @@ GF31 OVERLOAD mul_3t8(GF31 a) { return U2(shl(neg(add(a.x, a.y)), 15), shl(sub(a
 // Return a+b and a-b
 void OVERLOAD X2_internal(GF31 *a, GF31 *b) { GF31 t = *a; *a = add(t, *b); *b = sub(t, *b); }
 
+// Same as X2(a, mul_t4(b))
+void OVERLOAD X2t4_internal(GF31 *a, GF31 *b) { Z31 by = b->y; b->y = sub(a->y, b->x); a->y = add(a->y, b->x); b->x = add(a->x, by); a->x = sub(a->x, by); }
+
 // Same as X2(a, conjugate(b))
 void OVERLOAD X2conjb_internal(GF31 *a, GF31 *b) { GF31 t = *a; a->x = add(a->x, b->x); a->y = sub(a->y, b->y); b->x = sub(t.x, b->x); b->y = add(t.y, b->y); }
 
 // Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(GF31 *a, GF31 *b) { GF31 t = *a; *a = add(*a, *b); t.x = sub(t.x, b->x); b->x = sub(b->y, t.y); b->y = t.x; }
+void OVERLOAD X2_mul_t4_internal(GF31 *a, GF31 *b) { Z31 by = b->y; b->y = sub(a->x, b->x); a->x = add(a->x, b->x); b->x = sub(by, a->y); a->y = add(a->y, by); }
 
 // Same as X2(a, b), b = mul_t8(b)
 void OVERLOAD X2_mul_t8_internal(GF31 *a, GF31 *b) { X2(*a, *b); *b = mul_t8(*b); }
@@ -866,6 +1023,13 @@ GF31 OVERLOAD foo(GF31 a) { return foo2(a, a); }
 
 #endif
 
+// Create "quick" routines for compatibility with shufl_and_fft2 and the GF61 data type.
+
+Z31 OVERLOAD addq(Z31 a, Z31 b) { return add(a, b); }
+Z31 OVERLOAD subq(Z31 a, Z31 b) { return sub(a, b); }
+GF31 OVERLOAD addq(GF31 a, GF31 b) { return add(a, b); }
+GF31 OVERLOAD subq(GF31 a, GF31 b) { return sub(a, b); }
+
 #endif
 
 
@@ -875,8 +1039,6 @@ GF31 OVERLOAD foo(GF31 a) { return foo2(a, a); }
 
 #if NTT_GF61
 
-#define M61 ((((Z61) 1) << 61) - 1)
-
 Z61 OVERLOAD make_Z61(i32 a) { return (Z61) (a < 0 ? (i64) a + M61 : (i64) a); }  // Handles all values of a
 Z61 OVERLOAD make_Z61(i64 a) { return (Z61) optional_addM61(a); }                 // a must be in range of -M61 .. M61-1
 Z61 OVERLOAD make_Z61(u32 a) { return (Z61) (a); }                                // Handles all values of a
@@ -914,9 +1076,82 @@ Z61 OVERLOAD shl(Z61 a, u32 k) { return shr(a, 61 - k); }         // Return rang
 //Z61 OVERLOAD shl(Z61 a, u32 k) { return modM61((a << k) + ((a >> (64 - k)) << 3)); }       // Return range 0..M61+epsilon, input must be M61+epsilon a full 62-bit value can overflow
 GF61 OVERLOAD shl(GF61 a, u32 k) { return U2(shl(a.x, k), shl(a.y, k)); }
 
-ulong2 wideMul(u64 ab, u64 cd) {
-  u128 r = mul64(ab, cd);
-  return U2(u128_lo64(r), u128_hi64(r));
+// Maybe we can make shl faster
+Z61 OVERLOAD shl30(Z61 a) {
+#if TRY_SHL30 && HAS_PTX >= 320        // shf instruction requires sm_32 support or higher
+  uint2 b = as_uint2(a);
+  uint2 r, tmp;
+  __asm("shf.r.clamp.b32 %0, %4, %5, 31;\n\t"                   // High 32 bits (wrap to LSW)
+        "shr.b32         %1, %5, 31;\n\t"                       // This is needed unless we can assume highest bit is zero (wrap to MSW)
+        "and.b32         %2, %4, 2147483647;\n\t"               // Low 31 bits
+        "shr.b32         %3, %2, 2;\n\t"                        // Shift left 30 (29 bits end up in MSW)
+        "shl.b32         %2, %2, 30;\n\t"                       // Shift left 30 (2 bits end up in LSW)
+        "add.cc.u32      %0, %0, %2;\n\t"
+        "addc.u32        %1, %1, %3;"                           // Use if highest bit may not be zero
+      //"addc.u32        %1, 0, %3;"                            // Use if highest bit is assumed to be zero
+        : "=r"(r.x), "=r"(r.y), "=r"(tmp.x), "=r"(tmp.y) : "r"(b.x), "r"(b.y) : );
+  return as_ulong(r);
+#else
+  return shl(a, 30);
+#endif
+}
+GF61 OVERLOAD shl30(GF61 a) { return U2(shl30(a.x), shl30(a.y)); }
+
+// Maybe we can make shl faster
+Z61 OVERLOAD shl31(Z61 a) {
+#if TRY_SHL31 && HAS_PTX >= 320        // shf instruction requires sm_32 support or higher
+  uint2 b = as_uint2(a);
+  uint2 r, tmp;
+  __asm("shf.r.clamp.b32 %0, %4, %5, 30;\n\t"                   // High 32 bits (wrap to LSW)
+      //"shr.b32         %1, %5, 30;\n\t"                       // Assume highest 2 bits are zero (wrap to MSW)
+        "and.b32         %2, %4, 1073741823;\n\t"               // Low 30 bits
+        "shr.b32         %3, %2, 1;\n\t"                        // Shift left 31 (29 bits end up in MSW)
+        "shl.b32         %2, %2, 31;\n\t"                       // Shift left 31 (1 bit ends up in LSW)
+        "add.cc.u32      %0, %0, %2;\n\t"
+      //"addc.u32        %1, %1, %3;"                           // Use if highest 2 bits may not be zero
+        "addc.u32        %1, 0, %3;"
+        : "=r"(r.x), "=r"(r.y), "=r"(tmp.x), "=r"(tmp.y) : "r"(b.x), "r"(b.y) : );
+  return as_ulong(r);
+#else
+  return shl(a, 31);
+#endif
+}
+GF61 OVERLOAD shl31(GF61 a) { return U2(shl31(a.x), shl31(a.y)); }
+
+u64 OVERLOAD weakModM61(u128 a, u32 num_bits) {
+// This is faster on TitanV, CUDA 13.0.  No difference on 5070Ti.
+#if HAS_PTX >= 320        // shf instruction requires sm_32 support or higher
+  uint2 alo = as_uint2(u128_lo64(a));
+  uint2 ahi = as_uint2(u128_hi64(a));
+  if (num_bits <= 125) {
+    __asm("shf.r.clamp.b32 %3, %2, %3, 29;\n\t"
+          "shf.r.clamp.b32 %2, %1, %2, 29;\n\t"
+          "and.b32         %1, %1, 536870911;"
+          : "+r"(alo.x), "+r"(alo.y), "+r"(ahi.x), "+r"(ahi.y) : );
+    return (u64)as_ulong(ahi) + (u64)as_ulong(alo);
+  } else {
+    uint top6;
+    __asm("shr.u32         %4, %3, 26;\n\t"
+          "shf.r.clamp.b32 %3, %2, %3, 29;\n\t"
+          "shf.r.clamp.b32 %2, %1, %2, 29;\n\t"
+          "and.b32         %1, %1, 536870911;\n\t"
+          "and.b32         %3, %3, 536870911;\n\t"
+          "add.cc.u32      %0, %0, %4;\n\t"
+          "addc.u32        %1, %1, 0;"
+          : "+r"(alo.x), "+r"(alo.y), "+r"(ahi.x), "+r"(ahi.y), "=r"(top6) : );
+    return (u64)as_ulong(ahi) + (u64)as_ulong(alo);
+  }
+#else
+  u64 lo = u128_lo64(a), hi = u128_hi64(a);
+  u64 lo61 = lo & M61;                                  // Max value is M61
+  if (num_bits <= 125) {
+     hi = (hi << 3) + (lo >> 61);
+     return lo61 + hi;                                  // Caller must insure this does not overflow
+  } else {
+     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
+     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+  }
+#endif
 }
 
 // Returns a * b not modded by M61.  Max value of result depends on the m61_counts of the inputs.
@@ -924,39 +1159,27 @@ ulong2 wideMul(u64 ab, u64 cd) {
 // If n <= 6 result will be at most (n+1)*M61+epsilon.
 // If n > 6 result will be at most 2*M61+epsilon.
 Z61 OVERLOAD weakMul(Z61 a, Z61 b, const u32 a_m61_count, const u32 b_m61_count) {
-  ulong2 ab = wideMul(a, b);
-  u64 lo = ab.x, hi = ab.y;
-  u64 lo61 = lo & M61;                                  // Max value is M61
+  u128 ab = mul64(a, b);                                // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61^2 + epsilon
   if ((a_m61_count - 1) * (b_m61_count - 1) <= 6) {
-     hi = (hi << 3) + (lo >> 61);                       // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61 + epsilon
-     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
+    return weakModM61(ab, 125);                         // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
   } else {
-     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
-     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+    return weakModM61(ab, 128);                         // Max value is 2*M61 + epsilon
   }
 }
 Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u64 c, const u32 a_m61_count, const u32 b_m61_count) {
   u128 ab = mad64(a, b, c);                             // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61^2 + epsilon
-  u64 lo = u128_lo64(ab), hi = u128_hi64(ab);
-  u64 lo61 = lo & M61;                                  // Max value is M61
   if ((a_m61_count - 1) * (b_m61_count - 1) <= 6) {
-     hi = (hi << 3) + (lo >> 61);                       // Max value is (a_m61_count - 1) * (b_m61_count - 1) * M61 + epsilon
-     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
+    return weakModM61(ab, 125);                         // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 1) * M61 + epsilon
   } else {
-     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
-     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+    return weakModM61(ab, 128);                         // Max value is 2*M61 + epsilon
   }
 }
 Z61 OVERLOAD weakMulAdd(Z61 a, Z61 b, u128 c, const u32 a_m61_count, const u32 b_m61_count) {  // Max c value assumed to be 2*M61^2+epsilon
   u128 ab = mad64(a, b, c);                             // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61^2 + epsilon
-  u64 lo = u128_lo64(ab), hi = u128_hi64(ab);
-  u64 lo61 = lo & M61;                                  // Max value is M61
   if ((a_m61_count - 1) * (b_m61_count - 1) + 2 <= 6) {
-     hi = (hi << 3) + (lo >> 61);                       // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 2) * M61 + epsilon
-     return lo61 + hi;                                  // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 3) * M61 + epsilon
+    return weakModM61(ab, 125);                         // Max value is ((a_m61_count - 1) * (b_m61_count - 1) + 3) * M61 + epsilon
   } else {
-     u64 hi61 = ((hi << 3) + (lo >> 61)) & M61;         // Max value is M61
-     return lo61 + hi61 + (hi >> 58);                   // Max value is 2*M61 + epsilon
+    return weakModM61(ab, 128);                         // Max value is 2*M61 + epsilon
   }
 }
 
@@ -1003,12 +1226,22 @@ GF61 OVERLOAD csqa(GF61 a, GF61 c, const u32 m61_count) { return csqa(a, c, m61_
 GF61 OVERLOAD csqa(GF61 a, GF61 c) { return csqa(a, c, 2); }
 
 // Complex mul
+#if 1
 GF61 OVERLOAD cmul(GF61 a, GF61 b) {
   u128 k1 = mul64(b.x, a.x + a.y);                            // max value is 2*M61^2+epsilon
   Z61 k1k2 = weakMulAdd(a.x, b.y + neg(b.x, 2), k1, 2, 4);    // max value is 6*M61+epsilon
   Z61 k1k3 = weakMulAdd(a.y, neg(b.y + b.x, 3), k1, 2, 4);    // max value is 6*M61+epsilon
   return U2(modM61(k1k3), modM61(k1k2));
 }
+#else
+GF61 OVERLOAD cmul(GF61 a, GF61 b) {
+  u128 ayby = mul64(a.y, neg(b.y, 2));                        // max value is 2*M61^2+epsilon
+  u128 r = mad64(a.x, b.x, ayby);                             // max value is 3*M61^2+epsilon
+  u128 aybx = mul64(a.y, b.x);                                // max value is 1*M61^2+epsilon
+  u128 i = mad64(a.x, b.y, aybx);                             // max value is 2*M61^2+epsilon
+  return U2(add(u128_lo64(r) & M61, u128_shrlo64(r, 61)), add(u128_lo64(i) & M61, u128_shrlo64(i, 61)));
+}
+#endif
 
 // Square a root of unity complex number (the second version may be faster if the compiler optimizes the u128 squaring).
 //GF61 OVERLOAD csqTrig(GF61 a) { Z61 two_ay = a.y + a.y; return U2(modM61(1 + weakMul(two_ay, neg(a.y, 2))), mul(a.x, two_ay)); }
@@ -1026,24 +1259,77 @@ GF61 OVERLOAD subi(GF61 a, GF61 b) { return U2(add(a.x, b.y), sub(a.y, b.x)); }
 GF61 OVERLOAD mul_t4(GF61 a) { return U2(neg(a.y), a.x); }                                      // GWBUG:  Can caller use a version that does not negate real?
 
 // mul with (-2^30, -2^30). (twiddle of tau/8 aka sqrt(i)). Note: 2 * (+/-2^30)^2 == 1 (mod M61).
-GF61 OVERLOAD mul_t8(GF61 a, const u32 m61_count) { return shl(U2(a.y + neg(a.x, m61_count), neg(a.x + a.y, 2 * m61_count - 1)), 30); }
+GF61 OVERLOAD mul_t8(GF61 a, const u32 m61_count) { return shl30(U2(a.y + neg(a.x, m61_count), neg(a.x + a.y, 2 * m61_count - 1))); }
 GF61 OVERLOAD mul_t8(GF61 a) { return mul_t8(a, 2); }
 
 // mul with (2^30, -2^30). (twiddle of 3*tau/8).
-GF61 OVERLOAD mul_3t8(GF61 a, const u32 m61_count) { return shl(U2(a.x + a.y, a.y + neg(a.x, m61_count)), 30); }
+GF61 OVERLOAD mul_3t8(GF61 a, const u32 m61_count) { return shl30(U2(a.x + a.y, a.y + neg(a.x, m61_count))); }
 GF61 OVERLOAD mul_3t8(GF61 a) { return mul_3t8(a, 2); }
 
+// mul with twiddles of (1,3,5,7,9)*tau/16
+// Define C1 = 22027337052962166, S1 = 1693317751237720973, negC1 = M61 - C1, negS1 = M61 - S1.
+// Twiddle for 1t16 is U2(C1, S1), 3t16 is U2(S1, C1), 5t16 is U2(negS1, C1), 7t16 is U2(negC1, S1), 9t16 is U2(negC1, negS1).
+#if TRY_SQRT2
+// NOTE: C1/S1 = SQRT2 + 1 and S1/C1 = SQRT2 - 1.  This lets us compute the cmul in two steps.  For example, mul_t16 can be (a * U2(1, S1/C1)) * C1.
+// Mul by SQRT2 is a mul by -2^31 which is done with a shift rather than a multiply.  This reduces the total number of 64-bit multiplies (but shifts aren't cheap either).
+// As a bonus, C1 is a 55-bit value which means a modM61 reduction after weakMul should not be necessary.
+GF61 OVERLOAD mul_t16(GF61 a) {
+   // a * U2(1, S1/C1) = axbx - ayby, axby + aybx
+   //                  = ax - (ay * (SQRT2 - 1)), ax * (SQRT2 - 1) + ay
+   //                  = ax - ay * SQRT2 + ay, ax * SQRT2 - ax + ay
+   GF61 a_negsqrt2 = shl31(a);      // Mul by (2^31 = -SQRT2)
+   return U2(weakMul(a.x + a_negsqrt2.y + a.y, 22027337052962166ULL, 2, 2), weakMul(neg(a_negsqrt2.x + a.x, 3) + a.y, 22027337052962166ULL, 2, 2));
+}
+GF61 OVERLOAD mul_3t16(GF61 a) {
+   // a * U2(S1/C1, 1) = axbx - ayby, axby + aybx
+   //                  = ax * (SQRT2 - 1) - ay, ax + ay * (SQRT2 - 1)
+   //                  = ax * SQRT2 - ax - ay, ax + ay * SQRT2 - ay
+   GF61 a_negsqrt2 = shl31(a);      // Mul by (2^31 = -SQRT2)
+   return U2(weakMul(neg(a_negsqrt2.x + a.x + a.y, 4), 22027337052962166ULL, 2, 2), weakMul(a.x + neg(a_negsqrt2.y + a.y, 3), 22027337052962166ULL, 2, 2));
+}
+GF61 OVERLOAD mul_5t16(GF61 a) {
+   // a * U2(-S1/C1, 1) = axbx - ayby, axby + aybx
+   //                   = ax * -(SQRT2 - 1) - ay, ax + ay * -(SQRT2 - 1)
+   //                   = -ax * SQRT2 + ax - ay, ax - ay * SQRT2 + ay
+   GF61 a_negsqrt2 = shl31(a);      // Mul by (2^31 = -SQRT2)
+   return U2(weakMul(a_negsqrt2.x + a.x + neg(a.y, 2), 22027337052962166ULL, 2, 2), weakMul(a.x + a_negsqrt2.y + a.y, 22027337052962166ULL, 2, 2));
+}
+GF61 OVERLOAD mul_7t16(GF61 a) {
+   // a * U2(-1, S1/C1) = axbx - ayby, axby + aybx
+   //                   = -ax - (ay * (SQRT2 - 1)), ax * (SQRT2 - 1) - ay
+   //                   = -ax - ay * SQRT2 + ay, ax * SQRT2 - ax - ay
+   GF61 a_negsqrt2 = shl31(a);      // Mul by (2^31 = -SQRT2)
+   return U2(weakMul(neg(a.x, 2) + a_negsqrt2.y + a.y, 22027337052962166ULL, 2, 2), weakMul(neg(a_negsqrt2.x + a.x + a.y, 4), 22027337052962166ULL, 2, 2));
+}
+GF61 OVERLOAD mul_9t16(GF61 a) {
+   // a * U2(-1, -S1/C1) = axbx - ayby, axby + aybx
+   //                    = -ax - (ay * -(SQRT2 - 1)), ax * -(SQRT2 - 1) - ay
+   //                    = -ax + ay * SQRT2 - ay, -ax * SQRT2 + ax - ay
+   GF61 a_negsqrt2 = shl31(a);      // Mul by (2^31 = -SQRT2)
+   return U2(weakMul(neg(a.x + a_negsqrt2.y + a.y, 4), 22027337052962166ULL, 2, 2), weakMul(a_negsqrt2.x + a.x + neg(a.y, 2), 22027337052962166ULL, 2, 2));
+}
+#else
+GF61 OVERLOAD mul_t16(GF61 a) { return cmul(a, U2(22027337052962166ULL, 1693317751237720973ULL)); }
+GF61 OVERLOAD mul_3t16(GF61 a) { return cmul(a, U2(1693317751237720973ULL, 22027337052962166ULL)); }
+GF61 OVERLOAD mul_5t16(GF61 a) { return cmul(a, U2(M61 - 1693317751237720973ULL, 22027337052962166ULL)); }
+GF61 OVERLOAD mul_7t16(GF61 a) { return cmul(a, U2(M61 - 22027337052962166ULL, 1693317751237720973ULL)); }
+GF61 OVERLOAD mul_9t16(GF61 a) { return cmul(a, U2(M61 - 22027337052962166ULL, M61 - 1693317751237720973ULL)); }
+#endif
+
 // Return a+b and a-b
 void OVERLOAD X2_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); *b = sub(t, *b); }
 
+// Same as X2(a, mul_t4(b))
+void OVERLOAD X2t4_internal(GF61 *a, GF61 *b) { Z61 by = b->y; b->y = sub(a->y, b->x); a->y = add(a->y, b->x); b->x = add(a->x, by); a->x = sub(a->x, by); }
+
 // Same as X2(a, conjugate(b))
 void OVERLOAD X2conjb_internal(GF61 *a, GF61 *b) { GF61 t = *a; a->x = add(a->x, b->x); a->y = sub(a->y, b->y); b->x = sub(t.x, b->x); b->y = add(t.y, b->y); }
 
 // Same as X2(a, b), b = mul_t4(b)
-void OVERLOAD X2_mul_t4_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(*a, *b); t.x = sub(t.x, b->x); b->x = sub(b->y, t.y); b->y = t.x; }
+void OVERLOAD X2_mul_t4_internal(GF61 *a, GF61 *b) { Z61 by = b->y; b->y = sub(a->x, b->x); a->x = add(a->x, b->x); b->x = sub(by, a->y); a->y = add(a->y, by); }
 
 // Same as X2(a, b), b = mul_t8(b)
-void OVERLOAD X2_mul_t8_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); t = *b + neg(t, 2); *b = shl(U2(t.x + neg(t.y, 4), t.x + t.y), 30); }
+void OVERLOAD X2_mul_t8_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); t = *b + neg(t, 2); *b = shl30(U2(t.x + neg(t.y, 4), t.x + t.y)); }
 
 // Same as X2(a, b), b = mul_3t8(b)
 void OVERLOAD X2_mul_3t8_internal(GF61 *a, GF61 *b) { GF61 t = *a; *a = add(t, *b); *b = t + neg(*b, 2); *b = mul_3t8(*b, 4); }
@@ -1061,17 +1347,21 @@ GF61 OVERLOAD foo(GF61 a) { return foo2(a, a); }
 // This reduces the number of m61_count*M61 addition operations too.  By tracking ranges of intermediate results, the caller knows how many M61s
 // need to be added to make result positive prior to the final modM61.  In function names, "q" stands for quick (no modM61).
 
+Z61 OVERLOAD addq(Z61 a, Z61 b) { return a + b; }
+Z61 OVERLOAD subq(Z61 a, Z61 b) { return a - b; }
 GF61 OVERLOAD addq(GF61 a, GF61 b) { return a + b; }
 GF61 OVERLOAD subq(GF61 a, GF61 b) { return a - b; }
 GF61 OVERLOAD addiq(GF61 a, GF61 b) { return U2(a.x - b.y, a.y + b.x); }
 GF61 OVERLOAD subiq(GF61 a, GF61 b) { return U2(a.x + b.y, a.y - b.x); }
 
 void OVERLOAD X2q(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; *b = t - *b; }
-void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; t.x = t.x - b->x; b->x = b->y - t.y; b->y = t.x; }
+void OVERLOAD X2qt4(GF61 *a, GF61 *b) { Z61 by = b->y; b->y = a->y - b->x; a->y = a->y + b->x; b->x = a->x + by; a->x = a->x - by; }
 void OVERLOAD X2qconjb(GF61 *a, GF61 *b) { GF61 t = *a; a->x += b->x; a->y -= b->y; b->x = t.x - b->x; b->y = t.y + b->y; }
+void OVERLOAD X2q_mul_t4(GF61 *a, GF61 *b) { Z61 by = b->y; b->y = a->x - b->x; a->x = a->x + b->x; b->x = by - a->y; a->y = a->y + by; }
 void OVERLOAD X2q_conjb(GF61 *a, GF61 *b) { GF61 t = *a; *a = t + *b; b->x = t.x - b->x; b->y = b->y - t.y; }
 
-GF61 OVERLOAD mul_t8q(GF61 a, const u32 m61_count) { return shl(U2(m61_count * M61 + (a.y - a.x), m61_count * M61 - (a.x + a.y)), 30); }
+GF61 OVERLOAD mul_t8q(GF61 a, const u32 m61_count) { return shl30(U2(m61_count * M61 + (a.y - a.x), m61_count * M61 - (a.x + a.y))); }
+GF61 OVERLOAD mul_3t8q(GF61 a, const u32 m61_count) { return shl30(U2(m61_count * M61 + a.x + a.y, m61_count * M61 + (a.y - a.x))); }
 
 Z61 OVERLOAD optsubqu(Z61 a, const u32 m61_limit, const u32 m61_count) { return optional_sub((u64)a, (u32)(m61_limit << (61 - 32)), (u64)(m61_count * M61)); }
 GF61 OVERLOAD optsubqu(GF61 a, const u32 m61_limit, const u32 m61_count) { return U2(optsubqu(a.x, m61_limit, m61_count), optsubqu(a.y, m61_limit, m61_count)); }
diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 9ed387a9..be977fb0 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -1,601 +1,887 @@
-// Copyright (C) Mihai Preda
-
-#ifdef T2_GF61
-
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
-// Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
-// even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
-// WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
-// n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
-// numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
-// lowMe = me % WG
-// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
-// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
-// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
-// minor optimization would be to special case the first shufl call.
-void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  int force_default = 0;
-#if NOWG2                       // For timing tests only.  Option to not turn off LDS bank conflict code when numWG > 1.  I've not found a GPU where this is beneficial.
-  if (numWG > 1) force_default = 1;
-#endif
-#if NOLDS2                      // For timing tests only.  Option to not turn off LDS bank for second shufl calls.  I've not found a GPU where this is beneficial.
-  if (f != 1) force_default = 1;
-#endif
-
-  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES == 16) {
-    local T2_GF61* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
-
-#if LDSPAD
-    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 8, 72..., 16...   lds[64..127] = +1
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad 1 value every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 8                     + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 32 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
-    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
-    if (0 && f == 8 && RADIX == 8) {
-      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
-      bar(WG);
-      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1, 65..., 16...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad 1 value every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16... 4..  lds[64..127] = +1
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
-    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
-    // We can however save a bar() by writing to same locations that previous shufl wrote to.
-    if (!force_default && f == 8 && RADIX == 8) {
-      for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
-      return;
-    }
-#endif
-
-    // Otherwise, execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
-  else if (SHUFL_BYTES == 8) {
-    local T_Z61* lds = ((local T_Z61*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
-
-#if LDSPAD
-    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      return;
-    }
-#endif
-
-    // Execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
-  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
-  else if (SHUFL_BYTES == 4) {
-    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
-    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
-    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-    local int* lds = (local int*) lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
-
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-  }
-}
-
-#endif
-
-
-#ifdef F2_GF31
-
-// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats or Z31s.
-void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
-
-  u32 mask = f - 1;
-  assert((mask & (mask + 1)) == 0);
-
-  //GW - would a 16 byte implementation be useful?  Less LDS conflict work?
-
-  int force_default = 0;
-#if NOWG2
-  if (numWG > 1) force_default = 1;
-#endif
-#if NOLDS2
-  if (f != 1) force_default = 1;
-#endif
-
-  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES >= 8) {
-    local F2_GF31* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
-
-#if LDSPAD
-    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 16, 80...   lds[64..127] = +2
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 7) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 1) * 8 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i / 2) * 16 + (i & 1) * (4 * (WG + 1)) + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 128) * 16             + ((lowMe / 16) & 7) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      return;
-    }
-#endif
-
-#if LDSSWIZ
-    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
-    // Swizzle LDS blocks to eliminate bank conflicts.
-    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      return;
-    }
-#endif
-
-    // Execute the original shufl code
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
-  }
-
-  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
-  else if (SHUFL_BYTES == 4) {
-    local F_Z31* lds = ((local F_Z31*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
-
-#if LDSPAD
-    // Special case first RADIX == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 2, 66..., 3, 67..., 32, 96...   lds[64..127] = +4
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 8) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.  We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
-    // Pad 8 values after every 64 values to eliminate bank conflicts.
-    if (!force_default && f == 8 && RADIX == 8) {
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      return;
-    }
-
-    // Special case first RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 32 must have unique LDS banks.
-    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 7.., 32...   lds[64..127] = +8
-    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
-    // Pad one value after every row to eliminate bank conflicts.
-    if (!force_default && f == 1 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
-      return;
-    }
-
-    // Special case second RADIX == 4 to eliminate LDS bank conflicts.  We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
-    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
-    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 1.... ... 8...   lds[64..127] = +2
-    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
-    // Pad 4 values after every row to eliminate bank conflicts.
-    if (!force_default && f == 4 && RADIX == 4) {
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
-      bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
-      return;
-    }
-#endif
-
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
-  }
-}
-
-#endif
-
-
+// Copyright (C) Mihai Preda
+
+#ifdef T2_GF61
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
+// Care is taken that each simultaneous workgroup does not interfere with the LDS memory of other simultaneous workgroups --
+// even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
+// WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
+// n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
+// numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
+// lowMe = me % WG
+// r usually equals RADIX if a full fft_RADIX step was just performed.  On occasion u[8] values may do less than an fft8 step.
+// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
+// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
+// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
+// minor optimization would be to special case the first shufl call.
+void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
+  // We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
+  if (SHUFL_BYTES == 16) {
+    local T2_GF61* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 8, 72..., 16...   lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad 1 value every row to eliminate bank conflicts.
+    if (0 && f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8                    + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order and written straight to LDS memory.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that uses a little padding.  Pad one value after every row to eliminate bank conflicts.
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 1) + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 8) + (lowMe / 8) + (lowMe & 7) * (WG + 1)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
+    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
+    if (0 && f == 8 && r == 8 && RADIX == 8) {
+      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
+      bar(WG);
+      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1, 65..., 16...   lds[64..127] = +2
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad 1 value every row to eliminate bank conflicts.
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16... 4..  lds[64..127] = +1
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
+    // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
+    // We can however save a bar() by writing to same locations that previous shufl wrote to.
+    if (f == 8 && r == 8 && RADIX == 8) {
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
+  // We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+  else if (SHUFL_BYTES == 8) {
+    local T_Z61* lds = ((local T_Z61*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
+
+#if LDSPAD
+    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.
+    // Input values are in order and written straight to LDS memory.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that uses a little padding.  Pad two values after every row to eliminate bank conflicts.
+    // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS with 8 pads after each row.
+    // Read from LDS in output order.  In the example:  u[0] = 0, 64, ... 448, 8, 72...   u[1] = +1
+    if (f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8                    +  (lowMe / 8)      * (WG + 8) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 64) * 8                    +  (lowMe / 8)      * (WG + 8) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case alternate first RADIX == 8 code to eliminate LDS bank conflicts (only a radix-4 step was performed).
+    // Input values are in order and written straight to LDS memory.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +32...
+    // Output to LDS that uses a little padding.  Pad four values after every other row to eliminate bank conflicts.
+    // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, 128, 192, 1, 65...   u[1] = +8
+    if (f == 1 && r == 4 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i / 2 * (2 * WG + 4) + (i % 2) * WG + lowMe] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (2 * WG + 4)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i / 2 * (2 * WG + 4) + (i % 2) * WG + lowMe] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (2 * WG + 4)]; }
+      return;
+    }
+
+    // Special case alternate second RADIX == 8 to eliminate LDS bank conflicts (first shufl was partial after a radix-4 step).
+    // Input values are the output from a previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, 128, 192, 1, 65...   u[1] = +8
+    // Output to LDS with 4 pads after each row.
+    // Read from LDS in output order.  In the example:  u[0] = 0, 64, 128, 192, 8, 72...   u[1] = +1
+    if (f == 4 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
+      bar(WG);
+      if (WG == 32) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 32) * 4                    +  (lowMe / 4)      * (WG + 4) + (lowMe & 3)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 32) * 4 + (lowMe / 32) * 4 + ((lowMe / 4) & 7) * (WG + 4) + (lowMe & 3)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
+      bar(WG);
+      if (WG == 32) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 32) * 4                    +  (lowMe / 4)      * (WG + 4) + (lowMe & 3)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 32) * 4 + (lowMe / 32) * 4 + ((lowMe / 4) & 7) * (WG + 4) + (lowMe & 3)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (1 && f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order and written straight to LDS memory.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS using a little padding.  Pad four values after every row to eliminate bank conflicts.
+    // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    if (0 && f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (WG + 4)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (WG + 4)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  u[0] = 0...192, 16... 32.. 48.. 1...  u[1] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (0 && f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS with 4 pads after each row.
+    // Read from LDS in output order.  In the example:  u[0] = 0...192, 16... 32.. 48.. 1...  u[1] = +4
+    if (1 && f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 16) * 4 + (lowMe / 16) * 4 + ((lowMe / 4) & 3) * (WG + 4) + (lowMe & 3)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 16) * 4 + (lowMe / 16) * 4 + ((lowMe / 4) & 3) * (WG + 4) + (lowMe & 3)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 code to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
+    if (f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
+  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  else if (SHUFL_BYTES == 4) {
+    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
+    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
+    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
+    local int* lds = (local int*) lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
+
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+  }
+}
+
+// Shortcut for the most common case where caller did a full RADIX step (as opposed to the oddball cases where we have a u[8] but only did a radix 2 or 4 step).
+void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl(lds2, u, f, RADIX, numWG, lowMe);
+}
+
+
+// NEEDS TONS OF WORK!!!  SWIZ NOT CODED, MOST PAD CASES NOT CODED, SHUFL_BYTES = 4 needs differernt algorithm.
+// At present, this is only used by WIDTH or HEIGHT = 1K with RADIX=8 and f=8.
+
+// Shufl two or more fft_WIDTHs or fft_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.  An fft2 is also performed.
+void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
+  assert(RADIX == 8);
+  assert(SHUFL_BYTES >= 8);
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  // Start by doing the writes of a standard shufl.
+  // Next, each thread reads a pair of values.  The lower threads add the two values, the higher threads subtract the two values.
+  // val1 is read from          i * WG/2
+  // val2 is read from 4 * WG + i * WG/2
+
+  // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES == 16) {
+    local T2_GF61* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
+
+    // Execute the original shufl code with an fft2 add-on.
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      T2_GF61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      T2_GF61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i] = addq(val1, val2);
+      else u[i] = subq(val1, val2);
+    }
+  }
+
+  // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
+  else if (SHUFL_BYTES == 8) {
+    local T_Z61* lds = ((local T_Z61*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
+
+#if LDSPAD
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS with 8 pads after each row.
+    // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    if (f == 8 && RADIX == 8) {
+      local T_Z61 *ldsIn;
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) {
+        // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
+        // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
+        T_Z61 val1 = lds[(i / 2)     * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        T_Z61 val2 = lds[(i / 2 + 4) * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        if (lowMe < WG / 2) u[i].x = addq(val1, val2); 
+        else u[i].x = subq(val1, val2);
+      }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].y; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) {
+        // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
+        // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
+        T_Z61 val1 = lds[(i / 2)     * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        T_Z61 val2 = lds[(i / 2 + 4) * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        if (lowMe < WG / 2) u[i].y = addq(val1, val2); 
+        else u[i].y = subq(val1, val2);
+      }
+      return;
+    }
+#endif
+
+    // Execute the original shufl code with an fft2 add-on.
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      T_Z61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      T_Z61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i].x = addq(val1, val2);
+      else u[i].x = subq(val1, val2);
+    }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      T_Z61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      T_Z61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i].y = addq(val1, val2);
+      else u[i].y = subq(val1, val2);
+    }
+  }
+
+  // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
+  // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
+  else if (SHUFL_BYTES == 4) {
+
+// NEEDS WORK!!!
+
+    // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
+    // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
+    // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
+    local int* lds = (local int*) lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
+
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+  }
+}
+
+#endif
+
+
+#ifdef F2_GF31
+
+// Shufl two or more fft_WIDTHs or FFT_HEIGHTs using two 4-byte floats or Z31s.
+void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u32 lowMe) {
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  //GW - would a 16 byte implementation be useful?  Less LDS conflict work?
+
+  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
+  // We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
+  if (SHUFL_BYTES >= 8) {
+    local F2_GF31* lds = lds2;
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order and written straight to LDS memory.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that uses a little padding.  Pad two values after every row to eliminate bank conflicts.
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (1 && f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS with 8 pads after each row.
+    // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    if (0 && f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8                    + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 3.., 16...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 4...   lds[64..127] = +1
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      return;
+    }
+#endif
+
+#if LDSSWIZ
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
+    if (f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 1, 65...   lds[64..127] = +16
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 192, 16, 80 ...   lds[64..127] = +4
+    // Swizzle LDS blocks to eliminate bank conflicts.
+    // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+  }
+
+  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
+  // We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
+  else if (SHUFL_BYTES == 4) {
+    local F_Z31* lds = ((local F_Z31*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
+
+#if LDSPAD
+    // Special case first RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=512:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...448, 1, 65..., 2, 66..., 3, 67..., 32, 96...   lds[64..127] = +4
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
+    // Pad one value after every row to eliminate bank conflicts.
+    if (f == 1 && r == 8 && RADIX == 8) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    // Pad 8 values after every 64 values to eliminate bank conflicts.
+    if (f == 8 && r == 8 && RADIX == 8) {
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
+      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      return;
+    }
+
+    // Special case first RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are in order.  For example, WIDTH=256:  u[0] = 0, 1, 2...  u[1] = +64...
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0, 64, ...192, 1.., 2.., 7.., 32...   lds[64..127] = +8
+    // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
+    // Pad one value after every row to eliminate bank conflicts.
+    if (f == 1 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      return;
+    }
+
+    // Special case second RADIX == 4 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=256:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
+    // Output to LDS that does not use much padding and generates good code because all the lowMe calcs can be computed up front.
+    // In the example:  lds[0..63] = 0...192, 16..., 32..., 48..., 1.... ... 8...   lds[64..127] = +2
+    // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
+    // Pad 4 values after every row to eliminate bank conflicts.
+    if (f == 4 && r == 4 && RADIX == 4) {
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
+      bar(WG);
+      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
+      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      return;
+    }
+#endif
+
+    // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+  }
+}
+
+// Shortcut for the most common case where caller did a full RADIX step (as opposed to the oddball cases where we have a u[8] but only did a radix 2 or 4 step).
+void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
+  shufl(lds2, u, f, RADIX, numWG, lowMe);
+}
+
+
+// NEEDS TONS OF WORK!!!  SWIZ NOT CODED, MOST PAD CASES NOT CODED.
+// At present, this is only used by WIDTH or HEIGHT = 1K with RADIX=8 and f=8.
+
+// Shufl two or more fft_WIDTHs or fft_HEIGHTs operating on 32-bit values using LDS_BYTES of LDS memory.  An fft2 is also performed.
+void OVERLOAD shufl_and_fft2(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG, u32 lowMe) {
+  assert(RADIX == 8);
+
+  u32 mask = f - 1;
+  assert((mask & (mask + 1)) == 0);
+
+  // Start by doing the writes of a standard shufl.
+  // Next, each thread reads a pair of values.  The lower threads add the two values, the higher threads subtract the two values.
+  // val1 is read from          i * WG/2
+  // val2 is read from 4 * WG + i * WG/2
+
+  // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
+  if (SHUFL_BYTES >= 8) {
+    local F2_GF31* lds = ((local F2_GF31*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
+
+#if LDSPAD
+    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
+    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
+    // Output to LDS with 8 pads after each row.
+    // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
+    if (f == 8 && RADIX == 8) {
+      local F2_GF31 *ldsIn;
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i]; }
+      bar(WG);
+      for (u32 i = 0; i < RADIX; ++i) {
+        // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
+        // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
+        F2_GF31 val1 = lds[(i / 2)     * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        F2_GF31 val2 = lds[(i / 2 + 4) * (WG / 64) * 8 + (((i & 1) * (WG / 2)) / 64) * 8 + ((lowMe % (WG / 2)) / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)];
+        if (lowMe < WG / 2) u[i] = addq(val1, val2);
+        else u[i] = subq(val1, val2);
+      }
+      return;
+    }
+#endif
+
+    // Execute the original shufl code with an fft2 add-on.
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      F2_GF31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      F2_GF31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i] = addq(val1, val2);
+      else u[i] = subq(val1, val2);
+    }
+  }
+
+  // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
+  else if (SHUFL_BYTES == 4) {
+    local F_Z31* lds = ((local F_Z31*) lds2);
+    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
+
+    // Execute the original shufl code with an fft2 add-on.
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      F_Z31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      F_Z31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i].x = addq(val1, val2);
+      else u[i].x = subq(val1, val2);
+    }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
+    bar(WG);
+    for (u32 i = 0; i < RADIX; ++i) {
+      F_Z31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
+      F_Z31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
+      if (lowMe < WG / 2) u[i].y = addq(val1, val2);
+      else u[i].y = subq(val1, val2);
+    }
+  }
+}
+
+#endif

From 53ac8f0973c8279432d359fc8f0e7091d288a93c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 13 Sep 2026 01:56:13 +0000
Subject: [PATCH 127/214] I asked AI Claude to fix CUDA shim's implementation
 of barriers and fences.  I added atomic_cmpxchg.

---
 src/cuda/opencl_compat.cuh | 27 ++++++++++++++++++---------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/src/cuda/opencl_compat.cuh b/src/cuda/opencl_compat.cuh
index 6b1a2807..203607f5 100644
--- a/src/cuda/opencl_compat.cuh
+++ b/src/cuda/opencl_compat.cuh
@@ -40,16 +40,24 @@
 #define get_global_size(d) ((unsigned int)(gridDim.x * blockDim.x))
 #define get_enqueued_local_size(d) get_local_size(d)
 
-// ---- Barriers ----
-#define CLK_LOCAL_MEM_FENCE 0
-#define CLK_GLOBAL_MEM_FENCE 0
-#define barrier(flags) __syncthreads()
+// ---- Barriers and fences ----
+#define CLK_LOCAL_MEM_FENCE  (1 << 0)
+#define CLK_GLOBAL_MEM_FENCE (1 << 1)
+
+__device__ __forceinline__ void ocl_barrier(int flags) {
+  __syncthreads();  // execution barrier is unconditional regardless of flags
+  // __syncthreads() already fences both shared and global memory per CUDA's
+  // documented semantics, so no additional fence is needed here for either flag.
+}
+#define barrier(flags) ocl_barrier(flags)
 
-// ---- Memory fences ----
-// OpenCL write_mem_fence / read_mem_fence → CUDA __threadfence()
-#define write_mem_fence(flags) __threadfence()
-#define read_mem_fence(flags) __threadfence()
-#define mem_fence(flags) __threadfence()
+__device__ __forceinline__ void ocl_mem_fence(int flags) {
+  if (flags & CLK_GLOBAL_MEM_FENCE) __threadfence();
+  else if (flags & CLK_LOCAL_MEM_FENCE) __threadfence_block();
+}
+#define mem_fence(flags) ocl_mem_fence(flags)
+#define write_mem_fence(flags) ocl_mem_fence(flags)
+#define read_mem_fence(flags) ocl_mem_fence(flags)
 
 // ---- Overloadable ----
 // CUDA C++ supports function overloading natively
@@ -268,6 +276,7 @@ __device__ __forceinline__ uint mad_hi(uint a, uint b, uint c) {
 // ---- Atomic operations ----
 #define atomic_max(p, v) atomicMax((unsigned int*)(p), (unsigned int)(v))
 #define atomic_add(p, v) atomicAdd(p, v)
+#define atomic_cmpxchg(p, old, new) atomicCAS((int *)(p), old, new)
 
 // OpenCL 2.0 C11-style atomics — optimized for CUDA carry stairway pattern.
 // The carryFused kernel uses: producer writes data, threadfence, bar, atomic_store(flag, 1)

From 97cb52863377a702a67e0a3d4657f634b2f2d33d Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 10:55:50 -0600
Subject: [PATCH 128/214] Fix updateStats() call arity in the FFT64 carry
 kernel STATS path

carry.cl:48, in the `#elif (STATS & (1 << (2 + MUL3)))` branch of the FFT64
carry() kernel, calls updateStats() with 3 arguments:

    updateStats(bufROE, posROE, carryMax);

but updateStats() (carryutil.cl:138) takes 6:

    void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks,
                     global uint *bufROE, u32 posROE, float roundMax)

This is the only one of the 36 updateStats() call sites in carry.cl and
carryfused.cl that is wrong; every other FFT type in carry.cl passes the 6
arguments (e.g. :107, :183).  The lds array is already declared on the line
above but never passed.

Effect: building the unfused carry kernel for FFT64 with carry statistics
enabled (-use STATS=4, or STATS=8 with MUL3) fails to compile, aborting at
kernel build time.  The ROE branch just above is unaffected, which is why
this has gone unnoticed.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/carry.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index a8ba21c1..bbfcede8 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -45,7 +45,7 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
   updateStats(lds, G_W, H, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(bufROE, posROE, carryMax);
+  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
 #endif
 }
 

From c0b80dd56c00fd3673b4730aa9925e64641de31b Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 10:56:59 -0600
Subject: [PATCH 129/214] Add missing make_i96(i64 hi, u32 lo) to the alternate
 i96 implementations

The i96 two-argument constructors use two different conventions, told apart
only by the type of the "lo" argument:

    make_i96(hi, u32 lo)   value = hi * 2^32 + lo
    make_i96(hi, u64 lo)   value = hi * 2^64 + lo

The active all-32-bit implementation (math.cl "#if 1") provides both.  The
__int128 implementation and the {u64 lo64, u32 hi32} implementation provide
only the u64 form.

weightAndCarryOne() for FFT3161 uses the u32 form (carryutil.cl:459-461):

    i64 vhi = n61 >> 1;
    u32 vlo = ((u32)n61 << 31) | n31;
    i96 value = make_i96(vhi, vlo);            // (n61 << 31) + n31

so selecting either alternate implementation silently widens vlo to u64 and
places vhi at bit 64 instead of bit 32 -- every FFT3161 word comes out wrong
by a factor of 2^32, with no compile error.  The other two call sites
(carryutil.cl:352 and :420) pass a u64 lo and are unaffected, so FFT6431 and
FFT3261 would keep working and the breakage would look like an FFT3161 bug.

No behaviour change today, since "#if 1" selects the all-32-bit version: this
just makes the other two implementations usable, as the comment at math.cl:66
("nVidia likes this version") invites.  Also documents the two conventions.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/math.cl | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/cl/math.cl b/src/cl/math.cl
index 07182c42..9c7de28d 100644
--- a/src/cl/math.cl
+++ b/src/cl/math.cl
@@ -13,6 +13,11 @@ u64 OVERLOAD make_u64(u32 hi, u32 lo) { union { uint2 ui2; u64 ul; } u; u.ui2.x
 i64 OVERLOAD make_i64(i32 hi, u32 lo) { union { uint2 ui2; u64 ul; } u; u.ui2.x = lo; u.ui2.y = hi; return u.ul; }
 
 // A primitive partial implementation of an i96 integer type
+// NOTE: the two-argument constructors use two different conventions, distinguished only by the type of "lo":
+//       make_i96(hi, u32 lo) places hi at bit 32 (value = hi * 2^32 + lo)
+//       make_i96(hi, u64 lo) places hi at bit 64 (value = hi * 2^64 + lo)
+//       Every implementation below must provide both, or a caller passing a u32 "lo" silently
+//       widens to the bit-64 form.
 #if 1
 // An all 32-bit implementation.  The add and subtract routines desperately need to use ASM with add.cc and sub.cc PTX instructions.
 // This version might be best on AMD and Intel if we can generate add-with-carry instructions.
@@ -63,6 +68,7 @@ i96 OVERLOAD sub(i96 a, i32 b) { return sub(a, make_i96(b)); }
 typedef struct { __int128 x; } i96;
 i96 OVERLOAD make_i96(i64 v) { i96 val; val.x = v; return val; }
 i96 OVERLOAD make_i96(i32 v) { i96 val; val.x = v; return val; }
+i96 OVERLOAD make_i96(i64 hi, u32 lo) { i96 val; val.x = ((__int128)hi << 32) + lo; return val; }
 i96 OVERLOAD make_i96(i64 hi, u64 lo) { i96 val; val.x = ((unsigned __int128)hi << 64) + lo; return val; }
 i96 OVERLOAD make_i96(i32 hi, u64 lo) { return make_i96((i64)hi, lo); }
 u32 i96_hi32(i96 val) { return (unsigned __int128)val.x >> 64; }
@@ -81,6 +87,7 @@ i96 OVERLOAD sub(i96 a, i32 b) { return sub(a, make_i96(b)); }
 typedef struct { u64 lo64; u32 hi32; } i96;
 i96 OVERLOAD make_i96(i64 v) { i96 val; val.hi32 = v >> 63, val.lo64 = v; return val; }
 i96 OVERLOAD make_i96(i32 v) { return make_i96((i64)v); }
+i96 OVERLOAD make_i96(i64 hi, u32 lo) { i96 val; val.hi32 = (u64)hi >> 32, val.lo64 = ((u64)hi << 32) | lo; return val; }
 i96 OVERLOAD make_i96(i64 hi, u64 lo) { i96 val; val.hi32 = hi, val.lo64 = lo; return val; }
 i96 OVERLOAD make_i96(i32 hi, u64 lo) { i96 val; val.hi32 = hi, val.lo64 = lo; return val; }
 u32 i96_hi32(i96 val) { return val.hi32; }

From 9633f1a90914603f50cb3eb327952ace6a4f2ed7 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 11:00:30 -0600
Subject: [PATCH 130/214] Document and enforce the CARRY32 bpw limit

carry32BPW() carries the note "I have no idea why this is needed.  Without
it, -tune fails on FFT sizes from 256K to 1M.  Perhaps it has something to do
with RNDVALdoubleToLong in carryutil".  The guess was right; this is the
mechanism, and the 19.0 cap is a hard limit of the CARRY32 code rather than an
empirical one.

In the CARRY32 case weightAndCarryOne() returns as_long(RNDVAL + value)
without stripping RNDVAL (carryutil.cl:217-219).  RNDVAL is 3 * 2^51, so in
the result bit 51 is set iff value >= 0 -- it is an indicator, not the sign
extension of value -- and bits 52+ hold the exponent.  carryStep(i64, i32*)
takes the carry as xtract32(x, nBits), i.e. bits [nBits, nBits+32).

That works precisely because the window sits below bit 51: for a negative
value the sign fill runs up through bit 50 and extracts as -1, and the
"+ (w < 0)" corrects it.  At nBits = 19 the window is bits 19..50, the last
safe position.  At nBits = 20 it takes in bit 51, and every big word with a
non-negative value extracts a carry of 0x80000000.

A big word has nBits = EXP / NWORDS + 1, so the requirement is
EXP / NWORDS <= 18, i.e. bpw < 19.0.  For a 256K FFT the unclamped formula
yields about 20.7, which is why -tune failed there.

Changes:
  - Replace the comment in carry32BPW() with the above.
  - needsLargeCarry() compares with a strict >, so E == 19 * size() would
    still select CARRY32 with EXP / NWORDS == 19.  Test the kernel's own
    EXP / NWORDS expression to close the off-by-one.  (Not reachable with a
    prime exponent, since size() is even, but the cap should not depend on
    that.)
  - Add an #error in carryutil.cl next to the 32-bit carry instantiation, so
    a configuration that violates the limit fails at kernel build time
    instead of silently computing wrong carries.

No behaviour change for any exponent that runs today.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/FFTConfig.cpp   | 17 ++++++++++++++---
 src/cl/carryutil.cl | 11 ++++++++++-
 2 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index ee13528a..2c260f4c 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -177,14 +177,25 @@ float FFTShape::carry32BPW() const {
   // We model carry with a Gumbel distrib similar to the one used for ROE, and measure carry with
   // -use STATS=1. See -carryTune
 
-//GW:  I have no idea why this is needed.  Without it, -tune fails on FFT sizes from 256K to 1M
-// Perhaps it has something to do with RNDVALdoubleToLong in carryutil
-if (18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())) > 19.0) return 19.0f;
+  // The 19.0 cap is a hard limit of the CARRY32 code, not an empirical one, which is why the formula
+  // above must be clamped for the smaller FFTs (without it, -tune failed on FFT sizes from 256K to 1M).
+  //
+  // In the CARRY32 case weightAndCarryOne() returns the raw bits of RNDVAL + value rather than stripping
+  // RNDVAL off (carryutil.cl:217-219), so bit 51 is set iff value >= 0 and bits 52+ hold the exponent.
+  // carryStep(i64, i32*) then takes the carry as xtract32(x, nBits), i.e. bits [nBits, nBits+32).  That
+  // window must stay strictly below bit 51 for the sign fill to work, so nBits <= 19, and since a big word
+  // has nBits = EXP / NWORDS + 1 that means EXP / NWORDS <= 18, i.e. bpw < 19.0.  At nBits = 20 the window
+  // includes bit 51 and every big word with a non-negative value yields a large negative carry.
+  if (18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())) > 19.0) return 19.0f;
 
   return float(18.35 + 0.5 * (log2(13 * 1024 * 512) - log2(size())));
 }
 
 bool FFTShape::needsLargeCarry(u64 E) const {
+  // carry32BPW() caps at 19.0 and the comparison below is a strict >, so E == 19 * size() would still
+  // select CARRY32 with EXP / NWORDS == 19, which the CARRY32 code cannot handle (see carry32BPW()).
+  // Test the kernel's own EXP / NWORDS expression to close that off-by-one.
+  if (E / size() >= 19) { return true; }
   return E / double(size()) > carry32BPW();
 }
 
diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 9f7aa0b7..b92c7ead 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -214,7 +214,9 @@ i64 weightAndCarryOne(T u, T invWeight, i64 inCarry, float* maxROE, int sloppy_r
   float roundoff = fabs((float) fma(u, invWeight, RNDVALCarry - d));
   *maxROE = max(*maxROE, roundoff);
 
-  // Convert to long (for CARRY32 case we don't need to strip off the RNDVAL bits)
+  // Convert to long (for CARRY32 case we don't need to strip off the RNDVAL bits).
+  // Leaving RNDVAL in place is only safe while the carry extraction window stays below bit 51 -- see the
+  // #error below and FFTShape::carry32BPW.
   if (sloppy_result_is_acceptable) return as_long(d);
   else return RNDVALdoubleToLong(d);
 
@@ -799,6 +801,13 @@ Word2 carryWord(Word2 a, CarryABM* carry, bool b1, bool b2) {
 /* Support both 32-bit and 64-bit carries */
 
 #if WordSize <= 4
+// A 32-bit carry means weightAndCarryOne returns RNDVAL + value un-stripped, and carryStep(i64, i32*) reads
+// the carry from bits [nBits, nBits+32).  That window must stay strictly below the RNDVAL bit 51, so
+// nBits <= 19; a big word has nBits = EXP / NWORDS + 1.  The host is supposed to select CARRY64 before this
+// point (FFTShape::needsLargeCarry); fail loudly rather than compute wrong carries if it ever does not.
+#if !CARRY64 && FFT_TYPE == FFT64 && EXP / NWORDS >= 19
+#error "CARRY32 requires EXP / NWORDS <= 18; this exponent needs CARRY64 (-carry long)"
+#endif
 #define iCARRY i32
 #include "carryinc.cl"
 #undef iCARRY

From ee9eb50930f9c1779b1254ff2f40fa91c050969e Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 11:10:12 -0600
Subject: [PATCH 131/214] Fix barriers reached by only part of the workgroup in
 carryFused

carryFused runs G_W * WMUL work-items, and three of its barriers sit inside
control flow that only some of them enter.  A barrier under divergent control
flow is undefined in OpenCL (and for __syncthreads in CUDA).

  1. The producer's bar(G_W) is inside
       if (gr < H / WMUL && me >= (WMUL-1) * G_W)
     gr is uniform, but "me >= (WMUL-1) * G_W" is not: only the last
     sub-workgroup arrives.
  2. The consumer's bar() after the spin-wait is inside "if (me < G_W)": only
     the first sub-workgroup arrives.
  3. The gr == H/WMUL barrier on the !OLD_FENCE path is likewise inside
     "if (me < G_W)".

On hardware where a barrier is just an arrival counter, the halves end up one
barrier out of phase for the rest of the kernel.  Counting arrivals for
WMUL=2, OLD_FENCE=1, 0 < gr < H/WMUL:

  me >= G_W:  R, U1..Un, S1..Sm
  me <  G_W:      U1..Un, S1..Sm, C

so R pairs with U1, U1 with U2, and Sm with C, where U* are the barriers in
updateStats() and S* those in shufl_carries_up().  Inside updateStats() the
high half then writes lds after its barrier k+1 while the low half reads after
its barrier k, and the low half reads stale lds.

That is what the workaround at carryutil.cl:150-152 is compensating for:

    bar();     // work around a weird CUDA NVCC bug where two bar() calls are
    bar();     // required???! (Titan V, CUDA 13.0, WMUL=2)

The second bar() re-aligns the phase for that one reduction.  It is not an
NVCC bug.  shufl_carries_up() survives only because it already takes its
barriers outside the guards -- which is the pattern used here.

Fix: every barrier is now reached by the whole workgroup, with only the work
guarded.  The producer barrier keeps bar(G_W)'s property of being elided when
a sub-workgroup is a single wavefront (#if G_W > WAVEFRONT), so no barrier is
added where there was none.  Note that with ENABLE_BARSYNC the old code was
correct, because bar.sync with a thread count is a genuine partial barrier;
this makes correctness independent of that setting.

Tested on an Intel UHD iGPU (OpenCL 24.35, so OLD_FENCE=1, G_W=64 >
WAVEFRONT=32), -prp 3321937 -fft 256:2:256 -iters 2000 -block 200:

                WMUL=1   WMUL=2 (default)   WMUL=4
    before       OK      OUT_OF_RESOURCES   OUT_OF_RESOURCES
                         (-5) in kCarryFused
    after        OK      OK                 OK

WMUL=1 is the one case where the guards are not divergent, and it is the only
one that worked before.  All passing runs agree on res64 (400:
f8d720194aa2d603, 2000: dd39f676aaf2d94d), so the change is residue-neutral.

The duplicated bar() in updateStats() is left in place; it should be
removable now, but that wants a test on the Titan V where it was added.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/carryfused.cl | 432 +++++++++++++++++++++++++++++++++----------
 1 file changed, 333 insertions(+), 99 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 23c8fa42..19bbd4a6 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -215,8 +215,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) {
@@ -226,6 +224,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -251,12 +269,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -272,6 +293,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -281,11 +312,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -427,8 +453,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -438,6 +462,26 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -455,12 +499,15 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -476,6 +523,16 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -485,11 +542,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -644,8 +696,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -655,6 +705,26 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -673,12 +743,15 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -694,6 +767,16 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     if (gr < H / WMUL) {
@@ -702,11 +785,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -866,8 +944,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -877,6 +953,26 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -895,12 +991,15 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -916,6 +1015,16 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -925,11 +1034,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -1104,8 +1208,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -1115,6 +1217,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -1140,12 +1262,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -1161,6 +1286,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -1170,11 +1305,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -1368,8 +1498,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -1379,6 +1507,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -1396,12 +1544,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(ldsF2, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -1417,6 +1568,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -1426,11 +1587,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -1628,8 +1784,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -1639,6 +1793,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -1656,12 +1830,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -1677,6 +1854,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -1686,11 +1873,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -1882,8 +2064,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) {
@@ -1893,6 +2073,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -1911,12 +2111,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -1932,6 +2135,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -1941,11 +2154,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }
@@ -2170,8 +2378,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
     // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    bar(G_W);
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
     if (lowMe % WAVEFRONT == 0) { 
@@ -2181,6 +2387,26 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
   }
 
+#if OLD_FENCE
+  // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
+  // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
+  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
+#if WMUL == 1
+  if (gr < H) {
+#else
+  if (gr < H / WMUL) {
+#endif
+#if G_W > WAVEFRONT
+    bar();
+#endif
+#if WMUL == 1
+    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#else
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+#endif
+  }
+#endif
+
   // Group zero will be redone when gr == H / WMUL
   if (gr == 0) { return; }
 
@@ -2198,12 +2424,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Shuffle carries up
   shufl_carries_up(lds61, carry, me, lowMe);
 
-  // Wait until our carries are ready
+  // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
+  // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
+#if OLD_FENCE
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  bar();
+#endif
   if (me < G_W) {
 #if OLD_FENCE
-    if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    bar();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
@@ -2219,6 +2448,16 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if HAS_ASM
     __asm("s_setprio 1");
 #endif
+  }
+
+#if !OLD_FENCE
+  // For the last group the carry reading is shifted, so the per-wavefront ready flags are not enough and a
+  // barrier is needed.  gr is uniform but "me < G_W" is not, so the barrier is taken outside that guard and
+  // the shuttle reads resume in a second "me < G_W" block.
+  if (gr >= H / WMUL) { bar(); }
+#endif
+
+  if (me < G_W) {
 
     // Read from the carryShuttle carries produced by the previous WIDTH group.  Rotate carries from the last WIDTH line.
     // The new carry layout lets the AMD compiler generate global_load_dwordx4 instructions.
@@ -2228,11 +2467,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       }
     } else {
 
-#if !OLD_FENCE
-      // For gr==H/WMUL we need the barrier since the carry reading is shifted, thus the per-wavefront trick does not apply.
-      bar();
-#endif
-
       for (i32 i = 0; i < NW; ++i) {
         carry[i] = CSLOAD(&carryShuttlePtr[(gr - 1) * WIDTH + CarryShuttleAccess((me + G_W - 1) % G_W, i) /* ((me!=0) + NW - 1 + i) % NW*/]);
       }

From 475f894a2ccab5a1710e27418b936fb06887e27c Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 11:20:45 -0600
Subject: [PATCH 132/214] Fix missing else that made every "FFT size" -fft spec
 throw

The if-chain in FFTConfig::FFTConfig that dispatches on the number of
':'-separated components is missing an else:

    if (v.size() == 1) {
      *this = {FFTShape::multiSpec(spec).front(), LAST_VARIANT, CARRY_AUTO};
    } if (v.size() == 3) {                  <-- here
      ...
    } else if (v.size() == 4) {
    } else if (v.size() == 5) {
    } else {
      throw "FFT spec";
    }

For a 1-component spec the first if runs and assigns *this correctly, and then
control falls into the second, independent chain: not 3, not 4, not 5, so the
else fires and throws.  The spec is parsed and then immediately thrown away.

That breaks the two -fft forms documented at Args.cpp:141-146:

    - a FFT size: 6.5M
    - a size range: 7M-8M

Before:
    $ prpll -prp 3321937 -fft 256K -iters 10
    Exception "FFT spec"
    $ prpll -prp 3321937 -fft 6.5M -iters 10
    Exception "FFT spec"

After, all documented forms work, and the 3/4/5-component forms are unchanged:

    -fft 256K              FFT: 256K  256:2:256:212
    -fft 6.5M              FFT: 6.50M 1K:13:256:212
    -fft 7M-8M             FFT: 7M    1K:14:256:212
    -fft 256:2:256         FFT: 256K  256:2:256:212
    -fft 256:2:256:212     FFT: 256K  256:2:256:212
    -fft 256:2:256:212:1   FFT: 256K  256:2:256:212:1

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/FFTConfig.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index ee13528a..92f93119 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -237,7 +237,7 @@ FFTConfig::FFTConfig(const string& spec) {
   
   if (v.size() == 1) {
     *this = {FFTShape::multiSpec(spec).front(), LAST_VARIANT, CARRY_AUTO};
-  } if (v.size() == 3) {
+  } else if (v.size() == 3) {
     *this = {FFTShape{fft_type, v[0], v[1], v[2]}, LAST_VARIANT, CARRY_AUTO};
   } else if (v.size() == 4) {
     *this = {FFTShape{fft_type, v[0], v[1], v[2]}, parseInt(v[3]), CARRY_AUTO};

From 6fba41c6089d055178ce9457bd37f0d29b465b50 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 11:26:31 -0600
Subject: [PATCH 133/214] Validate blockSize read from the savefile

blockSize comes out of the savefile, not the command line:

    PRPState const state = loadPRP(*getSaver());
    blockSize = state.blockSize;
    ...
    assert(blockSize > 0 && logStep % blockSize == 0);
    u32 const checkStep = checkStepForErrors(blockSize, nErrors);

-block is validated in Args.cpp:391-393, but that does not cover a value arriving from a
savefile, and the v12/v13 CRC covers the check data rather than the header -- the header is
plain text, so one flipped digit in "block=200" is enough.

Nothing then checks the value.  It reaches writeState() first, and behind that
baseCheckStep(), whose default arm is "assert(false); return 0;" -- and release builds are
compiled with -DNDEBUG, so that assert and the assert above both vanish, leaving checkStep == 0
and "k % checkStep" as a division by zero.

Observed before this change, after editing the newest savefile's "block=200" to "block=300":

    Exception gpu_error: OUT_OF_RESOURCES (-5) ktailMul at src/clwrap.cpp:335 run

i.e. it dies in writeState() before reaching the division by zero.  Either way the run stops,
even though an intact earlier savefile is sitting right there.

loadPRP() already handles a bad savefile by dropping it and retrying with an earlier one when
the residue does not match.  This adds the same treatment for an out-of-range blockSize, checked
before writeState() is given the value, and makes baseCheckStep() throw instead of returning 0.
The accepted set is the one baseCheckStep already knows (200/400/500/1000), so savefiles written
with block=400 keep loading even though -block no longer offers it.

After the change the same corrupted savefile gives:

    EE      2000 on-load: invalid blockSize 300

and the run continues from the previous savefile.  Normal save/resume is unaffected: resuming a
1000-iteration run reaches the same res64 at 2000 as an uninterrupted run
(dd39f676aaf2d94d).

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/Gpu.cpp | 21 +++++++++++++++++++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 473f554d..929e2fdb 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -523,6 +523,13 @@ class IterationTimer {
   }
 };
 
+// The block sizes baseCheckStep() knows about.  blockSize comes from the savefile, so it must be
+// validated on load (see Gpu::loadPRP) -- a bad value here would otherwise produce checkStep == 0
+// in a release build, where the assert below is compiled out, and then "k % checkStep" divides by zero.
+bool isValidBlockSize(u32 blockSize) {
+  return blockSize == 200 || blockSize == 400 || blockSize == 500 || blockSize == 1000;
+}
+
 u32 baseCheckStep(u32 blockSize) {
   switch (blockSize) {
     case 200:  return 40'000;
@@ -530,8 +537,8 @@ u32 baseCheckStep(u32 blockSize) {
     case 500:  return 200'000;
     case 1000: return 1'000'000;
     default:
-      assert(false);
-      return 0;
+      log("Invalid blockSize %u\n", blockSize);
+      throw "invalid blockSize";
   }
 }
 
@@ -2291,6 +2298,16 @@ PRPState Gpu::loadPRP(Saver<PRPState>& saver) {
     }
 
     PRPState state = saver.load();
+
+    // blockSize is read straight out of the savefile, and the v12 CRC covers the check data but not
+    // the header.  Reject an out-of-range value the same way a residue mismatch is rejected, so an
+    // earlier savefile gets a chance, rather than letting it reach baseCheckStep().
+    if (!isValidBlockSize(state.blockSize)) {
+      log("EE %9" PRIu64 " on-load: invalid blockSize %u\n", state.k, state.blockSize);
+      if (!state.k) { break; }
+      continue;
+    }
+
     writeState(state.k, state.check, state.blockSize);
     u64 const res = dataResidue();
 

From f5a43372c0b12a6e66d3b3b93319478d6cff04dd Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 12:02:47 -0600
Subject: [PATCH 134/214] Pass the real workgroup count to updateStats from
 carry()

updateStats' last-group protocol (carryutil.cl:170-176) needs num_blocks to be
the number of workgroups that actually call it:

    u32 old_value = atomic_add(bufROE + 1, 1);
    if (old_value == num_blocks - 1) { bufROE[0] = posROE + 1; bufROE[1] = 0; }

carry() is enqueued with hN / CARRY_LEN work-items and a workgroup of G_W, so

    groups = hN / (CARRY_LEN * G_W) = (WIDTH * BIG_H) / (CARRY_LEN * WIDTH/NW)
           = BIG_HEIGHT * NW / CARRY_LEN

but every call site passed num_blocks = H = BIG_HEIGHT.  Those agree only when
NW == CARRY_LEN.  CARRY_LEN is fixed at 8 (Gpu.cpp:48-50) while nW() returns 8
for widths 512/1024/4096 but 4 for width 256 (FFTConfig.h:45), so WIDTH=256 is
off by a factor of two.

For -fft 256:2:256: hN=131072, CARRY_LEN=8, NW=4, G_W=64, giving 16384/64 = 256
groups while num_blocks was 512.  (carryFused is correct: 32896/128 = 257 groups
less the early-returning group 0 = 256, and it passes H/WMUL = 256.)

Only the ROE / STATS instrumentation is affected; residues are not.  But the
effects are not small:

  - With -carry long the counter reaches num_blocks-1 only every second launch,
    so the device posROE advances at half the host roePos rate and readROE()
    reads back roePos+2 floats of which about half were never written.
  - In a mixed run an unfused launch leaves the shared counter at 256 rather
    than 0, so the next carryFused launch sails past its own reset threshold of
    255 and never resets.  Once out of phase posROE can stall completely.

Since ROE is what decides whether an FFT size is safe for an exponent,
under-reporting it matters.

Measured, -prp 3321937 -iters 1000 -block 200 -roe:

    256:2:256, -carry long   Z=92817  ->  Z=583475
    512:2:256                Z=2741640157 -> Z=2741640157   (unchanged)

The WIDTH=512 case is bit-identical, which is the expected signature: NW == 8 ==
CARRY_LEN there, so the expression is unchanged.  Residues match in every case.

Note: this also rewrites the FFT64 STATS call at carry.cl:48, which is the
3-argument call fixed by the "Fix updateStats() call arity" PR.  Whichever lands
first, the other needs a one-line rebase on that call.  With this change
"-use STATS=4 -carry long" compiles and runs; on master it fails with
"Can't compile carry.cl".

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/carry.cl | 42 ++++++++++++++++++++++++------------------
 1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/src/cl/carry.cl b/src/cl/carry.cl
index a8ba21c1..3c356cae 100644
--- a/src/cl/carry.cl
+++ b/src/cl/carry.cl
@@ -6,6 +6,12 @@
 #include "carryutil.cl"
 #include "weight.cl"
 
+// Number of workgroups this kernel is launched with: it is enqueued with hN / CARRY_LEN work-items
+// and a workgroup of G_W, so hN / (CARRY_LEN * G_W) = BIG_HEIGHT * NW / CARRY_LEN.  updateStats needs
+// this exact count -- passing BIG_HEIGHT is only correct when NW == CARRY_LEN, which fails for WIDTH=256
+// where nW() is 4.  CARRY_LEN divides BIG_HEIGHT since BIG_HEIGHT = MIDDLE * SMALL_HEIGHT.
+#define CARRY_GROUPS    (NW * (BIG_HEIGHT / CARRY_LEN))
+
 #if FFT_TYPE == FFT64
 
 // Carry propagation with optional MUL-3, over CARRY_LEN words.
@@ -42,10 +48,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -101,10 +107,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(F2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -177,10 +183,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF31) in, u32 posROE, P(CarryABM) carryOut, P
 #if ROE
   local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) M31;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -253,10 +259,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(GF61) in, u32 posROE, P(CarryABM) carryOut, P
 #if ROE
   local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) (M61 >> 32);      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -333,10 +339,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -418,10 +424,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -503,10 +509,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -596,10 +602,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, P(u
 #if ROE
   local u32 lds[G_W];
   float fltRoundMax = (float) roundMax / (float) 0x1FFFFFFF;      // For speed, roundoff was computed as 32-bit integer.  Convert to float.
-  updateStats(lds, G_W, H, bufROE, posROE, fltRoundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, fltRoundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 
@@ -697,10 +703,10 @@ KERNEL(G_W) carry(P(Word2) out, CP(T2) in, u32 posROE, P(CarryABM) carryOut, Big
 
 #if ROE
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, roundMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, roundMax);
 #elif (STATS & (1 << (2 + MUL3)))
   local u32 lds[G_W];
-  updateStats(lds, G_W, H, bufROE, posROE, carryMax);
+  updateStats(lds, G_W, CARRY_GROUPS, bufROE, posROE, carryMax);
 #endif
 }
 

From ad2bf1b2607e2c5d95226658ead1c5c5df055329 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 12:27:26 -0600
Subject: [PATCH 135/214] Fix three inaccurate comments/messages

No functional change.

tailutil.cl:26 -- the default-value comment contradicts the table three lines
above it.  The table says "2 = double wide, single kernel", and
SINGLE_KERNEL ((TAIL_KERNELS & 1) == 0) is indeed true for 2, matching the host
default at Gpu.cpp:253 ("Default tailSquare is double-wide in one kernel").  The
comment said "with two kernels".  This is the spot a reader checks when
confirming the host and kernel defaults agree, so it is worth being right.

FFTConfig.cpp:225 -- the check is "m < 2 || m > 16" but the message told the
user "Middle must be between 1 and 16", i.e. it names a value the code rejects.
Anyone typing -fft 256:1:256 is told 1 is in range.

Primes.h:9 -- "prims" -> "primes".  (The 10 billion claim itself is right:
bitset<50000> covers odd numbers to 100001, and 100001^2 is just over 1e10.)

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/FFTConfig.cpp  | 2 +-
 src/Primes.h       | 2 +-
 src/cl/tailutil.cl | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index ee13528a..8c316c69 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -222,7 +222,7 @@ FFTConfig::FFTConfig(const string& spec) {
       throw "Invalid FFT spec";
     }
     if (m < 2 || m > 16) {
-      log("Middle must be between 1 and 16.\n");
+      log("Middle must be between 2 and 16.\n");
       throw "Invalid FFT spec";
     }
     if (h != 256 && h != 512 && h != 1024) {
diff --git a/src/Primes.h b/src/Primes.h
index b5dbd4e4..aee511f4 100644
--- a/src/Primes.h
+++ b/src/Primes.h
@@ -6,7 +6,7 @@
 #include "common.h"
 
 class Primes {
-  std::bitset<50000> sieve;           // Allows for testing prims up to 10 billion
+  std::bitset<50000> sieve;           // Allows for testing primes up to 10 billion
   [[nodiscard]] bool isPrimeOdd(u64 n) const;
 
 public:
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index da79b6f7..f5d9fe51 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -23,7 +23,7 @@
 //      2 = double wide, single kernel
 //      3 = double wide, two kernels
 #if !defined(TAIL_KERNELS)
-#define TAIL_KERNELS    2                         // Default is double-wide tailSquare with two kernels
+#define TAIL_KERNELS    2                         // Default is double-wide tailSquare with a single kernel
 #endif
 #define SINGLE_WIDE    (TAIL_KERNELS < 2)         // Old single-wide tailSquare vs. new double-wide tailSquare
 #define SINGLE_KERNEL  ((TAIL_KERNELS & 1) == 0)  // TailSquare uses a single kernel vs. two kernels

From 70d6e7989ed21d3639426dfa08de50f2860fa4ff Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 14:04:47 -0600
Subject: [PATCH 136/214] Do not truncate the worktodo exponent to 32 bits

Both worktodo parse paths read the exponent as u64 and then narrow it when
building the Task, whose "exponent" field is itself u64:

    u64 exp{};
    from_chars(s.c_str(), end, exp, 10);
    ...
    return {{.kind=isPRP ? Task::PRP : Task::LL, .exponent=u32(exp), ...}};   // :67
    return {{.kind=Task::CERT,                   .exponent=u32(exp), ...}};   // :87

So a worktodo.txt entry of 2^32 or more is silently tested as exp mod 2^32 --
a different exponent entirely, with no warning, and the result would be
reported against the original assignment ID.

With worktodo-0.txt containing

    PRP=N/A,1,2,4300000019,-1

before:

    20260913 14:04:04 5032723 No FFTs found in tune.txt that can handle 5032723.
    20260913 14:04:04 5032723 FFT: 256K 2:256:2:256:101 (19.20 bpw)

(4300000019 - 2^32 = 5032723), and after:

    20260913 14:04:20 Warning: Exponent 4300000019 is not prime.  Using exponent 4300000013 instead.
    20260913 14:04:20 4300000013 No FFTs found in tune.txt that can handle 4300000013.

The command-line paths were already fine: Args::prpExp / llExp are u64 and
Worktodo::getTask passes them through unnarrowed, so "-prp 4300000019" always
kept the full value.  This makes worktodo.txt agree with them.

No exponent that large is in circulation today, so this changes nothing for
current work; it removes one of the remaining obstacles noted in 981c442
("Changed exponent from u32 to u64.  Exponents over 2^32-1 don't work yet --
debugging is needed").

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/Worktodo.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 0fd025dd..44a5b075 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -65,7 +65,7 @@ std::optional<Task> parse(const std::string& line) {
     u64 exp{};
     auto [ptr, _] = from_chars(s.c_str(), end, exp, 10);
     if (ptr != end) { exp = 0; }
-    if (exp > 1000) { return {{.kind=isPRP ? Task::PRP : Task::LL, .exponent=u32(exp), .AID=AID, .line=line, .squarings=0}}; }
+    if (exp > 1000) { return {{.kind=isPRP ? Task::PRP : Task::LL, .exponent=exp, .AID=AID, .line=line, .squarings=0}}; }
   }
   if (isCERT) {
     vector<string> parts = split(topParts.back(), ',');
@@ -84,7 +84,7 @@ std::optional<Task> parse(const std::string& line) {
 	u64 squarings{0};
 	from_chars(s.c_str(), end, squarings, 10);
 //printf ("Exec cert %d %d \n", (int) exp, (int) squarings);
-	if (exp > 1000 && squarings > 100) { return {{.kind=Task::CERT, .exponent=u32(exp), .AID=AID, .line=line, .squarings=u32(squarings) }}; }
+	if (exp > 1000 && squarings > 100) { return {{.kind=Task::CERT, .exponent=exp, .AID=AID, .line=line, .squarings=u32(squarings) }}; }
       }
     }
   }

From 43da00df498279fe8ceff930cf2dca00e0130133 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 14:18:36 -0600
Subject: [PATCH 137/214] Fix LDS write index in shufl's padded "second RADIX
 == 4" case

With LDSPAD and SHUFL_BYTES == 16 and RADIX == 4, the f == 4 / r == 4 case
writes to

    lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)]

but reads back from

    lds[i * 16 + (lowMe / 16) * (WG + 4) + (lowMe & 15)]

The read treats the buffer as RADIX == 4 rows of stride WG + 4, selecting the
row with lowMe / 16.  The write treats it as WG / 4 == 16 rows, selecting the
row with lowMe / 4.  The two disagree, and since fftbase.cl allocates
(WG * RADIX + 12) * SHUFL_BYTES -- i.e. 4 rows of 64 plus 3 pads of 4, 268 T2
entries for WG == 64 -- the write runs off the end:

    write index range 0..1035, LDS holds 268
    192 of 256 writes out of bounds (every thread with lowMe >= 16)
    192 of 256 outputs therefore wrong

It looks like this was adapted from the LDSSWIZ version just below, which is

    lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)]

by substituting WG + 4 for the 16.  But the 16 there is an offset *within* a
64-entry row, not a row stride, so the substitution needs to keep it and mask
the row index -- exactly the shape the padded "first RADIX == 4" case above
already uses, ((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + ...

Solving for the write that makes the existing read reproduce the permutation of
the generic (non-LDSPAD, non-LDSSWIZ) path gives

    ((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)

which is in range 0..267, uses all 256 slots exactly once, and matches the
generic permutation element for element.  RADIX == 4 implies WG == 64 here
(nW()/nH() return 4 only for 256), so the 16 is well defined, as it already is
in the read on the next line.

Verified with -prp 2500009 -iters 400 -block 200, where every configuration
must agree on res64 4de1f30100dd0b52:

                                              before              after
  -fft 256:2:256 -use SHUFL_BYTES_W=16   Error on load    OK 4de1f30100dd0b52
  -fft 512:2:256 -use SHUFL_BYTES_H=16   Error on load    OK 4de1f30100dd0b52
  -fft 512:2:256 -use SHUFL_BYTES_W=16   OK (RADIX 8)     OK 4de1f30100dd0b52
  -fft 256:2:256 -use SHUFL_BYTES_W=8    OK (other path)  OK 4de1f30100dd0b52

Nothing selects SHUFL_BYTES 16 by default (SHUFL_BYTES_W/H default to 8 and
-tune does not sweep them), so this only affects hand tuning -- but it made a
tunable silently produce wrong residues.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/shufl.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index be977fb0..0bb6446a 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -86,7 +86,7 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Pad 4 values after every row to eliminate bank conflicts.
     if (f == 4 && r == 4 && RADIX == 4) {
       bar(WG);
-      for (u32 i = 0; i < RADIX; ++i) { lds[lowMe / 4 * (WG + 4) + i * 4 + (lowMe & 3)] = u[i]; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
       bar(WG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }

From 33a0296f771c43f693d5bd7260527eef182fc0c1 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 13 Sep 2026 14:30:59 -0600
Subject: [PATCH 138/214] Give short runs durable checkpoints

A verified savefile is only written when k % checkStep == 0; every other check
writes the single rolling "<exp>-unverified.prp" instead.  checkStep is
1,000,000 for the default blockSize of 1000 (200,000 for 500, 40,000 for 200),
so for any exponent smaller than checkStep that condition is never met and the
only durable savefile is the one from the very first check at k = 2 * blockSize.
A single error then costs the entire run.

Observed on -prp 800000 (adjusted to the prime 799999).  On master the run
reached its final check, failed it, found the unverified savefile also failed
its on-load residue check, dropped it, and restarted from k = 2000 --
discarding ~23 minutes of completed work.  It then did the same again later:

  CC   799999 / 799999, 9ac70251f686c8e2      <- test complete
  EE   800000 a68faf2364746c6e   1 errors     <- final check failed
  EE   780000 on-load: ec71c146b18a3fb8 vs. 8ac7da19aff25069
  Removing bad savefile '.../799999-unverified.prp'
  OK     2000 on-load: blockSize 1000         <- back to the start

With this change checkStep becomes 80000 for that exponent, so verified
savefiles exist at 80000 and 160000, and the same failure recovers to the
previous checkpoint instead of the beginning:

  OK    80000 ...
  OK   160000 ...
  EE   240000 ...   1 errors
  EE   220000 on-load: ...
  OK   162000 on-load: blockSize 1000         <- resumed from the 160000 savefile

Staying on a multiple of logStep keeps both invariants asserted here
(checkStep % logStep == 0, checkStep % blockSize == 0), since logStep %
blockSize == 0 is asserted just above.  Production runs are unaffected:
checkStep > E / 8 is false once E exceeds 8 * checkStep, i.e. 8M for the
default blockSize, so normal work keeps the current cadence.

Found by an AI code audit (Claude).

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/Gpu.cpp | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 473f554d..508ce3a3 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2558,8 +2558,20 @@ PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
 
   assert(blockSize > 0 && logStep % blockSize == 0);
 
-  u32 const checkStep = checkStepForErrors(blockSize, nErrors);
+  u32 checkStep = checkStepForErrors(blockSize, nErrors);
+
+  // A verified savefile is only written when k % checkStep == 0; every other check writes the single
+  // rolling "unverified" savefile instead.  When checkStep exceeds the exponent that condition is
+  // never met, so the only durable savefile is the one from the very first check at k = 2 * blockSize
+  // and one error costs the whole run.  Scale the step down so a short run still gets several
+  // checkpoints.  Staying on a multiple of logStep preserves both invariants asserted here, because
+  // logStep % blockSize == 0 was asserted just above.
+  if (checkStep > E / 8) {
+    checkStep = std::max(logStep, u32(std::min<u64>(checkStep, E / 8) / logStep) * logStep);
+  }
+
   assert(checkStep % logStep == 0);
+  assert(checkStep % blockSize == 0);
 
   u32 const power = getProofPower(k);
   

From f50dc0b9a5ecb9ead50b9b40a256f248d591cbac Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Mon, 14 Sep 2026 07:08:41 -0600
Subject: [PATCH 139/214] Fix carryB silently dropping a carry that escapes its
 group

carryB applies the predecessor group's carry-out and ripples it through its
CARRY_LEN word pairs using carryWord(), which renormalizes both words of every
pair via carryStep().  carryB has no carry-out buffer and there is no second
pass, so a carry that is still non-zero after the last word of the group is
discarded, leaving the first word of the next group off by one ulp.

The fused carry path does not have this problem because it ends its chain with
carryFinal(), which adds the carry out of the low word into the high word as
"u.y += tmpCarry", i.e. without renormalizing.  An un-normalized word holds the
same value and is normalized on the next iteration.  Do the same on the last
word pair of carryB's group, in place of the final carryStep, so that nothing
can escape.

Reproduced with -prp 800000 -fft 256:2:256 -block 1000 -use WMUL=1 (3.05
bits/word), where the Gerbicz-Li check correctly reports a mismatch.  The
squaring producing iteration 178534 differs from exact CPU arithmetic by
exactly 2^156153 -- a single bit, in FFT word 51168, which is the first word of
a carry group.  The eleven words preceding it are all at the extreme of
balanced range, which is exactly the condition under which a +/-1 carry
survives carryStep instead of being absorbed, so the carry rode out of the
group and was dropped.

The reachable range is roughly 3 to 10 bits/word.  Once the carry is down to
+/-1, each further word keeps it alive with probability 2^-nBits, so escaping a
CARRY_LEN=8 (16-word) group takes about eleven consecutive extremal words.  At
3 bits/word that is ~2^-33 per group crossing, which over 16384 groups and
178534 iterations gives an expected count near 1, matching the observation.
Above ~10 bits/word the same estimate drops below 2^-100.  bitsPerWord < 10 is
also where Gpu.cpp forces useLongCarry, i.e. precisely where the unfused
carryA/carryB path is selected.

CARRY_LEN is a compile-time constant, so the added test folds away in all but
the last unrolled iteration.

Found and fixed by Claude Opus 5 (Anthropic's Claude Code), working with Mark
Rose.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/cl/carryb.cl | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/cl/carryb.cl b/src/cl/carryb.cl
index ae9da09c..c675267a 100644
--- a/src/cl/carryb.cl
+++ b/src/cl/carryb.cl
@@ -32,6 +32,18 @@ KERNEL(G_W) carryB(P(Word2) io, CP(CarryABM) carryIn) {
     u32 p = i * WIDTH + me;
     bool biglit0 = frac_bits + (2*i) * FRAC_BPW_HI <= FRAC_BPW_HI;
     bool biglit1 = frac_bits + (2*i) * FRAC_BPW_HI >= -FRAC_BPW_HI;   // Same as frac_bits + (2*i) * FRAC_BPW_HI + FRAC_BPW_HI <= FRAC_BPW_HI;
+    // carryB has no carry-out: a carry leaving the last word of this group would be dropped, silently
+    // losing 1 ulp at the first word of the next group.  On the last word pair, add the carry into the
+    // high word without normalizing it -- as carryFinal does at the end of the fused carry chain -- so
+    // that nothing can escape the group.  An un-normalized word holds the same value and is normalized
+    // by the next iteration.
+    if (i == CARRY_LEN - 1) {
+      Word2 a = io[p];
+      a.x = carryStep(a.x + carry, &carry, biglit0);
+      a.y += carry;
+      io[p] = a;
+      return;
+    }
     io[p] = carryWord(io[p], &carry, biglit0, biglit1);
     if (!carry) { return; }
   }

From 758ed28cadaa43199004d0c4638ab1d1eb06185c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 00:39:54 +0000
Subject: [PATCH 140/214] Tidied up AI change to bar() bug in carryFused.  As
 suggested, duplicate bar removed from carryutil.

---
 src/cl/carryfused.cl | 90 +++++++++-----------------------------------
 src/cl/carryutil.cl  |  5 +--
 2 files changed, 19 insertions(+), 76 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 19bbd4a6..ae1df813 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -227,15 +227,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -465,15 +459,9 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -708,15 +696,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -956,15 +938,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -1220,15 +1196,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -1510,15 +1480,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -1796,15 +1760,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -2076,15 +2034,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
@@ -2390,15 +2342,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #if OLD_FENCE
   // Order the carry stores ahead of the ready flag.  This barrier must be reached by every work-item of the
   // workgroup: gr is uniform, but "me >= (WMUL-1) * G_W" is not, and a barrier under divergent control flow
-  // is undefined.  As in bar(G_W), no barrier is needed when a sub-workgroup is a single wavefront.
-#if WMUL == 1
-  if (gr < H) {
-#else
+  // is undefined.  No barrier is needed when a sub-workgroup is a single wavefront.
   if (gr < H / WMUL) {
-#endif
-#if G_W > WAVEFRONT
-    bar();
-#endif
+    bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
 #else
diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index b92c7ead..4a63583d 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -147,10 +147,7 @@ void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *b
     // Write roundMax for high half of threads to local memory.  Ignore threads not participating in the reduction.
     if (num_threads > WAVEFRONT) bar();
     if (me >= num_threads / 2 && me < num_threads) lds[me - num_threads / 2] = u32RoundMax;
-    if (num_threads > WAVEFRONT) {
-      bar();                             // work around a weird CUDA NVCC bug where two bar() calls are required???! (Titan V, CUDA 13.0, WMUL=2)
-      bar();
-    }
+    if (num_threads > WAVEFRONT) bar();
     // Low half of threads do a max
     if (me < num_threads / 2) {
       u32 highHalfMax = lds[me];

From 436bdb4802d04cdf00b60e27f1469986e796a7c1 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 04:20:03 +0000
Subject: [PATCH 141/214] Got OLD_FENCE=0 working on nVidia.  Not faster on
 TitanV.  Added sync() and two flavors of barsync (learned during
 investigation of sharing LDS access).

---
 src/cl/base.cl | 51 ++++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 47 insertions(+), 4 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 4cf747e1..ab81f2d9 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -766,6 +766,24 @@ void PREFETCHL2(const __global void *addr) {
 #endif
 #endif
 
+// Default settings for USE_REGISTER_BARSYNC.  OpenCL on nVidia has compiler issues when USE_REGISTER_BARSYNC=0.  Annoying, as register bar.sync is slower in many cases.
+#ifndef USE_REGISTER_BARSYNC
+#if CUDA_BACKEND
+#define USE_REGISTER_BARSYNC 0
+#else
+#define USE_REGISTER_BARSYNC 1
+#endif
+#endif
+
+// Force divergent threads in a warp to converge.  Early CUDA versions did not require this.  Later versions lets the compiler choose to converge or not.
+// I've not seen any cases where the compiler does not converge when we'd like it to, but just in case this routine will fix the problem.
+void OVERLOAD sync() {
+#if ENABLE_SYNC && HAS_PTX >= 600         // bar.warp.sync requires sm_60 support or higher
+  __asm("bar.warp.sync 0xffffffff;" : : );
+#endif
+}
+
+// Create a barrier across all threads.
 void OVERLOAD bar(void) {
   // barrier(CLK_LOCAL_MEM_FENCE) is correct, but it turns out that on some GPUs
   // (in particular on Radeon VII and Radeon PRO VII) barrier(0) works as well and is faster.
@@ -777,14 +795,39 @@ void OVERLOAD bar(void) {
 #endif
 }
 
+// Create a barrier across a subset of threads OR across all threads if that is faster.
 void OVERLOAD bar(const u32 WG) {
-  if (WG > WAVEFRONT) {
+  if (WG <= WAVEFRONT) return;
 #if ENABLE_BARSYNC && HAS_PTX >= 200         // bar.sync with thread count requires sm_20 support or higher.  Slower on TitanV, need to try on later nVidia GPUs.
-    __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
+  __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
+// The above is GROSSLY slow on an RTX 5070Ti.  The code below is much faster (may need to be expanded to handle more than four named barriers).
+// WARNING, WARNING, WARNING: On TitanV using CUDA 12.9 tools and driver 580, similar code in LDSbar does not work in openCL (but works in CUDA build).
+//    if (get_local_id(0) / WG + 1 == 1) __asm("bar.sync 1, %0;" : : "n"(WG));
+//    else if (get_local_id(0) / WG + 1 == 2) __asm("bar.sync 2, %0;" : : "n"(WG));
+//    else if (get_local_id(0) / WG + 1 == 2) __asm("bar.sync 3, %0;" : : "n"(WG));
+//    else __asm("bar.sync 4, %0;" : : "n"(WG));
 #else
-    bar();
-#endif
+  bar();
+#endif
+}
+
+// Create a barrier across a subset of threads.  Substituting a barrier on all threads is not permitted.
+void OVERLOAD barsync(const u32 numWG, const u32 WG) {
+  if (WG <= WAVEFRONT) return;
+#if HAS_PTX >= 200         // bar.sync with thread count requires sm_20 support or higher.
+#if USE_REGISTER_BARSYNC   // bar.sync with a register is horribly slow on an RTX 5070Ti.
+  __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
+#else                      // WARNING, WARNING, WARNING: On TitanV using CUDA 12.9 tools and driver 580, this branch does not work in openCL (but works in CUDA build).
+  for (u32 i = 1; i <= numWG; i++) {
+    if (i == get_local_id(0) / WG + 1) {
+      __asm("bar.sync %0, %1;" : : "n"(i), "n"(WG));
+      break;
+    }
   }
+#endif
+#else
+  #error - GPU not capable of barrier on a subset of threads
+#endif
 }
 
 // nVidia GPUs (Hopper architecture sm 9.0 and later) support Programatic Dependent Launch where the tail end execution of one kernel can overlap

From 0a87aec356212fc063613733c59a93630a200a43 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 04:22:45 +0000
Subject: [PATCH 142/214] Oops, forgot to commit this file with OLD_FENCE fix.

---
 src/cl/carryfused.cl | 158 +++++++++++++++++++++++++++++--------------
 1 file changed, 106 insertions(+), 52 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index ae1df813..c8097fb5 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -212,15 +212,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -232,8 +231,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -267,7 +268,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -275,14 +276,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -315,6 +320,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -444,15 +450,14 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) { 
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -464,8 +469,10 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -491,7 +498,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -499,14 +506,18 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -539,6 +550,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -681,15 +693,14 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -701,8 +712,10 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -729,7 +742,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -737,14 +750,18 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -776,6 +793,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -923,15 +941,14 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -943,8 +960,10 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -971,7 +990,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -979,14 +998,18 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1019,6 +1042,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -1180,16 +1204,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #endif
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
-  // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
+    // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -1201,8 +1224,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -1236,7 +1261,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1244,14 +1269,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1284,6 +1313,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -1465,15 +1495,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -1485,8 +1514,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -1512,7 +1543,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1520,14 +1551,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1560,6 +1595,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -1745,15 +1781,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -1765,8 +1800,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -1792,7 +1829,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1800,14 +1837,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1840,6 +1881,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -2019,15 +2061,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -2039,8 +2080,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -2067,7 +2110,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -2075,14 +2118,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -2115,6 +2162,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 
@@ -2327,15 +2375,14 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     for (i32 i = 0; i < NW; ++i) { CSSTORE(&carryShuttlePtr[gr * WIDTH + CarryShuttleAccess(lowMe, i)], carry[i]); }
 
     // Tell next group that its carries are ready
-#if OLD_FENCE
-    // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
-    write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-#else
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
-    if (lowMe % WAVEFRONT == 0) { 
+#if !OLD_FENCE
+    barsync(WMUL, G_W);
+    if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
+    sync();
 #endif
   }
 
@@ -2347,8 +2394,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    sync();
 #endif
   }
 #endif
@@ -2374,7 +2423,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  // work_group_barrier(CLK_GLOBAL_MEM_FENCE, memory_scope_device);
+  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -2382,14 +2431,18 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
+    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
+    sync();
+    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
+    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -2422,6 +2475,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
+      sync();
     }
   }
 

From 088dd8d9fe811377d4957b8036988e713f2d11b6 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 06:53:44 +0000
Subject: [PATCH 143/214] Undid OLD_FENCE using barsync fix for nVidia.  The
 !OLD_FENCE code is for eace WAVEFRONT to have its own flag. barsync operates
 per-WG, not per-WAVEFRONT, so the proposed "fix" broke AMD WIDTH>=1024.

---
 src/cl/carryfused.cl | 18 ------------------
 1 file changed, 18 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index c8097fb5..f7869fff 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -214,7 +214,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -283,7 +282,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -452,7 +450,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) { 
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -513,7 +510,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -695,7 +691,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -757,7 +752,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -943,7 +937,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -1005,7 +998,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -1207,7 +1199,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -1276,7 +1267,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -1497,7 +1487,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -1558,7 +1547,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -1783,7 +1771,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -1844,7 +1831,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -2063,7 +2049,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -2125,7 +2110,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
@@ -2377,7 +2361,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
-    barsync(WMUL, G_W);
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
@@ -2438,7 +2421,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    barsync(WMUL, G_W);
     mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;

From 3dd7c5ddf94457e799dd50bf36f3ffcebbd6bfbc Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 08:07:03 +0000
Subject: [PATCH 144/214] Claude-inspired fix for the nVidia OLD_FENCE=0 bug.
 Removed spurious sync() calls.

---
 src/cl/base.cl       |  7 ++--
 src/cl/carryfused.cl | 90 +++++++++-----------------------------------
 2 files changed, 22 insertions(+), 75 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index ab81f2d9..a85341af 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -775,10 +775,11 @@ void PREFETCHL2(const __global void *addr) {
 #endif
 #endif
 
-// Force divergent threads in a warp to converge.  Early CUDA versions did not require this.  Later versions lets the compiler choose to converge or not.
-// I've not seen any cases where the compiler does not converge when we'd like it to, but just in case this routine will fix the problem.
+// Force divergent threads in a warp to converge.  AMD GCN does not require this, all threads in a WAVEFRONT operate in lockstep.  Early CUDA versions did also.
+// The sync is needed in cases where one thread is setting a flag or state on behalf of all the threads in a WAVEFRONT.  For example, carryFused has thread 0 set
+// the carries-are-ready flag on behalf of all 32 threads in a warp.
 void OVERLOAD sync() {
-#if ENABLE_SYNC && HAS_PTX >= 600         // bar.warp.sync requires sm_60 support or higher
+#if HAS_PTX >= 600         // bar.warp.sync requires sm_60 support or higher
   __asm("bar.warp.sync 0xffffffff;" : : );
 #endif
 }
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index f7869fff..c9bc907d 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -214,11 +214,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -230,10 +230,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -267,7 +265,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -275,17 +272,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -318,7 +313,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -450,11 +444,11 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) { 
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -466,10 +460,8 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -495,7 +487,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -503,17 +494,15 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -546,7 +535,6 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -691,11 +679,11 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -707,10 +695,8 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -737,7 +723,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -745,17 +730,15 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -787,7 +770,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -937,11 +919,11 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -953,10 +935,8 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -983,7 +963,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -991,17 +970,15 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1034,7 +1011,6 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -1199,11 +1175,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -1215,10 +1191,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -1252,7 +1226,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1260,17 +1233,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1303,7 +1274,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -1487,11 +1457,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -1503,10 +1473,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -1532,7 +1500,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1540,17 +1507,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1583,7 +1548,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -1771,11 +1735,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -1787,10 +1751,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -1816,7 +1778,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -1824,17 +1785,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -1867,7 +1826,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -2049,11 +2007,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -2065,10 +2023,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -2095,7 +2051,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -2103,17 +2058,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -2146,7 +2099,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 
@@ -2361,11 +2313,11 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     // Tell next group that its carries are ready
     write_mem_fence(CLK_GLOBAL_MEM_FENCE);
 #if !OLD_FENCE
+    sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
       atomic_store((atomic_uint *) &ready[pos], 1);
     }
-    sync();
 #endif
   }
 
@@ -2377,10 +2329,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     bar(G_W);
 #if WMUL == 1
     if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #else
     if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
-    sync();
 #endif
   }
 #endif
@@ -2406,7 +2356,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
   if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
-  sync();
   bar();
 #endif
   if (me < G_W) {
@@ -2414,17 +2363,15 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me == 0) ready[gr - 1] = 0;
-    sync();
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
       do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
-    mem_fence(CLK_GLOBAL_MEM_FENCE);
+    read_mem_fence(CLK_GLOBAL_MEM_FENCE);
     // Clear carry ready flag for next iteration
     if (me % WAVEFRONT == 0) ready[(gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT] = 0;
-    sync();
 #endif
 #if HAS_ASM
     __asm("s_setprio 1");
@@ -2457,7 +2404,6 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
         for (i32 i = NW-1; i; --i) { carry[i] = carry[i-1]; }
         carry[0] = carry[NW];
       }
-      sync();
     }
   }
 

From 00b3935540d926786db7b93dcb2d6437a2c0bf93 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 145/214] Args: make -version print the version
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

`-version` was accepted and threw "version" without printing anything —
the log() call it once made is commented out, so the command line

    prpll -version

exited with `Exiting because "version"` / `Bye` and no version. A launcher
that records which build wrote a result (Task.cpp reports VERSION to
PrimeNet in every result line) has nothing to read but the banner of a
full start.

Print the version to stdout, one plain line, without the log timestamp
prefix and without the leading "v" (the same shape Task.cpp reports), then
exit as before. Args.cpp gains the version.h include the commented call
was missing.

Reproduce: build, run `./prpll -version`; before: no version line; after:
`8.0-57-g6cb4c12` (or the short SHA of a build without a v/prpll/* tag).
---
 src/Args.cpp | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 179bbd83..d4744d68 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -5,9 +5,11 @@
 #include "clwrap.h"
 #include "gpuid.h"
 #include "Proof.h"
+#include "version.h"
 
 #include <vector>
 #include <string>
+#include <cstdio>
 #include <cstring>
 #include <cassert>
 #include <cstdlib>
@@ -286,7 +288,11 @@ void Args::parse(const string& line) {
       printHelp();
       throw "help";
     } if (key == "-version") {
-      // log("PRPLL %s\n", VERSION);
+      // Plain stdout, no log prefix: the flag exists for scripts and launchers
+      // that record which build wrote a result (Task.cpp reports VERSION to
+      // PrimeNet), so the one line must be the version and nothing else.
+      printf("%s\n", (VERSION[0] == 'v') ? VERSION + 1 : VERSION);
+      fflush(stdout);
       throw "version";
     } if (key == "-info") {
       if (s.empty()) {

From a8cc8b531b721c2c9afd3e2e2b6fa6c16f844966 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 146/214] CUDA shim: fill buffers with 8-byte (and other
 word-multiple) patterns correctly
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

clEnqueueFillBuffer in the CUDA shim handled 1- and 4-byte patterns and
ZERO-FILLED everything else, with a comment that the common case is a
zero fill. It is — Buffer<double>::zero() is the bulk of the calls — but
not the only one: Word is i64 (common.h), so Buffer<Word>::set(1), which
Gpu::exponentiate() uses for exp == 0, asks for an 8-byte pattern of 1 and
got a buffer of zeros under CUDA. The OpenCL path fills correctly.

Fill an 8-byte pattern (and any pattern of N 32-bit words over a whole
number of slots) with one strided cuMemsetD2D32Async per word: pitch = the
pattern size, width = one element, height = the slot count — two driver
calls for a double/i64 pattern, no host-side pattern buffer, no extra
copy. 2-byte patterns take cuMemsetD16Async. A pattern the contract has no
memset for returns CL_INVALID_VALUE instead of writing zeros.

Reproduce (CUDA build): a Buffer<i64> of 8 words, set(1), read back —
before: all zero; after: 1, 0, 0, …. Or -tune / a P-1 stage that reaches
exponentiate(_, 0).
---
 src/cuda/clwrap_cuda.cpp | 23 +++++++++++++++++++++--
 1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 77aef8cb..01b74e25 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -855,13 +855,32 @@ int clEnqueueFillBuffer(cl_command_queue q, cl_mem buf, const void* pattern,
     unsigned char val;
     memcpy(&val, pattern, 1);
     r = cuMemsetD8Async(buf->ptr + offset, val, size, q->stream);
+  } else if (patternSize == 2) {
+    unsigned short val;
+    memcpy(&val, pattern, 2);
+    r = cuMemsetD16Async(buf->ptr + offset, val, size / 2, q->stream);
   } else if (patternSize == 4) {
     unsigned int val;
     memcpy(&val, pattern, 4);
     r = cuMemsetD32Async(buf->ptr + offset, val, size / 4, q->stream);
+  } else if (patternSize % 4 == 0 && size % patternSize == 0) {
+    // A pattern of N 32-bit words (Buffer<i64>/<u64>/<double>: N == 2): one
+    // strided memset per word writes word i of every pattern-sized slot —
+    // pitch = the pattern, width = one element, height = the slot count.
+    // Two driver calls instead of a host-side pattern buffer and a copy.
+    r = CUDA_SUCCESS;
+    size_t const slots = size / patternSize;
+    for (size_t i = 0; i < patternSize / 4 && r == CUDA_SUCCESS; ++i) {
+      unsigned int word;
+      memcpy(&word, static_cast<const unsigned char*>(pattern) + 4 * i, 4);
+      r = cuMemsetD2D32Async(buf->ptr + offset + 4 * i, patternSize, word, 1, slots, q->stream);
+    }
   } else {
-    // For other pattern sizes, fall back to memset 0 (common case is zero-fill)
-    r = cuMemsetD8Async(buf->ptr + offset, 0, size, q->stream);
+    // Neither a memset width nor a whole number of word-multiple slots: the
+    // OpenCL contract has no answer here, and a silent zero-fill (the old
+    // fallback) would hand the caller data it did not ask for.
+    if (event) *event = nullptr;
+    return CL_INVALID_VALUE;
   }
   if (event) *event = nullptr;
   return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;

From 8b955255603064e077b89c0500ffeb5002e8ba44 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 147/214] main: exit 1 on an unhandled exception, 0 on a normal
 end
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

main() returned 0 on every path — the queue running dry, a SIGINT stop,
-h, and every exception it caught: a kernel the driver refused to compile
("Can't compile transpose.cl"), "No device", a bad argument. A supervisor
that restarts PRPLL had no way to tell "nothing to do" from "cannot run"
except by parsing the log: with an assignment queued and exit 0 it would
either treat a broken install as idle and respawn it forever, or treat
every clean exit as a crash.

Return 0 for the ends a run reaches on purpose — the queue ran dry, "stop
requested", "help", "version" — and 1 for any other exception main()
catches. The log lines are unchanged.

Reproduce: run with an assignment queued on a machine whose driver
rejects the kernels (or `-device 99`); before: exit status 0; after: 1.
`./prpll -h` and a SIGINT stop still exit 0.
---
 src/main.cpp | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/src/main.cpp b/src/main.cpp
index c19294b8..becccf9b 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -16,6 +16,7 @@
 #include "Gpu.h"
 #include "tune.h"
 
+#include <cstring>
 #include <filesystem>
 #include <thread>
 #include <utility>
@@ -45,6 +46,12 @@ static void gpuWorker(GpuCommon shared, i32 instance) {
 extern int putenv(char *);
 #endif
 
+// The exceptions that end a run on purpose: the user's stop, and the two
+// flags that only print. Everything else thrown to main() is a failure.
+static bool isCleanExit(const char *reason) {
+  return !strcmp(reason, "stop requested") || !strcmp(reason, "help") || !strcmp(reason, "version");
+}
+
 int main(int argc, char **argv) {
 //!MSVC version support
 #ifdef _MSC_VER
@@ -62,7 +69,11 @@ int main(int argc, char **argv) {
   setenv("ROC_SIGNAL_POOL_SIZE", "32", 0);
 #endif
 
-  int const exitCode = 0;
+  // 0 for a normal end — the queue ran dry, a stop was requested, -h or
+  // -version — and 1 for an exception nobody else classified (a kernel that
+  // would not compile, a missing device, a bad argument), so a supervisor
+  // can tell "out of work" from "cannot run" without parsing the log.
+  int exitCode = 0;
 
   try {
     string const mainLine = Args::mergeArgs(argc, argv);
@@ -129,10 +140,12 @@ int main(int argc, char **argv) {
     }
   } catch (const char *mes) {
     log("Exiting because \"%s\"\n", mes);
+    exitCode = isCleanExit(mes) ? 0 : 1;
   } catch (const string& mes) {
     log("Exiting because \"%s\"\n", mes.c_str());
+    exitCode = isCleanExit(mes.c_str()) ? 0 : 1;
   }
 
   log("Bye\n");
-  return exitCode; // not used yet.
+  return exitCode;
 }

From 2ba2368f5c5ca9d4c7d02c6186f8f52ff78497b3 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 148/214] Signal: stop gracefully on SIGTERM and on a "stop"
 file in the run directory
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signal.cpp installs a handler for SIGINT only. SIGTERM — what systemd,
supervisors and `kill` send first — ends the process at once, forfeiting
the work since the last savefile (up to logStep = 20,000 iterations), when
the same request as SIGINT would have finished the block, run the Gerbicz
check and written a savefile a few seconds later. On Windows no console
signal reaches a hidden child at all, so a launcher has only
TerminateProcess, with the same loss.

Handle SIGTERM like SIGINT, and let Signal::stopRequested() also honor a
file named "stop" in the run directory (the current directory after
-dir): seen at the next block boundary like a signal, removed once seen so
the next start is not a stop, logged when it fires. The check is one
exists() per stopRequested() call — once per 1000-iteration block.

Reproduce: start a PRP test; `kill -TERM <pid>` — before: the process
dies mid-block with no "Stopping, please wait.." and the savefile stays
at the previous 20,000-iteration mark; after: the block completes, the
check runs, the savefile is written, exit 0. `touch stop` in the run
directory does the same from any platform.
---
 src/Signal.cpp | 40 ++++++++++++++++++++++++++++++++++------
 1 file changed, 34 insertions(+), 6 deletions(-)

diff --git a/src/Signal.cpp b/src/Signal.cpp
index 49b3bed3..f18b532b 100644
--- a/src/Signal.cpp
+++ b/src/Signal.cpp
@@ -1,32 +1,60 @@
 // Copyright (C) Mihai Preda.
 
 #include "Signal.h"
+#include "log.h"
 
 #include <csignal>
+#include <filesystem>
+#include <system_error>
 
 using namespace std;
 
 static volatile sig_atomic_t signalled = 0;
 
-static void (* volatile oldHandler)(int) = nullptr;
+static void (* volatile oldIntHandler)(int) = nullptr;
+static void (* volatile oldTermHandler)(int) = nullptr;
 
 static void signalHandler(int signal) { signalled = signal; }
 
+// A file named "stop" in the run directory asks for the same graceful stop
+// a SIGINT does: finish the block, verify it, write the savefile, exit.
+// It is the stop a launcher can request where no signal reaches the
+// process — a hidden Windows child has no console to deliver a Ctrl-C to,
+// and TerminateProcess forfeits the work since the last savefile. The file
+// is removed once seen, so the next start is not a stop.
+static const char *STOP_FILE = "stop";
+
+static bool stopFileSeen() {
+  error_code ec;
+  if (!filesystem::exists(STOP_FILE, ec) || ec) { return false; }
+  filesystem::remove(STOP_FILE, ec);
+  log("Stop requested by the '%s' file\n", STOP_FILE);
+  return true;
+}
+
 Signal::Signal() {
-  if (!oldHandler) {
-    oldHandler = signal(SIGINT, signalHandler);
+  if (!oldIntHandler) {
+    oldIntHandler = signal(SIGINT, signalHandler);
+    // SIGTERM is what service managers and supervisors send first; unhandled
+    // it ends the process at once.
+    oldTermHandler = signal(SIGTERM, signalHandler);
     isOwner = true;
   }
 }
 
 Signal::~Signal() { release(); }
 
-unsigned Signal::stopRequested() { return signalled; }
+unsigned Signal::stopRequested() {
+  if (!signalled && stopFileSeen()) { signalled = SIGTERM; }
+  return signalled;
+}
 
 void Signal::release() {
   if (isOwner) {
     isOwner = false;
-    signal(SIGINT, oldHandler);
-    oldHandler = nullptr;
+    signal(SIGINT, oldIntHandler);
+    signal(SIGTERM, oldTermHandler);
+    oldIntHandler = nullptr;
+    oldTermHandler = nullptr;
   }
 }

From a34b052345879868296c55b471156525a19dae27 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 149/214] Makefile: let VERSION be passed in
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

src/version.inc is regenerated from `git describe` on every build. A tree
without .git — a source tarball, a CI job building an exported copy, a
distro package — gets an empty version string: `git describe` fails,
`basename` of nothing is nothing, and the binary carries "" — which
Task.cpp asserts non-empty before reporting a result. The only way around
it was to edit the Makefile or pre-write src/version.inc and hope the
rule's diff keeps it.

Make VERSION a variable with the git describe as its default
(`VERSION ?=`, expanded lazily so git runs only when the value is needed)
and write that into version.inc. `make VERSION=v8.0-57-g6cb4c12` builds a
binary that reports exactly that; a plain `make` is unchanged.

Reproduce: `git archive HEAD | tar -x -C /tmp/t && make -C /tmp/t` —
before: version.inc is `""`; after: `make -C /tmp/t VERSION=<describe>`
gives the intended string.
---
 Makefile | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c41aa5fb..3d15b836 100644
--- a/Makefile
+++ b/Makefile
@@ -118,8 +118,14 @@ $(DEPDIR)/%.d: ;
 
 src/version.cpp : src/version.inc
 
+# The version string compiled into the binary and reported to PrimeNet in
+# every result. Defaults to `git describe` of the checkout; a build from an
+# exported tree (no .git) or a packager that wants the upstream string passes
+# it explicitly: make VERSION=v8.0-57-g6cb4c12
+VERSION ?= $(shell basename `git describe --tags --long --dirty --always --match 'v/prpll/*'`)
+
 src/version.inc: FORCE
-	echo \"`basename \`git describe --tags --long --dirty --always --match v/prpll/*\``\" > $(BIN)/version.new
+	echo \"$(VERSION)\" > $(BIN)/version.new
 	diff -q -N $(BIN)/version.new $@ >/dev/null || mv $(BIN)/version.new $@
 	echo Version: `cat $@`
 

From 7e0dfff83bcdc4e8e84e63161aef50937474be9b Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 12:33:23 +0000
Subject: [PATCH 150/214] CUDA shim: answer CL_DEVICE_TOPOLOGY_AMD from the
 device's PCI bus id, so -pci selects a CUDA device
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

-pci <bus:device.function> resolves a device through the AMD topology
extension (gpuid.cpp getPosFromBdf → clwrap.cpp getBdfFromDevice →
CL_DEVICE_TOPOLOGY_AMD), which the CUDA shim answered with CL_INVALID_VALUE
for every device — so on NVIDIA the only selector was the enumeration
ordinal, -device N. That ordinal is not stable: CUDA enumerates FASTEST_FIRST
unless CUDA_DEVICE_ORDER says otherwise (not nvidia-smi's PCI order, which
launchers and monitoring tools use), and a second card or a driver update
renumbers. The bus id is what nvidia-smi, lspci and every launcher already
know the card by.

The shim now fills cl_device_topology_amd from cuDeviceGetPCIBusId()
("0000:6a:00.0", domain:bus:device.function; a missing domain is tolerated)
with the PCIe type tag, so getBdfFromDevice formats the same "6a:00.0" it
formats for an AMD device and getPosFromBdf matches it. A driver that cannot
say keeps CL_INVALID_VALUE; CL_DEVICE_BOARD_NAME_AMD and CL_DEVICE_PCIE_ID_AMD
still say no, as before.

Reproduction: on a machine with two NVIDIA cards, `nvidia-smi
--query-gpu=index,name,pci.bus_id` and `prpll -device 1 -h` (the banner names
the card) disagree once the faster card sits on the higher bus id; `prpll -pci
01:00.0` selects the card at 01:00.0 with this patch and exits with "OpenCL
device with BDF '01:00.0' not found" without it.

Measurement: none — device selection only; no kernel or queue changes.
---
 src/cuda/clwrap_cuda.cpp | 30 +++++++++++++++++++++++++++---
 src/cuda/tinycuda.h      |  3 ++-
 2 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 77aef8cb..0cd65af9 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -1017,10 +1017,34 @@ int clGetDeviceInfo(cl_device_id dev, cl_device_info info, size_t size, void* va
     if (value && size >= 1) memcpy(value, empty, 1);
     break;
   }
-  case CL_DEVICE_BOARD_NAME_AMD:
-  case CL_DEVICE_PCIE_ID_AMD:
   case CL_DEVICE_TOPOLOGY_AMD: {
-    // AMD-specific queries — return failure
+    // The device's PCIe position in the AMD extension's shape, so `-pci
+    // <bus:device.function>` selects a CUDA device the way it selects an AMD
+    // one (gpuid.cpp getPosFromBdf → clwrap.cpp getBdfFromDevice). The
+    // enumeration ordinal `-device N` names is not stable — CUDA orders
+    // FASTEST_FIRST unless CUDA_DEVICE_ORDER says otherwise, and a second
+    // card or a driver update can renumber — while the bus id is what
+    // nvidia-smi and every launcher already know the card by.
+    char bdf[32] = {0};
+    if (cuDeviceGetPCIBusId(bdf, sizeof(bdf), dev->dev) != CUDA_SUCCESS) return CL_INVALID_VALUE;
+    // "0000:6a:00.0" — domain:bus:device.function; tolerate a missing domain.
+    unsigned domain = 0, bus = 0, device = 0, function = 0;
+    if (sscanf(bdf, "%x:%x:%x.%x", &domain, &bus, &device, &function) != 4 &&
+        sscanf(bdf, "%x:%x.%x", &bus, &device, &function) != 3) {
+      return CL_INVALID_VALUE;
+    }
+    cl_device_topology_amd top{};
+    top.pcie.type = CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD;
+    top.pcie.bus = (char) bus;
+    top.pcie.device = (char) device;
+    top.pcie.function = (char) function;
+    if (sizeRet) *sizeRet = sizeof(top);
+    if (value && size >= sizeof(top)) memcpy(value, &top, sizeof(top));
+    break;
+  }
+  case CL_DEVICE_BOARD_NAME_AMD:
+  case CL_DEVICE_PCIE_ID_AMD: {
+    // AMD-specific queries with no CUDA counterpart — return failure
     return CL_INVALID_VALUE;
   }
   case CL_DEVICE_GLOBAL_FREE_MEMORY_AMD: {
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index c8ff49ef..f628d4f7 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -212,9 +212,10 @@ using cl_queue = cl_command_queue;
 #define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV     0x4000
 #define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV     0x4001
 
-// AMD-specific (unused but must exist for compilation)
+// AMD-specific; the shim answers CL_DEVICE_TOPOLOGY_AMD from the CUDA device's PCI bus id
 #define CL_DEVICE_PCIE_ID_AMD           0x4034
 #define CL_DEVICE_TOPOLOGY_AMD          0x4037
+#define CL_DEVICE_TOPOLOGY_TYPE_PCIE_AMD 1
 #define CL_DEVICE_BOARD_NAME_AMD        0x4038
 #define CL_DEVICE_GLOBAL_FREE_MEMORY_AMD 0x4039
 

From 57947a131e744bbd520dfd898f6ca5686a62ff1f Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 09:20:52 +0000
Subject: [PATCH 151/214] CUDA shim: load NVRTC's CUBIN, fall back to the PTX
 JIT
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The shim asked NVRTC for PTX only and handed it to cuModuleLoadDataEx,
which runs the driver's JIT compiler on every start: ~36 kernels through
ptxas each time (`-cache` saves the PTX, not the SASS), and a driver older
than the toolkit refuses PTX newer than it knows —
CUDA_ERROR_UNSUPPORTED_PTX_VERSION, "Unsupported .version 9.1; current
version is '9.0'" — so the build cannot start at all on that machine even
though its GPU is fully supported. The same shim compiles for a real
architecture (--gpu-architecture=sm_XY), so NVRTC has already run ptxas
and holds the SASS.

Ask for both: nvrtcGetCUBIN (NVRTC >= 11.1; empty when the toolkit or a
compute_XY target gives none) beside the PTX. Loading tries the CUBIN
first — no JIT, no PTX-version check — and on a driver that rejects it
logs the reason and loads the PTX as before. --maxrregcount is applied by
NVRTC's own ptxas in the CUBIN; the PTX fallback keeps the .maxnreg splice
the JIT path needs. PRPLL_PTX_ONLY=1 forces the old path for an A/B.

The PTX text stays on the program in every path, because clCreateKernel
reads each kernel's declared work-group size from it (.maxntid, what
Kernel::groupSize launches with); a CUBIN carries that only as ELF
metadata. So the kernel cache stores the PTX followed by a marker line and
the CUBIN, the reader splits on the marker, and a cache file from before
this change (plain PTX, no marker) loads exactly as it did. A bare ELF is
refused as CL_INVALID_BINARY so KernelCompiler recompiles instead of
launching every kernel with the 256-thread fallback.

Reproduce: start on a driver older than the build's toolkit (deacix-win,
2026-09-09: CUDA 13.2 build, 13.0 driver) — before: every start dies in
clLinkProgram; after: the CUBIN loads. On any machine, the start-up
kernel compile time drops by the JIT's share (measure with -verbose).

Co-authored-by: Cursor <cursoragent@cursor.com>
---
 src/cuda/clwrap_cuda.cpp | 85 ++++++++++++++++++++++++++++++++++------
 src/cuda/cudawrap.cpp    | 24 ++++++++++--
 src/cuda/cudawrap.h      |  9 +++++
 src/cuda/tinycuda.h      |  3 +-
 4 files changed, 104 insertions(+), 17 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 77aef8cb..9ce2e14e 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -193,24 +193,73 @@ cl_program clCreateProgramWithSource(cl_context ctx, unsigned count, const char*
   return prog;
 }
 
+// The "binary" the kernel cache stores (CL_PROGRAM_BINARIES) and hands back
+// (clCreateProgramWithBinary): the PTX text, then — when NVRTC produced a
+// CUBIN that this driver loaded — this marker and the CUBIN. The PTX stays,
+// and stays first, because clCreateKernel reads each kernel's declared
+// work-group size (.maxntid) and its PDL wait from the PTX text; a CUBIN
+// carries neither as text. A blob without the marker is a plain PTX (the
+// format before the CUBIN), and loads as before.
+static const char CUBIN_MARKER[] = "\n// PRPLL-CUBIN\n";
+static const size_t CUBIN_MARKER_LEN = sizeof(CUBIN_MARKER) - 1;
+
+static string cacheBlob(const _cl_program* prog) {
+  if (prog->cubin.empty()) { return prog->ptx; }
+  string blob;
+  blob.reserve(prog->ptx.size() + CUBIN_MARKER_LEN + prog->cubin.size());
+  blob += prog->ptx;
+  blob += CUBIN_MARKER;
+  blob += prog->cubin;
+  return blob;
+}
+
+// Loads prog->cubin when there is one — SASS for this device, so no JIT and
+// no PTX-version check to fail on a driver older than the toolkit — and
+// otherwise, or when the driver rejects it (logged), the PTX through the JIT.
+// A rejected CUBIN is dropped so the cache stores what loaded.
+static CUresult loadModule(_cl_program* prog, unsigned nOpts, CUjit_option* opts, void** optVals) {
+  if (!prog->cubin.empty()) {
+    CUresult const r = cuModuleLoadDataEx(&prog->module, prog->cubin.data(), nOpts, opts, optVals);
+    if (r == CUDA_SUCCESS) { return r; }
+    const char* errName = nullptr;
+    cuGetErrorName(r, &errName);
+    fprintf(stderr, "CUBIN rejected by the driver: %s (%d) — loading the PTX through the JIT instead\n", errName ? errName : "?", (int)r);
+    prog->cubin.clear();
+  }
+  return cuModuleLoadDataEx(&prog->module, prog->ptx.c_str(), nOpts, opts, optVals);
+}
+
 cl_program clCreateProgramWithBinary(cl_context ctx, unsigned  /*nDevices*/, const cl_device_id*,
                                       const size_t* lengths, const unsigned char** binaries,
                                       int* binaryStatus, int* err) {
-  // "Binary" in CUDA land = PTX string
   auto* prog = new _cl_program;
   prog->context = ctx;
   if (lengths && binaries && lengths[0] > 0) {
-    prog->ptx.assign((const char*)binaries[0], lengths[0]);
+    string blob((const char*)binaries[0], lengths[0]);
+    // A bare ELF is a CUBIN without its PTX: nothing to read the kernels'
+    // work-group sizes from. Refuse it; the caller recompiles and overwrites.
+    if (blob.compare(0, 4, "\177ELF", 4) == 0) {
+      fprintf(stderr, "Cached kernel binary is a bare CUBIN (no PTX): recompiling\n");
+      if (binaryStatus) binaryStatus[0] = CL_INVALID_BINARY;
+      if (err) *err = CL_INVALID_BINARY;
+      return prog;
+    }
+    size_t const mark = blob.find(CUBIN_MARKER);
+    if (mark == string::npos) {
+      prog->ptx = std::move(blob);
+    } else {
+      prog->ptx = blob.substr(0, mark);
+      prog->cubin = blob.substr(mark + CUBIN_MARKER_LEN);
+    }
     prog->compiled = true;
-    // Load the module (JIT-compile PTX to SASS)
     ensureContextCurrent();
-    CUresult const r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+    CUresult const r = loadModule(prog, 0, nullptr, nullptr);
     if (r == CUDA_SUCCESS) {
       prog->moduleLoaded = true;
       moduleRetain(prog->module);  // program owns one reference
       if (binaryStatus) binaryStatus[0] = CL_SUCCESS;
     } else {
-      fprintf(stderr, "cuModuleLoadData from cache failed: %d, PTX size=%zu\n", (int)r, lengths[0]);
+      fprintf(stderr, "cuModuleLoadData from cache failed: %d, blob size=%zu\n", (int)r, lengths[0]);
       prog->compiled = false;
       if (binaryStatus) binaryStatus[0] = CL_INVALID_BINARY;
       if (err) { *err = CL_INVALID_BINARY; return prog; }
@@ -379,7 +428,11 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
   }
 
   try {
-    prog->ptx = NvrtcProgram::compile(processedSource, "prpll_kernel.cu", nvrtcOpts, nvrtcHeaders);
+    auto images = NvrtcProgram::compileImages(processedSource, "prpll_kernel.cu", nvrtcOpts, nvrtcHeaders);
+    prog->ptx = std::move(images.ptx);
+    // PRPLL_PTX_ONLY=1 keeps the driver's JIT path, for comparing the two.
+    static const bool ptxOnly = getenv("PRPLL_PTX_ONLY") != nullptr;
+    prog->cubin = ptxOnly ? string{} : std::move(images.cubin);
     prog->compiled = true;
     g_lastBuildLog.clear();
   } catch (const exception& e) {
@@ -404,7 +457,9 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
     return CL_COMPILE_PROGRAM_FAILURE;
   }
 
-  // If --maxrregcount is set it seems nvrtc compile ignores the setting.  Instead modify the PTX and load the modified PTX.
+  // NVRTC applies --maxrregcount when it runs ptxas itself, i.e. in the CUBIN.
+  // PTX carries no register cap and the driver JIT never sees the option, so
+  // the PTX fallback gets a .maxnreg directive spliced in ahead of every entry.
 
   if (maxregcount) {
     string const maxntidPattern = ".maxntid ";
@@ -434,6 +489,7 @@ cl_program clLinkProgram(cl_context ctx, unsigned  /*nDevices*/, const cl_device
   auto* linked = new _cl_program;
   linked->context = ctx;
   linked->ptx = progs[0]->ptx;
+  linked->cubin = progs[0]->cubin;
   linked->compiled = true;
   // Carry preprocessed source through for KERNEL(N) parsing in clCreateKernel
   for (unsigned i = 0; i < nProgs; ++i) {
@@ -454,7 +510,7 @@ cl_program clLinkProgram(cl_context ctx, unsigned  /*nDevices*/, const cl_device
     (void*)(size_t)sizeof(jitErrorLog), (void*)jitErrorLog,
     (void*)(size_t)sizeof(jitInfoLog), (void*)jitInfoLog
   };
-  CUresult const r = cuModuleLoadDataEx(&linked->module, linked->ptx.c_str(), 4, jitOpts, jitOptVals);
+  CUresult const r = loadModule(linked, 4, jitOpts, jitOptVals);
   if (r != CUDA_SUCCESS) {
     const char* errName = nullptr;
     cuGetErrorName(r, &errName);
@@ -512,7 +568,7 @@ int clBuildProgram(cl_program prog, unsigned nDevices, const cl_device_id* devic
   int const err = clCompileProgram(prog, nDevices, devices, options, 0, nullptr, nullptr, nullptr, nullptr);
   if (err != CL_SUCCESS) return err;
 
-  CUresult const r = cuModuleLoadData(&prog->module, prog->ptx.c_str());
+  CUresult const r = loadModule(prog, 0, nullptr, nullptr);
   if (r != CUDA_SUCCESS) return CL_BUILD_PROGRAM_FAILURE;
   prog->moduleLoaded = true;
   moduleRetain(prog->module);  // program owns one reference
@@ -533,15 +589,20 @@ int clGetProgramBuildInfo(cl_program  /*prog*/, cl_device_id, cl_program_build_i
 
 int clGetProgramInfo(cl_program prog, cl_program_info info, size_t size, void* value, size_t* sizeRet) {
   if (!prog) return CL_INVALID_PROGRAM;
+  // The cache blob — PTX, then the CUBIN behind CUBIN_MARKER when one
+  // loaded; see clCreateProgramWithBinary for the reading side.
   if (info == CL_PROGRAM_BINARY_SIZES) {
-    size_t ptxSize = prog->ptx.size();
+    size_t blobSize = cacheBlob(prog).size();
     if (sizeRet) *sizeRet = sizeof(size_t);
-    if (value && size >= sizeof(size_t)) memcpy(value, &ptxSize, sizeof(size_t));
+    if (value && size >= sizeof(size_t)) memcpy(value, &blobSize, sizeof(size_t));
   } else if (info == CL_PROGRAM_BINARIES) {
     if (sizeRet) *sizeRet = sizeof(unsigned char*);
     if (value && size >= sizeof(unsigned char*)) {
       auto* const* ptrs = (unsigned char**)value;
-      if (ptrs[0]) memcpy(ptrs[0], prog->ptx.data(), prog->ptx.size());
+      if (ptrs[0]) {
+        string const blob = cacheBlob(prog);
+        memcpy(ptrs[0], blob.data(), blob.size());
+      }
     }
   }
   return CL_SUCCESS;
diff --git a/src/cuda/cudawrap.cpp b/src/cuda/cudawrap.cpp
index f4b4cb6a..c8d98e2b 100644
--- a/src/cuda/cudawrap.cpp
+++ b/src/cuda/cudawrap.cpp
@@ -446,6 +446,12 @@ std::string NvrtcProgram::preprocessOpenCL(const std::string& source) {
 std::string NvrtcProgram::compile(const std::string& source, const std::string& name,
                                    const std::vector<std::string>& options,
                                    const std::vector<std::pair<std::string, std::string>>& headers) {
+  return compileImages(source, name, options, headers).ptx;
+}
+
+NvrtcProgram::Images NvrtcProgram::compileImages(const std::string& source, const std::string& name,
+                                                 const std::vector<std::string>& options,
+                                                 const std::vector<std::pair<std::string, std::string>>& headers) {
   // Prepare header arrays
   std::vector<const char*> headerSources, headerNames;
   for (auto& [hName, hSource] : headers) {
@@ -482,14 +488,24 @@ for (auto& o : options) opts.push_back(o.c_str());
     throw std::runtime_error("NVRTC compilation failed for " + name);
   }
 
-  // Get PTX
+  Images images;
   size_t ptxSize;
   NVRTC_CHECK(nvrtcGetPTXSize(prog, &ptxSize));
-  std::string ptx(ptxSize, '\0');
-  NVRTC_CHECK(nvrtcGetPTX(prog, ptx.data()));
+  images.ptx.assign(ptxSize, '\0');
+  NVRTC_CHECK(nvrtcGetPTX(prog, images.ptx.data()));
+
+#if CUDA_VERSION >= 11010
+  // The CUBIN exists only when the architecture was a real sm_XY (not
+  // compute_XY); a zero size means NVRTC has none to give, not an error.
+  size_t cubinSize = 0;
+  if (nvrtcGetCUBINSize(prog, &cubinSize) == NVRTC_SUCCESS && cubinSize > 0) {
+    images.cubin.assign(cubinSize, '\0');
+    if (nvrtcGetCUBIN(prog, images.cubin.data()) != NVRTC_SUCCESS) { images.cubin.clear(); }
+  }
+#endif
 
   nvrtcDestroyProgram(&prog);
-  return ptx;
+  return images;
 }
 
 // ---- Kernel launcher ----
diff --git a/src/cuda/cudawrap.h b/src/cuda/cudawrap.h
index 2be6f72b..ac3639e3 100644
--- a/src/cuda/cudawrap.h
+++ b/src/cuda/cudawrap.h
@@ -119,6 +119,15 @@ struct NvrtcProgram {
   static std::string compile(const std::string& source, const std::string& name,
                               const std::vector<std::string>& options,
                               const std::vector<std::pair<std::string, std::string>>& headers = {});
+
+  // PTX plus, when NVRTC ran its ptxas for a real --gpu-architecture=sm_XY
+  // (NVRTC >= 11.1), the CUBIN — SASS the driver loads without a JIT, with
+  // every option (--maxrregcount included) already applied. `cubin` is empty
+  // when the toolkit or the architecture flag gave none.
+  struct Images { std::string ptx; std::string cubin; };
+  static Images compileImages(const std::string& source, const std::string& name,
+                              const std::vector<std::string>& options,
+                              const std::vector<std::pair<std::string, std::string>>& headers = {});
 };
 
 // ---- Kernel launcher ----
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index c8ff49ef..3a4dc3b7 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -46,7 +46,8 @@ struct _cl_program {
   cl_context context;
   std::string source;     // OpenCL source (before NVRTC compilation)
   std::string preprocessedSource; // CUDA source after preprocessOpenCL (for parsing __launch_bounds__)
-  std::string ptx;        // Compiled PTX (after NVRTC compilation)
+  std::string ptx;        // Compiled PTX (after NVRTC compilation); always the text — clCreateKernel reads .maxntid from it
+  std::string cubin;      // NVRTC's CUBIN for this device's sm, when it produced one; loaded ahead of the PTX JIT
   CUmodule module{};        // Loaded module (after cuModuleLoadData)
   bool compiled{false};
   bool moduleLoaded{false};

From 256678ad447d0175ecd6369a73036b986af3a1ea Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 07:34:32 +0000
Subject: [PATCH 152/214] KernelCompiler: compile the kernels in parallel under
 CUDA
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

KernelCompiler::load() has an async path that was switched off (#if 0)
because the ROCm compiler serializes parallel builds — so under CUDA the
~36 kernels of a Gpu compile one after another through NVRTC (and, before
the CUBIN change, the driver JIT): a minute or more on every start of a
work unit without -cache, and dozens of times over a -tune. NVRTC compiles
independently per thread; nothing in the shim needed the serialization
except that its shared state assumed it.

Under CUDA, compile on parallel threads, bounded with a counting semaphore
to the core count and to eight — an NVRTC instance holds a few hundred MB
while it runs, so 36 at once, or one per thread of a 32-thread machine,
would take gigabytes of host memory for a speedup that eight threads over
36 kernels already give most of. The shim's shared state becomes safe for
it: the module reference counts sit behind a mutex (the CUDA context is
already made current per thread), the build log is per program instead of
a process-wide "last log" (clGetProgramBuildInfo now reads the program it
was asked about — before, it reported whichever compile finished last),
and the two debug-dump counters are atomics. The OpenCL build keeps the
serial path and its reasoning.

The log file and its context are thread-local (one gpuowl-N.log per worker
instance), so a compile thread starts with neither and its "saving binary"
/ "Loaded … ms" lines would reach stdout alone, without the exponent —
measured on an RTX 4090: 24 kernels loaded, zero lines in gpuowl-0.log.
The thread therefore adopts the starting worker's log file and context for
the task (LogLink / LogLinkScope in log.h): the lines land where -verbose
readers look for them, prefixed as before.

Measured (RTX 4090, WSL2, CUDA 12.0 NVRTC, 32-thread host): start to the
first iteration line on a cold kernel cache 5 s → 4 s; the sum of the
per-kernel load times 10.2 s → 8.0 s of thread time. The compile is far
cheaper on this host than the minute the review estimated, so the gain is
one second here; -verbose prints each kernel's load time on any machine.

Co-authored-by: Cursor <cursoragent@cursor.com>
---
 src/KernelCompiler.cpp   | 28 ++++++++++++++++++----
 src/cuda/clwrap_cuda.cpp | 51 ++++++++++++++++++++++++++--------------
 src/cuda/tinycuda.h      |  1 +
 src/log.cpp              | 10 +++++++-
 src/log.h                | 21 +++++++++++++++++
 5 files changed, 88 insertions(+), 23 deletions(-)

diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index e5d22520..ab3144d5 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -8,6 +8,9 @@
 #include <cassert>
 #include <cinttypes>
 #include <future>
+#include <semaphore>
+#include <thread>
+#include <algorithm>
 #include <utility>
 
 using namespace std;
@@ -138,11 +141,28 @@ KernelHolder KernelCompiler::loadAux(const string& fileName, const string& kerne
 }
 
 std::future<KernelHolder> KernelCompiler::load(const string& fileName, const string& kernelName, const string& args) const {
-#if 0
-  // Do the compilation in parallel on a separate thread.
-  // Unfortunatelly no benefit on ROCm (the compiler serializes).
-  return async(std::launch::async, &KernelCompiler::loadAux, this, fileName, kernelName, args);
+#ifdef CUDA_BACKEND
+  // NVRTC compiles independently per thread, so the ~36 kernels of a Gpu
+  // compile in parallel — bounded to the core count and to eight: each
+  // NVRTC instance holds a few hundred MB while it runs, so 36 at once, or
+  // one per thread of a 32-thread machine, would take gigabytes of host
+  // memory for a speedup that eight threads over 36 kernels already give
+  // most of. The CUDA shim makes the context current per thread and guards
+  // its shared module counts. The thread logs through this worker's log
+  // file and context (LogLink): the log is thread-local, and a fresh thread
+  // would otherwise print its "Loaded" lines to stdout alone, unprefixed.
+  static std::counting_semaphore<8> slots{std::max(1u, std::min(8u, std::thread::hardware_concurrency()))};
+  LogLink const link = logLink();
+  return async(std::launch::async, [this, fileName, kernelName, args, link] {
+    slots.acquire();
+    struct Release { std::counting_semaphore<8>& s; ~Release() { s.release(); } } release{slots};
+    LogLinkScope const logScope{link};
+    return loadAux(fileName, kernelName, args);
+  });
 #else
+  // Serial: the ROCm compiler serializes parallel builds anyway (no benefit
+  // measured), and the OpenCL runtime's thread-safety for concurrent
+  // clCompileProgram varies by vendor.
   std::promise<KernelHolder> promise;
   promise.set_value(loadAux(fileName, kernelName, args));
   return promise.get_future();
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 9ce2e14e..cd4b6858 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -13,6 +13,8 @@
 #include <utility>
 #include <vector>
 #include <map>
+#include <mutex>
+#include <atomic>
 #include <algorithm>
 #include <sstream>
 #include <unordered_set>
@@ -52,22 +54,35 @@ static void ensureContextCurrent() {
 // device memory grows unbounded and eventually cuLaunchKernel fails with
 // CUDA_ERROR_OUT_OF_MEMORY.
 //
-// Loading is single-threaded (KernelCompiler's async path is disabled), so a
-// plain map without locking is sufficient.
+// KernelCompiler compiles kernels on parallel threads under CUDA, each
+// loading its module and creating its kernel, so the map is shared: one
+// mutex around every access (the counts are the only state the compile
+// threads share; the CUDA context is per-thread current, see
+// ensureContextCurrent).
 static std::map<CUmodule, int> g_moduleRefCount;
+static std::mutex g_moduleRefMutex;
 
 static void moduleRetain(CUmodule m) {
-  if (m) { ++g_moduleRefCount[m]; }
+  if (!m) return;
+  std::lock_guard<std::mutex> lock(g_moduleRefMutex);
+  ++g_moduleRefCount[m];
 }
 
 static void moduleRelease(CUmodule m) {
   if (!m) return;
-  auto it = g_moduleRefCount.find(m);
-  if (it == g_moduleRefCount.end()) return;   // untracked module — leave as-is
-  if (--it->second <= 0) {
+  bool unload = false;
+  {
+    std::lock_guard<std::mutex> lock(g_moduleRefMutex);
+    auto it = g_moduleRefCount.find(m);
+    if (it == g_moduleRefCount.end()) return;   // untracked module — leave as-is
+    if (--it->second <= 0) {
+      g_moduleRefCount.erase(it);
+      unload = true;
+    }
+  }
+  if (unload) {
     ensureContextCurrent();
     cuModuleUnload(m);
-    g_moduleRefCount.erase(it);
   }
 }
 
@@ -269,8 +284,6 @@ cl_program clCreateProgramWithBinary(cl_context ctx, unsigned  /*nDevices*/, con
   return prog;
 }
 
-// Build log storage (per-program)
-static string g_lastBuildLog;
 
 int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id* devices, const char* options,
                      unsigned numHeaders, const cl_program* headers, const char* const* headerNames,
@@ -419,9 +432,8 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
   // Debug: dump NVRTC options when dumping PTX
   {
     static const char* dumpPrefix = getenv("PRPLL_DUMP_PTX");
-    static bool dumpedOnce = false;
-    if (dumpPrefix && !dumpedOnce) {
-      dumpedOnce = true;
+    static std::atomic<bool> dumpedOnce{false};
+    if (dumpPrefix && !dumpedOnce.exchange(true)) {
       fprintf(stderr, "NVRTC options (%zu):\n", nvrtcOpts.size());
       for (auto& o : nvrtcOpts) fprintf(stderr, "  %s\n", o.c_str());
     }
@@ -434,15 +446,15 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
     static const bool ptxOnly = getenv("PRPLL_PTX_ONLY") != nullptr;
     prog->cubin = ptxOnly ? string{} : std::move(images.cubin);
     prog->compiled = true;
-    g_lastBuildLog.clear();
+    prog->buildLog.clear();
   } catch (const exception& e) {
-    g_lastBuildLog = e.what();
+    prog->buildLog = e.what();
     prog->compiled = false;
     fprintf(stderr, "NVRTC COMPILE FAILED: %s\n", e.what());
     // Dump the full preprocessed source for debugging
     {
       char fname[64];
-      static int failCount = 0;
+      static std::atomic<int> failCount{0};
       snprintf(fname, sizeof(fname), "prpll_fail_%d.cu", failCount++);
       FILE* f = fopen(fname, "w");
       if (f) {
@@ -575,13 +587,16 @@ int clBuildProgram(cl_program prog, unsigned nDevices, const cl_device_id* devic
   return CL_SUCCESS;
 }
 
-int clGetProgramBuildInfo(cl_program  /*prog*/, cl_device_id, cl_program_build_info info,
+int clGetProgramBuildInfo(cl_program prog, cl_device_id, cl_program_build_info info,
                            size_t size, void* value, size_t* sizeRet) {
+  if (!prog) return CL_INVALID_PROGRAM;
   if (info == CL_PROGRAM_BUILD_LOG) {
-    size_t const len = g_lastBuildLog.size() + 1;
+    // This program's own log — a process-wide "last log" would report the
+    // diagnostics of whichever compile finished last on another thread.
+    size_t const len = prog->buildLog.size() + 1;
     if (sizeRet) *sizeRet = len;
     if (value && size >= len) {
-      memcpy(value, g_lastBuildLog.c_str(), len);
+      memcpy(value, prog->buildLog.c_str(), len);
     }
   }
   return CL_SUCCESS;
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index 3a4dc3b7..0a5845dd 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -49,6 +49,7 @@ struct _cl_program {
   std::string ptx;        // Compiled PTX (after NVRTC compilation); always the text — clCreateKernel reads .maxntid from it
   std::string cubin;      // NVRTC's CUBIN for this device's sm, when it produced one; loaded ahead of the PTX JIT
   CUmodule module{};        // Loaded module (after cuModuleLoadData)
+  std::string buildLog;   // This program's last compile/link diagnostics (clGetProgramBuildInfo)
   bool compiled{false};
   bool moduleLoaded{false};
 
diff --git a/src/log.cpp b/src/log.cpp
index a5639251..a5177de8 100644
--- a/src/log.cpp
+++ b/src/log.cpp
@@ -10,6 +10,8 @@ thread_local string context;
 thread_local vector<string> contextParts;
 
 thread_local File logFile;
+// A worker's log file adopted by a helper thread (LogLinkScope); borrowed, never owned.
+thread_local File* linkedLogFile = nullptr;
 
 static File stdoutFile{stdout, "stdout"};
 
@@ -40,10 +42,16 @@ void log(const char *fmt, ...) {
   va_end(va);
   string_view const s{logBuf};
 
-  if (logFile) { logFile.write(s); }
+  if (logFile) { logFile.write(s); } else if (linkedLogFile && *linkedLogFile) { linkedLogFile->write(s); }
   stdoutFile.write(s);
 }
 
+LogLink logLink() { return {logFile ? &logFile : linkedLogFile, context}; }
+
+LogLinkScope::LogLinkScope(const LogLink& link) : previous{linkedLogFile}, context{link.context} { linkedLogFile = link.file; }
+
+LogLinkScope::~LogLinkScope() { linkedLogFile = previous; }
+
 LogContext::LogContext(const string& s) : part{s} {
   contextParts.push_back(s);
   context += s;
diff --git a/src/log.h b/src/log.h
index a49f5808..f25dc5a9 100644
--- a/src/log.h
+++ b/src/log.h
@@ -22,3 +22,24 @@ struct LogContext {
 private:
   std::string part;
 };
+
+// The log file and context are thread-local (one log per worker instance),
+// so a helper thread starts with neither and its log() lines reach stdout
+// alone, without the exponent prefix. A thread that works on a worker's
+// behalf — KernelCompiler's parallel compile under CUDA — takes a LogLink
+// from the thread that starts it and adopts it for the task's duration.
+class File;
+struct LogLink {
+  File* file;           // the starting thread's log file, borrowed — it outlives the task
+  std::string context;
+};
+LogLink logLink();
+
+struct LogLinkScope {
+  explicit LogLinkScope(const LogLink& link);
+  ~LogLinkScope();
+
+private:
+  File* previous;
+  LogContext context;
+};

From aa06a97ba78c3b39d00bdf993a3fec9d3431ae46 Mon Sep 17 00:00:00 2001
From: Sergej Kunz <s.kunz@deacix.com>
Date: Tue, 15 Sep 2026 09:26:11 +0000
Subject: [PATCH 153/214] CUDA: programmatic dependent launch behind -use PDL=1
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The kernels already carry the Hopper PDL pairs — dependentLaunch() /
dependentLaunchWait() (griddepcontrol.launch_dependents / .wait) in
carryFused, fftMiddleIn, fftMiddleOut, tailSquare, tailMul and fftW — but
both sides of the feature were compile-time and unreachable: the kernel
macros tested ENABLE_PDL, which no build defines, and the only launch path
that set CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION was
CudaKernelLauncher::launch(), which the shim's clEnqueueNDRangeKernel never
calls (it uses cuLaunchKernel directly). So the tail-overlap on sm_90+ could
not be tried without editing two files.

Make it one runtime switch: `-use PDL=1`. The define reaches the kernels as
-DPDL=1 (base.cl: PDL defaults to 0). On the launch side the shim decides
per kernel, from the compiled code: clCreateKernel already reads each
kernel's PTX entry for .maxntid, and now also notes whether that entry
contains griddepcontrol.wait. Only such a kernel is launched through
cuLaunchKernelEx with the programmatic-serialization attribute (CUDA 12+);
its wait holds every read until the previous kernel has completed, so it
may start early. A kernel that never waits keeps an ordinary launch even
with the flag on — the attribute on its launch would let it start while a
predecessor that triggered early (carryFused signals before its final
writes) is still running, and nothing else orders the two; kernel order is
not fixed outside the squaring loop (carry variants, transposes, checks,
P-1), so a program-wide attribute is not safe. Deriving the decision from
the PTX also covers a program loaded from the kernel cache, whose compile
options the shim never sees. The three launch paths in
clEnqueueNDRangeKernel share one helper. -h documents the switch; PDL joins
the -use key list so the option is not flagged unrecognized. Default off:
nothing changes without the flag.

Measure on an sm_90+ card: -iters 20000 with and without -use PDL=1, every
Gerbicz check passing.

Co-authored-by: Cursor <cursoragent@cursor.com>
---
 src/Args.cpp             |  2 ++
 src/Gpu.cpp              |  3 ++-
 src/cl/base.cl           | 13 ++++++++--
 src/cuda/clwrap_cuda.cpp | 51 ++++++++++++++++++++++++++++++++++++----
 src/cuda/cudawrap.cpp    |  2 +-
 src/cuda/tinycuda.h      |  1 +
 6 files changed, 63 insertions(+), 9 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 179bbd83..486ebeaa 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -184,6 +184,8 @@ named "config.txt" in the prpll run directory.
   -use INPLACE=n   : Perform tranforms in-place.  Great if the reduced memory usage fits in the GPU's L2 cache.
                      0 = not in-place, 1 = nVidia friendly access pattern, 2 = AMD friendly access pattern.
   -use PAD=<val>   : insert pad bytes to possibly improve memory access patterns.  Val is number bytes to pad.
+  -use PDL=1       : CUDA on Hopper (sm_90) and later: programmatic dependent launch — a kernel's tail overlaps the
+                     next kernel's start (fftMiddleOut → carryFused → fftMiddleIn → tailSquare). Off by default; measure.
   -use MIDDLE_IN_LDS_TRANSPOSE=0|1  : Transpose values in local memory before writing to global memory
   -use MIDDLE_OUT_LDS_TRANSPOSE=0|1 : Transpose values in local memory before writing to global memory
   -use TABMUL_CHAIN=<val>: Controls how trig values are obtained in WIDTH and HEIGHT when FFT-spec is 1.
diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 1916e5f5..ba5e3f79 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -292,7 +292,8 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
                               "WMUL",
                               "MULTI_Q",
                               "GRAPHS",
-                              "L1CUDA"
+                              "L1CUDA",
+                              "PDL"                     // CUDA, sm_90+: programmatic dependent launch
                             });
     if (!isValid) {
       log("Warning: unrecognized -use key '%s'\n", k.c_str());
diff --git a/src/cl/base.cl b/src/cl/base.cl
index a85341af..625dedd2 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -835,14 +835,23 @@ void OVERLOAD barsync(const u32 numWG, const u32 WG) {
 // with the beginning of the next kernel.  This requires a special launch kernel command that is only available in CUDA 12.0 and later.
 // These routines let us take advantage of this CUDA feature.  These routines do nothing in OpenCL.
 
+// Switched on per run with -use PDL=1. The CUDA shim launches a kernel with
+// programmatic stream serialization exactly when its compiled code contains
+// the wait below (it reads the PTX), so a kernel that never waits is never
+// allowed to start early. Off, both routines compile to nothing and every
+// launch is ordinary.
+#ifndef PDL
+#define PDL 0
+#endif
+
 void dependentLaunch() {
-#if CUDA_BACKEND && HAS_PTX >= 900 && ENABLE_PDL
+#if CUDA_BACKEND && HAS_PTX >= 900 && PDL
   __asm volatile("griddepcontrol.launch_dependents;");    // same as cudaTriggerProgrammaticLaunchCompletion();
 #endif
 }
 
 void dependentLaunchWait() {
-#if CUDA_BACKEND && HAS_PTX >= 900 && ENABLE_PDL
+#if CUDA_BACKEND && HAS_PTX >= 900 && PDL
   __asm volatile("griddepcontrol.wait;");                 // same as cudaGridDependencySynchronize();
 #endif
 }
diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 77aef8cb..d82c263e 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -613,8 +613,8 @@ if (getenv("TRY_LDS_CARVEOUT"))
     string const entryPattern = ".entry " + string(name) + "(";
     size_t const pos = ptx.find(entryPattern);
     if (pos != string::npos) {
-      // Found the kernel entry. Now find .maxntid before the next .entry or opening brace
-      size_t searchEnd = ptx.find(".entry ", pos + 1);
+      // Found the kernel entry. Its text runs to the next .entry or .func.
+      size_t searchEnd = min(ptx.find(".entry ", pos + 1), ptx.find(".func ", pos + 1));
       if (searchEnd == string::npos) searchEnd = ptx.size();
       string const maxntidPattern = ".maxntid ";
       size_t const mpos = ptx.find(maxntidPattern, pos);
@@ -624,6 +624,15 @@ if (getenv("TRY_LDS_CARVEOUT"))
           k->reqWorkGroupSize = val;
         }
       }
+      // A kernel that waits for its predecessor (griddepcontrol.wait —
+      // compiled in by -use PDL=1 on sm_90+) is launched with programmatic
+      // stream serialization: it may begin while the predecessor's tail
+      // still runs, and its wait holds every read until the predecessor
+      // has completed. A kernel without the wait keeps an ordinary launch:
+      // it may follow one that triggered early, and nothing else would
+      // order the two. Read from the compiled code, this holds for a
+      // cached program as much as a fresh one.
+      k->pdl = ptx.find("griddepcontrol.wait", pos) < searchEnd;
     }
   }
 
@@ -727,6 +736,38 @@ cl_command_queue clCreateCommandQueueWithProperties(cl_context ctx, cl_device_id
 
 // ---- Enqueue operations ----
 
+// One launch for the three paths below. For a kernel whose code waits on
+// its predecessor (k->pdl, see clCreateKernel; CUDA 12+, where
+// cuLaunchKernelEx exists), the launch carries
+// CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION: this kernel may
+// begin once the previous one in the stream signals
+// griddepcontrol.launch_dependents (that one's tail overlapping this one's
+// prologue), and this kernel's griddepcontrol.wait holds its reads until
+// the previous one has completed. Every other kernel is launched as before.
+static CUresult launchKernel(cl_kernel k, unsigned numBlocksX, unsigned numBlocksY, unsigned lsX, unsigned lsY,
+                             CUstream stream, void** argPtrs) {
+#if CUDA_VERSION >= 12000
+  if (k->pdl) {
+    CUlaunchAttribute attr{};
+    attr.id = CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION;
+    attr.value.programmaticStreamSerializationAllowed = 1;
+    CUlaunchConfig config{};
+    config.gridDimX = numBlocksX;
+    config.gridDimY = numBlocksY;
+    config.gridDimZ = 1;
+    config.blockDimX = lsX;
+    config.blockDimY = lsY;
+    config.blockDimZ = 1;
+    config.sharedMemBytes = 0;
+    config.hStream = stream;
+    config.attrs = &attr;
+    config.numAttrs = 1;
+    return cuLaunchKernelEx(&config, k->func, argPtrs, nullptr);
+  }
+#endif
+  return cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, stream, argPtrs, nullptr);
+}
+
 int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
                             const size_t*  /*globalOffset*/, const size_t* globalSize,
                             const size_t* localSize, unsigned  /*nWaits*/,
@@ -756,7 +797,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     ev->hasTimings = true;
     ev->commandType = CL_COMMAND_NDRANGE_KERNEL;
     cuEventRecord(ev->start, q->stream);
-    CUresult const r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult const r = launchKernel(k, numBlocksX, numBlocksY, lsX, lsY, q->stream, argPtrs);
     cuEventRecord(ev->end, q->stream);
     *event = ev;
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
@@ -771,7 +812,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     if (!pStart) { cuEventCreate(&pStart, CU_EVENT_DEFAULT); cuEventCreate(&pEnd, CU_EVENT_DEFAULT); }
 
     cuEventRecord(pStart, q->stream);
-    CUresult const r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
+    CUresult const r = launchKernel(k, numBlocksX, numBlocksY, lsX, lsY, q->stream, argPtrs);
     cuEventRecord(pEnd, q->stream);
     cuEventSynchronize(pEnd);
     float ms = 0;
@@ -803,7 +844,7 @@ int clEnqueueNDRangeKernel(cl_command_queue q, cl_kernel k, unsigned workDim,
     return r == CUDA_SUCCESS ? CL_SUCCESS : CL_OUT_OF_RESOURCES;
   }
 
-  CUresult const r = cuLaunchKernel(k->func, numBlocksX, numBlocksY, 1, lsX, lsY, 1, 0, q->stream, argPtrs, nullptr);
+  CUresult const r = launchKernel(k, numBlocksX, numBlocksY, lsX, lsY, q->stream, argPtrs);
   if (r != CUDA_SUCCESS) {
     const char* errName = nullptr;
     cuGetErrorName(r, &errName);
diff --git a/src/cuda/cudawrap.cpp b/src/cuda/cudawrap.cpp
index f4b4cb6a..ad47691f 100644
--- a/src/cuda/cudawrap.cpp
+++ b/src/cuda/cudawrap.cpp
@@ -495,7 +495,7 @@ for (auto& o : options) opts.push_back(o.c_str());
 // ---- Kernel launcher ----
 
 void CudaKernelLauncher::launch(CUstream stream, u32 gridSize, void** args, u32 sharedMem) {
-#if CUDA_VERSION >= 12000 && ENABLE_PDL
+#if CUDA_VERSION >= 12000 && defined(ENABLE_PDL) && ENABLE_PDL
    // enable pdl in kernel launch attributes
    CUlaunchAttribute attrs[1];
    attrs[0].id = CU_LAUNCH_ATTRIBUTE_PROGRAMMATIC_STREAM_SERIALIZATION;
diff --git a/src/cuda/tinycuda.h b/src/cuda/tinycuda.h
index c8ff49ef..e442efb7 100644
--- a/src/cuda/tinycuda.h
+++ b/src/cuda/tinycuda.h
@@ -60,6 +60,7 @@ struct _cl_kernel {
   CUfunction func{};
   std::string name;
   CUmodule parentModule{};  // Keep reference so module isn't unloaded
+  bool pdl{false};          // Its PTX waits on the predecessor (griddepcontrol.wait): launch with programmatic stream serialization
   int numArgs{0};
   int reqWorkGroupSize{0};   // From __launch_bounds__(N) in source, matches OpenCL reqd_work_group_size
 

From 9860255737b960d7826a3566656e32300e125a5d Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 22:32:25 +0000
Subject: [PATCH 154/214] Tune FFTs sorted by maximum exponent handled by the
 FFT.

---
 src/FFTConfig.h | 3 ++-
 src/tune.cpp    | 3 +++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index 4c5d1769..fd8a471e 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -47,6 +47,7 @@ class FFTShape {
 
   [[nodiscard]] float minBpw() const { return fft_type != FFT32 ? 3.0f : 1.0f; }
   [[nodiscard]] float maxBpw() const { return *std::ranges::max_element(bpw); }
+  [[nodiscard]] u64 maxExp() const { return u64(maxBpw() * size()); }
   [[nodiscard]] std::string spec() const { return (fft_type ? to_string(fft_type) + ':' : "") + numberK(width) + ':' + numberK(middle) + ':' + numberK(height); }
 
   [[nodiscard]] float carry32BPW() const;
@@ -93,7 +94,7 @@ struct FFTConfig {
 
   [[nodiscard]] std::string spec() const;
   [[nodiscard]] u32 size() const { return shape.size(); }
-  [[nodiscard]] u64 maxExp()  const { return u64(maxBpw() * shape.size()); }
+  [[nodiscard]] u64 maxExp() const { return shape.maxExp(); }
 
   [[nodiscard]] float minBpw() const { return shape.minBpw(); }
   [[nodiscard]] float maxBpw() const;
diff --git a/src/tune.cpp b/src/tune.cpp
index 4558c72a..c23ff146 100644
--- a/src/tune.cpp
+++ b/src/tune.cpp
@@ -1200,6 +1200,9 @@ skip_1K_256 = false;
 
   vector<TuneEntry> results = TuneEntry::readTuneFile(*args);
 
+  // Time FFT shapes smallest-to-largest exponent handled
+  std::ranges::stable_sort(shapes, [](const FFTShape& a, const FFTShape& b) { return a.maxExp() < b.maxExp(); });
+
   // Loop through all possible FFT shapes
   for (const FFTShape& shape : shapes) {
 

From cbd99e33ffe3ac7c5e5eb136e45f8a6ca6693b2a Mon Sep 17 00:00:00 2001
From: gwoltman <woltman@alum.mit.edu>
Date: Tue, 15 Sep 2026 20:47:56 -0400
Subject: [PATCH 155/214] Remove PDL option from help until it is proven
 worthwhile.

Removed deprecated PDL option for CUDA on Hopper.
---
 src/Args.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index 486ebeaa..179bbd83 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -184,8 +184,6 @@ named "config.txt" in the prpll run directory.
   -use INPLACE=n   : Perform tranforms in-place.  Great if the reduced memory usage fits in the GPU's L2 cache.
                      0 = not in-place, 1 = nVidia friendly access pattern, 2 = AMD friendly access pattern.
   -use PAD=<val>   : insert pad bytes to possibly improve memory access patterns.  Val is number bytes to pad.
-  -use PDL=1       : CUDA on Hopper (sm_90) and later: programmatic dependent launch — a kernel's tail overlaps the
-                     next kernel's start (fftMiddleOut → carryFused → fftMiddleIn → tailSquare). Off by default; measure.
   -use MIDDLE_IN_LDS_TRANSPOSE=0|1  : Transpose values in local memory before writing to global memory
   -use MIDDLE_OUT_LDS_TRANSPOSE=0|1 : Transpose values in local memory before writing to global memory
   -use TABMUL_CHAIN=<val>: Controls how trig values are obtained in WIDTH and HEIGHT when FFT-spec is 1.

From 65d5f08772c17002db388c16ca5d87e04098380c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Wed, 16 Sep 2026 01:37:44 +0000
Subject: [PATCH 156/214] Added restrict at AI's suggestion - cannot hurt.

---
 src/cl/base.cl | 37 ++++++++++++++++++-------------------
 1 file changed, 18 insertions(+), 19 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 625dedd2..e9cabb57 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -282,35 +282,34 @@ ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2)
 
 #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
 
-
 // For reasons unknown, loading trig values into nVidia's constant cache has terrible performance
 #if AMDGPU
-typedef constant const T2* Trig;
-typedef constant const T* TrigSingle;
-typedef constant const F2* TrigFP32;
-typedef constant const F* TrigSingleFP32;
-typedef constant const GF31* TrigGF31;
-typedef constant const GF61* TrigGF61;
+typedef constant const T2* restrict Trig;
+typedef constant const T* restrict TrigSingle;
+typedef constant const F2* restrict TrigFP32;
+typedef constant const F* restrict TrigSingleFP32;
+typedef constant const GF31* restrict TrigGF31;
+typedef constant const GF61* restrict TrigGF61;
 #else
-typedef global const T2* Trig;
-typedef global const T* TrigSingle;
-typedef global const F2* TrigFP32;
-typedef global const F* TrigSingleFP32;
-typedef global const GF31* TrigGF31;
-typedef global const GF61* TrigGF61;
+typedef global const T2* restrict Trig;
+typedef global const T* restrict TrigSingle;
+typedef global const F2* restrict TrigFP32;
+typedef global const F* restrict TrigSingleFP32;
+typedef global const GF31* restrict TrigGF31;
+typedef global const GF61* restrict TrigGF61;
 #endif
 // However, caching weights in nVidia's constant cache improves performance.
 // Even better is to not pollute the constant cache with weights that are used only once.
 // This requires two typedefs depending on how we want to use the BigTab pointer.
 // For AMD we can declare BigTab as constant or global - it doesn't really matter.
-typedef constant const double2* ConstBigTab;
-typedef constant const float2* ConstBigTabFP32;
+typedef constant const double2* restrict ConstBigTab;
+typedef constant const float2* restrict ConstBigTabFP32;
 #if AMDGPU
-typedef constant const double2* BigTab;
-typedef constant const float2* BigTabFP32;
+typedef constant const double2* restrict BigTab;
+typedef constant const float2* restrict BigTabFP32;
 #else
-typedef global const double2* BigTab;
-typedef global const float2* BigTabFP32;
+typedef global const double2* restrict BigTab;
+typedef global const float2* restrict BigTabFP32;
 #endif
 
 //

From 8893502576eb1de832922dcd7944be8b76a6c701 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 17 Sep 2026 01:13:06 +0000
Subject: [PATCH 157/214] Fixed compiler warning message about possibly
 uninitialized variable

---
 src/clwrap.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/clwrap.cpp b/src/clwrap.cpp
index dcc08f44..8567c7b7 100644
--- a/src/clwrap.cpp
+++ b/src/clwrap.cpp
@@ -238,7 +238,7 @@ Program loadSource(cl_context context, const string &source) {
 }
 
 string getBuildLog(cl_program program, cl_device_id deviceId) {
-  size_t logSize;
+  size_t logSize = 0;
   const size_t maxLogSize = 64 * 1024;
   int err = clGetProgramBuildInfo(program, deviceId, CL_PROGRAM_BUILD_LOG, 0, nullptr, &logSize);
   CHECK2(err, "clGetProgramBuildInfo");

From ad9646126efd4d0d7e9b867b9f63ab98ea4298c1 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 20:22:44 -0600
Subject: [PATCH 158/214] Define barsync() only where the hardware supports it

Since 436bdb4 base.cl has failed to preprocess on every GPU that is not
NVIDIA:

    ./base.cl:830:4: error: - GPU not capable of barrier on a subset of threads

barsync() was defined unconditionally with a bare #error in its non-PTX
branch.  HAS_PTX is 0 for any non-NVIDIA device, so the #error fired during
preprocessing regardless of whether barsync() was called -- and nothing calls
it.  The effect was that no kernel compiled at all on AMD or Intel OpenCL,
including plain FP64 configurations.

Wrap the definition in #if HAS_PTX >= 200 instead.  The PTX code is unchanged;
on other GPUs barsync() is simply not defined, so a future call from such a
build fails at the call site, which is the behaviour the existing comment asks
for ("substituting a barrier on all threads is not permitted").

Verified on an Intel UHD iGPU: master 8893502 fails with the error above for
-prp 5000011 -fft 256:2:256; with this change the kernels compile and the
Gerbicz check passes at 2000 and 4000 iterations.  Not tested on NVIDIA (no
hardware available); the PTX branch is textually identical.

Found and fixed by Claude (Anthropic's Claude Code), working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/base.cl | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index e9cabb57..e1082d0f 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -811,10 +811,12 @@ void OVERLOAD bar(const u32 WG) {
 #endif
 }
 
-// Create a barrier across a subset of threads.  Substituting a barrier on all threads is not permitted.
+// Create a barrier across a subset of threads.  Substituting a barrier on all threads is not permitted, so this is only
+// defined where the hardware can do it (PTX bar.sync with a thread count, sm_20 or higher).  On any other GPU a call to
+// barsync() fails to compile at the call site instead of the whole of base.cl failing whether or not it is used.
+#if HAS_PTX >= 200
 void OVERLOAD barsync(const u32 numWG, const u32 WG) {
   if (WG <= WAVEFRONT) return;
-#if HAS_PTX >= 200         // bar.sync with thread count requires sm_20 support or higher.
 #if USE_REGISTER_BARSYNC   // bar.sync with a register is horribly slow on an RTX 5070Ti.
   __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
 #else                      // WARNING, WARNING, WARNING: On TitanV using CUDA 12.9 tools and driver 580, this branch does not work in openCL (but works in CUDA build).
@@ -825,10 +827,8 @@ void OVERLOAD barsync(const u32 numWG, const u32 WG) {
     }
   }
 #endif
-#else
-  #error - GPU not capable of barrier on a subset of threads
-#endif
 }
+#endif
 
 // nVidia GPUs (Hopper architecture sm 9.0 and later) support Programatic Dependent Launch where the tail end execution of one kernel can overlap
 // with the beginning of the next kernel.  This requires a special launch kernel command that is only available in CUDA 12.0 and later.

From ceb996c09eb5eb8fe15fa220c13bb17276c6d6ca Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 20:47:01 -0600
Subject: [PATCH 159/214] Fix stray brace in the NCLOAD(TrigSingleFP32) PTX
 string

base.cl's non-coherent single-float load was

    __asm("ld.global.nc.f32  %0}, [%1];" ...)

The string goes to ptxas verbatim, so the first FP32 configuration that
actually emits this overload (an XXLOAD on a TrigSingleFP32 with the LOADS
digit selecting NCLOAD, on sm_50+) fails to build with a PTX parse error, on
both the OpenCL-NVIDIA and the CUDA backends.  It is latent today only because
unused device functions are stripped before ptxas sees them.  Match the f64
sibling on the line above.

Found by an AI code audit (Claude, Anthropic's Claude Code); fixed by Claude
working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/base.cl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index e9cabb57..bbc47c65 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -548,7 +548,7 @@ F2 OVERLOAD NCLOAD(TrigFP32 mem) {
 }
 F OVERLOAD NCLOAD(TrigSingleFP32 mem) {
   F retval;
-  __asm("ld.global.nc.f32  %0}, [%1];" : "=f"(retval) : "l"(mem));
+  __asm("ld.global.nc.f32  %0, [%1];" : "=f"(retval) : "l"(mem));
   return retval;
 }
 i64 OVERLOAD NCLOAD(i64 *mem) {

From 86d3f40ad2b6ea343047f55ed25507bd47640f49 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 20:48:57 -0600
Subject: [PATCH 160/214] CUDA shim: guard g_allocatedBuffers with a mutex

clwrap_cuda.cpp keeps a process-wide unordered_set of live cl_mem objects so
that clSetKernelArg can tell an 8-byte buffer argument from an 8-byte scalar
and substitute the CUdeviceptr.  clCreateBuffer inserts, clReleaseMemObject
erases, and clSetKernelArg calls contains() for every buffer argument of every
launch.  None of it was synchronized, while -workers N (1..4) runs N gpuWorker
threads against the single CUDA context; the parallel-compile change did add
a mutex for g_moduleRefCount two lines below, but not here.

A worker allocating its ~40 buffers (or releasing them at a work-unit
boundary, or TrigBufCache lazily allocating for a new FFT) while another
worker is launching kernels is therefore a data race on the set: an insert
that rehashes frees the bucket array under a concurrent contains() and the
process segfaults, or contains() misses a live buffer and the host address of
the _cl_mem is handed to the kernel as its device pointer, giving a sticky
CUDA_ERROR_ILLEGAL_ADDRESS that kills every worker.  Reading mem->ptr after
the lookup was also a use-after-free window against a concurrent release.

Take a mutex around all three accesses, and copy the device pointer while
still holding it.

Not compiled here: the CUDA shim needs the CUDA SDK headers, which this
machine does not have.  The change is four lock_guard scopes over an existing
std::mutex idiom already used in this file.

Found by an AI code audit (Claude, Anthropic's Claude Code); fixed by Claude
working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cuda/clwrap_cuda.cpp | 33 +++++++++++++++++++++++++++------
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 60ef58bb..585a49f5 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -27,7 +27,10 @@ using namespace std;
 // Track allocated cl_mem objects so clSetKernelArg can distinguish buffer args from scalars.
 // In OpenCL, buffer args are passed as &memobj where memobj is cl_mem (a pointer to _cl_mem).
 // We need to convert these to CUdeviceptr for CUDA kernel launch.
+// The set is shared by every worker thread (-workers N runs N Gpu instances against this one
+// process-wide context), so all access goes through g_allocatedBuffersMutex.
 static unordered_set<cl_mem> g_allocatedBuffers;
+static std::mutex g_allocatedBuffersMutex;
 
 // Global CUDA context — set once by clCreateContext, used to ensure current before CUDA calls
 static CUcontext g_cudaContext = nullptr;
@@ -733,10 +736,22 @@ int clSetKernelArg(cl_kernel k, unsigned pos, size_t size, const void* value) {
   // We need to store the CUdeviceptr (GPU address) instead of the cl_mem (host pointer).
   if (size == sizeof(cl_mem) && value) {
     cl_mem mem = *(cl_mem*)value;
-    if (mem && g_allocatedBuffers.contains(mem)) {
-      CUdeviceptr devPtr = mem->ptr;
-      k->setArg(pos, sizeof(CUdeviceptr), &devPtr);
-      return CL_SUCCESS;
+    if (mem) {
+      // Look the buffer up and copy its device pointer under the lock: another worker may be
+      // creating or releasing buffers concurrently, and a release deletes the _cl_mem.
+      CUdeviceptr devPtr = 0;
+      bool isBuffer = false;
+      {
+        std::lock_guard<std::mutex> lock(g_allocatedBuffersMutex);
+        if (g_allocatedBuffers.contains(mem)) {
+          isBuffer = true;
+          devPtr = mem->ptr;
+        }
+      }
+      if (isBuffer) {
+        k->setArg(pos, sizeof(CUdeviceptr), &devPtr);
+        return CL_SUCCESS;
+      }
     }
     // NULL cl_mem → pass a null device pointer
     if (!mem) {
@@ -766,7 +781,10 @@ cl_mem clCreateBuffer(cl_context  /*ctx*/, cl_mem_flags flags, size_t size, void
   if ((flags & CL_MEM_COPY_HOST_PTR) && hostPtr) {
     cuMemcpyHtoD(buf->ptr, hostPtr, size);
   }
-  g_allocatedBuffers.insert(buf);
+  {
+    std::lock_guard<std::mutex> lock(g_allocatedBuffersMutex);
+    g_allocatedBuffers.insert(buf);
+  }
   if (err) *err = CL_SUCCESS;
   return buf;
 }
@@ -774,7 +792,10 @@ cl_mem clCreateBuffer(cl_context  /*ctx*/, cl_mem_flags flags, size_t size, void
 int clReleaseMemObject(cl_mem buf) {
   if (buf) {
     ensureContextCurrent();
-    g_allocatedBuffers.erase(buf);
+    {
+      std::lock_guard<std::mutex> lock(g_allocatedBuffersMutex);
+      g_allocatedBuffers.erase(buf);
+    }
     cuMemFree(buf->ptr);
     delete buf;
   }

From b08eb4b22d76888c6e46c74040a60b41b3b83071 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:15:56 -0600
Subject: [PATCH 161/214] Make the 4-byte shufl_and_fft2 path actually perform
 the fft2

The SHUFL_BYTES == 4 path of shufl_and_fft2() for 64-bit element types
(FP64 and GF61, and the hybrids built on them) did a plain shufl: it wrote
each 32-bit piece of the T2 values to LDS and read them straight back from
lds[i * WG + lowMe].  The 16- and 8-byte paths of the same function read a
pair of values (val1 from i * WG/2, val2 from 4 * WG + i * WG/2) and add or
subtract them, which is the radix-2 stage that the callers, fft8_16a/fft8_16b,
assume has already happened.  The "assert(SHUFL_BYTES >= 8)" meant to keep the
path out of use is a printf under DEBUG and nothing otherwise, and the block
was labelled NEEDS WORK, but it compiled and ran.

Every WIDTH or HEIGHT of 1024 goes through shufl_and_fft2 (the host forces
radix 8 there), so any 64-bit FFT at 1K with -use SHUFL_BYTES_W=4 or
SHUFL_BYTES_H=4 computed a wrong transform.  It fails immediately:

    prpll -prp 44564489 -fft 1K:5:256 -use SHUFL_BYTES_W=4
    EE         0 on-load: 0000000000000000 vs. 0000000000000003

The fft2 has to add and subtract whole 64-bit values, so the fixed path first
gathers all four 32-bit pieces of val1 and val2 for every u[i], from the same
LDS locations the wider paths use, and combines them at the end.  With the
fix the same command passes and produces the same residues as the default
SHUFL_BYTES (c14c8c46dd4da882 at 2000, 66a437358a5a6c83 at 4000) on an Intel
UHD iGPU.  The path is still unoptimized for bank conflicts, as before, and
about 3x slower than the default on that GPU; it is opt-in.

Found by an AI code audit (Claude, Anthropic's Claude Code) that simulated
every shufl.cl LDS layout against the generic one; fixed by Claude working
with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/shufl.cl | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0bb6446a..9d727ab7 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -427,7 +427,6 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe
 // Shufl two or more fft_WIDTHs or fft_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.  An fft2 is also performed.
 void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
   assert(RADIX == 8);
-  assert(SHUFL_BYTES >= 8);
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -516,31 +515,38 @@ void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG,
   // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
   // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
   else if (SHUFL_BYTES == 4) {
-
-// NEEDS WORK!!!
-
     // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
     // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
     // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
     local int* lds = (local int*) lds2;
     if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
 
+    // The fft2 has to add and subtract whole 64-bit values, so first gather all four 32-bit pieces of val1 and val2
+    // (same LDS locations as the 16- and 8-byte paths above), then combine.  u[] stays intact as the source of the
+    // four write passes.
+    int4 v1[RADIX], v2[RADIX];
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { v1[i].x = lds[i * (WG / 2) + lowMe % (WG / 2)]; v2[i].x = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)]; }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { v1[i].y = lds[i * (WG / 2) + lowMe % (WG / 2)]; v2[i].y = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)]; }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { v1[i].z = lds[i * (WG / 2) + lowMe % (WG / 2)]; v2[i].z = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)]; }
     bar(WG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
     bar(WG);
-    for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    for (u32 i = 0; i < RADIX; ++i) { v1[i].w = lds[i * (WG / 2) + lowMe % (WG / 2)]; v2[i].w = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)]; }
+    for (u32 i = 0; i < RADIX; ++i) {
+      T2_GF61 val1 = as_T2_GF61(v1[i]);
+      T2_GF61 val2 = as_T2_GF61(v2[i]);
+      if (lowMe < WG / 2) u[i] = addq(val1, val2);
+      else u[i] = subq(val1, val2);
+    }
   }
 }
 

From 1ed23cb0712c59a0cb1ae4b8326cd13b7816391c Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:20:13 -0600
Subject: [PATCH 162/214] Fix the 4-byte F_Z31 shufl read for WG != 64, 512

The SHUFL_BYTES == 4, LDSPAD "first RADIX == 8" special case of shufl() for
32-bit element types (FP32 and GF31) writes

    lds[((lowMe/4) & 7) * (WG+1) + (lowMe/32) * 32 + (lowMe & 3) * 8 + i]

and had two read formulas: one for WG == 64 and one for everything else.  The
"everything else" formula is the inverse of that write only when WG == 512.
The remaining reachable case is WG == 128 -- every WIDTH or HEIGHT of 1024,
which the host always runs with radix 8 -- and there it reads the wrong
elements: simulating the layout against the generic shufl, 896 of the 1024
(i, lowMe) reads return the wrong value.  Any 32-bit FFT at 1K with
-use SHUFL_BYTES_W=4 (or SHUFL_BYTES_H=4) therefore computed a wrong
transform and fails on load.

Add the WG == 128 read (the inverse with the constants folded, in the style
of the existing two), keep the WG == 512 one as it was, and make the final
fallback the general inverse of the write so no other WG can silently take a
formula that does not match.  All four forms were checked by simulation for
WG = 64, 128, 256, 512, 1024: every read returns the generic shufl's value.

On an Intel UHD iGPU, FP32 53:1K:8:256 with -use SHUFL_BYTES_W=4 fails on
load before this change and after it produces the same res64 at 2000
iterations as the default SHUFL_BYTES (18933754a884a5ea), i.e. identical
arithmetic.  (That FP32 configuration fails its Gerbicz check on both paths on
this GPU, so the comparison shows the paths now agree, not that FP32 is sound
at 5 bits/word there.)

Found by an AI code audit (Claude, Anthropic's Claude Code) that simulated
every shufl.cl LDS layout against the generic one; fixed by Claude working
with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/shufl.cl | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0bb6446a..84b22344 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -714,13 +714,20 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      // Read back in the generic shufl's output order.  The write above stores (i', me') at
+      // ((me'/4)&7)*(WG+1) + (me'/32)*32 + (me'&3)*8 + i', and output (i, lowMe) needs i' = lowMe & 7,
+      // me' = i*WG/8 + lowMe/8; the per-WG forms below are that inverse with the constants folded.
+      if      (WG == 64)  for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else if (WG == 128) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (4 * (i & 1) + lowMe / 32) * (WG + 1) + (lowMe & 31)]; }
+      else if (WG == 512) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      else                for (u32 i = 0; i < RADIX; ++i) { u32 mep = i * (WG / 8) + lowMe / 8; u[i].x = lds[((mep / 4) & 7) * (WG + 1) + (mep / 32) * 32 + (mep & 3) * 8 + (lowMe & 7)]; }
       bar(WG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
       bar(WG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      if      (WG == 64)  for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
+      else if (WG == 128) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (4 * (i & 1) + lowMe / 32) * (WG + 1) + (lowMe & 31)]; }
+      else if (WG == 512) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      else                for (u32 i = 0; i < RADIX; ++i) { u32 mep = i * (WG / 8) + lowMe / 8; u[i].y = lds[((mep / 4) & 7) * (WG + 1) + (mep / 32) * 32 + (mep & 3) * 8 + (lowMe & 7)]; }
       return;
     }
 

From d2b3a74e5286f990d5f760229edee9f3ce5c30ef Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:25:40 -0600
Subject: [PATCH 163/214] Require L2_STRIPING to divide the stripe count

The striped launches split the WIDTH/16 fftMiddleIn stripes into groups of
L2_STRIPING and process group i together with its Hermitian partner group at
WIDTH - L2_STRIPING*16 - base_lo, so the number of groups has to be even --
and a multiple of four with MULTI_Q, which further splits the groups across
two queues.  The startup check only clamped L2_STRIPING to a maximum
(WIDTH/64, or WIDTH/128 with MULTI_Q).  A value that does not divide, e.g.
WIDTH=256 with L2_STRIPING=3, gives num_stripe_groups = 5: the replay loop
runs two blocks, columns 96..159 are never transformed in that iteration, the
"last block" +1 adjustment lands on a block whose base_hi is not WIDTH/2 so
one column is squared twice, and with MULTI_Q two blocks get the same base_lo
on different queues.  The Gerbicz check fails on every block, so the run is
unusable rather than silently wrong.

After the existing clamps, round L2_STRIPING down to the largest value for
which (WIDTH/16) is a multiple of 2*L2_STRIPING (4*L2_STRIPING with MULTI_Q),
and say so, matching how the maximum is already handled.  WIDTH/16 is a power
of two, so this means the nearest power of two below.

Checked on an Intel UHD iGPU: -fft 256:2:256 -use INPLACE=1,L2_STRIPING=3
now logs "L2_STRIPING must divide WIDTH/32.  Changing to L2_STRIPING=2" and
passes its Gerbicz check with the same residue as an unstriped run.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the striping
scheduler; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..b4dbe4b4 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -350,6 +350,22 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
       args.flags["L2_STRIPING"] = to_string(fft.shape.width/128);
       log("Max L2_STRIPING when MULTI_Q=1 exceeded.  Changing to L2_STRIPING=%u.\n", fft.shape.width/128);
     }
+
+    // The striped launches split the WIDTH/16 stripes into groups of L2_STRIPING and pair group i with its
+    // Hermitian partner WIDTH - L2_STRIPING*16 - base_lo, so the number of groups must be even (a multiple of
+    // four with MULTI_Q, which further splits them across two queues).  Otherwise whole stripes are never
+    // transformed and others are squared twice.  WIDTH/16 is a power of two, so round down to one that divides.
+    l2_striping = args.value("L2_STRIPING", 0);
+    if (l2_striping) {
+      u32 const groupsNeeded = multi_q ? 4 : 2;
+      u32 valid = l2_striping;
+      while (valid && (fft.shape.width / 16) % (groupsNeeded * valid)) { --valid; }
+      if (valid != l2_striping) {
+        config["L2_STRIPING"] = to_string(valid);
+        args.flags["L2_STRIPING"] = to_string(valid);
+        log("L2_STRIPING must divide WIDTH/%u.  Changing to L2_STRIPING=%u.\n", 16 * groupsNeeded, valid);
+      }
+    }
   }
 
   string defines = toDefine(config);

From 37c4dbb0201893d82e31a9d30eaf07d73ef0cd32 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 17 Sep 2026 03:26:26 +0000
Subject: [PATCH 164/214] Allows sharing LDS memory among partitioned
 workgroups.  Is slower on GPUs I tried.  Perhaps if WMUL=4, enough LDS memory
 could be freed up to allow storing trig values in LDS memory -- perhaps that
 could be faster.  There are other possible ideas I might try at a later date.

---
 src/cl/base.cl       |   8 +
 src/cl/carryfused.cl |  43 +++--
 src/cl/expand.cl     |   4 +
 src/cl/fftbase.cl    | 165 ++++++++++++++---
 src/cl/fftheight.cl  |   1 +
 src/cl/ffthin.cl     |  14 +-
 src/cl/fftp.cl       |  36 +++-
 src/cl/fftw.cl       |  12 +-
 src/cl/fftwidth.cl   |   1 +
 src/cl/shufl.cl      | 429 ++++++++++++++++++++++++-------------------
 src/cl/tailmul.cl    |  16 +-
 src/cl/tailsquare.cl |  48 +++--
 src/cl/tailutil.cl   |  53 +++---
 13 files changed, 548 insertions(+), 282 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index e9cabb57..f055e9a8 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -156,6 +156,14 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define LDSPAD_H 1
 #endif
 
+// By default, LDS access is not shared among workgroups.
+#if !defined(LDSMUL_W)
+#define LDSMUL_W 1
+#endif
+#if !defined(LDSMUL_H)
+#define LDSMUL_H 1
+#endif
+
 #if !defined(TABMUL_CHAIN)
 #define TABMUL_CHAIN 0
 #endif
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index c9bc907d..bd492843 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -38,7 +38,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
   //if (WMUL == 1) return;
 #if WMUL > 1
 
-  const u32 lds_i64s = LDS_BYTES / sizeof(i64);                 // Number of i64s in LDS used by shufl for each WMUL line
+  const u32 lds_i64s = LDS_SHUFL_BYTES(WMUL) / sizeof(i64);         // Number of i64s in LDS used by shufl for each WMUL workgroup
   local i64 *lds = (local i64 *) lds2;
 
   // Handle nasty case where we are writing 8-byte quantities but SHUFL_BYTES_W is only 4 bytes
@@ -67,9 +67,11 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
       // Write the other half of the carries
       bar();
       if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW/2; ++i) lds[lds_i64s + i * G_W] = carry[i + NW/2];
-      // Read carries from our WMUL workgroup LDS area.  Compatible with shufl, no trailing bar() needed.
+      // Read carries from our WMUL workgroup LDS area.  Compatible with shufl when no trailing bar() needed.
       bar();
       if (me >= G_W) for (i32 i = 0; i < NW/2; ++i) carry[i + NW/2] = lds[i * G_W];
+      // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+      if (SHARING_LDS(WMUL)) bar();
     }
   }
 
@@ -81,8 +83,10 @@ void OVERLOAD shufl_carries_up(local void *lds2, i64 *carry, u32 me, u32 lowMe)
     if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW; ++i) lds[lds_i64s + i * G_W] = carry[i];
     // Full barrier needed as we just moved data from one WMUL workgroup LDS area to the another WMUL workgroup's LDS area
     bar();
-    // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
+    // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl when no trailing bar() is required.
     if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
+    // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+    if (SHARING_LDS(WMUL)) bar();
   }
 
 #endif
@@ -95,7 +99,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
   //if (WMUL == 1) return;
 #if WMUL > 1
 
-  const u32 lds_i32s = LDS_BYTES / sizeof(i32);                 // Number of i32s in LDS used by shufl for each WMUL line
+  const u32 lds_i32s = LDS_SHUFL_BYTES(WMUL) / sizeof(i32);     // Number of i32s in LDS used by shufl for each WMUL workgroup
   local i32 *lds = (local i32 *) lds2;
   lds += (me / G_W) * lds_i32s + lowMe;                         // This WMUL workgroup's LDS area
 
@@ -105,8 +109,10 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
   if (me < (WMUL-1) * G_W) for (i32 i = 0; i < NW; ++i) lds[lds_i32s + i * G_W] = carry[i];
   // Full barrier needed as we just moved data from one WMUL workgroup LDS area to the another WMUL workgroup's LDS area
   bar();
-  // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl and no trailing bar() is required.
+  // Read carries from our WMUL workgroup's LDS area.  This is compatible with shufl when no trailing bar() is required.
   if (me >= G_W) for (i32 i = 0; i < NW; ++i) carry[i] = lds[i * G_W];
+  // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+  if (SHARING_LDS(WMUL)) bar();
 
 #endif
 }
@@ -118,7 +124,8 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(WMUL) / sizeof(T2)];
+  LDSinit(lds, WMUL);
 
   T2 u[NW];
 
@@ -343,7 +350,8 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  local F2 lds[WMUL * LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(WMUL) / sizeof(F2)];
+  LDSinit(lds, WMUL);
 
   F2 u[NW];
 
@@ -570,7 +578,8 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
-  local GF31 lds[WMUL * LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(WMUL) / sizeof(GF31)];
+  LDSinit(lds, WMUL);
 
   GF31 u[NW];
 
@@ -805,7 +814,8 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
-  local GF61 lds[WMUL * LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(WMUL) / sizeof(GF61)];
+  LDSinit(lds, WMUL);
 
   GF61 u[NW];
 
@@ -1047,8 +1057,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
-  local T2 lds[WMUL * LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(WMUL) / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
+  LDSinit(lds, WMUL);
 
   T2 u[NW];
   GF31 u31[NW];
@@ -1315,8 +1326,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  local F2 ldsF2[WMUL * LDS_BYTES / sizeof(F2)];
+  local F2 ldsF2[LDS_BYTES(WMUL) / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
+  LDSinit(ldsF2, WMUL);
 
   F2 uF2[NW];
   GF31 u31[NW];
@@ -1592,8 +1604,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
+  LDSinit(lds61, WMUL);
 
   F2 uF2[NW];
   GF61 u61[NW];
@@ -1870,8 +1883,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
-  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
+  LDSinit(lds61, WMUL);
 
   GF31 u31[NW];
   GF61 u61[NW];
@@ -2146,9 +2160,10 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
 KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
-  local GF61 lds61[WMUL * LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
+  LDSinit(lds61, WMUL);
 
   F2 uF2[NW];
   GF31 u31[NW];
diff --git a/src/cl/expand.cl b/src/cl/expand.cl
index b60c3161..eb097eaa 100644
--- a/src/cl/expand.cl
+++ b/src/cl/expand.cl
@@ -8,6 +8,7 @@
 #if FFT_FP64
 #define T_Z61 T
 #define T2_GF61 T2
+#define T_F_Z31_Z61 T
 #define T2_F2_GF31_GF61 T2
 #define as_T2_GF61 as_double2
 #include INCLUDE_FILE
@@ -20,6 +21,7 @@
 #if NTT_GF61
 #define T_Z61 Z61
 #define T2_GF61 GF61
+#define T_F_Z31_Z61 Z61
 #define T2_F2_GF31_GF61 GF61
 #define as_T2_GF61 as_ulong2
 #include INCLUDE_FILE
@@ -32,6 +34,7 @@
 #if FFT_FP32
 #define F_Z31 F
 #define F2_GF31 F2
+#define T_F_Z31_Z61 F
 #define T2_F2_GF31_GF61 F2
 #include INCLUDE_FILE
 #undef F_Z31
@@ -42,6 +45,7 @@
 #if NTT_GF31
 #define F_Z31 Z31
 #define F2_GF31 GF31
+#define T_F_Z31_Z61 Z31
 #define T2_F2_GF31_GF61 GF31
 #include INCLUDE_FILE
 #undef F_Z31
diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index f0b6d37c..2c55164a 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -3,23 +3,146 @@
 #include "fft4.cl"
 #include "fft8.cl"
 
-// Calculate the LDS bytes used by shufl
-#if LDSPAD && SHUFL_BYTES == 16 && RADIX == 8
-#define LDS_BYTES     ((WG * RADIX + 7) * SHUFL_BYTES)
-#elif LDSPAD && SHUFL_BYTES == 16 && RADIX == 4
-#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
-#elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 8
-#define LDS_BYTES     ((WG * RADIX + 56) * SHUFL_BYTES)
-#elif LDSPAD && SHUFL_BYTES == 8 && RADIX == 4
-#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
-#elif LDSPAD && SHUFL_BYTES == 4 && RADIX == 8
-#define LDS_BYTES     ((WG * RADIX + 56) * SHUFL_BYTES)
-#elif LDSPAD && SHUFL_BYTES == 4 && RADIX == 4
-#define LDS_BYTES     ((WG * RADIX + 12) * SHUFL_BYTES)
+// NOTE:  tailSquare, with its ability to optionally define tailSquareZero, does not allow us to know numWG at #include time.
+// Thus, we must define macros that take numWG as in input argument.  This could be rectified by making tailSquareZero obey the TAIL_KERNELS setting.
+
+// This section is not necessary.  On TitanV, CUDA 12.9, I see a 0.5% slowdown when not LDS sharing but compiled with the LDS sharing code.
+
+#if LDSMUL == 1      // Not sharing LDS memory, use simplified code.
+
+#define SHARING_LDS(numWG)        0
+#define SBMUL(numWG)              1
+#define LDSPAD_COUNT(numWG)       (!LDSPAD ? 0 : RADIX == 4 ? 12 : SHUFL_BYTES >= 16 ? 7 : 56)
+#define LDS_SHUFL_BYTES(numWG)    ((WG * RADIX + LDSPAD_COUNT(numWG)) * SHUFL_BYTES)
+#define LDS_BYTES(numWG)          (numWG * LDS_SHUFL_BYTES(numWG))
+
+void OVERLOAD LDSinit(void local *lds, const u32 numWG) {
+}
+
+local void * OVERLOAD LDSptr(local void *lds, const u32 numWG) {
+  return (local char *)lds + ((u32)get_local_id(0) / WG) * LDS_SHUFL_BYTES(numWG);
+}
+
+local void * OVERLOAD LDSsharing_ptr(local void *lds, const u32 numWG) {
+  return LDSptr(lds, numWG);
+}
+
+void OVERLOAD LDSbar(const u32 numWG) {
+  bar(WG);
+}
+
+void OVERLOAD LDStx_start(local void *lds, const u32 numWG) {
+  LDSbar(numWG);
+}
+
+void OVERLOAD LDStx_end(local void *lds, const u32 numWG) {
+}
+
+
+// This section handles both cases of sharing and not sharing LDS memory
+
 #else
-#define LDS_BYTES     (WG * RADIX * SHUFL_BYTES)
+
+// LDS access is shared if the kernel processes multiple independent workgroups, the user settable LDSMUL is more than one, and the GPU allows barriers on a subset of threads
+#define SHARING_LDS(numWG)        (numWG > 1 && LDSMUL > 1 && (NVIDIAGPU || WG <= WAVEFRONT))
+// If sharing LDS access, LDSMUL sets a limit on how many workgroups share the same LDS memory.  Sharing LDS allow shufl to use a multiple of SHUFL_BYTES.
+#define SBMUL(numWG)              (!SHARING_LDS(numWG) ? 1 : numWG >= LDSMUL ? LDSMUL : numWG)
+// Calculate the LDS padding used by shufl
+#define LDSPAD_COUNT(numWG)       (!LDSPAD ? 0 : RADIX == 4 ? 12 : SBMUL(numWG) * SHUFL_BYTES >= 16 ? 7 : 56)
+// LDS_SHUFL_BYTES is the number of LDS bytes *allocated* for each workgroup (SBMUL > 1 means the workgroup can *access* some multiple of LDS_SHUFL_BYTES)
+#define LDS_SHUFL_BYTES(numWG)    ((WG * RADIX + LDSPAD_COUNT(numWG)) * SHUFL_BYTES)
+// The total number of LDS_BYTES allocated by a kernel includes space for 4 semaphores to control workgroup access
+#define LDS_BYTES(numWG)          (numWG * LDS_SHUFL_BYTES(numWG) + (SHARING_LDS(numWG) ? 16 : 0))
+
+////   BUG BUG BUG
+///variant 2 partitioned_LDS is a nightmare  -- require variant 2 to be LDSMUL=1 until we can figure it out?
+
+// Initialize access to LDS memory.  It may be advantageous to have independent workgroups share access to LDS memory via a lock controlling a critical section.
+// This may let a kernel use less LDS memory, or have each workgroup use more LDS memory to perform fewer passes of writing and reading LDS memory.
+void OVERLOAD LDSinit(void local *lds, const u32 numWG) {
+  // Init semaphores to unlocked state
+  if (SHARING_LDS(numWG)) {
+    assert(numWG / SBMUL(numWG) <= 4);  // LDS_BYTES is hardwired to allocate 4 semaphores
+    if (get_local_id(0) == 0) {
+      volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
+      for (u32 i = 0; i < numWG / SBMUL(numWG); i++) semaphores[i] = 0;
+    }
+    bar();
+  }
+}
+
+// Return a pointer to the LDS memory allocated for this workgroup.  If SBMUL is greater than 1, workgroup may use additional memory by sharing
+// with other workgroups and using locks to control access.
+local void * OVERLOAD LDSptr(local void *lds, const u32 numWG) {
+  return (local char *)lds + ((u32)get_local_id(0) / WG) * LDS_SHUFL_BYTES(numWG);
+}
+
+// Return a pointer to the LDS memory this workgroup is allowed to access when sharing with other workgroups.
+local void * OVERLOAD LDSsharing_ptr(local void *lds, const u32 numWG) {
+  if (!SHARING_LDS(numWG)) return LDSptr(lds, numWG);
+  return (local char *)lds + ((u32)get_local_id(0) / WG / SBMUL(numWG)) * SBMUL(numWG) * LDS_SHUFL_BYTES(numWG);
+}
+
+// Wait for all of a workgroup's threads to arrive.
+// NOTE: A "workgroup" is an independent group of threads doing FFT work (see WMUL in carryFused or TAIL_KERNELS=2).
+void OVERLOAD LDSbar(const u32 numWG) {
+
+  if (WG <= WAVEFRONT) return;
+
+  // If were not using semaphores to share LDS access, perform a standard bar.  The standard bar is free to implement a full bar across
+  // all threads if that is more efficient than a bar across a subset of threads.
+  if (!SHARING_LDS(numWG)) {
+    bar(WG);
+    return;
+  }
+
+  // Barrier on a subset of threads.
+  barsync(numWG, WG);
+}
+
+// Start a new LDS access transaction.  This is required for sharing LDS memory with other workgroups.
+// Historically, each workgroup had its own LDS area, and shufl routines performed a bar(WG) at the start of accessing LDS but not at the end.
+// After calling shufl, a bar(WG) was required before next LDS memory usage.  All routines that use LDS memory OBEYED THIS PROTOCOL
+// of bar(WG) before LDS use (full bar() if writing outside the workgroup's LDS area) and no bar(WG) after last use (full bar() if reading from
+// outside the workgroup's LDS area).  If we're not sharing LDS access among multiple workgroups, maintain this historical implementation.
+// If sharing LDS we have NEW REQUIREMENTS.  LDStx_end performs an LDSbar because workgroups write to more than just their own LDS area.  The LDSbar
+// ensures the reads have completed before any future writes.  When accessing LDS memory without LDStx calls (see shufl_carries_up in carryFused and
+// reverseLines in tailutil) they too must perform a bar() after the last read from LDS.
+// NOTE: Pass in the original LDS pointer, not the pointer returned by LDSptr or LDSsharing_ptr.
+void OVERLOAD LDStx_start(local void *lds, const u32 numWG) {
+  // If each workgroup has its own LDS area, then no locks are needed to access shared memory.  Use the historical model of requiring a barrier before LDS access.
+  if (!SHARING_LDS(numWG)) {
+    LDSbar(numWG);
+    return;
+  }
+  // Have first thread in a workgroup lock the semaphore controlling access to LDS memory
+  if (get_local_id(0) % WG == 0) {
+    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
+
+    // Lock semaphore (set to one) to gain access to critical section
+    while (atomic_cmpxchg(&semaphores[get_local_id(0) / WG / SBMUL(numWG)], 0, 1) == 1);
+  }
+  LDSbar(numWG);
+}
+
+// End an LDS access transaction
+// NOTE: Pass in the original LDS pointer, not the pointer returned by LDSptr or LDSsharing_ptr.
+void OVERLOAD LDStx_end(local void *lds, const u32 numWG) {
+  // Historically, no trailing LDSbar is required when not sharing LDS memory.
+  if (!SHARING_LDS(numWG)) return;
+
+  // Since we are sharing LDS areas among multiple workgroups, we must wait for all of a workgroup's threads to finish their LDS access.
+  LDSbar(numWG);
+  // Unlock the semaphore
+  if (get_local_id(0) % WG == 0) {
+    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
+    semaphores[get_local_id(0) / WG / SBMUL(numWG)] = 0;
+  }
+}
+
 #endif
 
+
 #define INCLUDE_FILE "shufl.cl"
 #include "expand.cl"
 
@@ -263,7 +386,7 @@ void OVERLOAD tabMul8_4b(Trig trig, T2 *u, u32 f, u32 me) {
     u32 p = me & ~(f - 1);
     T2 w = TFLOAD(&trig[p]);
 
-//    u[1] = cmulFancy(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+//    u[1] = cmulFancy(u[1], w);                                // GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
 //    T2 w2 = csqTrigFancy(w);
 //    u[2] = cmulFancy(u[2], w2);
 //    T2 w3 = ccubeTrigFancy(w2, w);
@@ -275,7 +398,7 @@ void OVERLOAD tabMul8_4b(Trig trig, T2 *u, u32 f, u32 me) {
 //      base = cmulFancy(base, w);
 //    }
 
-    u[1] = cmul(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+    u[1] = cmul(u[1], w);                               // GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
     T2 w2 = csqTrig(w);
     u[2] = cmul(u[2], w2);
     T2 w3 = ccubeTrig(w2, w);
@@ -534,8 +657,7 @@ void finish_tabMul8_fft8(Trig trig, T *preloads, T2 *u, u32 f, u32 numWG, u32 me
 void OVERLOAD fft_common(local T2 *lds, T2 *u, Trig trig, T2 w, u32 numWG, u32 lowMe, int callnum) {
 
   // This line mimics shufl -- partition lds for variant 2
-  local T2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2);
+  local T2* partitioned_lds = LDSptr(lds, numWG);
 
 // Variant 0 uses broadcast instructions.  Only available on AMD GPUs.
 
@@ -975,7 +1097,7 @@ void OVERLOAD tabMul8_4b(TrigFP32 trig, F2 *u, u32 f, u32 me) {
     u32 p = me & ~(f - 1);
     F2 w = TFLOAD(&trig[p]);
 
-//    u[1] = cmulFancy(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+//    u[1] = cmulFancy(u[1], w);                                // GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
 //    T2 w2 = csqTrigFancy(w);
 //    u[2] = cmulFancy(u[2], w2);
 //    T2 w3 = ccubeTrigFancy(w2, w);
@@ -987,7 +1109,7 @@ void OVERLOAD tabMul8_4b(TrigFP32 trig, F2 *u, u32 f, u32 me) {
 //      base = cmulFancy(base, w);
 //    }
 
-    u[1] = cmul(u[1], w);				// GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
+    u[1] = cmul(u[1], w);                               // GW: - this should use Fancy, but tabmul8_4a does not and it could for half of the data
     F2 w2 = csqTrig(w);
     u[2] = cmul(u[2], w2);
     F2 w3 = ccubeTrig(w2, w);
@@ -1256,8 +1378,7 @@ void finish_tabMul8_fft8(TrigFP32 trig, F *preloads, F2 *u, u32 f, u32 numWG, u3
 void OVERLOAD fft_common(local F2 *lds, F2 *u, TrigFP32 trig, u32 numWG, u32 lowMe, int callnum) {
 
   // This line mimics shufl -- partition lds
-  local F2* partitioned_lds = lds;
-  if (numWG > 1) partitioned_lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2);
+  local F2* partitioned_lds = LDSptr(lds, numWG);
 
 // Variant 2 code for SIZE=256, RADIX=4
 #if ENABLE_FP32_VARIANT_2 && WG == 64 && RADIX == 4 && VARIANT == 2
diff --git a/src/cl/fftheight.cl b/src/cl/fftheight.cl
index 7d835b41..a19d7b2c 100644
--- a/src/cl/fftheight.cl
+++ b/src/cl/fftheight.cl
@@ -7,6 +7,7 @@
 #define LDSPAD        LDSPAD_H
 #define LDSSWIZ       LDSSWIZ_H
 #define SHUFL_BYTES   SHUFL_BYTES_H
+#define LDSMUL        LDSMUL_H
 #define UNROLL        UNROLL_H
 #define SAVE_ONE_MUL  1          // Radeon VII weirdness where saving one mul was slower (needs retesting!)
 #define DOING_HEIGHT  1          // Flags to work around any optimizer weirdness where common code performs better in fft_WIDTH and worse in fft_HEIGHT or vice versa
diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index e95eb88d..2c104aa9 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -32,7 +32,9 @@ u32 get_line_number(u32 base_lo) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH];
@@ -65,7 +67,9 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -102,7 +106,8 @@ KERNEL(G_H) fftHin(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -130,7 +135,8 @@ KERNEL(G_H) fftHinGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
 
 // Do an FFT Height after an fftMiddleIn (which may not have fully transposed data, leading to non-sequential input)
 KERNEL(G_H) fftHinGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
diff --git a/src/cl/fftp.cl b/src/cl/fftp.cl
index 620b0734..29c90854 100644
--- a/src/cl/fftp.cl
+++ b/src/cl/fftp.cl
@@ -11,7 +11,9 @@
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
   T2 u[NW];
 
   u32 g = get_group_id(0);
@@ -42,7 +44,9 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
   F2 u[NW];
 
   u32 g = get_group_id(0);
@@ -83,7 +87,9 @@ KERNEL(G_W) fftP(P(F2) out, CP(Word2) in, TrigFP32 smallTrig, BigTabFP32 THREAD_
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
+
   GF31 u[NW];
 
   u32 g = get_group_id(0);
@@ -138,7 +144,9 @@ KERNEL(G_W) fftP(P(GF31) out, CP(Word2) in, TrigGF31 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
+
   GF61 u[NW];
 
   u32 g = get_group_id(0);
@@ -195,8 +203,10 @@ KERNEL(G_W) fftP(P(GF61) out, CP(Word2) in, TrigGF61 smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
+  LDSinit(lds, 1);
+
   T2 u[NW];
   GF31 u31[NW];
 
@@ -263,8 +273,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTab THREAD_WEIGHTS)
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local F2 ldsF2[LDS_BYTES / sizeof(F2)];
+  local F2 ldsF2[LDS_BYTES(1) / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
+  LDSinit(ldsF2, 1);
+
   F2 uF2[NW];
   GF31 u31[NW];
 
@@ -337,8 +349,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(1) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
+  LDSinit(lds61, 1);
+
   F2 uF2[NW];
   GF61 u61[NW];
 
@@ -410,8 +424,10 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIG
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
-  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(1) / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
+  LDSinit(lds61, 1);
+
   GF31 u31[NW];
   GF61 u61[NW];
 
@@ -493,9 +509,11 @@ KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig) {
 
 // fftPremul: weight words with IBDWT weights followed by FFT-width.
 KERNEL(G_W) fftP(P(T2) out, CP(Word2) in, Trig smallTrig, BigTabFP32 THREAD_WEIGHTS) {
-  local GF61 lds61[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds61[LDS_BYTES(1) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
   local GF31 *lds31 = (local GF31 *) lds61;
+  LDSinit(lds61, 1);
+
   F2 uF2[NW];
   GF31 u31[NW];
   GF61 u61[NW];
diff --git a/src/cl/fftw.cl b/src/cl/fftw.cl
index 14b4f5fd..43926016 100644
--- a/src/cl/fftw.cl
+++ b/src/cl/fftw.cl
@@ -10,7 +10,8 @@
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
 
   T2 u[NW];
   u32 g = get_group_id(0);
@@ -35,7 +36,8 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 // Do the ending fft_WIDTH after an fftMiddleOut.  This is the same as the first half of carryFused.
 KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
 
   CP(F2) inF2 = (CP(F2)) in;
   P(F2) outF2 = (P(F2)) out;
@@ -63,7 +65,8 @@ KERNEL(G_W) fftW(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF31
 
 KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
   P(GF31) out31 = (P(GF31)) (out + DISTGF31);
@@ -91,7 +94,8 @@ KERNEL(G_W) fftWGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if NTT_GF61
 
 KERNEL(G_W) fftWGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
   P(GF61) out61 = (P(GF61)) (out + DISTGF61);
diff --git a/src/cl/fftwidth.cl b/src/cl/fftwidth.cl
index f1c65c0e..5dff7e6c 100644
--- a/src/cl/fftwidth.cl
+++ b/src/cl/fftwidth.cl
@@ -7,6 +7,7 @@
 #define LDSPAD        LDSPAD_W
 #define LDSSWIZ       LDSSWIZ_W
 #define SHUFL_BYTES   SHUFL_BYTES_W
+#define LDSMUL        LDSMUL_W
 #define UNROLL        UNROLL_W
 #define SAVE_ONE_MUL  0          // Radeon VII weirdness where saving one mul in width variant 2 was slower
 #define DOING_HEIGHT  0          // Flags to work around any optimizer weirdness where common code performs better in fft_WIDTH and worse in fft_HEIGHT or vice versa
diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0bb6446a..a7a31f07 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -1,5 +1,23 @@
 // Copyright (C) Mihai Preda
 
+
+// Strongly typed versions of LDSptr and LDSsharing_ptr.  On TitanV, CUDA 12.9, this is 1% faster.
+local T_F_Z31_Z61 * OVERLOAD LDSptr(local T_F_Z31_Z61 *lds, const u32 numWG) {
+  return lds + ((u32)get_local_id(0) / WG) * LDS_SHUFL_BYTES(numWG) / sizeof(T_F_Z31_Z61);
+}
+local T2_F2_GF31_GF61 * OVERLOAD LDSptr(local T2_F2_GF31_GF61 *lds, const u32 numWG) {
+  return lds + ((u32)get_local_id(0) / WG) * LDS_SHUFL_BYTES(numWG) / sizeof(T2_F2_GF31_GF61);
+}
+local T_F_Z31_Z61 * OVERLOAD LDSsharing_ptr(local T_F_Z31_Z61 *lds, const u32 numWG) {
+  if (!SHARING_LDS(numWG)) return LDSptr(lds, numWG);
+  return lds + ((u32)get_local_id(0) / WG / SBMUL(numWG)) * SBMUL(numWG) * LDS_SHUFL_BYTES(numWG) / sizeof(T_F_Z31_Z61);
+}
+local T2_F2_GF31_GF61 * OVERLOAD LDSsharing_ptr(local T2_F2_GF31_GF61 *lds, const u32 numWG) {
+  if (!SHARING_LDS(numWG)) return LDSptr(lds, numWG);
+  return lds + ((u32)get_local_id(0) / WG / SBMUL(numWG)) * SBMUL(numWG) * LDS_SHUFL_BYTES(numWG) / sizeof(T2_F2_GF31_GF61);
+}
+
+
 #ifdef T2_GF61
 
 // Shufl two or more fft_WIDTHs or FFT_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.
@@ -7,13 +25,9 @@
 // even when operating on differernt sized data elements as can happen in an M31+M61 NTT.
 // WG = workgroup size of a single fft_WIDTH or fft_HEIGHT
 // n = sizeof array u (nW or nH).  n * WG = WIDTH or HEIGHT
+// r usually equals RADIX if a full fft_RADIX step was just performed.  On occasion u[8] values may do less than an fft8 step.
 // numWG = number of fft_WIDTHs or fft_HEIGHTs being processed simultaneously
 // lowMe = me % WG
-// r usually equals RADIX if a full fft_RADIX step was just performed.  On occasion u[8] values may do less than an fft8 step.
-// NOTE: shufl routines perform a bar(WG) at the start but not at the end.  After calling shufl, a bar(WG) is required
-// before next LDS memory usage.  All routines that use LDS memory MUST OBEY THIS PROTOCOL of bar() before LDS use and
-// only bar(WG) required before next use.  ALSO NOTE: the first shufl call does not need to do bar(WG).  A relatively
-// minor optimization would be to special case the first shufl call.
 void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u32 lowMe) {
 
   u32 mask = f - 1;
@@ -21,9 +35,8 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
 
   // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
   // We're writing 16 bytes at a time, which means groups of 8 must have unique LDS banks.
-  if (SHUFL_BYTES == 16) {
-    local T2_GF61* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
+  if (SBMUL(numWG) * SHUFL_BYTES >= 16) {
+    local T2_GF61* lds = LDSsharing_ptr(lds2, numWG);
 
 #if LDSPAD
     // Special case first RADIX == 8 to eliminate LDS bank conflicts.
@@ -33,11 +46,12 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
     // Pad 1 value every row to eliminate bank conflicts.
     if (0 && f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe & 7) * (WG + 1) + (lowMe / 8) * 8 + i] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8                    + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 1) + (lowMe & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -46,21 +60,11 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS that uses a little padding.  Pad one value after every row to eliminate bank conflicts.
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 1) + lowMe] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 8) + (lowMe / 8) + (lowMe & 7) * (WG + 1)]; }
-      return;
-    }
-
-    // Special case second RADIX == 8 to eliminate LDS bank conflicts.
-    // Input values are the output from previous shufl.  For example, WIDTH=512:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
-    // No padding of LDS blocks is needed to eliminate bank conflicts!  Groups of 8 threads are already in separate LDS banks.
-    // We could however save a bar() by writing to same locations that the previous shufl wrote to.
-    if (0 && f == 8 && r == 8 && RADIX == 8) {
-      // for (u32 i = 0; i < RADIX; ++i) { lds[something] = u[i]; }
-      bar(WG);
-      //for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[something]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -71,10 +75,11 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
     // Pad 1 value every row to eliminate bank conflicts.
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 2) & 3) * (WG + 1) + (lowMe / 8) * 8 + (lowMe & 1) * 4 + i] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 4 + (lowMe / 32) * 8 + ((lowMe / 8) & 3) * (WG + 1) + (lowMe & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -85,11 +90,12 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 16... 1..   output[64..127] = +4
     // Pad 4 values after every row to eliminate bank conflicts.
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
@@ -100,10 +106,11 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 1, 65...   lds[64..127] = +8
     // Swizzle LDS blocks to eliminate bank conflicts.  Swizzle on the first 8 threads written to LDS (multiples of 1) and the first 8 threads read from LDS (multiples of 64).
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -114,9 +121,11 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
     // We can however save a bar() by writing to same locations that previous shufl wrote to.
     if (f == 8 && r == 8 && RADIX == 8) {
+      LDStx_start(lds2, numWG);             //GRRR.... LDStx_start will do the bar we are trying to save
       for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -126,10 +135,11 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 8 threads written to LDS (4 multiples of 1 and 2 multiples of 4) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 1).
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 7)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -139,26 +149,28 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 8 threads written to LDS (4 multiples of 64 and 2 multiples of 1) and the first 8 threads read from LDS (4 multiples of 64 and 2 multiples of 4).
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 4)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 4)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
   // We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-  else if (SHUFL_BYTES == 8) {
-    local T_Z61* lds = ((local T_Z61*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
+  else if (SBMUL(numWG) * SHUFL_BYTES == 8) {
+    local T_Z61* lds = LDSsharing_ptr((local T_Z61 *)lds2, numWG);
 
 #if LDSPAD
     // Special case first RADIX == 8 code to eliminate LDS bank conflicts.
@@ -166,14 +178,15 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS that uses a little padding.  Pad two values after every row to eliminate bank conflicts.
     // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 448, 1, 65...   u[1] = +8
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -182,16 +195,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS with 8 pads after each row.
     // Read from LDS in output order.  In the example:  u[0] = 0, 64, ... 448, 8, 72...   u[1] = +1
     if (f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8                    +  (lowMe / 8)      * (WG + 8) + (lowMe & 7)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 64) * 8                    +  (lowMe / 8)      * (WG + 8) + (lowMe & 7)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -200,14 +214,15 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS that uses a little padding.  Pad four values after every other row to eliminate bank conflicts.
     // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, 128, 192, 1, 65...   u[1] = +8
     if (f == 1 && r == 4 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i / 2 * (2 * WG + 4) + (i % 2) * WG + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (2 * WG + 4)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i / 2 * (2 * WG + 4) + (i % 2) * WG + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (2 * WG + 4)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -216,16 +231,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS with 4 pads after each row.
     // Read from LDS in output order.  In the example:  u[0] = 0, 64, 128, 192, 8, 72...   u[1] = +1
     if (f == 4 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 32) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 32) * 4                    +  (lowMe / 4)      * (WG + 4) + (lowMe & 3)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 32) * 4 + (lowMe / 32) * 4 + ((lowMe / 4) & 7) * (WG + 4) + (lowMe & 3)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 32) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 32) * 4                    +  (lowMe / 4)      * (WG + 4) + (lowMe & 3)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 32) * 4 + (lowMe / 32) * 4 + ((lowMe / 4) & 7) * (WG + 4) + (lowMe & 3)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -236,16 +252,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
     // Pad one value after every row to eliminate bank conflicts.
     if (1 && f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -254,14 +271,15 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS using a little padding.  Pad four values after every row to eliminate bank conflicts.
     // Read from LDS in the desired output order.  In the example:  u[0] = 0, 64, ... 192, 1, 65...   u[1] = +16
     if (0 && f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (WG + 4)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG / 4 + (lowMe / 4) + (lowMe & 3) * (WG + 4)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -272,16 +290,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  u[0] = 0...192, 16... 32.. 48.. 1...  u[1] = +4
     // Pad 4 values after every row to eliminate bank conflicts.
     if (0 && f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -290,14 +309,15 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS with 4 pads after each row.
     // Read from LDS in output order.  In the example:  u[0] = 0...192, 16... 32.. 48.. 1...  u[1] = +4
     if (1 && f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 16) * 4 + (lowMe / 16) * 4 + ((lowMe / 4) & 3) * (WG + 4) + (lowMe & 3)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 4) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 16) * 4 + (lowMe / 16) * 4 + ((lowMe / 4) & 3) * (WG + 4) + (lowMe & 3)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
@@ -309,16 +329,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 1).
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -328,16 +349,17 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and 2 multiples of 8).
     if (f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -347,14 +369,15 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -364,54 +387,58 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
   // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
-  else if (SHUFL_BYTES == 4) {
+  else if (SBMUL(numWG) * SHUFL_BYTES == 4) {
     // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
     // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
     // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-    local int* lds = (local int*) lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
+    local int* lds = (local int*)LDSsharing_ptr(lds2, numWG);
 
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    LDStx_end(lds2, numWG);
+    return;
   }
 }
 
@@ -427,7 +454,7 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe
 // Shufl two or more fft_WIDTHs or fft_HEIGHTs operating on 64-bit values using LDS_BYTES of LDS memory.  An fft2 is also performed.
 void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG, u32 lowMe) {
   assert(RADIX == 8);
-  assert(SHUFL_BYTES >= 8);
+  assert(SBMUL(numWG) * SHUFL_BYTES >= 8);
 
   u32 mask = f - 1;
   assert((mask & (mask + 1)) == 0);
@@ -438,26 +465,26 @@ void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG,
   // val2 is read from 4 * WG + i * WG/2
 
   // If SHUFL_BYTES is 16 we can write the complete T2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES == 16) {
-    local T2_GF61* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T2_GF61);
+  if (SBMUL(numWG) * SHUFL_BYTES >= 16) {
+    local T2_GF61* lds = LDSsharing_ptr(lds2, numWG);
 
     // Execute the original shufl code with an fft2 add-on.
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       T2_GF61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       T2_GF61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i] = addq(val1, val2);
       else u[i] = subq(val1, val2);
     }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 8 we split the T2 values into two T values.  These are written to LDS memory with two instructions.
-  else if (SHUFL_BYTES == 8) {
-    local T_Z61* lds = ((local T_Z61*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(T_Z61);
+  else if (SBMUL(numWG) * SHUFL_BYTES == 8) {
+    local T_Z61* lds = LDSsharing_ptr((local T_Z61 *)lds2, numWG);
 
 #if LDSPAD
     // Special case second RADIX == 8 to eliminate LDS bank conflicts.
@@ -466,9 +493,9 @@ void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG,
     // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     if (f == 8 && RADIX == 8) {
       local T_Z61 *ldsIn;
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) {
         // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
         // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
@@ -477,9 +504,9 @@ void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG,
         if (lowMe < WG / 2) u[i].x = addq(val1, val2); 
         else u[i].x = subq(val1, val2);
       }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) {
         // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
         // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
@@ -488,59 +515,63 @@ void OVERLOAD shufl_and_fft2(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 numWG,
         if (lowMe < WG / 2) u[i].y = addq(val1, val2); 
         else u[i].y = subq(val1, val2);
       }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Execute the original shufl code with an fft2 add-on.
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       T_Z61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       T_Z61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i].x = addq(val1, val2);
       else u[i].x = subq(val1, val2);
     }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       T_Z61 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       T_Z61 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i].y = addq(val1, val2);
       else u[i].y = subq(val1, val2);
     }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 4 we split the T2 values into 4 int values.  These are written to LDS memory using four instructions.
   // NOT OPTIMIZED TO REDUCE LDS BANK CONFLICTS!!
-  else if (SHUFL_BYTES == 4) {
+  else if (SBMUL(numWG) * SHUFL_BYTES == 4) {
 
 // NEEDS WORK!!!
 
     // Lower LDS requirements may let the optimizer use fewer VGPRs and increase occupancy for WIDTHs >= 1024.
     // Alas, the increased occupancy does not offset extra code needed for shufl_int (the assembly
     // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
-    local int* lds = (local int*) lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(int);
+    local int* lds = (local int*)LDSsharing_ptr(lds2, numWG);
 
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
+    LDStx_end(lds2, numWG);
+    return;
   }
 }
 
@@ -559,9 +590,8 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
 
   // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
   // We're writing 8 bytes at a time, which means groups of 16 must have unique LDS banks.
-  if (SHUFL_BYTES >= 8) {
-    local F2_GF31* lds = lds2;
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
+  if (SBMUL(numWG) * SHUFL_BYTES >= 8) {
+    local F2_GF31* lds = LDSsharing_ptr(lds2, numWG);
 
 #if LDSPAD
     // Special case first RADIX == 8 to eliminate LDS bank conflicts.
@@ -569,10 +599,11 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS that uses a little padding.  Pad two values after every row to eliminate bank conflicts.
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 2) + lowMe] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG / 8 + (lowMe / 8) + (lowMe & 7) * (WG + 2)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -581,12 +612,13 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Pad 8 values after every 64 values to eliminate bank conflicts.
     if (1 && f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
       else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -595,11 +627,12 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS with 8 pads after each row.
     // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     if (0 && f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8                    + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -610,11 +643,12 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
     // Pad one value after every row to eliminate bank conflicts.
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 1) + (lowMe / 16) * 16 + (lowMe & 3) * 4 + i] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 1) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 1) + (lowMe & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -625,11 +659,12 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
     // Pad 4 values after every row to eliminate bank conflicts.
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 3) * (WG + 4) + (lowMe / 16) * 16 + i * 4 + (lowMe & 3)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 16                     +  (lowMe / 16)      * (WG + 4) + (lowMe & 15)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + (lowMe / 64) * 16 + ((lowMe / 16) & 3) * (WG + 4) + (lowMe & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
@@ -641,11 +676,12 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 1 and 2 multiples of 8) and the first 26 threads read from LDS (multiples of 64 and two multiples of 1).
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 8 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((i & 1) * 8) + ((lowMe / 8) & 7))]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ (((lowMe / 8) & 15))]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -655,11 +691,12 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (8 multiples of 64 and 2 multiples of 1) and the first 16 threads read from LDS (8 multiples of 64 and two multiples of 8).
     if (f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 8 * 64 + i * 8 + (lowMe & 7)) ^ (lowMe & 8)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((i & 1) * 8)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 8) & 8)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -669,10 +706,11 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 1 and 4 multiples of 4) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 1).
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe * 4 + i) ^ (lowMe & 15)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 15)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -682,26 +720,28 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Swizzle LDS blocks to eliminate bank conflicts.
     // Swizzle on the first 16 threads written to LDS (4 multiples of 64 and 4 multiples of 1) and the first 16 threads read from LDS (4 multiples of 64 and 4 multiples of 16).
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[(lowMe / 4 * 16 + i * 4 + (lowMe & 3)) ^ (lowMe & 12)] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[(i * WG + lowMe) ^ ((lowMe / 4) & 12)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
   // We're writing 4 bytes at a time, which means groups of 32 must have unique LDS banks.
-  else if (SHUFL_BYTES == 4) {
-    local F_Z31* lds = ((local F_Z31*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
+  else if (SBMUL(numWG) * SHUFL_BYTES == 4) {
+    local F_Z31* lds = LDSsharing_ptr((local F_Z31 *)lds2, numWG);
 
 #if LDSPAD
     // Special case first RADIX == 8 to eliminate LDS bank conflicts.
@@ -711,16 +751,17 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 448, 1, 65...   output[64..127] = +8
     // Pad one value after every row to eliminate bank conflicts.
     if (f == 1 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 4) & 7) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 3) * 8 + i] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 4) * 32 + (i & 3) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + (lowMe / 256) * 32             + ((lowMe / 32) & 7) * (WG + 1) + (lowMe & 31)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -729,18 +770,19 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // Pad 8 values after every 64 values to eliminate bank conflicts.
     if (f == 8 && r == 8 && RADIX == 8) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
       else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
       else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -751,16 +793,17 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in the desired output order.  In the example:  output[0..63] = 0, 64, ... 192, 1, 65...   output[64..127] = +16
     // Pad one value after every row to eliminate bank conflicts.
     if (f == 1 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 1) + (lowMe / 32) * 32 + (lowMe & 7) * 4 + i] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 1)) +  (lowMe / 32)      * (WG + 1) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 +             (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 1) + (lowMe & 31)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 
@@ -771,29 +814,32 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0...192, 16... 32.. 48.. 1...  lds[64..127] = +4
     // Pad 4 values after every row to eliminate bank conflicts.
     if (f == 4 && r == 4 && RADIX == 4) {
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].x; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 3) * (WG + 4) + (lowMe / 32) * 32 + ((lowMe / 4) & 1) * 16 + i * 4 + (lowMe & 3)] = u[i].y; }
-      bar(WG);
+      LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[(i / 2) * 32 + (i & 1) * (2 * (WG + 4)) +  (lowMe / 32)      * (WG + 4) + (lowMe & 31)]; }
       else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64             + (lowMe / 128) * 32 + ((lowMe / 32) & 3) * (WG + 4) + (lowMe & 31)]; }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Otherwise, execute the original shufl code modified to handle case where a full RADIX fft was not done
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * WG + lowMe]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = u[i].y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, numWG);
+    return;
   }
 }
 
@@ -819,9 +865,8 @@ void OVERLOAD shufl_and_fft2(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG,
   // val2 is read from 4 * WG + i * WG/2
 
   // If SHUFL_BYTES is 8 or more we can write the complete F2 value to LDS memory with one instruction.
-  if (SHUFL_BYTES >= 8) {
-    local F2_GF31* lds = ((local F2_GF31*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F2_GF31);
+  if (SBMUL(numWG) * SHUFL_BYTES >= 8) {
+    local F2_GF31* lds = LDSsharing_ptr(lds2, numWG);
 
 #if LDSPAD
     // Special case second RADIX == 8 to eliminate LDS bank conflicts.
@@ -830,9 +875,9 @@ void OVERLOAD shufl_and_fft2(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG,
     // Read from LDS in output order.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     if (f == 8 && RADIX == 8) {
       local F2_GF31 *ldsIn;
-      bar(WG);
+      LDStx_start(lds2, numWG);
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i]; }
-      bar(WG);
+      LDSbar(numWG);
       for (u32 i = 0; i < RADIX; ++i) {
         // Read val1 from the standard shufl's i = i/2,     lowMe = lowMe % WG/2 + (i&1) * WG/2
         // Read val2 from the standard shufl's i = i/2 + 4, lowMe = lowMe % WG/2 + (i&1) * WG/2
@@ -841,46 +886,50 @@ void OVERLOAD shufl_and_fft2(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 numWG,
         if (lowMe < WG / 2) u[i] = addq(val1, val2);
         else u[i] = subq(val1, val2);
       }
+      LDStx_end(lds2, numWG);
       return;
     }
 #endif
 
     // Execute the original shufl code with an fft2 add-on.
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i]; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       F2_GF31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       F2_GF31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i] = addq(val1, val2);
       else u[i] = subq(val1, val2);
     }
+    LDStx_end(lds2, numWG);
+    return;
   }
 
   // If SHUFL_BYTES is 4 we split the F2 values into two F values.  These are written to LDS memory using two instructions.
-  else if (SHUFL_BYTES == 4) {
-    local F_Z31* lds = ((local F_Z31*) lds2);
-    if (numWG > 1) lds += ((u32) get_local_id(0) / WG) * LDS_BYTES / sizeof(F_Z31);
+  else if (SBMUL(numWG) * SHUFL_BYTES == 4) {
+    local F_Z31* lds = LDSsharing_ptr((local F_Z31 *)lds2, numWG);
 
     // Execute the original shufl code with an fft2 add-on.
-    bar(WG);
+    LDStx_start(lds2, numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].x; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       F_Z31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       F_Z31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i].x = addq(val1, val2);
       else u[i].x = subq(val1, val2);
     }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = u[i].y; }
-    bar(WG);
+    LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) {
       F_Z31 val1 = lds[         i * (WG / 2) + lowMe % (WG / 2)];
       F_Z31 val2 = lds[4 * WG + i * (WG / 2) + lowMe % (WG / 2)];
       if (lowMe < WG / 2) u[i].y = addq(val1, val2);
       else u[i].y = subq(val1, val2);
     }
+    LDStx_end(lds2, numWG);
+    return;
   }
 }
 
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 15d9076e..112193b3 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -79,7 +79,9 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH], v[NH];
@@ -193,7 +195,9 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 }
 
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -303,7 +307,9 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 }
 
 KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -432,7 +438,9 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 }
 
 KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 53d7d13e..4f1e396d 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -93,7 +93,9 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
   T2 u[NH];
   const u32 H = ND / SMALL_HEIGHT;
 
@@ -132,7 +134,9 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local T2 lds[LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH], v[NH];
@@ -239,7 +243,9 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local T2 lds[2 * LDS_BYTES / sizeof(T2)];
+  local T2 lds[LDS_BYTES(2) / sizeof(T2)];
+  LDSinit(lds, 2);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   T2 u[NH];
@@ -370,7 +376,9 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
   F2 u[NH];
   const u32 H = ND / SMALL_HEIGHT;
 
@@ -405,7 +413,9 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local F2 lds[LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -508,7 +518,9 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local F2 lds[2 * LDS_BYTES / sizeof(F2)];
+  local F2 lds[LDS_BYTES(2) / sizeof(F2)];
+  LDSinit(lds, 2);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -639,7 +651,9 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -692,7 +706,9 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF31 lds[LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -790,7 +806,9 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF31 lds[2 * LDS_BYTES / sizeof(GF31)];
+  local GF31 lds[LDS_BYTES(2) / sizeof(GF31)];
+  LDSinit(lds, 2);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -975,7 +993,9 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
 KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -1028,7 +1048,9 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 #if SINGLE_WIDE
 
 KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF61 lds[LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -1126,7 +1148,9 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
 }
 
 KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
-  local GF61 lds[2 * LDS_BYTES / sizeof(GF61)];
+  local GF61 lds[LDS_BYTES(2) / sizeof(GF61)];
+  LDSinit(lds, 2);
+
   const u32 H = ND / SMALL_HEIGHT;
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
diff --git a/src/cl/tailutil.cl b/src/cl/tailutil.cl
index f5d9fe51..5eb3fe4d 100644
--- a/src/cl/tailutil.cl
+++ b/src/cl/tailutil.cl
@@ -137,34 +137,34 @@ void OVERLOAD reverse2(local T2_GF61 *lds2, T2_GF61 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
 
-  if (SHUFL_BYTES_H >= 8) {
-    local T2_GF61 *lds = lds2;
-    if (me >= WG) lds += LDS_BYTES / sizeof(T2_GF61);
+  if (SBMUL(2) * SHUFL_BYTES_H >= 8) {
+    local T2_GF61 *lds = LDSsharing_ptr(lds2, 2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
-    bar(WG);
+    LDStx_start(lds2, 2);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i]; }
     // For NH=8, read from lds into u[i]:
     //  u[4] =   u[7]rev   v[7]rev
     //  u[5] =   u[6]rev   v[6]rev
     //  u[6] =   u[5]rev   v[5]rev
     //  u[7] =   u[4]rev   v[4]rev
-    bar(WG);
+    LDSbar(2);
     for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, 2);
   }
 
-  else if (SHUFL_BYTES_H == 4) {
-    local T_Z61 *lds = (local T_Z61 *) lds2;
-    if (me >= WG) lds += LDS_BYTES / sizeof(T_Z61);
-    bar(WG);
+  else if (SBMUL(2) * SHUFL_BYTES_H == 4) {
+    local T_Z61 *lds = LDSsharing_ptr((local T_Z61 *)lds2, 2);
+    LDStx_start(lds2, 2);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i].x; }
-    bar(WG);
+    LDSbar(2);
     for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].x = lds[i * WG + lowMe]; }
-    bar(WG);
+    LDSbar(2);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i].y; }
-    bar(WG);
+    LDSbar(2);
     for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i].y = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, 2);
   }
 }
 
@@ -177,19 +177,21 @@ void OVERLOAD revCrossLine(local T2_GF61 *lds2, T2_GF61 *u) {
   if (SHUFL_BYTES_H >= 8) {
     local T2_GF61 *ldsOut = lds2;
     local T2_GF61 *ldsIn = lds2;
-    if (me < WG) ldsOut += LDS_BYTES / sizeof(T2_GF61); // Crossing LDS halves
-    else ldsIn += LDS_BYTES / sizeof(T2_GF61);          // Staying within LDS halves (just like shufl)
+    if (me < WG) ldsOut += LDS_SHUFL_BYTES(2) / sizeof(T2_GF61); // Crossing LDS halves
+    else ldsIn += LDS_SHUFL_BYTES(2) / sizeof(T2_GF61);          // Staying within LDS halves (just like shufl)
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
     for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[WG * i + lowMe]; }
+    // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+    if (SHARING_LDS(2)) bar();
   }
 
   else if (SHUFL_BYTES_H == 4) {
     local T_Z61 *ldsOut = (local T_Z61 *) lds2;
     local T_Z61 *ldsIn = (local T_Z61 *) lds2;
-    if (me < WG) ldsOut += LDS_BYTES / sizeof(T_Z61);
-    else ldsIn += LDS_BYTES / sizeof(T_Z61);
+    if (me < WG) ldsOut += LDS_SHUFL_BYTES(2) / sizeof(T_Z61);
+    else ldsIn += LDS_SHUFL_BYTES(2) / sizeof(T_Z61);
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].x; }
     bar();   // we need a full bar because we just crossed halves
@@ -198,6 +200,8 @@ void OVERLOAD revCrossLine(local T2_GF61 *lds2, T2_GF61 *u) {
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2].y; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
     for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2].y = ldsIn[WG * i + lowMe]; }
+    // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+    if (SHARING_LDS(2)) bar();
   }
 }
 
@@ -346,24 +350,25 @@ void OVERLOAD reverseLine(local F2_GF31 *lds, F2_GF31 *u) {
 // These versions are for the kernel(s) that use a double-wide workgroup (u in half the workgroup, v in the other half)
 //
 
-void OVERLOAD reverse2(local F2_GF31 *lds, F2_GF31 *u) {
+void OVERLOAD reverse2(local F2_GF31 *lds2, F2_GF31 *u) {
   u32 me = get_local_id(0);
   u32 lowMe = me % WG;
 
-  if (SHUFL_BYTES_H >= 4) {
-    if (me >= WG) lds += LDS_BYTES / sizeof(F2);
+  if (SBMUL(2) * SHUFL_BYTES_H >= 4) {
+    local F2_GF31 *lds = LDSsharing_ptr(lds2, 2);
     // For NH=8, u[0] to u[3] are left unchanged.  Write to lds:
     //  u[7]rev   u[6]rev   u[5]rev   u[4]rev
     //  v[7]rev   v[6]rev   v[5]rev   v[4]rev
-    bar(WG);
+    LDStx_start(lds2, 2);
     for (u32 i = 0; i < NH/2; ++i) { lds[((NH/2 - i) * WG - (me >= WG ? 1 : 0) - lowMe) % (NH/2 * WG)] = u[NH/2 + i]; }
     // For NH=8, read from lds into u[i]:
     //  u[4] =   u[7]rev   v[7]rev
     //  u[5] =   u[6]rev   v[6]rev
     //  u[6] =   u[5]rev   v[5]rev
     //  u[7] =   u[4]rev   v[4]rev
-    bar(WG);
+    LDSbar(2);
     for (u32 i = 0; i < NH/2; ++i) { u[NH/2 + i] = lds[i * WG + lowMe]; }
+    LDStx_end(lds2, 2);
   }
 }
 
@@ -376,12 +381,14 @@ void OVERLOAD revCrossLine(local F2_GF31 *lds2, F2_GF31 *u) {
   if (SHUFL_BYTES_H >= 4) {
     local F2_GF31 *ldsOut = lds2;
     local F2_GF31 *ldsIn = lds2;
-    if (me < WG) ldsOut += LDS_BYTES / sizeof(F2);
-    else ldsIn += LDS_BYTES / sizeof(F2);
+    if (me < WG) ldsOut += LDS_SHUFL_BYTES(2) / sizeof(F2);
+    else ldsIn += LDS_SHUFL_BYTES(2) / sizeof(F2);
     bar();   // we need a full bar because we're crossing halves
     for (u32 i = 0; i < NH/2; ++i) { ldsOut[WG * (NH/2 - 1 - i) + revLowMe] = u[i + NH/2]; }
     bar();   // we need a full bar because we just crossed halves.  LDS reads are compatible with future shufl calls.
     for (u32 i = 0; i < NH/2; ++i) { u[i + NH/2] = ldsIn[WG * i + lowMe]; }
+    // One last bar() is needed when sharing LDS memory.  This is because when sharing a workgroup will write to more than its own LDS area.
+    if (SHARING_LDS(2)) bar();
   }
 }
 

From 982b74f7bf45603df2fa2da5e7d7d362572341ff Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:48:29 -0600
Subject: [PATCH 165/214] Stop the statistics kernels writing past the sample
 buffers

updateStats() records one sample per kernel invocation at a position it reads
and increments from bufROE[0] / bufStatsCarry[0] (kept in the buffer so that
CUDA graphs can replay the kernel), with no bound.  The host caps only its own
counters (carryPos < CARRY_SIZE) and resets the GPU-side position when it
reads the samples -- readCarryStats() -- which happens in the PRP loop and in
measureCarry, and nowhere else.  isPrimeLL and isCERT never call it.

So with -use STATS set, an LL or CERT run keeps recording carry statistics
into bufStatsCarry (CARRY_SIZE + 2 = 100002 floats) forever: after 100000
iterations every further iteration does an atomic_max past the end of the
buffer, into whatever the driver placed after it (buf1 is allocated right
after).  A PRP run with -log >= 200000 overflows by up to 400 KB every log
interval.  For ROE the host avoids this by switching to the non-ROE kernel
once roePos reaches wantROE; nothing equivalent exists for the carry stats.

Pass the buffer capacity to the kernels as STATS_SIZE and stop recording, and
stop advancing the position, once it is reached.  The ROE path is unchanged in
effect (the host already keeps roePos <= ROE_SIZE).  The size enum moves above
clDefines() so it is visible there.

Checked on an Intel UHD iGPU: -prp 5000011 -fft 256:2:256 -use STATS=1 passes
its Gerbicz check with the same residue as without STATS, and -ll with
-use STATS=1 compiles and runs.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the host layer;
fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp         | 11 +++++++----
 src/cl/carryutil.cl | 20 ++++++++++++--------
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..fd6f4d5f 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -233,6 +233,12 @@ constexpr bool isInList(const string& s, initializer_list<string> list) {
   return false;
 }
 
+// Capacity of the ROE and carry statistics sample buffers; passed to the kernels as STATS_SIZE so they stop recording when full.
+enum {
+ROE_SIZE = 100000,
+CARRY_SIZE = 100000
+};
+
 string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal>& extraConf, u64 E, bool doLog,
                  bool &tail_single_wide, bool &tail_single_kernel, u32 &in_place, u32 &pad_size, u32 &wmul) {
   map<string, string> config;
@@ -377,6 +383,7 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
   u32 const N = fft.shape.size();
   defines += toDefine("FFT_VARIANT", fft.variant);
   defines += toDefine("MAXBPW", (u32)(fft.maxBpw() * 100.0f));
+  defines += toDefine("STATS_SIZE", u32(std::min<u32>(ROE_SIZE, CARRY_SIZE)));
 
   if (fft.FFT_FP64 || fft.FFT_FP32) {
     defines += toDefine("WEIGHT_STEP", weightM1(N, E, fft.shape.height * fft.shape.middle, 0, 0, 1));
@@ -776,10 +783,6 @@ string Gpu::kernelDefines(enum WHICH_KERNEL_TYPE which_kernel) {
   return defines + " ";
 }
 
-enum {
-ROE_SIZE = 100000,
-CARRY_SIZE = 100000
-};
 
 Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, bool logFftSize) :
   shared(s),
diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 4a63583d..9d8dda6b 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -161,14 +161,18 @@ void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *b
   // CUDA graphs don't allow arguments to change.  Thus, calculating posROE and storing it in bufROE works better.
   if (me < num_threads) {
     posROE = bufROE[0];
-    atomic_max(bufROE + posROE + 2, u32RoundMax);
-
-    // The second bufRoe entry is a count of the number atomic_maxes performed.  When the last atomic_max is done, increment posROE and clear the counter.
-    if (me == 0) {
-      u32 old_value = atomic_add(bufROE + 1, 1);
-      if (old_value == num_blocks - 1) {
-        bufROE[0] = posROE + 1;
-        bufROE[1] = 0;
+    // The buffer holds STATS_SIZE samples.  The host resets the position only when it reads the samples, and the LL and
+    // CERT loops never read the carry statistics, so once the buffer is full stop recording rather than write past it.
+    if (posROE < STATS_SIZE) {
+      atomic_max(bufROE + posROE + 2, u32RoundMax);
+
+      // The second bufRoe entry is a count of the number atomic_maxes performed.  When the last atomic_max is done, increment posROE and clear the counter.
+      if (me == 0) {
+        u32 old_value = atomic_add(bufROE + 1, 1);
+        if (old_value == num_blocks - 1) {
+          bufROE[0] = posROE + 1;
+          bufROE[1] = 0;
+        }
       }
     }
   }

From 35a03bedb2ef82f3be472334420d6ce8c99d1c6f Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:51:01 -0600
Subject: [PATCH 166/214] Fix the L2_STRIPING branch of fftHin's line numbering

get_line_number() in ffthin.cl used stripe_group_size two lines before
declaring it, and its "if (g  linesInOneStripeGroup)" had no comparison
operator, so ffthin.cl did not compile at all with -DL2_STRIPING=<n>.  Kernels
are compiled lazily and fftHin is only used by exponentiate() -- proof
generation and verification, and CERT -- so a PRP run with
-use INPLACE=1,L2_STRIPING=n completes and then fails when it tries to
generate its proof.

The mapping the code intends is right as written: unlike tailSquare, fftHin
has no Hermitian-pair readiness rule, and by the time it runs for a block
fftMiddleIn has produced every line of both the base_lo and base_hi stripe
groups, which is exactly the 2 * L2_STRIPING * 16 * MIDDLE lines the host
hands it.  Declare stripe_group_size first and restore the "<".

Checked on an Intel UHD iGPU by verifying a freshly generated proof of
M799999 with -fft 256:2:256: -use INPLACE=1 verifies; adding L2_STRIPING=2
failed to compile ffthin.cl before this change and verifies with it.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the tail and
striping kernels; fixed and tested by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/ffthin.cl | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/cl/ffthin.cl b/src/cl/ffthin.cl
index e95eb88d..516d49cc 100644
--- a/src/cl/ffthin.cl
+++ b/src/cl/ffthin.cl
@@ -14,13 +14,14 @@ u32 get_line_number(u32 base_lo) {
   // Old, simple L2 striping code
   // return g / (L2_STRIPING * 16) * WIDTH + base + g % (L2_STRIPING * 16);
 
-  // Process stripe group base_lo or base_hi
+  // Process stripe group base_lo or base_hi.  Unlike tailSquare, there is no Hermitian-pair readiness rule here:
+  // by the time fftHin runs for a block, fftMiddleIn has produced every line of both stripe groups.
+  u32 stripe_group_size = L2_STRIPING;
   u32 base_hi = WIDTH - stripe_group_size * 16 - base_lo;
   u32 linesInOneStripe = 16 * MIDDLE;
-  u32 stripe_group_size = L2_STRIPING;
   u32 linesInOneStripeGroup = stripe_group_size * linesInOneStripe;
   u32 base;
-  if (g  linesInOneStripeGroup) base = base_lo;
+  if (g < linesInOneStripeGroup) base = base_lo;
   else base = base_hi, g -= linesInOneStripeGroup;
   return g / (L2_STRIPING * 16) * WIDTH + base + g % (L2_STRIPING * 16);
 #else

From 7e6e2089eec8d01a8b6b4149f3cd74cc15df6c85 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Wed, 16 Sep 2026 21:53:27 -0600
Subject: [PATCH 167/214] Do not lose a finished PRP result over proof
 generation

Three related problems at the end of isPrimePRP:

1. saveProof() throws "bad proof generation" once its retries and
   reducePower() are exhausted, and the throw escapes the only place the
   result (res64, res2048, isPrime) is returned.  No verified savefile is
   written for k >= kEnd, so a restart redoes the tail and, if the bad residue
   is one every power shares (e.g. a bit-rotted <E>/proof/<(E+1)/2>, whose size
   still passes fileExists and which isValidTo does not CRC), fails the same
   way forever.  The test's answer is known and correct and is never reported.

2. getProofPower() returning 0 logs "Proof generation disabled!" and then
   ProofSet{E, 0} throws "Invalid proof power", so a resumed run whose
   (E+1)/2 residue is missing can never proceed; the worker leaves its task
   loop on every restart.

3. The k == E proof residue is written by the Background thread and
   computeProof() reads it back after fewer than blockSize squarings with no
   join, so on a slow disk it can see a missing or half-written file.

Hold the ProofSet in an optional and only construct it for power > 0; wait
for the background writes before generating the proof; and if generation
fails, log it and return the result with an empty proofPath (writeResultPRP
already omits the "proof" object then).  A stop request during proof
generation is still propagated.

The normal path is unchanged (checked with a short PRP on an Intel UHD iGPU);
the failure paths themselves were not exercised.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the host
layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..0e26c0f9 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2592,8 +2592,11 @@ PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
   assert(checkStep % blockSize == 0);
 
   u32 const power = getProofPower(k);
-  
-  ProofSet proofSet{E, power};
+
+  // power == 0 means "proof generation disabled" (no complete set of residues can be built from here on).  ProofSet does
+  // not accept 0, so only construct one when there is a proof to make.
+  std::optional<ProofSet> proofSet;
+  if (power) { proofSet.emplace(E, power); }
 
   bool isPrime = false;
 
@@ -2612,7 +2615,7 @@ PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
 
   bool skipNextCheckUpdate = false;
 
-  u64 persistK = proofSet.next(k);
+  u64 persistK = proofSet ? proofSet->next(k) : u64(-1);
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
   assert(k % blockSize == 0);
@@ -2655,7 +2658,7 @@ PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
         goto reload;
       }
       (*background)([=, E=this->E] { ProofSet::save(E, power, k, compactBits(rawData, E)); });
-      persistK = proofSet.next(k);
+      persistK = proofSet->next(k);
     }
 
     if (k == kEnd) {
@@ -2714,9 +2717,21 @@ PRPResult Gpu::isPrimePRP([[maybe_unused]] const Task& task) {
         doBigLog(k, res, ok, secsPerIt, kEndEnd, nErrors);
 
         if (k >= kEndEnd) {
-          fs::path const proofFile = saveProof(args, proofSet);
+          // The test is complete; nothing after this point may lose the result.  Make sure the final proof residue,
+          // written by the background thread at k == E, is on disk before computeProof reads it back, and if the proof
+          // cannot be generated report the result without one rather than throw it away.
+          fs::path proofFile;
+          if (proofSet) {
+            background->waitEmpty();
+            try {
+              proofFile = saveProof(args, *proofSet);
+            } catch (...) {
+              if (Signal::stopRequested()) { throw; }
+              log("Proof generation failed; reporting the result without a proof\n");
+            }
+          }
           return {.isPrime=isPrime, .res64=finalRes64, .nErrors=nErrors, .proofPath=proofFile.string(), .res2048=toHex(res2048)};
-        }        
+        }
       } else {
         ++nErrors;
         doBigLog(k, res, ok, secsPerIt, kEndEnd, nErrors);

From 480af43af10589b1f459973598cb098bc172ec8a Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:35:50 -0600
Subject: [PATCH 168/214] Tag every multiplication's ROE sample as a
 multiplication

Gpu::mul() records the current ROE slot in mulRoePos so that readROE() can
split the samples into squaring and multiplication statistics.  The stored
value is in the "+ 2" format (an index into the raw bufROE vector, whose first
two entries are bookkeeping) but the dedup test compared against the raw
roePos, so after one multiplication back() == roePos + 1 > roePos and the next
consecutive multiplication was not recorded.  writeState, doCheck and
exponentiate issue runs of back-to-back modMul calls, so all but the first
were folded into the squaring statistics that drive the Z-score, the "Danger
ROE!" warning and measureROE.

readROE() also returned early when roePos was 0 without clearing mulRoePos,
so indices recorded while sampling was off carried into the next window.

Compare in the same format and clear on both paths.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the host
layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..2149a4e1 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1673,6 +1673,7 @@ pair<RoeInfo, RoeInfo> Gpu::readROE() {
     mulRoePos.clear();
     return {roeStat(squareRoe), roeStat(mulRoe)};
   } else {
+    mulRoePos.clear();   // indices recorded while ROE sampling was off must not tag the next window
     return {};
   }
 }
@@ -1759,7 +1760,8 @@ void Gpu::mul(Buffer<Word>& ioA, Buffer<double>& inB, Buffer<double>& tmp1, bool
   fftW(buf3, tmp1);
 
   // Register the current ROE pos as multiplication (vs. a squaring)
-  if (mulRoePos.empty() || mulRoePos.back() < roePos) { mulRoePos.push_back(roePos + 2); }
+  // mulRoePos holds indices in the "+ 2" format of the raw bufROE vector, so compare in that format too.
+  if (mulRoePos.empty() || mulRoePos.back() != roePos + 2) { mulRoePos.push_back(roePos + 2); }
 
   if (mul3) { carryM(ioA, buf3); } else { carryA(ioA, buf3); }
   carryB(ioA);

From 26a9f9306de491dc4c0570f075245b53a6775844 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:38:52 -0600
Subject: [PATCH 169/214] Skip a Cert worktodo line whose .cert start file is
 missing

bestTask() always prefers a Cert task over PRP/LL, and isCERT() opens
M<E>.cert with File::openReadThrow, which throws fs::filesystem_error when
the file is absent.  That is a std::exception, caught in gpuWorker(), which
then returns: the worker's task loop ends.  The Cert line is only removed
after success, so every restart picks the same line, throws, and exits --
all PRP/LL work behind it is blocked with no recovery.  The file goes missing
on its own if anything fails between fs::remove(fname) and deleteTask at the
end of a CERT, and with a hand-edited worktodo or a partial download.

Skip such a line in bestTask() with a log message, so the worker moves on to
the other tasks; the line stays for when the file appears (AutoPrimeNet adds
the line only after the download).

Before/after with a Cert line, no M<E>.cert, and a PRP line behind it: the
worker exited on the filesystem_error and the PRP never ran; now the line
is skipped and the PRP runs.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Worktodo.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 44a5b075..eae976ea 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -12,6 +12,8 @@
 #include <string>
 #include <optional>
 #include <charconv>
+#include <cinttypes>
+#include <filesystem>
 
 namespace {
 
@@ -97,6 +99,12 @@ static std::optional<Task> bestTask(const fs::path& fileName, bool smallest) {
   optional<Task> best;
   for (const string& line : File::openRead(fileName)) {
     optional<Task> task = parse(line);
+    // A Cert line whose start-value file is not here cannot run: isCERT would throw and end the worker, and since
+    // Cert lines take priority over PRP/LL the worker would be wedged for good.  Skip the line until the file appears.
+    if (task && task->kind == Task::CERT && !std::filesystem::exists("M" + to_string(task->exponent) + ".cert")) {
+      log("Cert start file M%" PRIu64 ".cert not found; skipping that worktodo line for now\n", task->exponent);
+      continue;
+    }
     if (task && (!best
                  || (best->kind != Task::CERT && task->kind == Task::CERT)
                  || ((best->kind != Task::CERT || task->kind == Task::CERT) && smallest && task->exponent < best->exponent))) {

From 32c3d7ed80eb6e22bcd75738d4f26ae4985449ea Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:38:52 -0600
Subject: [PATCH 170/214] Make file errors std::exceptions so top-level
 handlers catch them

CRCError, ReadError, WriteError (File.h) and BadHeaderError (Saver.cpp) were
plain structs.  Only Saver::load catches them by type; the top-level handlers
in main(), gpuWorker() and Background::run() catch const char*, std::string
and std::exception, so any of these escaping ends in std::terminate:

  - a worktodo line without a trailing newline, or longer than 1023
    characters, makes File::readLine throw ReadError inside bestTask ->
    the process aborts ("terminate called after throwing an instance of
    'ReadError'") instead of reporting the line;
  - a full disk while the Background thread writes a savefile or proof
    residue -> WriteError -> terminate of the whole process, all workers;
  - ENOSPC appending to results-N.txt -> WriteError -> terminate.

Derive them from std::runtime_error (keeping the `name` member and the
brace-init throw sites), and add a std::exception handler to main(), which
had none.  Existing catch-by-type sites are unaffected.

Before/after on a worktodo-0.txt whose only line lacks a newline: exit 134
with the terminate message; now "Exception ReadError: read error:
worktodo-0.txt" and a clean exit.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/File.h    | 17 ++++++++---------
 src/Saver.cpp |  5 ++++-
 src/main.cpp  |  3 +++
 3 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/src/File.h b/src/File.h
index 03c7a86e..86f96a2e 100644
--- a/src/File.h
+++ b/src/File.h
@@ -12,6 +12,7 @@
 #include <unistd.h>
 #endif
 #include <filesystem>
+#include <stdexcept>
 #include <utility>
 #include <vector>
 #include <string>
@@ -42,17 +43,15 @@
 
 namespace fs = std::filesystem;
 
-struct CRCError {
-  std::string name;
-};
-
-struct ReadError {
-  std::string name;
-};
-
-struct WriteError {
+// File errors derive from std::exception so that the top-level handlers in main(), gpuWorker() and
+// Background::run() log them and carry on instead of letting them reach std::terminate.
+struct FileError : std::runtime_error {
   std::string name;
+  FileError(const char* kind, std::string n) : std::runtime_error(std::string(kind) + ": " + n), name(std::move(n)) {}
 };
+struct CRCError   : FileError { explicit CRCError(std::string n)   : FileError("CRC error", std::move(n)) {} };
+struct ReadError  : FileError { explicit ReadError(std::string n)  : FileError("read error", std::move(n)) {} };
+struct WriteError : FileError { explicit WriteError(std::string n) : FileError("write error", std::move(n)) {} };
 
 class File {
   FILE* f = nullptr;
diff --git a/src/Saver.cpp b/src/Saver.cpp
index dfb2b314..6bfd7db4 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -30,7 +30,10 @@ static constexpr const char *LL_v1 = "OWL LL 1 E=%" PRIu64 " k=%" PRIu64 " CRC=%
 // Push version number to sync it with PRP.
 static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64 " time=%lf\n";
 
-struct BadHeaderError { string name; };
+struct BadHeaderError : std::runtime_error {
+  string name;
+  explicit BadHeaderError(string n) : std::runtime_error("bad savefile header: " + n), name(std::move(n)) {}
+};
 
 bool startsWith(const string& s, const string& prefix) {
   return s.starts_with(prefix);
diff --git a/src/main.cpp b/src/main.cpp
index becccf9b..7a2f1e8c 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -144,6 +144,9 @@ int main(int argc, char **argv) {
   } catch (const string& mes) {
     log("Exiting because \"%s\"\n", mes.c_str());
     exitCode = isCleanExit(mes.c_str()) ? 0 : 1;
+  } catch (const std::exception& e) {
+    log("Exiting because of exception %s: %s\n", typeName(e), e.what());
+    exitCode = 1;
   }
 
   log("Bye\n");

From 554af7e44b2de626cb9d0a8c1d621b7b2695f034 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:42:28 -0600
Subject: [PATCH 171/214] Only accept Mersenne "1,2,E,-1" shapes on PRP
 worktodo lines

Worktodo::parse took the exponent from parts[2] when a PRP/PRPDC line had
the "1,2,E,-1" shape and otherwise fell back to parts[0].  That fallback
exists for Test=/DoubleCheck= lines, whose first field is the exponent, but
it was applied to PRP lines too, so an assignment for a different number,
e.g. PRP=<AID>,1234567,2,100003,-1 (k*2^n-1) or one with c=+1 or base 3, was
accepted as a Mersenne PRP of exponent k and reported under that AID -- and
since Task::execute retargets a composite exponent to the previous prime, the
line above actually ran M1234547.

Use the bare "E,..." fallback only for LL lines; a PRP line that is not
"1,2,E,-1" is now reported as ignored.

Before/after on the line above: it ran ("Exponent 1234567 is not prime.
Using exponent 1234547 instead"); now "worktodo.txt line ignored", while a
Test= line behind it still parses and runs.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Worktodo.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index 44a5b075..06209827 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -58,8 +58,10 @@ std::optional<Task> parse(const std::string& line) {
       parts.erase(parts.begin());
     }
 
-    string const s = (parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && (parts[3] == "-1" || parts[3] == "-1\n")) ? parts[2]
-      : (!parts.empty() ? parts[0] : "");
+    // PRP lines are "k,b,n,c,..." and only k=1, b=2, c=-1 is a Mersenne number; anything else (k*2^n-1, 2^n+1, base 3)
+    // is not ours and must not be run as exponent k.  The bare "E,..." form is only used by Test=/DoubleCheck= lines.
+    bool const mersenne = parts.size() >= 4 && parts[0] == "1" && parts[1] == "2" && (parts[3] == "-1" || parts[3] == "-1\n");
+    string const s = mersenne ? parts[2] : ((isLL && !parts.empty()) ? parts[0] : "");
 
     const char *end = s.c_str() + s.size();
     u64 exp{};

From ef82c28e5ed9466e8b6f7488a5db3e2d77b585a9 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:42:33 -0600
Subject: [PATCH 172/214] Validate -log, -save and -maxAlloc values and "!"
 config lines

-log accepted 0 (a multiple of 1000) and the PRP loop then divides by it
(k % logStep) -> SIGFPE.  -save accepted 0, which makes Saver::trimFiles index
v[-1] on the first checkpoint; the assert guarding it is debug-only.
-maxAlloc with no value did s.back() on an empty string (an assert in debug,
undefined in release).  "!" per-FFT config lines ignored the sscanf result,
so a line with fewer than two tokens used uninitialised buffers.

Reject each with a message instead.  (Non-numeric values to stoi/stod throw
std::invalid_argument, which main() now reports instead of terminating on,
since the file-error change.)

Found by an AI code audit (Claude, Anthropic's Claude Code) of argument
handling; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Args.cpp | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index d4744d68..29e83aff 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -271,7 +271,10 @@ void Args::parse(const string& line) {
     // conditional defines predicated on a FFT
     char fftBuf[32];
     char configBuf[256];
-    sscanf(line.c_str(), "! %31s %255s", fftBuf, configBuf);
+    if (sscanf(line.c_str(), "! %31s %255s", fftBuf, configBuf) != 2) {   // otherwise the buffers are uninitialised
+      log("config line ignored (expected \"! <fft> <use-flags>\"): \"%s\"\n", line.c_str());
+      return;
+    }
     string const fft = fftBuf;
     string const config = configBuf;
     perFftConfig[fft] = splitUses(config);
@@ -372,7 +375,10 @@ void Args::parse(const string& line) {
       }
     }
     else if (key == "-maxAlloc" || key == "-maxalloc") {
-      assert(!s.empty());
+      if (s.empty()) {                                 // s.back() below would be undefined
+        log("-maxAlloc expects a value, e.g. -maxAlloc 4G\n");
+        throw "-maxAlloc <size>";
+      }
       u32 multiple = (s.back() == 'G') ? (1u << 30) : (1u << 20);
       maxAlloc = size_t(stod(s) * multiple + .5);
     }
@@ -402,8 +408,8 @@ void Args::parse(const string& line) {
       }
     } else if (key == "-log") {
       logStep = stoi(s);
-      if (logStep % 1000 != 0) {
-        log("-log must be a multiple of 1000\n");
+      if (logStep == 0 || logStep % 1000 != 0) {       // 0 would divide by zero in the PRP loop
+        log("-log must be a positive multiple of 1000\n");
         throw "invalid log size";
       }
     } else if (key == "-use") {
@@ -417,7 +423,12 @@ void Args::parse(const string& line) {
     } else if (key == "-unsafeMath") {
       safeMath = false;
     } else if (key == "-save") {
-      nSavefiles = stoi(s);      
+      int const n = stoi(s);
+      if (n < 1) {                                     // 0 makes Saver::trimFiles index v[-1]
+        log("-save must be at least 1\n");
+        throw "invalid -save value";
+      }
+      nSavefiles = n;
     } else {
       log("Argument '%s' '%s' not understood\n", key.c_str(), s.c_str());
       throw "args";

From a04a25510e43902ace19a5f33d1c5c53c82a1dcc Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:43:52 -0600
Subject: [PATCH 173/214] Escape strings in the result JSON

Task::json(const string&) wrapped the value in quotes with no escaping.
-user, -uid (or the derived tailDir) and the uname release/arch strings go
straight into the results line, so a value containing a quote or a backslash
produced an unparseable JSON record.

Escape the quote, the backslash and control characters (as \uXXXX).

Found by an AI code audit (Claude, Anthropic's Claude Code) of result
reporting; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Task.cpp | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/Task.cpp b/src/Task.cpp
index 9d8d3648..7ec35f23 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -15,6 +15,7 @@
 
 #include <cmath>
 #include <cassert>
+#include <cstdio>
 #include <utility>
 
 namespace {
@@ -103,7 +104,17 @@ string json(const vector<string>& v) {
   return {isFirst ? ""s : (s + '}')};
 }
 
-string json(const string& s) { return '"' + s + '"'; }
+// JSON string literal: escape the quote, the backslash and control characters, so a user name or OS string
+// containing them cannot produce an unparseable results line.
+string json(const string& s) {
+  string out = "\"";
+  for (unsigned char c : s) {
+    if (c == '"' || c == '\\') { out += '\\'; out += char(c); }
+    else if (c < 0x20) { char buf[8]; snprintf(buf, sizeof(buf), "\\u%04x", c); out += buf; }
+    else { out += char(c); }
+  }
+  return out + '"';
+}
 string json(int x) { return to_string(x); }
 string json(u32 x) { return to_string(x); }
 string json(u64 x) { return to_string(x); }

From 3cc46732bcddd6f8680b2f9597bf89c12782103c Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:46:25 -0600
Subject: [PATCH 174/214] Check the savefile header's exponent before sizing
 the residue read

readState() parsed the exponent out of the savefile header and used it to
size the residue read (nWords(exponent)) before anyone compared it with the
exponent being run; Saver::load() only checks state.exponent afterwards.
nWords() returns u32, so a corrupt or foreign header controls a resize():
N=1*2^137438953376 gives nWords = 2^32 - 1, a 16 GB allocation, and the
resulting std::bad_alloc / length_error is not one of the errors load()
catches, so it escapes instead of taking the "move the bad file aside and
use the previous checkpoint" path.  (Other bogus values wrap to a small
nWords and end in a CRC error, which is handled.)

Pass the expected exponent into readState() and reject a mismatching header
with BadHeaderError before any read, with a log line saying what was found.

Checked on an Intel UHD iGPU with a savefile whose header says
N=1*2^137438953471-1 for exponent 5000011: the header is reported, the file
is moved to .bad and the run restarts from the previous state.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Saver.cpp | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/Saver.cpp b/src/Saver.cpp
index dfb2b314..68f8ff90 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -32,6 +32,14 @@ static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64
 
 struct BadHeaderError { string name; };
 
+// The header's exponent sizes the residue read that follows; a corrupt header must not be allowed to size it.
+void checkExponent(u64 got, u64 want, const string& header) {
+  if (got != want) {
+    log("savefile header exponent %" PRIu64 " does not match %" PRIu64 ": \"%s\"\n", got, want, rstripNewline(header).c_str());
+    throw BadHeaderError{header};
+  }
+}
+
 bool startsWith(const string& s, const string& prefix) {
   return s.starts_with(prefix);
 }
@@ -88,7 +96,7 @@ fs::path findLast(const fs::path& dir, const string& prefix, const string& kind)
   return path;
 }
 
-PRPState readState([[maybe_unused]] const PRPState& dummy, File fi) {
+PRPState readState(const PRPState& expected, File fi) {
   u64 exponent{}, k{};
   u32 blockSize{}, nErrors{};
   u64 res64{};
@@ -97,11 +105,13 @@ PRPState readState([[maybe_unused]] const PRPState& dummy, File fi) {
   string const header = fi.readLine();
 
   if (sscanf(header.c_str(), PRP_v13, &exponent, &k, &blockSize, &res64, &nErrors, &elapsed) == 6) {
+    checkExponent(exponent, expected.exponent, header);
     return {.exponent=exponent, .k=k, .blockSize=blockSize, .res64=res64, .check=fi.readChecked<u32>(nWords(exponent)), .nErrors=nErrors, .elapsed=elapsed};
   }
 
   u32 crc{};
   if (sscanf(header.c_str(), PRP_v12, &exponent, &k, &blockSize, &res64, &nErrors, &crc) == 6) {
+    checkExponent(exponent, expected.exponent, header);
     return {.exponent=exponent, .k=k, .blockSize=blockSize, .res64=res64, .check=fi.readWithCRC<u32>(nWords(exponent), crc), .nErrors=nErrors, .elapsed=0};
   }
 
@@ -109,18 +119,20 @@ PRPState readState([[maybe_unused]] const PRPState& dummy, File fi) {
   throw BadHeaderError{fi.name};
 }
 
-LLState readState([[maybe_unused]] const LLState& dummy, File fi) {
+LLState readState(const LLState& expected, File fi) {
   u64 exponent{}, k{};
   double elapsed{};
 
   string const header = fi.readLine();
 
   if (sscanf(header.c_str(), LL_v13, &exponent, &k, &elapsed) == 3) {
+    checkExponent(exponent, expected.exponent, header);
     return {.exponent=exponent, .k=k, .data=fi.readChecked<u32>(nWords(exponent)), .elapsed=elapsed};
   }
 
   u32 crc{};
   if (sscanf(header.c_str(), LL_v1, &exponent, &k, &crc) == 3) {
+    checkExponent(exponent, expected.exponent, header);
     return {.exponent=exponent, .k=k, .data=fi.readWithCRC<u32>(nWords(exponent), crc), .elapsed=0};
   }
 
@@ -226,7 +238,9 @@ State Saver<State>::load() {
 
     if (File fi{File::openRead(path)}; fi) {
       try {
-        State state = readState(State{}, std::move(fi));
+        State expected{};
+        expected.exponent = exponent;
+        State state = readState(expected, std::move(fi));
         assert(state.exponent == exponent);
         if (state.exponent == exponent) {
           return state;

From 72804e45386b7a80c336c752fb41db7a51b90c41 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:49:56 -0600
Subject: [PATCH 175/214] CycleFile: do not promote a partial file when the
 write threw

~CycleFile unconditionally renamed "<name>.new" over "<name>".  If the
destructor runs during stack unwinding -- File::write threw WriteError
because the disk filled up half way through a savefile -- the partial .new
file replaced the previous good checkpoint.  The next load then fails its
CRC, moves the file aside and falls back one more checkpoint, so the damage
is bounded, but a good file was destroyed for nothing.

Record std::uncaught_exceptions() at construction and, if more exceptions are
in flight at destruction, delete the .new file instead of renaming it.  Not
exercised (needs a full disk); the change is confined to the destructor.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/CycleFile.cpp | 9 +++++++++
 src/CycleFile.h   | 6 ++++++
 2 files changed, 15 insertions(+)

diff --git a/src/CycleFile.cpp b/src/CycleFile.cpp
index 0b1db8fd..c2488093 100644
--- a/src/CycleFile.cpp
+++ b/src/CycleFile.cpp
@@ -3,6 +3,9 @@
 #include "CycleFile.h"
 #include "fs.h"
 
+#include <exception>
+#include <system_error>
+
 CycleFile::CycleFile(const fs::path& name) :
   name{name},
   f{File::openWrite(name + ".new")}
@@ -12,6 +15,12 @@ CycleFile::CycleFile(const fs::path& name) :
 CycleFile::~CycleFile() {
   if (!f) { return; }
   f.reset();
+  if (std::uncaught_exceptions() > uncaughtAtStart) {
+    // The write threw (WriteError on a full disk, say): keep the previous file, drop the partial one.
+    std::error_code ec;
+    fs::remove(name + ".new", ec);
+    return;
+  }
   fancyRename(name + ".new", name);
 }
 
diff --git a/src/CycleFile.h b/src/CycleFile.h
index 816c3456..e02e8163 100644
--- a/src/CycleFile.h
+++ b/src/CycleFile.h
@@ -2,6 +2,8 @@
 
 #pragma once
 
+#include <exception>
+
 #include "File.h"
 #include <filesystem>
 
@@ -21,4 +23,8 @@ class CycleFile {
 
   // Cancel the rename
   void reset();
+
+  // Exceptions in flight when this object was created; if more are in flight when it is destroyed, the write
+  // is being unwound (e.g. disk full) and the partial .new file must not replace the previous good file.
+  int uncaughtAtStart = std::uncaught_exceptions();
 };

From b4c23409e7fcb089b42f512dddf51e926eb92d08 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:50:02 -0600
Subject: [PATCH 176/214] Two file-utility edge cases: empty readAll(),
 deleteLine temp cleanup

File::readAll() on an empty file called read<char>(0), whose fread of zero
bytes returns 0 and is reported as a ReadError; a legitimately empty file
(the only caller reads kernel source/include files) was an error.  Return
an empty string.

deleteLine() creates "<path>-<threadid>" and, when the line is not found or
the size check fails, returned without removing it, leaving a temp file on
disk for every failed claim attempt.  Remove it on those paths.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/File.h | 1 +
 src/fs.cpp | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/File.h b/src/File.h
index 03c7a86e..9e28e2cf 100644
--- a/src/File.h
+++ b/src/File.h
@@ -264,6 +264,7 @@ class File {
 
   string readAll() {
     u64 const sz = size();
+    if (sz == 0) { return {}; }   // fread of 0 bytes would be reported as a ReadError
     return {read<char>(sz).data(), sz};
   }
 };
diff --git a/src/fs.cpp b/src/fs.cpp
index 8eefa860..7a4c4d6f 100644
--- a/src/fs.cpp
+++ b/src/fs.cpp
@@ -63,7 +63,11 @@ bool deleteLine(const fs::path& path, const string& targetLine, u64 initialSize)
 
   fs::path const tmp = path + ("-"s + toString(this_thread::get_id()));
 
-  if (!copyWithout(targetLine, path, tmp) || !sizeMatches(path, initialSize)) { return false; }
+  if (!copyWithout(targetLine, path, tmp) || !sizeMatches(path, initialSize)) {
+    error_code ec;
+    fs::remove(tmp, ec);   // do not leave "<path>-<threadid>" behind on every failed attempt
+    return false;
+  }
 
   fancyRename(tmp, path);
   return true;

From fa0ab045188fb137c02223043a969325971a9030 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:51:28 -0600
Subject: [PATCH 177/214] tune.txt: skip an unparseable line instead of using
 an uninitialised spec

TuneEntry::readTuneFile logged an unparseable tune.txt line as "ignored" but
did not continue, so an FFTConfig was then built from the uninitialised
specBuf.  A blank line or a "#" comment in tune.txt killed startup with
"Invalid FFT spec".

Found by an AI code audit (Claude, Anthropic's Claude Code) of FFT
selection; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/TuneEntry.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/TuneEntry.cpp b/src/TuneEntry.cpp
index da4e6dad..dd741105 100644
--- a/src/TuneEntry.cpp
+++ b/src/TuneEntry.cpp
@@ -60,6 +60,7 @@ vector<TuneEntry> TuneEntry::readTuneFile(const Args& args) {
     double cost{};
     if (sscanf(line.c_str(), "%lf %31s", &cost, specBuf) < 2) {
       log("tune.txt line '%s' ignored\n", line.c_str());
+      continue;   // otherwise specBuf below is uninitialised
     }
     FFTConfig const fft{specBuf};
     assert(cost >= prevCost && fft.maxExp() > prevMaxExp);

From d79f2a2b5fc1e2a3f297011b1b42722f5d9969e3 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:52:21 -0600
Subject: [PATCH 178/214] FFTConfig::maxExp must use this config's maxBpw, not
 the shape's best

Since 9860255 FFTConfig::maxExp() returned shape.maxExp(), the limit of the
shape's best variant, ignoring the config's own variant and carry width.
FFTConfig::maxBpw() already accounts for both (variant lookup/interpolation
and the CARRY_32 clamp).  With the shape-wide value, bestFit() accepts a
tune.txt row for an exponent past that row's real bits-per-word limit,
TuneEntry's cost/maxExp frontier collapses to one variant per shape, and
tune.cpp always skips the variant_M=1 / CARRY_32 candidates because their
maxExp no longer differs from the base variant's.

Restore u64(maxBpw() * shape.size()).

Found by an AI code audit (Claude, Anthropic's Claude Code) of FFT
selection; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/FFTConfig.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/FFTConfig.h b/src/FFTConfig.h
index fd8a471e..1fac5f86 100644
--- a/src/FFTConfig.h
+++ b/src/FFTConfig.h
@@ -94,7 +94,7 @@ struct FFTConfig {
 
   [[nodiscard]] std::string spec() const;
   [[nodiscard]] u32 size() const { return shape.size(); }
-  [[nodiscard]] u64 maxExp() const { return shape.maxExp(); }
+  [[nodiscard]] u64 maxExp() const { return u64(maxBpw() * shape.size()); }   // this config's variant and carry, not the shape's best
 
   [[nodiscard]] float minBpw() const { return shape.minBpw(); }
   [[nodiscard]] float maxBpw() const;

From 1c96a99341061ca808f1cbeb6b62c1c2b3159578 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 10:08:27 -0600
Subject: [PATCH 179/214] Default INPLACE=1 on nVidia GPUs

-tune already assumes INPLACE=1 is the right choice on nVidia: tune.cpp
sets time_inplace_only = NVIDIAGPU, which forces INPLACE=1 and skips
timing the options that only apply when INPLACE=0.  But the compiled-in
default is INPLACE=0, so a user who has not run -tune, or who runs
without a config.txt, gets the layout the tuner never picks on nVidia.

Make the default vendor-dependent, the same way PAD already is:

 - Gpu.cpp: in_place = isNvidiaGpu(id) ? 1 : 0
 - base.cl: #define INPLACE 1 when NVIDIAGPU and INPLACE was not given

Both sides are needed and must agree.  The C++ in_place only sizes the
data buffers; the kernels take INPLACE from the -D flags, which are
emitted only for keys the user actually passed, so a C++-only change
would have sized the buffers for one layout while compiling the kernels
for the other.

An explicit -use INPLACE=n still wins on either vendor, and -tune is
unaffected since it always sets the flag explicitly.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
---
 src/Gpu.cpp    |  2 +-
 src/cl/base.cl | 10 ++++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..f2da79d3 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -251,7 +251,7 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
 
   // Default value for -use options that must also be parsed in C++ code
   tail_single_wide = false, tail_single_kernel = true;         // Default tailSquare is double-wide in one kernel
-  in_place = 0;                                         // Default is not in-place
+  in_place = isNvidiaGpu(id) ? 1 : 0;                   // Default is in-place for nVidia, not in-place for others (must match base.cl)
   wmul = 2;                                             // Default is carryFused processes two lines at a time
   pad_size = isAmdGpu(id) ? 256 : 0;                    // Default is 256 bytes for AMD, 0 for others
 
diff --git a/src/cl/base.cl b/src/cl/base.cl
index e9cabb57..867752f8 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -91,6 +91,16 @@ G_H        "group height" == SMALL_HEIGHT / NH
 #define OLD_FENCE 1
 #endif
 
+// The default is the in-place FFT data layout for nVidia GPUs, not in-place otherwise.
+// This must match the in_place default in clDefines() in Gpu.cpp.
+#if !defined(INPLACE)
+#if NVIDIAGPU
+#define INPLACE 1
+#else
+#define INPLACE 0
+#endif
+#endif
+
 // Nontemporal reads and writes might be a little bit faster on many GPUs by keeping more reusable data in the caches.
 // However, on those GPUs with large caches there should be a significant speed gain from keeping FFT data in the caches.
 // Default to the big win when caching is beneficial rather than the tiny gain when non-temporal is better.

From 6e3f811b5db531d3192507d20736e978d08dcb72 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 10:08:52 -0600
Subject: [PATCH 180/214] Validate FFT shape and variant at runtime

FFTShape's fallback for unlisted shapes manipulates width/middle/height
towards a shape with known bits-per-word.  For a too-small shape (reachable
through -tune / -info / a size range, which bypass FFTConfig's spec checks)
"while (h < 256) { h *= 2; m /= 2; }" drives middle to 0, the recursion
re-enters with m == 0 and "while (m < 9) { m *= 2; ... }" never terminates:
"-tune -fft 128:2:128" hangs.  Apply the same limits FFTConfig applies to a
full spec in the FFTShape constructor, and never let the fallback produce a
middle below 2.

The variant digits were only asserted; in a release build an out-of-range
digit (the shipped tune.txt has rows in the old encoding with a 3) indexes
past bpw[] in maxBpw() and selects kernel variants that do not exist.  Check
them and report.

Found by an AI code audit (Claude, Anthropic's Claude Code) of FFT
selection; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/FFTConfig.cpp | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index e1687af6..fec3bc47 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -132,6 +132,13 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
   // Un-initialized shape, don't set BPW
   if (w == 1 && m == 1 && h == 1) { return; }
 
+  // Same limits FFTConfig applies to a full spec.  Shapes can also arrive here from -tune / -info / size ranges, and a
+  // too-small one (e.g. 128:2:128) drives middle to 0 in the fallback below and then loops forever.
+  if ((w != 256 && w != 512 && w != 1024 && w != 4096) || m < 2 || m > 16 || (h != 256 && h != 512 && h != 1024)) {
+    log("Invalid FFT shape %u:%u:%u (width 256/512/1024/4096, middle 2..16, height 256/512/1024)\n", w, m, h);
+    throw "Invalid FFT shape";
+  }
+
   string const s = spec();
   if (auto it = BPW.find(s); it != BPW.end()) {
     bpw = it->second;
@@ -147,7 +154,7 @@ FFTShape::FFTShape(enum FFT_TYPES t, u32 w, u32 m, u32 h) :
       while (w >= 4*h) { w /= 2; h *= 2; }
       while (w < h || w < 256 || w == 2048) { w *= 2; h /= 2; }
       while (h < 256) { h *= 2; m /= 2; }
-      if (m == 1) m = 2;
+      if (m < 2) m = 2;
 
       // Make up some defaults (should only happen for experimental FFT types (t >= 52)
       if (w == orig_w && m == orig_m && h == orig_h) {
@@ -266,9 +273,12 @@ FFTConfig::FFTConfig(FFTShape shape, u32 variant, enum CARRY_KIND carry) :
   variant{variant},
   carry{carry}
 {
-  assert(variant_W(variant) < N_VARIANT_W);
-  assert(variant_M(variant) < N_VARIANT_M);
-  assert(variant_H(variant) < N_VARIANT_H);
+  // Checked at runtime, not only asserted: an out-of-range digit indexes past bpw[] in maxBpw() and selects kernel
+  // variants that do not exist (the shipped tune.txt predates this encoding and has such rows).
+  if (variant_W(variant) >= N_VARIANT_W || variant_M(variant) >= N_VARIANT_M || variant_H(variant) >= N_VARIANT_H) {
+    log("Invalid FFT variant %u for %s (digits must be < %u%u%u)\n", variant, shape.spec().c_str(), N_VARIANT_W, N_VARIANT_M, N_VARIANT_H);
+    throw "Invalid FFT variant";
+  }
 
   if      (shape.fft_type == FFT64)     FFT_FP64 = true, FFT_FP32 = false, NTT_GF31 = false, NTT_GF61 = false, WordSize = 4;
   else if (shape.fft_type == FFT3161)   FFT_FP64 = false, FFT_FP32 = false, NTT_GF31 = true, NTT_GF61 = true, WordSize = 8;

From d3d440ba6d42c88d0baae0ef2d7f009481c95863 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 10:08:52 -0600
Subject: [PATCH 181/214] Honour the FFT type for size-only -fft specs and
 prefixed size ranges

A bare size ("-fft 8M") took FFTShape::multiSpec(spec).front().  multiSpec
resolves a size through allShapes(), which enumerates every FFT type and
sorts by size, width and height only, so for 1M/2M/4M/8M the first entry is
an FP32+GF61 (or FP32+GF31+GF61) NTT and the FP64 run the user asked for
silently became an integer-NTT run.  The type prefix ("-fft 1:8M") was
parsed and then discarded on that path; worse, the size range was split
from the original spec, so "1:8M" was read as the size 1.

In FFTConfig, filter the size's shapes to the requested type (FP64 unless a
prefix is given) and report if none exists; in multiSpec, parse the range
from the part after the prefix and, when a prefix is present, keep only that
type.  An unprefixed range in -tune still means every type, as before.

Found by an AI code audit (Claude, Anthropic's Claude Code) of FFT
selection; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/FFTConfig.cpp | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/src/FFTConfig.cpp b/src/FFTConfig.cpp
index e1687af6..02dda39b 100644
--- a/src/FFTConfig.cpp
+++ b/src/FFTConfig.cpp
@@ -52,10 +52,12 @@ vector<FFTShape> FFTShape::multiSpec(const string& iniSpec) {
 
   for (const string &spec : split(iniSpec, ',')) {
     enum FFT_TYPES fft_type = FFT64;
+    bool hasTypePrefix = false;
     auto parts = split(spec, ':');
     if (parseInt(parts[0]) < 60) {      // Look for a prefix specifying the FFT type
       fft_type = (enum FFT_TYPES) parseInt(parts[0]);
       parts = vector(next(parts.begin()), parts.end());
+      hasTypePrefix = true;
     }
     assert(parts.size() <= 3);
     if (parts.size() == 3) {
@@ -67,11 +69,14 @@ vector<FFTShape> FFTShape::multiSpec(const string& iniSpec) {
     }
     assert(parts.size() == 1);
 
-    parts = split(spec, '-');
-    assert(!parts.empty() && parts.size() <= 2);
-    u32 const sizeFrom = parseInt(parts[0]);
-    u32 const sizeTo = parts.size() == 2 ? parseInt(parts[1]) : sizeFrom;
+    // Parse the size range from the part after the type prefix (splitting the whole spec would read "1:8M" as 1).
+    auto range = split(parts[0], '-');
+    assert(!range.empty() && range.size() <= 2);
+    u32 const sizeFrom = parseInt(range[0]);
+    u32 const sizeTo = range.size() == 2 ? parseInt(range[1]) : sizeFrom;
     auto shapes = allShapes(sizeFrom, sizeTo);
+    // allShapes() enumerates every FFT type; an explicit prefix asks for one of them.
+    if (hasTypePrefix) { std::erase_if(shapes, [fft_type](const FFTShape& sh) { return sh.fft_type != fft_type; }); }
     if (shapes.empty()) {
       log("Could not find a FFT config for '%s'\n", spec.c_str());
       throw "Invalid FFT spec";
@@ -247,7 +252,15 @@ FFTConfig::FFTConfig(const string& spec) {
   }
   
   if (v.size() == 1) {
-    *this = {FFTShape::multiSpec(spec).front(), LAST_VARIANT, CARRY_AUTO};
+    // A bare size ("8M") means an FFT of that size of the requested type -- FP64 unless a prefix says otherwise.
+    // multiSpec() returns every type for an unprefixed size, sorted without regard to type, so pick ours explicitly.
+    auto shapes = FFTShape::multiSpec(spec);
+    std::erase_if(shapes, [fft_type](const FFTShape& sh) { return sh.fft_type != fft_type; });
+    if (shapes.empty()) {
+      log("No FFT of type %d with size '%s'\n", int(fft_type), v[0].c_str());
+      throw "Invalid FFT spec";
+    }
+    *this = {shapes.front(), LAST_VARIANT, CARRY_AUTO};
   } else if (v.size() == 3) {
     *this = {FFTShape{fft_type, v[0], v[1], v[2]}, LAST_VARIANT, CARRY_AUTO};
   } else if (v.size() == 4) {

From 74935f50d12ec24a4b0bcabb721631cefb9e9498 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 10:11:33 -0600
Subject: [PATCH 182/214] Do not use CUDA graphs under -profile

use_graphs was enabled whenever the device supports graphs and GRAPHS=1
(the default), regardless of -profile.  With profiling on, the four
bottom-half kernels are launched once under stream capture -- their start/end
events are recorded into the capturing stream and never execute -- and every
later squaring is a cuGraphLaunch that produces no events at all.  The
profile therefore lists fftMidIn / tailSquare / fftMidOut / carryFused as
about one call of ~0 ns while they are most of the runtime, which defeats the
purpose of -profile on the CUDA build.

Disable graphs while profiling.  This trades away the graph launch overhead
in the profiled numbers, which is the usual trade-off for per-kernel timing.

Not run here (no CUDA hardware); the change is one condition.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the CUDA
paths; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..9039388c 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -1004,8 +1004,10 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     auxQueues.push_back(Queue{*shared.context, args.profile, true});
   }
 
-  // Set flag indicating we're going to use CUDA graphs
-  use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1);
+  // Set flag indicating we're going to use CUDA graphs.  Not under -profile: a graph replays the four bottom-half
+  // kernels without per-kernel events, and the events recorded while capturing the graph never execute, so the
+  // profile would show those kernels -- most of an iteration -- as one call of ~0 ns.
+  use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1) && !args.profile;
 
   // Set L1 cache configuration.  Really we should only do this once rather than once per worker.
   // However, the current way PRPLL is organized would then make this option hard to tune.

From 52429286bcb9cc7316b5d3d5dc73af15dcb2d126 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 10:23:37 -0600
Subject: [PATCH 183/214] Checkpoint CERT assignments

isCERT ran its squarings from k = 0 every time: there was no savefile, so
stopping a certification meant redoing all of it, and nothing on disk told
AutoPrimeNet how far along it was.  PRP and LL already have Saver<State>
with a per-kind savefile ("<kind>-<E>/<E>-<k>.<kind>"); give CERT the same.

CERTState is LLState plus the assignment's squaring count, written with a
header "OWL CERT 1 N=1*2^E-1 k=K squarings=S time=T" followed by the residue
with the usual checksum.  isCERT loads the most recent checkpoint, starts
from the M<E>.cert file only when there is none (or when the checkpoint's
squaring count does not match the assignment), saves at every log point and
on a stop request, and removes its checkpoints when the certification
completes.  The log cadence follows -log as LL does, instead of a fixed
100000, so checkpoints land at the same points.

Checked on an Intel UHD iGPU with a random 5000011 start value and 60000
squarings: a run interrupted with SIGINT after the 20000 checkpoint left
"cert-5000011/5000011-000020000.cert" and a checkpoint at the stop; the next
run logged "CERT loaded @ <k>", finished, wrote the result, and removed the
checkpoints, the .cert start file and the worktodo line.  The resumed run's
residues at 40000 and 60000 and its SHA-3 match an uninterrupted run on the
same start value.

Requested by Teal on gwoltman/gpuowl#23; implemented by Claude (Anthropic's
Claude Code) working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Gpu.cpp   | 23 +++++++++++++++++++----
 src/Saver.cpp | 28 ++++++++++++++++++++++++++++
 src/Saver.h   | 12 ++++++++++++
 3 files changed, 59 insertions(+), 4 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index ba5e3f79..390811ab 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -2833,22 +2833,34 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
 // AutoPrimenet.py does not add the cert entry to worktodo.txt until it has successfully downloaded the .cert file.
 
-  { // Enclosing this code in braces ensures the file will be closed by the File destructor.  The later file deletion requires the file be closed in Windows.
+  // Resume from a checkpoint if there is one for this assignment; otherwise start from the .cert file.
+  Saver<CERTState> saver{E, 1000, args.nSavefiles};
+  CERTState state = saver.load();
+  if (!state.data.empty() && state.squarings != task.squarings) {
+    log("CERT checkpoint is for %" PRIu64 " squarings, assignment says %u; starting over\n", state.squarings, task.squarings);
+    state = CERTState{.exponent=E, .k=0, .squarings=0, .data={}, .elapsed=0};
+  }
+
+  if (!state.data.empty()) {
+    writeIn(bufData, state.data);
+    log("CERT loaded @ %" PRIu64 "\n", state.k);
+  } else { // Enclosing this code in braces ensures the file will be closed by the File destructor.  The later file deletion requires the file be closed in Windows.
     File fi = File::openReadThrow(fname);
     u32 const nBytes = u32((E - 1) / 8 + 1);
     Words const B = fi.readBytesLE(nBytes);
     writeIn(bufData, B);
   }
 
+  double const elapsedBefore = state.elapsed;
   Timer elapsedTimer;
 
   elapsedTimer.reset();
 
-  u32 const startK = 0;
+  u32 const startK = u32(state.k);
 
   IterationTimer iterationTimer{startK};
 
-  u32 k = 0;
+  u32 k = startK;
   u32 const kEnd = task.squarings;
   enum LEAD_TYPE leadIn = LEAD_NONE;
 
@@ -2861,7 +2873,7 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
       log("Stopping, please wait..\n");
     }
 
-    bool const doLog = (k % 100'000 == 0) || doStop;
+    bool const doLog = (k % args.logStep == 0) || doStop;   // same cadence as LL; every log point is also a checkpoint
     enum LEAD_TYPE const leadOut = doLog || useLongCarry ? LEAD_NONE : LEAD_WIDTH;
 
     squareCERT(bufData, leadIn, leadOut);
@@ -2879,9 +2891,12 @@ array<u64, 4> Gpu::isCERT(const Task& task) {
 
     if (k >= kEnd) {
       fs::remove (fname);
+      Saver<CERTState>::clear(E);
       return std::move(SHA3{}.update(data.data(), u32((E-1)/8+1))).finish();
     }
 
+    saver.save({.exponent=E, .k=k, .squarings=kEnd, .data=std::move(data), .elapsed=elapsedBefore + elapsedTimer.at()});
+
     if (doStop) { throw "stop requested"; }
   }
 }
diff --git a/src/Saver.cpp b/src/Saver.cpp
index dfb2b314..c7794b84 100644
--- a/src/Saver.cpp
+++ b/src/Saver.cpp
@@ -29,6 +29,7 @@ static constexpr const char *LL_v1 = "OWL LL 1 E=%" PRIu64 " k=%" PRIu64 " CRC=%
 // Anticipated next version.
 // Push version number to sync it with PRP.
 static constexpr const char *LL_v13 = "OWL LL 13 N=1*2^%" PRIu64 "-1 k=%" PRIu64 " time=%lf\n";
+static constexpr const char *CERT_v1 = "OWL CERT 1 N=1*2^%" PRIu64 "-1 k=%" PRIu64 " squarings=%" PRIu64 " time=%lf\n";
 
 struct BadHeaderError { string name; };
 
@@ -136,6 +137,28 @@ void writeState(const File& fo, const PRPState& state) {
   fo.writeChecked(state.check);
 }
 
+CERTState readState([[maybe_unused]] const CERTState& dummy, File fi) {
+  u64 exponent{}, k{}, squarings{};
+  double elapsed{};
+
+  string const header = fi.readLine();
+
+  if (sscanf(header.c_str(), CERT_v1, &exponent, &k, &squarings, &elapsed) == 4) {
+    return {.exponent=exponent, .k=k, .squarings=squarings, .data=fi.readChecked<u32>(nWords(exponent)), .elapsed=elapsed};
+  }
+
+  log("Loading CERT from '%s': bad header '%s'\n", fi.name.c_str(), header.c_str());
+  throw BadHeaderError{fi.name};
+}
+
+void writeState(const File& fo, const CERTState& state) {
+  assert(state.data.size() == nWords(state.exponent));
+  if (fo.printf(CERT_v1, state.exponent, state.k, state.squarings, state.elapsed) <= 0) {
+    throw WriteError{fo.name};
+  }
+  fo.writeChecked(state.data);
+}
+
 void writeState(const File& fo, const LLState& state) {
   assert(state.data.size() == nWords(state.exponent));
   if (fo.printf(LL_v13, state.exponent, state.k, state.elapsed) <= 0) {
@@ -167,6 +190,10 @@ template<> LLState Saver<LLState>::initState() {
   return {.exponent=exponent, .k=0, .data=makeWords(exponent, 4), .elapsed=0};
 }
 
+template<> CERTState Saver<CERTState>::initState() {
+  return {.exponent=exponent, .k=0, .squarings=0, .data={}, .elapsed=0};   // no checkpoint: caller starts from the .cert file
+}
+
 
 // ---- Saver ----
 
@@ -297,3 +324,4 @@ void Saver<State>::dropMostRecent() {
 
 template class Saver<PRPState>;
 template class Saver<LLState>;
+template class Saver<CERTState>;
diff --git a/src/Saver.h b/src/Saver.h
index 07fc44a6..359552fc 100644
--- a/src/Saver.h
+++ b/src/Saver.h
@@ -31,6 +31,18 @@ struct LLState {
   double elapsed{};
 };
 
+// A CERT (certification) in progress: the current residue after k of `squarings` squarings.  An empty `data`
+// means "no checkpoint": start from the M<E>.cert file.
+struct CERTState {
+  static const constexpr char* KIND = "cert";
+
+  u64 exponent;
+  u64 k;
+  u64 squarings;
+  vector<u32> data;
+  double elapsed{};
+};
+
 template<typename State>
 class Saver {
   u64 exponent;

From 50a2dafda130d2fe3a45881ac0d18be870c9d4bf Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:38:52 -0600
Subject: [PATCH 184/214] Serialize the global-worktodo claim across worker
 threads

getWork() claims a task from the shared worktodo.txt with a read-size /
rewrite / compare-size protocol that the comment describes as protection
against other processes.  Within one process nothing serializes it: with
-workers N all workers start together, find their local worktodo-N.txt
empty, and hit the global file at once.  Two of them read the same size,
pick the same (deterministically chosen) task, each append it to their own
local file, each rewrite the global file without it, each pass the size
check because neither has renamed yet, and both rename.  The global file
ends up consistent, but the task is now in two local files: two workers run
the same exponent in the same <E>/ directory, writing the same savefile
paths from two threads, and produce two results for one assignment.

Take a process-wide mutex around the claim.  The cross-process heuristic is
unchanged.

Not exercised here (needs -workers > 1 with a pool directory on a GPU that
can run two instances); the change is a static std::mutex and a lock_guard.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Worktodo.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index eae976ea..710572b0 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -14,6 +14,7 @@
 #include <charconv>
 #include <cinttypes>
 #include <filesystem>
+#include <mutex>
 
 namespace {
 
@@ -146,6 +147,11 @@ optional<Task> getWork(Args& args, i32 instance) {
        8. start again (from step 1)
   */
 
+  // The size heuristic below guards against other processes.  Within this process the workers start together and
+  // would all read the same file and pick the same task, so serialize the claim itself.
+  static std::mutex claimMutex;
+  std::lock_guard<std::mutex> const claimLock(claimMutex);
+
   for (int retry = 0; retry < 2; ++retry) {
     u64 const initialSize = fileSize(worktodo);
     if (!initialSize) { return {}; }

From 8bce298d977b0d998251fcf8e367e0709e40ba6a Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 09:47:47 -0600
Subject: [PATCH 185/214] Ignore worktodo lines whose exponent is not prime

Task::execute replaces a composite exponent with the previous prime and only
warns.  That is meant for "-prp <random>" timing runs, but it also applied to
worktodo assignments: a PRP=/Test= line with a composite exponent ran a
different exponent and reported the result under the line's AID.  (The proof
VERIFY path hits assert(proof.E == exponent) for the same reason.)

Reject such lines in Worktodo::parse with a message, the way malformed lines
are, so the retarget only ever applies to command-line exponents.  Primes is
a small sieve and cheap to construct per line.

Before/after with PRP=<AID>,1,2,1234567,-1 followed by a Test= line: the
composite line ran as M1234547; now it is ignored and the Test= line runs.

Found by an AI code audit (Claude, Anthropic's Claude Code) of the
persistence layer; fixed by Claude working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/Worktodo.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/Worktodo.cpp b/src/Worktodo.cpp
index eae976ea..ddf3fd86 100644
--- a/src/Worktodo.cpp
+++ b/src/Worktodo.cpp
@@ -7,6 +7,7 @@
 #include "common.h"
 #include "Args.h"
 #include "fs.h"
+#include "Primes.h"
 
 #include <cassert>
 #include <string>
@@ -67,6 +68,13 @@ std::optional<Task> parse(const std::string& line) {
     u64 exp{};
     auto [ptr, _] = from_chars(s.c_str(), end, exp, 10);
     if (ptr != end) { exp = 0; }
+    // Task::execute silently retargets a composite exponent to the previous prime.  That is a convenience for
+    // "-prp <random>" timing runs; an assignment line with a composite exponent is a mistake, and running a
+    // different exponent under its AID would report the wrong result.  Ignore the line instead.
+    if (exp > 1000 && !Primes{}.isPrime(exp)) {
+      log("worktodo.txt line ignored, exponent %" PRIu64 " is not prime: \"%s\"\n", exp, rstripNewline(line).c_str());
+      return {};
+    }
     if (exp > 1000) { return {{.kind=isPRP ? Task::PRP : Task::LL, .exponent=exp, .AID=AID, .line=line, .squarings=0}}; }
   }
   if (isCERT) {

From dfecaf7b4c792b382482ffa883f4c1ddbf658693 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Thu, 17 Sep 2026 19:05:11 +0000
Subject: [PATCH 186/214] Changed AI fix for disabling GRAPHS for -time. 
 You'll get a warning message now (MULTI_Q too).

---
 src/Gpu.cpp | 21 +++++++++++++++++----
 1 file changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 9039388c..486420f5 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -329,6 +329,21 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
     }
   }
 
+  // MULTI_Q is not allowed when profiling with -time
+  if (args.profile && args.value("MULTI_Q", 0)) {
+    args.flags["MULTI_Q"] = to_string(0);
+    log("MULTI_Q is disabled when profiling with -time.\n");
+  }
+  // GRAPHS are not allowed when profiling with -time.  GRAPH replays the four bottom-half
+  // kernels without per-kernel events, and the events recorded while capturing the graph never execute, so the
+  // profile would show those kernels -- most of an iteration -- as one call of ~0 ns.
+  if (args.profile && args.value("GRAPHS", 1)) {
+    args.flags["GRAPHS"] = to_string(0);
+#if CUDA_BACKEND
+    log("GRAPHS are disabled when profiling with -time.\n");
+#endif
+  }
+
   // L2_STRIPING is not allowed if INPLACE=0.  Maximum L2_STRIPING is WIDTH/64 if MULTI_Q=0 and WIDTH/128 if MULTI_Q=1.
   // Technically, L2_STRIPING of WIDTH/32, MULTI_Q=0 could be allowed but that is just a more complicated way to implement L2_STRIPING=0.
   // Also, WIDTH/64, MULTI_Q=1 could be allowed with some marker/sync code changes but that is very similar to L2_STRIPING=0.
@@ -1004,10 +1019,8 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     auxQueues.push_back(Queue{*shared.context, args.profile, true});
   }
 
-  // Set flag indicating we're going to use CUDA graphs.  Not under -profile: a graph replays the four bottom-half
-  // kernels without per-kernel events, and the events recorded while capturing the graph never execute, so the
-  // profile would show those kernels -- most of an iteration -- as one call of ~0 ns.
-  use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1) && !args.profile;
+  // Set flag indicating we're going to use CUDA graphs.
+  use_graphs = graph_square[0].isSupported(shared.context->deviceId()) && args.value("GRAPHS", 1);
 
   // Set L1 cache configuration.  Really we should only do this once rather than once per worker.
   // However, the current way PRPLL is organized would then make this option hard to tune.

From 4b2e1817f6ff484935bf5b763ea65d969f0791db Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 20:00:50 -0600
Subject: [PATCH 187/214] Fall back to OpenCL C 3.0 where 2.0 is unavailable;
 pass no compile options to the linker

The kernels were always compiled with -cl-std=CL2.0, and clLinkProgram was
handed "-cl-finite-math-only".  Every GPU driver we run on accepts both, but
an OpenCL 3.0 implementation is not required to offer OpenCL C 2.0, and POCL
(and likely Mesa rusticl) does not: it rejects the option outright, so no
kernel ever compiled there --

    Build option -cl-std specified OpenCL C version 2.0, but device cpu
    doesn't support that OpenCL C version.

-- and its linker rejects a compile-only option (INVALID_LINKER_OPTIONS),
which the GPU vendors silently ignore.

Probe once at KernelCompiler construction: compile an empty kernel with
-cl-std=CL2.0 and, only if that is rejected and -cl-std=CL3.0 is accepted,
use CL3.0 for all kernels and say so.  OpenCL C 3.0 carries what the kernels
use from 2.0 (generic address space, memory-order atomics) as optional
features, which such devices report.  Devices that accept CL2.0 -- all the
GPUs -- see no change at all.  Pass no options to clLinkProgram; the
finite-math option stays on the compile step, where it acts.

Checked: on an Intel UHD iGPU the probe keeps CL2.0 and a 256:2:256 run gives
the same residue as before (2213bb0fe8602a74 at 2000).  On a POCL CPU device
the fallback triggers, every kernel compiles, and 10000 iterations pass the
Gerbicz check with residues identical to the iGPU's (2213bb0fe8602a74,
49e39cc3b65f3399).  Under -cl-std=CL3.0 the GF61 tail kernels that hit
OUT_OF_RESOURCES on the Intel iGPU under CL2.0 also compile and run there.

Found while adding a kernel-compile check to CI (#65); implemented by
Claude (Anthropic's Claude Code) working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/KernelCompiler.cpp | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index ab3144d5..d384a6f1 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -27,17 +27,37 @@ static_assert(sizeof(Program) == sizeof(cl_program));
 // * -fno-bin-llvmir
 // * various: -fno-bin-source -fno-bin-amdil
 
+// Does the device's compiler accept this -cl-std?  Compiles an empty kernel with just that option.
+static bool acceptsClStd(cl_context context, cl_device_id deviceId, const string& clStd) {
+  Program probe = loadSource(context, "kernel void probe() {}\n");
+  if (!probe) { return false; }
+  string const opts = "-cl-std=" + clStd;
+  return clCompileProgram(probe.get(), 1, &deviceId, opts.c_str(), 0, nullptr, nullptr, nullptr, nullptr) == CL_SUCCESS;
+}
+
 KernelCompiler::KernelCompiler(const Args& args, const Context* context, const string& clArgs) :
   cacheDir{args.cacheDir.string()},
   context{context->get()},
-  linkArgs{"-cl-finite-math-only " },
-  baseArgs{linkArgs + "-cl-std=CL2.0 " + clArgs},
+  linkArgs{},   // no compile-only options here: clLinkProgram accepts only linker options (POCL enforces it)
+  baseArgs{},
   dump{args.dump},
   useCache{args.useCache},
   verbose{args.verbose},
   deviceId{context->deviceId()}
 {
 
+  // Every GPU driver we run on accepts -cl-std=CL2.0.  Some OpenCL 3.0 implementations (POCL; likely Mesa rusticl)
+  // offer no OpenCL C 2.0 at all and reject the option, but do offer OpenCL C 3.0, whose optional features cover what
+  // the kernels use from 2.0 (generic address space, memory-order atomics).  Probe once and fall back.
+  string clStd = "CL2.0";
+#ifndef CUDA_BACKEND
+  if (!acceptsClStd(context->get(), deviceId, "CL2.0") && acceptsClStd(context->get(), deviceId, "CL3.0")) {
+    clStd = "CL3.0";
+    log("OpenCL C 2.0 is not available on this device; compiling the kernels as OpenCL C 3.0\n");
+  }
+#endif
+  baseArgs = "-cl-finite-math-only -cl-std=" + clStd + ' ' + clArgs;
+
   string const hw = getDriverVersion(deviceId) + ':' + getDeviceName(deviceId);
   if (args.verbose) { log("OpenCL: %s, args %s\n", hw.c_str(), baseArgs.c_str()); }
 

From 36bf699e933daed5084a818249f1942459ffedad Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Thu, 17 Sep 2026 19:23:08 -0600
Subject: [PATCH 188/214] CI: compile the kernels and pass a Gerbicz check on a
 POCL CPU device

The Linux OpenCL jobs install POCL and build the host binary, but only run
"prpll -h".  The kernels in src/cl are compiled at first use, on the device,
so no .cl file was ever compiled by CI; that is how 436bdb4's #error in
base.cl, which broke every non-NVIDIA OpenCL device, went unnoticed until
PR #35.

Add one job, first in the workflow, on a single ubuntu-latest runner: build
the release binary, run 400 iterations of a 256:2:256 FP64 test on the POCL
CPU device and require the Gerbicz check at the end to report OK.  This
compiles the FP64 kernel set for a non-NVIDIA OpenCL target on every push
and pull request, once -- the cost is kernel compilation, so running it in
every matrix cell would only multiply that.  The integer-NTT types are left
out (far too slow on a CPU device), and aarch64 POCL is not tried yet.

Also cancel a superseded run of the same branch or PR (concurrency group)
rather than pay for both.

Needs the OpenCL C 3.0 fallback (POCL offers no OpenCL C 2.0), on which this
is stacked.  POCL's compiler is clang, so this catches #error, syntax and
OpenCL C semantic breakage -- not a vendor compiler's idiosyncrasies.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 .github/workflows/ci.yml | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index d038df19..05e187d8 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -6,7 +6,36 @@ on:
   schedule:
     - cron: '0 0 1 * *'
 
+# A new push to the same branch or PR cancels the previous run instead of paying for both.
+concurrency:
+  group: ${{ github.workflow }}-${{ github.ref }}
+  cancel-in-progress: true
+
 jobs:
+  Kernel-Smoke:
+    name: Kernel compile + Gerbicz check (POCL CPU)
+    # The kernels in src/cl are compiled at first use, on the device, so the build jobs below never see them.
+    # This compiles the FP64 kernel set on POCL's CPU device -- a non-NVIDIA OpenCL target -- and ends in a
+    # Gerbicz check.  One runner, on purpose: the cost is kernel compilation, and it need only happen once.
+    # The integer-NTT types are left out (far too slow on a CPU device); aarch64 POCL is not tried yet.
+    runs-on: ubuntu-latest
+    timeout-minutes: 25
+    steps:
+    - uses: actions/checkout@v7
+    - name: Install
+      run: |
+        sudo apt-get update -y
+        sudo apt-get install -y ocl-icd-opencl-dev pocl-opencl-icd
+    - name: Build
+      run: make -O -j "$(nproc)"
+    - name: Compile the kernels and pass a Gerbicz check
+      run: |
+        cd build-release
+        ./prpll -h
+        timeout 20m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400
+        cat gpuowl-0.log
+        grep -q "OK  *400 " gpuowl-0.log
+
   Linux-OpenCL:
     name: Linux OpenCL
 

From 5cf29bf70fab6cb83f357c0de22b8123fe3d734d Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sat, 19 Sep 2026 01:12:31 +0000
Subject: [PATCH 189/214] CUDA shim: don't trust CUBIN for --maxrregcount, use
 the PTX path instead

NVRTC accepts --maxrregcount=N without complaint but its CUBIN's actual
register usage ignores it (verified: requesting 24 regs for carryFused
still yielded 64). Since the CUBIN-preferring change in 57947a1, every
kernel that asks for a register cap (CARRYFUSED, TAIL, MIDIN, MIDOUT,
and any -use REG*= override) silently got whatever registers ptxas felt
like using instead.

The PTX path already carries a spliced-in .maxnreg directive that the
driver's JIT does honor correctly, so drop the CUBIN specifically for
capped kernels and fall back to that. Kernels with no cap requested
(the majority) keep using the CUBIN fast path.

Verified on a Titan V, FFT 512:16:512:202: tailSquare/carryFused now
hit their intended default caps (88/80) and any -use REGTS64=/REGCF64=
override is honored exactly, instead of being ignored.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/cuda/clwrap_cuda.cpp | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/cuda/clwrap_cuda.cpp b/src/cuda/clwrap_cuda.cpp
index 585a49f5..6006278b 100644
--- a/src/cuda/clwrap_cuda.cpp
+++ b/src/cuda/clwrap_cuda.cpp
@@ -472,9 +472,13 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
     return CL_COMPILE_PROGRAM_FAILURE;
   }
 
-  // NVRTC applies --maxrregcount when it runs ptxas itself, i.e. in the CUBIN.
-  // PTX carries no register cap and the driver JIT never sees the option, so
-  // the PTX fallback gets a .maxnreg directive spliced in ahead of every entry.
+  // --maxrregcount is supposed to be applied by NVRTC's own ptxas when it builds the CUBIN, with the PTX
+  // fallback getting a spliced-in .maxnreg directive for the driver JIT path instead. In practice (verified
+  // against this toolkit/driver: CUDA 13.0, NVRTC accepts --maxrregcount without warning but the resulting
+  // CUBIN's register usage is unaffected by it -- e.g. requesting 24 regs for carryFused still yields 64).
+  // The .maxnreg-spliced PTX + driver JIT does honor the cap correctly. So for any kernel that asked for a
+  // register cap, drop the (silently non-compliant) CUBIN and force the PTX path, which is known to work.
+  // Kernels with no cap requested keep using the CUBIN fast path this shim was added for.
 
   if (maxregcount) {
     string const maxntidPattern = ".maxntid ";
@@ -485,6 +489,7 @@ int clCompileProgram(cl_program prog, unsigned  /*nDevices*/, const cl_device_id
       prog->ptx.insert(pos, maxnregPattern);
       startpos = pos + 20;
     }
+    prog->cubin.clear();
   }
 
   return CL_SUCCESS;

From 34ac865a744b50b2eba68d287a11989a936d92bf Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sat, 19 Sep 2026 10:39:04 -0600
Subject: [PATCH 190/214] carryFused: qualify the ready-flag atomics as global
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The inter-workgroup carry hand-off casts `global u32*` ready flags to a plain
`atomic_uint*`. Without an address-space qualifier that pointee lives in the
generic address space, so the cast only compiles where OpenCL C 2.0's generic
address space is available. On a device without it — POCL's pthread CPU
device on aarch64 (Raspberry Pi 4, Debian 12, POCL 3.1) reports "Generic
address space support: No" — clang rejects every one of the 45 casts:

  carryfused.cl:242:60: casting '__global u32 *' to type '__private atomic_uint *'
  changes address space of pointer

and carryFused fails to compile, so the program cannot run at all. The generic
address space is also an optional feature in OpenCL C 3.0, which the kernels
fall back to (#66), so the kernels should not depend on it.

Cast to `global atomic_uint*` instead. Same code on devices that do have the
generic address space: Intel iGPU and POCL 7.2 on x86 still give
`OK 400 0d42972a9d02005c`. The CUDA translation strips standalone `global`
tokens, so the NVRTC path sees the same source as before.

Written by Claude (Anthropic's Claude Code) working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/cl/carryfused.cl | 90 ++++++++++++++++++++++----------------------
 1 file changed, 45 insertions(+), 45 deletions(-)

diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index bd492843..8d857586 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -224,7 +224,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -236,9 +236,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -271,7 +271,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -282,7 +282,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -455,7 +455,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) { 
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -467,9 +467,9 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -494,7 +494,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -505,7 +505,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -691,7 +691,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -703,9 +703,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -731,7 +731,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -742,7 +742,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -932,7 +932,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -944,9 +944,9 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -972,7 +972,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -983,7 +983,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -1189,7 +1189,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -1201,9 +1201,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -1236,7 +1236,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -1247,7 +1247,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -1472,7 +1472,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -1484,9 +1484,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -1511,7 +1511,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -1522,7 +1522,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -1751,7 +1751,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -1763,9 +1763,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -1790,7 +1790,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -1801,7 +1801,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -2024,7 +2024,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -2036,9 +2036,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -2064,7 +2064,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -2075,7 +2075,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);
@@ -2331,7 +2331,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
     sync();   // Make sure all lanes have completed the CSSTORE
     if (lowMe % WAVEFRONT == 0) {
       u32 pos = gr * (G_W / WAVEFRONT) + lowMe / WAVEFRONT;
-      atomic_store((atomic_uint *) &ready[pos], 1);
+      atomic_store((global atomic_uint *) &ready[pos], 1);
     }
 #endif
   }
@@ -2343,9 +2343,9 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   if (gr < H / WMUL) {
     bar(G_W);
 #if WMUL == 1
-    if (lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #else
-    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((atomic_uint *) &ready[gr], 1); }
+    if (me >= (WMUL-1) * G_W && lowMe == 0) { atomic_store((global atomic_uint *) &ready[gr], 1); }
 #endif
   }
 #endif
@@ -2370,7 +2370,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
   // Wait until our carries are ready.  The barrier below must be reached by every work-item of the
   // workgroup, so the spin-wait and the barrier sit outside the "me < G_W" guard.
 #if OLD_FENCE
-  if (me == 0) { do { spin(); } while(!atomic_load_explicit((atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
+  if (me == 0) { do { spin(); } while(!atomic_load_explicit((global atomic_uint *) &ready[gr - 1], memory_order_relaxed, memory_scope_device)); }
   bar();
 #endif
   if (me < G_W) {
@@ -2381,7 +2381,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 #else
     u32 pos = (gr - 1) * (G_W / WAVEFRONT) + me / WAVEFRONT;
     if (me % WAVEFRONT == 0) {
-      do { spin(); } while(atomic_load_explicit((atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
+      do { spin(); } while(atomic_load_explicit((global atomic_uint *) &ready[pos], memory_order_relaxed, memory_scope_device) == 0);
     }
     sync();
     read_mem_fence(CLK_GLOBAL_MEM_FENCE);

From fd8def34a5ace8cba9cac88068b170d3fa97ec82 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sat, 19 Sep 2026 10:42:06 -0600
Subject: [PATCH 191/214] main: exit non-zero when a worker dies on an
 exception
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

gpuWorker() catches whatever its task throws, logs it and returns, and main()
then reports success: a run that ends with

  Compiling 'transpose.cl' error COMPILE_PROGRAM_FAILURE (-15)
  Exception "Can't compile transpose.cl"
  Bye

exits 0. Only exceptions that escape to main() itself (no device, bad
arguments) set the exit code. Launchers, scripts and CI cannot tell such a run
from a finished one without parsing the log — the kernel smoke job in CI has
to grep for its "OK" line for exactly this reason.

Record the failure in a flag from the worker's catch blocks and let main()
turn it into exit code 1, unless the exception is one of the clean stops
("stop requested", "help", "version") that main() already treats as success.
Nothing else changes: the other workers still run to completion, the log is
the same. A forced compile failure now exits 1; a run that completes its
iterations (which ends through "stop requested") still exits 0.

Written by Claude (Anthropic's Claude Code) working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 src/main.cpp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/main.cpp b/src/main.cpp
index 7a2f1e8c..74ce6ad7 100644
--- a/src/main.cpp
+++ b/src/main.cpp
@@ -16,12 +16,19 @@
 #include "Gpu.h"
 #include "tune.h"
 
+#include <atomic>
 #include <cstring>
 #include <filesystem>
 #include <thread>
 #include <utility>
 // #include <format> from GCC-13 onwards
 
+// Set when a worker dies on an exception, so that main() can report the failure through the exit code
+// even though the other workers (and the process) carry on to a normal end.
+static std::atomic<bool> workerFailed{false};
+
+static bool isCleanExit(const char* reason);
+
 static void gpuWorker(GpuCommon shared, i32 instance) {
   // LogContext context{(instance ? shared.args->tailDir() : ""s) + to_string(instance) + ' '};
   // log("Starting worker %d\n", instance);
@@ -34,10 +41,13 @@ static void gpuWorker(GpuCommon shared, i32 instance) {
     while (auto task = Worktodo::getTask(*shared.args, instance)) { task->execute(shared, instance); }
   } catch (const char *mes) {
     log("Exception \"%s\"\n", mes);
+    if (!isCleanExit(mes)) { workerFailed = true; }
   } catch (const string& mes) {
     log("Exception \"%s\"\n", mes.c_str());
+    if (!isCleanExit(mes.c_str())) { workerFailed = true; }
   } catch (const std::exception& e) {
     log("Exception %s: %s\n", typeName(e), e.what());
+    workerFailed = true;
   }
 }
 
@@ -149,6 +159,8 @@ int main(int argc, char **argv) {
     exitCode = 1;
   }
 
+  if (workerFailed && exitCode == 0) { exitCode = 1; }
+
   log("Bye\n");
   return exitCode;
 }

From b2c1022820b97b48f5aaf510a2cbeb0b2fee3262 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sat, 19 Sep 2026 11:00:15 -0600
Subject: [PATCH 192/214] CI: make the kernel smoke job fast, informative, and
 run it on arm64 too

The Kernel-Smoke job from #65 never completed on a runner: POCL's default
work-group method vectorizes across work-items, and on these kernels that
takes 15-25 minutes on the AVX-512 runner CPUs, so the step ran until the
job-level timeout cancelled it -- and printed nothing, because the log dump
came after the run. Ubuntu's own POCL (5.0 on 24.04, 6.0 on 26.04) is slow on
these kernels even with the vectorizer off, and on the arm runners it aborts
with an internal assertion (WorkitemLoops.cc: "Cannot add context restore for
a PHI node at the region entry!"). conda-forge's POCL 7.1 computes wrong
results.

So the job builds POCL 7.2 from source against the distro LLVM 21 on
ubuntu-26.04, kept in actions/cache (a cache miss costs about 90 s, a hit a
few seconds), selected through OCL_ICD_VENDORS without touching the system,
and runs with POCL_WORK_GROUP_METHOD=loops. The whole job takes about a
minute on a cache hit; the check step itself 20 s. Two matrix entries,
ubuntu-26.04 and ubuntu-26.04-arm: the arm one runs the kernels through
LLVM's AArch64 backend and the host code on arm64 at runtime, which the
build-only arm jobs never do. POCL 7.2 compiles the kernels on aarch64 without
the assertion, both on the runner and on a Raspberry Pi 4 (Debian 12,
LLVM 18): OK 400 0d42972a9d02005c in both work-group methods.

Review suggestions from #65 (tdulcet): no workflow-level concurrency group
(it cancelled the PR's own run), no job-level timeout (a slow apt mirror
should not fail the job) -- a step-level timeout-minutes plus `timeout -s
KILL` on prpll, which ignores SIGTERM inside an OpenCL compile, bound the
cost instead; DEBUG=1 build so the runtime asserts are exercised. The log is
dumped before the exit status is checked so a timeout or crash still shows
how far the kernels got.

One product line: the debug-only assert(iters % 10000 == 0) in Args.cpp
becomes iters > 0. Release builds never enforced it, and a short run is
exactly what a smoke test is.

Written by Claude (Anthropic's Claude Code) working with Mark Rose.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
---
 .github/workflows/ci.yml | 57 +++++++++++++++++++++++++++++++---------
 src/Args.cpp             |  2 +-
 2 files changed, 45 insertions(+), 14 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 05e187d8..b174b00f 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -6,34 +6,65 @@ on:
   schedule:
     - cron: '0 0 1 * *'
 
-# A new push to the same branch or PR cancels the previous run instead of paying for both.
-concurrency:
-  group: ${{ github.workflow }}-${{ github.ref }}
-  cancel-in-progress: true
-
 jobs:
   Kernel-Smoke:
-    name: Kernel compile + Gerbicz check (POCL CPU)
+    name: Kernel compile + Gerbicz check (POCL CPU, ${{ matrix.os }})
     # The kernels in src/cl are compiled at first use, on the device, so the build jobs below never see them.
     # This compiles the FP64 kernel set on POCL's CPU device -- a non-NVIDIA OpenCL target -- and ends in a
     # Gerbicz check.  One runner, on purpose: the cost is kernel compilation, and it need only happen once.
-    # The integer-NTT types are left out (far too slow on a CPU device); aarch64 POCL is not tried yet.
-    runs-on: ubuntu-latest
-    timeout-minutes: 25
+    # Debug build so the runtime asserts are exercised too.  The integer-NTT types are left out (far too slow
+    # on a CPU device); aarch64 POCL is not tried yet.
+    #
+    # POCL_WORK_GROUP_METHOD=loops: with the default (vectorizing) work-group method POCL spends 15-25 minutes
+    # compiling these kernels on the AVX-512 runner CPUs; with "loops" and POCL 7.2 the whole check takes about
+    # 10 seconds.  Ubuntu's own POCL packages (5.0 on 24.04, 6.0 on 26.04) are slow even with "loops" and the
+    # conda-forge 7.1 build computes wrong results, so POCL 7.2 is built from source against the distro LLVM
+    # and cached; a cache hit costs seconds.
+    # The arm64 entry runs the same kernels through LLVM's AArch64 backend and the host code on arm64,
+    # which the build-only arm jobs above never do.  Same commands: 26.04-arm has the same LLVM 21.
+    runs-on: ${{ matrix.os }}
+    strategy:
+      fail-fast: false
+      matrix:
+        os: [ubuntu-26.04, ubuntu-26.04-arm]
+    env:
+      POCL_WORK_GROUP_METHOD: loops
+      POCL_VERSION: "7.2"
     steps:
     - uses: actions/checkout@v7
     - name: Install
+      # The LLVM packages are needed at run time too (the cached libpocl links against them), not only to build POCL.
       run: |
         sudo apt-get update -y
-        sudo apt-get install -y ocl-icd-opencl-dev pocl-opencl-icd
+        sudo apt-get install -y ocl-icd-opencl-dev cmake ninja-build llvm-21-dev libclang-21-dev libclang-cpp21-dev clang-21 libhwloc-dev
+    - name: Restore POCL
+      id: pocl-cache
+      uses: actions/cache@v4
+      with:
+        path: ~/pocl
+        key: pocl-${{ env.POCL_VERSION }}-${{ runner.os }}-${{ runner.arch }}-${{ matrix.os }}-llvm21
+    - name: Build POCL
+      if: steps.pocl-cache.outputs.cache-hit != 'true'
+      run: |
+        curl -Ls "https://api.github.com/repos/pocl/pocl/tarball/v$POCL_VERSION" | tar -xz
+        cmake -G Ninja -S pocl-pocl-* -B pocl-build -DCMAKE_BUILD_TYPE=Release -DWITH_LLVM_CONFIG=/usr/bin/llvm-config-21 \
+              -DENABLE_ICD=ON -DENABLE_TESTS=OFF -DENABLE_EXAMPLES=OFF -DCMAKE_INSTALL_PREFIX="$HOME/pocl" -DPOCL_INSTALL_ICD_VENDORDIR="$HOME/pocl/etc/OpenCL/vendors"
+        ninja -C pocl-build install
+    - name: Use POCL
+      run: echo "OCL_ICD_VENDORS=$HOME/pocl/etc/OpenCL/vendors" >> "$GITHUB_ENV"
     - name: Build
-      run: make -O -j "$(nproc)"
+      run: make DEBUG=1 -O -j "$(nproc)"
     - name: Compile the kernels and pass a Gerbicz check
+      # Step-level bound (not job-level, so a slow apt mirror cannot fail the job): a correct run takes
+      # well under a minute.  prpll ignores SIGTERM while inside an OpenCL compile, hence -s KILL.
+      timeout-minutes: 12
       run: |
-        cd build-release
+        cd build-debug
         ./prpll -h
-        timeout 20m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400
+        # Dump the log whatever happened, so a timeout or crash still shows how far the kernels got.
+        timeout -s KILL 10m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400; rc=$?
         cat gpuowl-0.log
+        test "$rc" -eq 0
         grep -q "OK  *400 " gpuowl-0.log
 
   Linux-OpenCL:
diff --git a/src/Args.cpp b/src/Args.cpp
index 29e83aff..cec0ef76 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -382,7 +382,7 @@ void Args::parse(const string& line) {
       u32 multiple = (s.back() == 'G') ? (1u << 30) : (1u << 20);
       maxAlloc = size_t(stod(s) * multiple + .5);
     }
-    else if (key == "-iters") { iters = stoi(s); assert(iters && (iters % 10000 == 0)); }
+    else if (key == "-iters") { iters = stoi(s); assert(iters > 0); }   // any positive count; release never enforced the old multiple-of-10000 rule
     else if (key == "-prp" || key == "-PRP") { prpExp = stoll(s); }
     else if (key == "-ll" || key == "-LL") { llExp = stoll(s); }
     else if (key == "-smallest") { smallest = true; }

From ae8aa0c2c1d5202167610246060939d9af9da1b7 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Sun, 20 Sep 2026 03:47:14 +0000
Subject: [PATCH 193/214] tailMul: add TAIL_KERNELS support (double-wide /
 split-kernel), matching tailSquare

tailMul never got the TAIL_KERNELS treatment tailSquare has: it was always the
old single-wide, single-kernel implementation, which is why it was burning
~160-250 registers regardless of GPU. Since nearly all GPUs prefer the
double-wide layout (TAIL_KERNELS=2), this brings tailMul's register usage down
to parity with tailSquare (e.g. 162 -> 96 registers on one FP64 shape tested).

Adds, for FP64, FP32, GF31 and GF61:
- tailMulZero / tailMulLowZero kernels (handle lines 0 and H/2 separately, for
  split-kernel mode), mirroring tailSquareZero.
- A double-wide tailMul variant (G_H*2 threads, one line per half-workgroup
  instead of two lines per thread) with a pairMul2_special helper for the
  self-paired line-0/H/2 case, mirroring tailSquare's double-wide kernel.

Gpu.cpp/Gpu.h wire up the new Zero kernels and give tailMul/tailMulLow the
same 4-way work-size formula tailSquare already uses for
TAIL_KERNELS in {0,1,2,3}.

Verified by temporarily substituting tailMul(x,x) for tailSquare(x) in the
real PRP squaring path (multiplying a value by itself is mathematically
squaring) and comparing residues after 10000 real iterations: all four
TAIL_KERNELS settings reproduce the tailSquare baseline exactly, for FP64
(1K:13:256), FP32 (2:256:2:256), and GF31/GF61 (1:256:2:256 hybrid, and each
in isolation via 3:256:2:256 / 52:256:2:256). This caught a real bug in the
first pass -- the GF31/GF61 zero-kernels were missing a SINGLE_WIDE-specific
trig-table index used by tailSquareZeroGF31/61, which only broke
TAIL_KERNELS=1 -- since fixed and reverified.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp       |  66 ++++-
 src/Gpu.h         |   6 +
 src/cl/tailmul.cl | 667 ++++++++++++++++++++++++++++++++++++++++++++--
 3 files changed, 714 insertions(+), 25 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 51ed5283..3464d75a 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -842,9 +842,19 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(KFP) + numCudaRegisters(TAIL)),    // Single-wide tailSquare with one kernel
-  K(ktailMul,              "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP)),
-  K(ktailMulLow,           "tailmul.cl", "tailMul", hN / nH / 2, kernelDefines(KFP) + "-DMUL_LOW=1"),
+                                               hN / nH / 2, kernelDefines(KFP) + numCudaRegisters(TAIL)),              // Single-wide tailSquare with one kernel
+  K(ktailMulZero,          "tailmul.cl", "tailMulZero", SMALL_H / nH * 2, kernelDefines(KFP)),
+  K(ktailMulLowZero,       "tailmul.cl", "tailMulZero", SMALL_H / nH * 2, kernelDefines(KFP) + "-DMUL_LOW=1"),
+  K(ktailMul,              "tailmul.cl", "tailMul",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(KFP)),                                       // Single-wide tailMul with one kernel
+  K(ktailMulLow,           "tailmul.cl", "tailMul",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(KFP) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
   K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numCudaRegisters(MIDOUT)),
   K(kfftW,                 "fftw.cl", "fftW", hN / nW, kernelDefines(KFP)),
 
@@ -855,9 +865,19 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(K31) + numCudaRegisters(TAIL31)),  // Single-wide tailSquare with one kernel
-  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31)),
-  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31", hN / nH / 2, kernelDefines(K31) + "-DMUL_LOW=1"),
+                                               hN / nH / 2, kernelDefines(K31) + numCudaRegisters(TAIL31)),            // Single-wide tailSquare with one kernel
+  K(ktailMulZeroGF31,      "tailmul.cl", "tailMulZeroGF31", SMALL_H / nH * 2, kernelDefines(K31)),
+  K(ktailMulLowZeroGF31,   "tailmul.cl", "tailMulZeroGF31", SMALL_H / nH * 2, kernelDefines(K31) + "-DMUL_LOW=1"),
+  K(ktailMulGF31,          "tailmul.cl", "tailMulGF31",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(K31)),                                       // Single-wide tailMul with one kernel
+  K(ktailMulLowGF31,       "tailmul.cl", "tailMulGF31",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(K31) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
   K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), kernelDefines(K31) + numCudaRegisters(MIDOUT31)),
   K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW, kernelDefines(K31)),
 
@@ -868,9 +888,19 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(K61) + numCudaRegisters(TAIL61)),  // Single-wide tailSquare with one kernel
-  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61)),
-  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61", hN / nH / 2, kernelDefines(K61) + "-DMUL_LOW=1"),
+                                               hN / nH / 2, kernelDefines(K61) + numCudaRegisters(TAIL61)),            // Single-wide tailSquare with one kernel
+  K(ktailMulZeroGF61,      "tailmul.cl", "tailMulZeroGF61", SMALL_H / nH * 2, kernelDefines(K61)),
+  K(ktailMulLowZeroGF61,   "tailmul.cl", "tailMulZeroGF61", SMALL_H / nH * 2, kernelDefines(K61) + "-DMUL_LOW=1"),
+  K(ktailMulGF61,          "tailmul.cl", "tailMulGF61",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(K61)),                                       // Single-wide tailMul with one kernel
+  K(ktailMulLowGF61,       "tailmul.cl", "tailMulGF61",
+                                               !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailMul with two kernels
+                                               !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
+                                               !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
+                                               hN / nH / 2, kernelDefines(K61) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
   K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), kernelDefines(K61) + numCudaRegisters(MIDOUT61)),
   K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW, kernelDefines(K61)),
 
@@ -970,6 +1000,8 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     kfftHin.setFixedArgs(3, bufTrigH);
     ktailSquareZero.setFixedArgs(2, bufTrigH);
     ktailSquare.setFixedArgs(3, bufTrigH);
+    ktailMulZero.setFixedArgs(3, bufTrigH);
+    ktailMulLowZero.setFixedArgs(3, bufTrigH);
     ktailMulLow.setFixedArgs(4, bufTrigH);
     ktailMul.setFixedArgs(4, bufTrigH);
     kfftMidOut.setFixedArgs(3, bufTrigM);
@@ -981,6 +1013,8 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     kfftHinGF31.setFixedArgs(3, bufTrigH);
     ktailSquareZeroGF31.setFixedArgs(2, bufTrigH);
     ktailSquareGF31.setFixedArgs(3, bufTrigH);
+    ktailMulZeroGF31.setFixedArgs(3, bufTrigH);
+    ktailMulLowZeroGF31.setFixedArgs(3, bufTrigH);
     ktailMulLowGF31.setFixedArgs(4, bufTrigH);
     ktailMulGF31.setFixedArgs(4, bufTrigH);
     kfftMidOutGF31.setFixedArgs(3, bufTrigM);
@@ -992,6 +1026,8 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
     kfftHinGF61.setFixedArgs(3, bufTrigH);
     ktailSquareZeroGF61.setFixedArgs(2, bufTrigH);
     ktailSquareGF61.setFixedArgs(3, bufTrigH);
+    ktailMulZeroGF61.setFixedArgs(3, bufTrigH);
+    ktailMulLowZeroGF61.setFixedArgs(3, bufTrigH);
     ktailMulLowGF61.setFixedArgs(4, bufTrigH);
     ktailMulGF61.setFixedArgs(4, bufTrigH);
     kfftMidOutGF61.setFixedArgs(3, bufTrigM);
@@ -1501,6 +1537,12 @@ void Gpu::replay_one(enum BOTTOM_HALF_KERNELS kern, int cache_group, int arg, Qu
     // If not in place, the output is to the scratch buffer
     Buffer<double> const *in1 = buf;
     Buffer<double> const *out = in_place ? buf : &buf3;
+    if (!tail_single_kernel && base == 0) {
+      if (cache_group == 1) { ktailMulZero.setQueue(q); ktailMulZero(*out, *in1, *in2); }
+      if (cache_group == 2) { ktailMulZeroGF31.setQueue(q); ktailMulZeroGF31(*out, *in1, *in2); }
+      if (cache_group == 3) { ktailMulZeroGF61.setQueue(q); ktailMulZeroGF61(*out, *in1, *in2); }
+      if (kernelsToExecuteX) kernelsToExecuteX--;
+    }
     if (cache_group == 1) { ktailMul.setQueue(q); ktailMul.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMul(*out, *in1, *in2, base); }
     if (cache_group == 2) { ktailMulGF31.setQueue(q); ktailMulGF31.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulGF31(*out, *in1, *in2, base); }
     if (cache_group == 3) { ktailMulGF61.setQueue(q); ktailMulGF61.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulGF61(*out, *in1, *in2, base); }
@@ -1512,6 +1554,12 @@ void Gpu::replay_one(enum BOTTOM_HALF_KERNELS kern, int cache_group, int arg, Qu
     // If not in place, the output is to the scratch buffer
     Buffer<double> const *in1 = buf;
     Buffer<double> const *out = in_place ? buf : &buf3;
+    if (!tail_single_kernel && base == 0) {
+      if (cache_group == 1) { ktailMulLowZero.setQueue(q); ktailMulLowZero(*out, *in1, *in2); }
+      if (cache_group == 2) { ktailMulLowZeroGF31.setQueue(q); ktailMulLowZeroGF31(*out, *in1, *in2); }
+      if (cache_group == 3) { ktailMulLowZeroGF61.setQueue(q); ktailMulLowZeroGF61(*out, *in1, *in2); }
+      if (kernelsToExecuteX) kernelsToExecuteX--;
+    }
     if (cache_group == 1) { ktailMulLow.setQueue(q); ktailMulLow.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLow(*out, *in1, *in2, base); }
     if (cache_group == 2) { ktailMulLowGF31.setQueue(q); ktailMulLowGF31.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLowGF31(*out, *in1, *in2, base); }
     if (cache_group == 3) { ktailMulLowGF61.setQueue(q); ktailMulLowGF61.setKernelsToExecute(kernelsToExecuteX, kernelsToExecuteY); ktailMulLowGF61(*out, *in1, *in2, base); }
diff --git a/src/Gpu.h b/src/Gpu.h
index ba350c71..15a44c85 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -116,6 +116,8 @@ class Gpu {
   Kernel kfftHin;
   Kernel ktailSquareZero;
   Kernel ktailSquare;
+  Kernel ktailMulZero;
+  Kernel ktailMulLowZero;
   Kernel ktailMul;
   Kernel ktailMulLow;
   Kernel kfftMidOut;
@@ -126,6 +128,8 @@ class Gpu {
   Kernel kfftHinGF31;
   Kernel ktailSquareZeroGF31;
   Kernel ktailSquareGF31;
+  Kernel ktailMulZeroGF31;
+  Kernel ktailMulLowZeroGF31;
   Kernel ktailMulGF31;
   Kernel ktailMulLowGF31;
   Kernel kfftMidOutGF31;
@@ -136,6 +140,8 @@ class Gpu {
   Kernel kfftHinGF61;
   Kernel ktailSquareZeroGF61;
   Kernel ktailSquareGF61;
+  Kernel ktailMulZeroGF61;
+  Kernel ktailMulLowZeroGF61;
   Kernel ktailMulGF61;
   Kernel ktailMulLowGF61;
   Kernel kfftMidOutGF61;
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 112193b3..facd6273 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -12,6 +12,13 @@
 // If L2 striping, process lines output by fftMiddleIn.  fftMiddleIn outputs 16 * MIDDLE tailSquare lines.
 u32 get_line_number(u32 base) {
   u32 g = get_group_id(0);
+#if !SINGLE_KERNEL
+#if L2_STRIPING
+  if (base == 0) g = g + 1;
+#else
+  g = g + 1;
+#endif
+#endif
 #if L2_STRIPING
   // Old, simple L2 striping code
   // return get_group_id(1) * WIDTH + base + g;
@@ -78,6 +85,60 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
   }
 }
 
+#if !SINGLE_KERNEL
+// The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
+// This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
+KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+  local T2 lds[LDS_BYTES(1) / sizeof(T2)];
+  LDSinit(lds, 1);
+
+  T2 u[NH], p[NH];
+  const u32 H = ND / SMALL_HEIGHT;
+
+  // This kernel in executed in two workgroups.
+  u32 which = get_group_id(0);
+  assert(which < 2);
+
+  u32 line = which ? (H/2) : 0;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+  u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailMulFP64 which must dependentLaunchWait before reading data from fftMiddleInFP64
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
+  readTailFusedLine(in, u, line, me);
+
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
+  T2 w = fancyTrig_N(H * me);
+#else
+  T2 w = slowTrig_N(H * me, ND / NH);
+#endif
+
+#if MUL_LOW
+  read(G_H, NH, p, a, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+#else
+  readTailFusedLine(a, p, line, me);
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig, w, 1, me);
+#endif
+
+  T2 trig = slowTrig_N(line + me * H, ND / NH);
+
+  reverse(lds, u + NH/2, !which);
+  reverse(lds, p + NH/2, !which);
+  pairMul(NH/2, u,   u + NH/2, p, p + NH/2, trig, !which);
+  reverse(lds, u + NH/2, !which);
+
+  fft_HEIGHT1(lds, u, smallTrig, w, 1, me);
+  writeTailFusedLine(u, out, memline, me);
+}
+#endif
+
+#if SINGLE_WIDE
+
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
@@ -122,6 +183,7 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
 
   T2 trig = slowTrig_N(line1 + me * H, ND / NH);
 
+#if SINGLE_KERNEL
   if (line1 == 0) {
     reverse(lds, u + NH/2, true);
     reverse(lds, p + NH/2, true);
@@ -134,6 +196,9 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
     reverse(lds, v + NH/2, false);
   } else {
+#else
+  if (1) {
+#endif
     reverseLine(lds, v);
     reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
@@ -148,6 +213,101 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   writeTailFusedLine(u, out, memline1, me);
 }
 
+
+//
+// Create a kernel that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// We hope to get better occupancy with the reduced register usage
+//
+
+#else
+
+// Special pairMul for double-wide line 0: both halves compute their own self-pairing (u with p),
+// there is no cross-half data since line_u == 0 and line_v == H/2 both pair with themselves.
+void OVERLOAD pairMul2_special(T2 *u, T2 *p, T2 base_squared) {
+  u32 me = get_local_id(0);
+  for (i32 i = 0; i < NH / 4; ++i, base_squared = mul_t8(base_squared)) {
+    if (i == 0 && me == 0) {
+      u[0] = SWAP_XY(2 * foo2(u[0], p[0]));
+      u[NH/2] = SWAP_XY(4 * cmul(u[NH/2], p[NH/2]));
+    } else {
+      onePairMul(&u[i], &u[NH/2+i], &p[i], &p[NH/2+i], base_squared);
+    }
+    T2 new_base_squared = mul_t4(base_squared);
+    onePairMul(&u[i+NH/4], &u[NH/2+i+NH/4], &p[i+NH/4], &p[NH/2+i+NH/4], new_base_squared);
+  }
+}
+
+KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+  local T2 lds[LDS_BYTES(2) / sizeof(T2)];
+  LDSinit(lds, 2);
+
+  const u32 H = ND / SMALL_HEIGHT;
+
+  T2 u[NH], p[NH];
+
+  u32 line_u = get_line_number(base);
+  u32 line_v = line_u ? H - line_u : (H / 2);
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
+
+  // We're going to call the halves "first-half" and "second-half".
+  bool isSecondHalf = me >= G_H;
+
+  u32 line = !isSecondHalf ? line_u : line_v;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP64 that launched dependents before writing FP64 data
+
+  // Read line u (own half's line) and p (own half's multiplier line)
+  readTailFusedLine(in, u, line, lowMe);
+
+#if FFT_VARIANT_H != 0
+  T2 w;
+#elif NH == 8
+  T2 w = fancyTrig_N(H * lowMe);
+#else
+  T2 w = slowTrig_N(H * lowMe, ND / NH);
+#endif
+
+#if MUL_LOW
+  read(G_H, NH, p, a, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig, w, 2, lowMe);
+#else
+  readTailFusedLine(a, p, line, lowMe);
+  fft_HEIGHT1(lds, u, smallTrig, w, 2, lowMe);
+  fft_HEIGHT1(lds, p, smallTrig, w, 2, lowMe);
+#endif
+
+  T2 trig = slowTrig_N(line + H * lowMe, ND / NH * 2);
+
+#if SINGLE_KERNEL
+  // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
+  if (line_u == 0) {
+    reverse2(lds, u);
+    reverse2(lds, p);
+    pairMul2_special(u, p, trig);
+    reverse2(lds, u);
+  }
+  else {
+#else
+  if (1) {
+#endif
+    revCrossLine(lds, u);
+    revCrossLine(lds, p);
+    pairMul(NH/2, u, u + NH/2, p, p + NH/2, trig, false);
+    revCrossLine(lds, u);
+  }
+
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP64 which must dependentLaunchWait before reading data
+
+  fft_HEIGHT2(lds, u, smallTrig, w, 2, lowMe);
+
+  // Write line u (own half's line)
+  writeTailFusedLine(u, out, memline, lowMe);
+}
+
+#endif
+
 #endif
 
 
@@ -194,6 +354,57 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
   }
 }
 
+#if !SINGLE_KERNEL
+// The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
+// This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
+KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+  local F2 lds[LDS_BYTES(1) / sizeof(F2)];
+  LDSinit(lds, 1);
+
+  F2 u[NH], p[NH];
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(F2) inF2 = (CP(F2)) in;
+  CP(F2) aF2 = (CP(F2)) a;
+  P(F2) outF2 = (P(F2)) out;
+  TrigFP32 smallTrigF2 = (TrigFP32) smallTrig;
+
+  // This kernel in executed in two workgroups.
+  u32 which = get_group_id(0);
+  assert(which < 2);
+
+  u32 line = which ? (H/2) : 0;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+  u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailMulFP32 which must dependentLaunchWait before reading data from fftMiddleInFP32
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
+  readTailFusedLine(inF2, u, line, me);
+
+#if MUL_LOW
+  read(G_H, NH, p, aF2, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+#else
+  readTailFusedLine(aF2, p, line, me);
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+  fft_HEIGHT1(lds, p, smallTrigF2, 1, me);
+#endif
+
+  F2 trig = slowTrig_N(line + me * H, ND / NH);
+
+  reverse(lds, u + NH/2, !which);
+  reverse(lds, p + NH/2, !which);
+  pairMul(NH/2, u,   u + NH/2, p, p + NH/2, trig, !which);
+  reverse(lds, u + NH/2, !which);
+
+  fft_HEIGHT1(lds, u, smallTrigF2, 1, me);
+  writeTailFusedLine(u, outF2, memline, me);
+}
+#endif
+
+#if SINGLE_WIDE
+
 KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
@@ -235,6 +446,7 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
 
   F2 trig = slowTrig_N(line1 + me * H, ND / NH);
 
+#if SINGLE_KERNEL
   if (line1 == 0) {
     reverse(lds, u + NH/2, true);
     reverse(lds, p + NH/2, true);
@@ -247,6 +459,9 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
     reverse(lds, v + NH/2, false);
   } else {
+#else
+  if (1) {
+#endif
     reverseLine(lds, v);
     reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
@@ -261,6 +476,98 @@ KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   writeTailFusedLine(u, outF2, memline1, me);
 }
 
+
+//
+// Create a kernel that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// We hope to get better occupancy with the reduced register usage
+//
+
+#else
+
+// Special pairMul for double-wide line 0: both halves compute their own self-pairing (u with p),
+// there is no cross-half data since line_u == 0 and line_v == H/2 both pair with themselves.
+void OVERLOAD pairMul2_special(F2 *u, F2 *p, F2 base_squared) {
+  u32 me = get_local_id(0);
+  for (i32 i = 0; i < NH / 4; ++i, base_squared = mul_t8(base_squared)) {
+    if (i == 0 && me == 0) {
+      u[0] = SWAP_XY(2 * foo2(u[0], p[0]));
+      u[NH/2] = SWAP_XY(4 * cmul(u[NH/2], p[NH/2]));
+    } else {
+      onePairMul(&u[i], &u[NH/2+i], &p[i], &p[NH/2+i], base_squared);
+    }
+    F2 new_base_squared = mul_t4(base_squared);
+    onePairMul(&u[i+NH/4], &u[NH/2+i+NH/4], &p[i+NH/4], &p[NH/2+i+NH/4], new_base_squared);
+  }
+}
+
+KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+  local F2 lds[LDS_BYTES(2) / sizeof(F2)];
+  LDSinit(lds, 2);
+
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(F2) inF2 = (CP(F2)) in;
+  CP(F2) aF2 = (CP(F2)) a;
+  P(F2) outF2 = (P(F2)) out;
+  TrigFP32 smallTrigF2 = (TrigFP32) smallTrig;
+
+  F2 u[NH], p[NH];
+
+  u32 line_u = get_line_number(base);
+  u32 line_v = line_u ? H - line_u : (H / 2);
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
+
+  // We're going to call the halves "first-half" and "second-half".
+  bool isSecondHalf = me >= G_H;
+
+  u32 line = !isSecondHalf ? line_u : line_v;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInFP32 that launched dependents before writing FP32 data
+
+  // Read line u (own half's line) and p (own half's multiplier line)
+  readTailFusedLine(inF2, u, line, lowMe);
+
+#if MUL_LOW
+  read(G_H, NH, p, aF2, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrigF2, 2, lowMe);
+#else
+  readTailFusedLine(aF2, p, line, lowMe);
+  fft_HEIGHT1(lds, u, smallTrigF2, 2, lowMe);
+  fft_HEIGHT1(lds, p, smallTrigF2, 2, lowMe);
+#endif
+
+  F2 trig = slowTrig_N(line + H * lowMe, ND / NH * 2);
+
+#if SINGLE_KERNEL
+  // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
+  if (line_u == 0) {
+    reverse2(lds, u);
+    reverse2(lds, p);
+    pairMul2_special(u, p, trig);
+    reverse2(lds, u);
+  }
+  else {
+#else
+  if (1) {
+#endif
+    revCrossLine(lds, u);
+    revCrossLine(lds, p);
+    pairMul(NH/2, u, u + NH/2, p, p + NH/2, trig, false);
+    revCrossLine(lds, u);
+  }
+
+  dependentLaunch();       // Next kernel will be fftMiddleOutFP32 which must dependentLaunchWait before reading data
+
+  fft_HEIGHT2(lds, u, smallTrigF2, 2, lowMe);
+
+  // Write line u (own half's line)
+  writeTailFusedLine(u, outF2, memline, lowMe);
+}
+
+#endif
+
 #endif
 
 
@@ -306,6 +613,74 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
   }
 }
 
+#if !SINGLE_KERNEL
+// The kernel tailMulZeroGF31 handles the special cases in tailMulGF31, i.e. the lines 0 and H/2
+// This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
+KERNEL(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+  local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
+  LDSinit(lds, 1);
+
+  GF31 u[NH], p[NH];
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
+  CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
+  P(GF31) out31 = (P(GF31)) (out + DISTGF31);
+  TrigGF31 smallTrig31 = (TrigGF31) (smallTrig + DISTHTRIGGF31);
+
+  // This kernel in executed in two workgroups.
+  u32 which = get_group_id(0);
+  assert(which < 2);
+
+  u32 line = which ? (H/2) : 0;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+  u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailMulGF31 which must dependentLaunchWait before reading data from fftMiddleInGF31
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
+  readTailFusedLine(in31, u, line, me);
+
+#if MUL_LOW
+  read(G_H, NH, p, a31, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig31, 1, me);
+#else
+  readTailFusedLine(a31, p, line, me);
+  fft_HEIGHT1(lds, u, smallTrig31, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig31, 1, me);
+#endif
+
+  // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
+  // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
+  u32 height_trigs = SMALL_HEIGHT*1;
+#if TAIL_TRIGS31 >= 1
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + me]);
+#if SINGLE_WIDE
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line]);
+#else
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + which]);
+#endif
+  trig = cmul(trig, mult);
+#else
+#if SINGLE_WIDE
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line*G_H + me]);
+#else
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + which*G_H + me]);
+#endif
+#endif
+
+  reverse(lds, u + NH/2, !which);
+  reverse(lds, p + NH/2, !which);
+  pairMul(NH/2, u,   u + NH/2, p, p + NH/2, trig, !which);
+  reverse(lds, u + NH/2, !which);
+
+  fft_HEIGHT2(lds, u, smallTrig31, 1, me);
+  writeTailFusedLine(u, out31, memline, me);
+}
+#endif
+
+#if SINGLE_WIDE
+
 KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
@@ -350,20 +725,13 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS31 >= 1
   GF31 trig = TFLOAD(&smallTrig31[height_trigs + me]);                    // Trig values for line zero, should be cached
-#if SINGLE_WIDE
   GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line1]);
-#else
-  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line1 * 2]);
-#endif
   trig = cmul(trig, mult);
 #else
-#if SINGLE_WIDE
   GF31 trig = TOLOAD(&smallTrig31[height_trigs + line1*G_H + me]);
-#else
-  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line1*2*G_H + me]);
-#endif
 #endif
 
+#if SINGLE_KERNEL
   if (line1 == 0) {
     reverse(lds, u + NH/2, true);
     reverse(lds, p + NH/2, true);
@@ -376,6 +744,9 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
     reverse(lds, v + NH/2, false);
   } else {
+#else
+  if (1) {
+#endif
     reverseLine(lds, v);
     reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
@@ -390,6 +761,106 @@ KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
   writeTailFusedLine(u, out31, memline1, me);
 }
 
+
+//
+// Create a kernel that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// We hope to get better occupancy with the reduced register usage
+//
+
+#else
+
+// Special pairMul for double-wide line 0: both halves compute their own self-pairing (u with p),
+// there is no cross-half data since line_u == 0 and line_v == H/2 both pair with themselves.
+void OVERLOAD pairMul2_special(GF31 *u, GF31 *p, GF31 base_squared) {
+  u32 me = get_local_id(0);
+  for (i32 i = 0; i < NH / 4; ++i, base_squared = mul_t8(base_squared)) {
+    if (i == 0 && me == 0) {
+      u[0] = SWAP_XY(mul2(foo2(u[0], p[0])));
+      u[NH/2] = SWAP_XY(shl(cmul(u[NH/2], p[NH/2]), 2));
+    } else {
+      onePairMul(&u[i], &u[NH/2+i], &p[i], &p[NH/2+i], base_squared);
+    }
+    onePairMul(&u[i+NH/4], &u[NH/2+i+NH/4], &p[i+NH/4], &p[NH/2+i+NH/4], mul_t4(base_squared));
+  }
+}
+
+KERNEL(G_H * 2) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+  local GF31 lds[LDS_BYTES(2) / sizeof(GF31)];
+  LDSinit(lds, 2);
+
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
+  CP(GF31) a31 = (CP(GF31)) (a + DISTGF31);
+  P(GF31) out31 = (P(GF31)) (out + DISTGF31);
+  TrigGF31 smallTrig31 = (TrigGF31) (smallTrig + DISTHTRIGGF31);
+
+  GF31 u[NH], p[NH];
+
+  u32 line_u = get_line_number(base);
+  u32 line_v = line_u ? H - line_u : (H / 2);
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
+
+  // We're going to call the halves "first-half" and "second-half".
+  bool isSecondHalf = me >= G_H;
+
+  u32 line = !isSecondHalf ? line_u : line_v;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF31 that launched dependents before writing GF31 data
+
+  // Read line u (own half's line) and p (own half's multiplier line)
+  readTailFusedLine(in31, u, line, lowMe);
+
+#if MUL_LOW
+  read(G_H, NH, p, a31, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig31, 2, lowMe);
+#else
+  readTailFusedLine(a31, p, line, lowMe);
+  fft_HEIGHT1(lds, u, smallTrig31, 2, lowMe);
+  fft_HEIGHT1(lds, p, smallTrig31, 2, lowMe);
+#endif
+
+  // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
+  // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
+  u32 height_trigs = SMALL_HEIGHT*1;
+#if TAIL_TRIGS31 >= 1
+  GF31 trig = TFLOAD(&smallTrig31[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  GF31 mult = TSLOAD(&smallTrig31[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
+  trig = cmul(trig, mult);
+#else
+  GF31 trig = TOLOAD(&smallTrig31[height_trigs + line_u*G_H*2 + me]);
+#endif
+
+#if SINGLE_KERNEL
+  // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
+  if (line_u == 0) {
+    reverse2(lds, u);
+    reverse2(lds, p);
+    pairMul2_special(u, p, trig);
+    reverse2(lds, u);
+  }
+  else {
+#else
+  if (1) {
+#endif
+    revCrossLine(lds, u);
+    revCrossLine(lds, p);
+    pairMul(NH/2, u, u + NH/2, p, p + NH/2, trig, false);
+    revCrossLine(lds, u);
+  }
+
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF31 which must dependentLaunchWait before reading data
+
+  fft_HEIGHT2(lds, u, smallTrig31, 2, lowMe);
+
+  // Write line u (own half's line)
+  writeTailFusedLine(u, out31, memline, lowMe);
+}
+
+#endif
+
 #endif
 
 
@@ -437,6 +908,74 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
   }
 }
 
+#if !SINGLE_KERNEL
+// The kernel tailMulZeroGF61 handles the special cases in tailMulGF61, i.e. the lines 0 and H/2
+// This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
+KERNEL(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+  local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
+  LDSinit(lds, 1);
+
+  GF61 u[NH], p[NH];
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
+  CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
+  P(GF61) out61 = (P(GF61)) (out + DISTGF61);
+  TrigGF61 smallTrig61 = (TrigGF61) (smallTrig + DISTHTRIGGF61);
+
+  // This kernel in executed in two workgroups.
+  u32 which = get_group_id(0);
+  assert(which < 2);
+
+  u32 line = which ? (H/2) : 0;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+  u32 me = get_local_id(0);
+
+  dependentLaunch();       // Next kernel will be tailMulGF61 which must dependentLaunchWait before reading data from fftMiddleInGF61
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
+  readTailFusedLine(in61, u, line, me);
+
+#if MUL_LOW
+  read(G_H, NH, p, a61, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig61, 1, me);
+#else
+  readTailFusedLine(a61, p, line, me);
+  fft_HEIGHT1(lds, u, smallTrig61, 1, me);
+  fft_HEIGHT1(lds, p, smallTrig61, 1, me);
+#endif
+
+  // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
+  // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
+  u32 height_trigs = SMALL_HEIGHT*1;
+#if TAIL_TRIGS61 >= 1
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + me]);
+#if SINGLE_WIDE
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line]);
+#else
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + which]);
+#endif
+  trig = cmul(trig, mult);
+#else
+#if SINGLE_WIDE
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line*G_H + me]);
+#else
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + which*G_H + me]);
+#endif
+#endif
+
+  reverse(lds, u + NH/2, !which);
+  reverse(lds, p + NH/2, !which);
+  pairMul(NH/2, u,   u + NH/2, p, p + NH/2, trig, !which);
+  reverse(lds, u + NH/2, !which);
+
+  fft_HEIGHT2(lds, u, smallTrig61, 1, me);
+  writeTailFusedLine(u, out61, memline, me);
+}
+#endif
+
+#if SINGLE_WIDE
+
 KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
@@ -481,20 +1020,13 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
   u32 height_trigs = SMALL_HEIGHT*1;
 #if TAIL_TRIGS61 >= 1
   GF61 trig = TFLOAD(&smallTrig61[height_trigs + me]);                    // Trig values for line zero, should be cached
-#if SINGLE_WIDE
   GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line1]);
-#else
-  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line1 * 2]);
-#endif
   trig = cmul(trig, mult);
 #else
-#if SINGLE_WIDE
   GF61 trig = TOLOAD(&smallTrig61[height_trigs + line1*G_H + me]);
-#else
-  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line1*2*G_H + me]);
-#endif
 #endif
 
+#if SINGLE_KERNEL
   if (line1 == 0) {
     reverse(lds, u + NH/2, true);
     reverse(lds, p + NH/2, true);
@@ -507,6 +1039,9 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
     pairMul(NH/2, v,  v + NH/2, q, q + NH/2, trig2, false);
     reverse(lds, v + NH/2, false);
   } else {
+#else
+  if (1) {
+#endif
     reverseLine(lds, v);
     reverseLine(lds, q);
     pairMul(NH, u, v, p, q, trig, false);
@@ -521,4 +1056,104 @@ KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
   writeTailFusedLine(u, out61, memline1, me);
 }
 
+
+//
+// Create a kernel that uses a double-wide workgroup (u in half the workgroup, v in the other half)
+// We hope to get better occupancy with the reduced register usage
+//
+
+#else
+
+// Special pairMul for double-wide line 0: both halves compute their own self-pairing (u with p),
+// there is no cross-half data since line_u == 0 and line_v == H/2 both pair with themselves.
+void OVERLOAD pairMul2_special(GF61 *u, GF61 *p, GF61 base_squared) {
+  u32 me = get_local_id(0);
+  for (i32 i = 0; i < NH / 4; ++i, base_squared = mul_t8(base_squared)) {
+    if (i == 0 && me == 0) {
+      u[0] = SWAP_XY(mul2(foo2(u[0], p[0])));
+      u[NH/2] = SWAP_XY(shl(cmul(u[NH/2], p[NH/2]), 2));
+    } else {
+      onePairMul(&u[i], &u[NH/2+i], &p[i], &p[NH/2+i], base_squared);
+    }
+    onePairMul(&u[i+NH/4], &u[NH/2+i+NH/4], &p[i+NH/4], &p[NH/2+i+NH/4], mul_t4(base_squared));
+  }
+}
+
+KERNEL(G_H * 2) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+  local GF61 lds[LDS_BYTES(2) / sizeof(GF61)];
+  LDSinit(lds, 2);
+
+  const u32 H = ND / SMALL_HEIGHT;
+
+  CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
+  CP(GF61) a61 = (CP(GF61)) (a + DISTGF61);
+  P(GF61) out61 = (P(GF61)) (out + DISTGF61);
+  TrigGF61 smallTrig61 = (TrigGF61) (smallTrig + DISTHTRIGGF61);
+
+  GF61 u[NH], p[NH];
+
+  u32 line_u = get_line_number(base);
+  u32 line_v = line_u ? H - line_u : (H / 2);
+  u32 me = get_local_id(0);
+  u32 lowMe = me % G_H;  // lane-id in one of the two halves (half-workgroups).
+
+  // We're going to call the halves "first-half" and "second-half".
+  bool isSecondHalf = me >= G_H;
+
+  u32 line = !isSecondHalf ? line_u : line_v;
+  u32 memline = transPos(line, MIDDLE, WIDTH);
+
+  dependentLaunchWait();   // Previous kernel was fftMiddleInGF61 that launched dependents before writing GF61 data
+
+  // Read line u (own half's line) and p (own half's multiplier line)
+  readTailFusedLine(in61, u, line, lowMe);
+
+#if MUL_LOW
+  read(G_H, NH, p, a61, memline * SMALL_HEIGHT);
+  fft_HEIGHT1(lds, u, smallTrig61, 2, lowMe);
+#else
+  readTailFusedLine(a61, p, line, lowMe);
+  fft_HEIGHT1(lds, u, smallTrig61, 2, lowMe);
+  fft_HEIGHT1(lds, p, smallTrig61, 2, lowMe);
+#endif
+
+  // Calculate number of trig values used by fft_HEIGHT (see genSmallTrigCombo in trigBufCache.cpp)
+  // The trig values used here are pre-computed and stored after the fft_HEIGHT trig values.
+  u32 height_trigs = SMALL_HEIGHT*1;
+#if TAIL_TRIGS61 >= 1
+  GF61 trig = TFLOAD(&smallTrig61[height_trigs + lowMe]);                                 // Trig values for line zero, should be cached
+  GF61 mult = TSLOAD(&smallTrig61[height_trigs + G_H + line_u*2 + isSecondHalf]);         // Two multipliers.  One for line u, one for line v.
+  trig = cmul(trig, mult);
+#else
+  GF61 trig = TOLOAD(&smallTrig61[height_trigs + line_u*G_H*2 + me]);
+#endif
+
+#if SINGLE_KERNEL
+  // Line 0 and H/2 are special: they pair with themselves, line 0 is offseted by 1.
+  if (line_u == 0) {
+    reverse2(lds, u);
+    reverse2(lds, p);
+    pairMul2_special(u, p, trig);
+    reverse2(lds, u);
+  }
+  else {
+#else
+  if (1) {
+#endif
+    revCrossLine(lds, u);
+    revCrossLine(lds, p);
+    pairMul(NH/2, u, u + NH/2, p, p + NH/2, trig, false);
+    revCrossLine(lds, u);
+  }
+
+  dependentLaunch();       // Next kernel will be fftMiddleOutGF61 which must dependentLaunchWait before reading data
+
+  fft_HEIGHT2(lds, u, smallTrig61, 2, lowMe);
+
+  // Write line u (own half's line)
+  writeTailFusedLine(u, out61, memline, lowMe);
+}
+
+#endif
+
 #endif

From f7fc0fa668ebeb4b6146a2dddd65776ee8fa0ee9 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 09:47:21 -0600
Subject: [PATCH 194/214] CI: fix the kernel-smoke log dump, which never ran on
 failure

Review follow-up to #67 (thanks @tdulcet).

Steps run under "bash -e", so

    timeout -s KILL 10m ./prpll ... ; rc=$?
    cat gpuowl-0.log
    test "$rc" -eq 0

does not do what it looks like: when prpll fails or is killed the shell
exits at that first line, and the log dump -- the whole point of the
arrangement -- never happens.  The step then reports the failure with no
indication of how far the kernels got, which is exactly the hole #67 set
out to close.  Guard the run with "|| rc=$?" so the dump is reached, and
tolerate a missing log (prpll writes none when it exits before opening
one, as it does when no OpenCL device is found).

Also from the review:

  - Download the POCL tarball to a file with "curl -sSLf" instead of
    piping it into tar.  Piped, a 404 reached tar as garbage on stdin
    and the step's exit status was tar's, not curl's.  The release tag
    archive also extracts to a predictable "pocl-$POCL_VERSION", so the
    "pocl-pocl-*" glob goes away.
  - The job comment still said one runner and no aarch64; it has been
    two runners since the arm64 entry was added in the same PR.
  - Say why the LLVM packages are installed unconditionally even though
    the 26.04 images already carry most of them: the cached libpocl
    links against them, so they are needed on a cache hit too.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 .github/workflows/ci.yml | 27 +++++++++++++++++----------
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index b174b00f..0a082ad3 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -11,17 +11,16 @@ jobs:
     name: Kernel compile + Gerbicz check (POCL CPU, ${{ matrix.os }})
     # The kernels in src/cl are compiled at first use, on the device, so the build jobs below never see them.
     # This compiles the FP64 kernel set on POCL's CPU device -- a non-NVIDIA OpenCL target -- and ends in a
-    # Gerbicz check.  One runner, on purpose: the cost is kernel compilation, and it need only happen once.
-    # Debug build so the runtime asserts are exercised too.  The integer-NTT types are left out (far too slow
-    # on a CPU device); aarch64 POCL is not tried yet.
+    # Gerbicz check.  Two runners: the arm64 entry puts the kernels through LLVM's AArch64 backend and runs
+    # the host code on arm64, which the build-only arm jobs above never do.  Debug build so the runtime
+    # asserts are exercised too.  The integer-NTT types are left out (far too slow on a CPU device).
     #
     # POCL_WORK_GROUP_METHOD=loops: with the default (vectorizing) work-group method POCL spends 15-25 minutes
     # compiling these kernels on the AVX-512 runner CPUs; with "loops" and POCL 7.2 the whole check takes about
     # 10 seconds.  Ubuntu's own POCL packages (5.0 on 24.04, 6.0 on 26.04) are slow even with "loops" and the
     # conda-forge 7.1 build computes wrong results, so POCL 7.2 is built from source against the distro LLVM
     # and cached; a cache hit costs seconds.
-    # The arm64 entry runs the same kernels through LLVM's AArch64 backend and the host code on arm64,
-    # which the build-only arm jobs above never do.  Same commands: 26.04-arm has the same LLVM 21.
+    # Both runners are handled by the same commands: 26.04-arm has the same LLVM 21 as 26.04.
     runs-on: ${{ matrix.os }}
     strategy:
       fail-fast: false
@@ -33,7 +32,10 @@ jobs:
     steps:
     - uses: actions/checkout@v7
     - name: Install
-      # The LLVM packages are needed at run time too (the cached libpocl links against them), not only to build POCL.
+      # Installed unconditionally: the cached libpocl links against the LLVM runtime libraries, so they are
+      # needed on a cache hit too, not only to build POCL.  The 26.04 images already carry llvm-21-dev and
+      # clang-21, but not libclang-cpp21-dev (which POCL needs); naming them all keeps this independent of
+      # what a future image happens to ship.
       run: |
         sudo apt-get update -y
         sudo apt-get install -y ocl-icd-opencl-dev cmake ninja-build llvm-21-dev libclang-21-dev libclang-cpp21-dev clang-21 libhwloc-dev
@@ -46,8 +48,9 @@ jobs:
     - name: Build POCL
       if: steps.pocl-cache.outputs.cache-hit != 'true'
       run: |
-        curl -Ls "https://api.github.com/repos/pocl/pocl/tarball/v$POCL_VERSION" | tar -xz
-        cmake -G Ninja -S pocl-pocl-* -B pocl-build -DCMAKE_BUILD_TYPE=Release -DWITH_LLVM_CONFIG=/usr/bin/llvm-config-21 \
+        curl -sSLf "https://github.com/pocl/pocl/archive/refs/tags/v$POCL_VERSION.tar.gz" -o pocl.tar.gz
+        tar -xzf pocl.tar.gz
+        cmake -G Ninja -S "pocl-$POCL_VERSION" -B pocl-build -DCMAKE_BUILD_TYPE=Release -DWITH_LLVM_CONFIG=/usr/bin/llvm-config-21 \
               -DENABLE_ICD=ON -DENABLE_TESTS=OFF -DENABLE_EXAMPLES=OFF -DCMAKE_INSTALL_PREFIX="$HOME/pocl" -DPOCL_INSTALL_ICD_VENDORDIR="$HOME/pocl/etc/OpenCL/vendors"
         ninja -C pocl-build install
     - name: Use POCL
@@ -62,8 +65,12 @@ jobs:
         cd build-debug
         ./prpll -h
         # Dump the log whatever happened, so a timeout or crash still shows how far the kernels got.
-        timeout -s KILL 10m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400; rc=$?
-        cat gpuowl-0.log
+        # Steps run under "bash -e", so the run has to be guarded: unguarded, a failing run ends the step
+        # right there and the dump never happens.  prpll's own stdout is block-buffered into the runner's
+        # pipe and is lost when it is killed, so the log file is the only record.
+        rc=0
+        timeout -s KILL 10m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400 || rc=$?
+        cat gpuowl-0.log || true
         test "$rc" -eq 0
         grep -q "OK  *400 " gpuowl-0.log
 

From 1fe537a0107eb89830ec08bc8028108037aacf01 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 11:46:25 -0600
Subject: [PATCH 195/214] Do not skip the sub-group barrier where the hardware
 is not in lock-step

bar(WG) and barsync() return without doing anything when WG <= WAVEFRONT,
on the assumption that a wavefront advances in lock-step so the threads
exchanging data through LDS immediately afterwards need no barrier and no
fence.  That holds on AMD GCN.  It does not hold on nVidia Volta and later:
Independent Thread Scheduling lets the threads of a warp drift apart, and
the CUDA programming guide is explicit that intra-warp communication
through shared memory is a race without bar.warp.sync.  It holds nowhere
else either -- an Intel GPU or a CPU device under POCL has no lock-step
wavefront to lean on at all.

Today the branch is only ever taken on AMD, where it is sound: with the
shipped nW()/nH() rule and widths and heights of 256 and up, G_W and G_H
are never below 64, so on nVidia (WAVEFRONT 32) the skip never happens.
It goes live the moment any config yields G_W or G_H == 32, which is a
one-line change to nW()/nH() away -- and the failure would be silent wrong
results, not a crash.

So decide by what the hardware actually guarantees:

  - AMD, and nVidia before Volta: return, exactly as now.  The AMD fast
    path (FAST_BARRIER, WAVEFRONT 64, taken today at width 256) is
    untouched.
  - nVidia sm_60 and later: sync() to reconverge the warp, then
    mem_fence(CLK_LOCAL_MEM_FENCE) to order the LDS traffic.  Both already
    exist -- carryFused uses sync() for exactly this purpose, and the CUDA
    shim maps mem_fence to __threadfence_block() -- and together they cost
    a fraction of a barrier.
  - Anything else: fall through to the real barrier below.

barsync() gets the same treatment except that it cannot fall through, as
substituting a barrier over all threads is not allowed there.

Verified by forcing WAVEFRONT to 1024 locally, which makes every bar(WG)
take the branch: master then fails immediately on both an Intel iGPU and
POCL with "EE 0 on-load: 0000000000000000", while this patch gives the
correct "OK 400 0d42972a9d02005c" on both.  Unforced, the residue is
unchanged on both devices, as the branch is not reached.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/base.cl | 26 ++++++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/src/cl/base.cl b/src/cl/base.cl
index 69a81875..c2e18547 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -815,7 +815,21 @@ void OVERLOAD bar(void) {
 
 // Create a barrier across a subset of threads OR across all threads if that is faster.
 void OVERLOAD bar(const u32 WG) {
-  if (WG <= WAVEFRONT) return;
+  // A group no larger than a wavefront can skip the barrier only where the hardware really does run a whole
+  // wavefront in lock-step.  AMD GCN does, and so did nVidia before Volta.  Volta and later do not:
+  // Independent Thread Scheduling lets the threads of a warp drift apart, and every caller of bar(WG)
+  // exchanges data through LDS right afterwards, so the warp has to be reconverged and its LDS traffic
+  // ordered -- which is what sync() plus the fence do, for a fraction of the cost of a barrier.  Anything
+  // else (Intel, a CPU device under POCL) offers no lock-step guarantee at all: use a real barrier there.
+  if (WG <= WAVEFRONT) {
+#if HAS_PTX >= 600         // bar.warp.sync requires sm_60 or higher; ITS arrived in sm_70
+    sync();
+    mem_fence(CLK_LOCAL_MEM_FENCE);
+    return;
+#elif AMDGPU || HAS_PTX >= 200
+    return;
+#endif
+  }
 #if ENABLE_BARSYNC && HAS_PTX >= 200         // bar.sync with thread count requires sm_20 support or higher.  Slower on TitanV, need to try on later nVidia GPUs.
   __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
 // The above is GROSSLY slow on an RTX 5070Ti.  The code below is much faster (may need to be expanded to handle more than four named barriers).
@@ -834,7 +848,15 @@ void OVERLOAD bar(const u32 WG) {
 // barsync() fails to compile at the call site instead of the whole of base.cl failing whether or not it is used.
 #if HAS_PTX >= 200
 void OVERLOAD barsync(const u32 numWG, const u32 WG) {
-  if (WG <= WAVEFRONT) return;
+  // As in bar(WG) above, except that substituting a barrier over all threads is not allowed here, so on
+  // Volta and later the warp-wide sync is the only option.  (This routine is nVidia-only to begin with.)
+  if (WG <= WAVEFRONT) {
+#if HAS_PTX >= 600
+    sync();
+    mem_fence(CLK_LOCAL_MEM_FENCE);
+#endif
+    return;
+  }
 #if USE_REGISTER_BARSYNC   // bar.sync with a register is horribly slow on an RTX 5070Ti.
   __asm("bar.sync %0, %1;" : : "r"(get_local_id(0) / WG + 1), "n"(WG));
 #else                      // WARNING, WARNING, WARNING: On TitanV using CUDA 12.9 tools and driver 580, this branch does not work in openCL (but works in CUDA build).

From c337b3c138151c49533ef2dc13246938f26013d5 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 15:36:17 -0600
Subject: [PATCH 196/214] shufl: the 4-byte path must honour r, like the 8- and
 16-byte paths

The 64-bit shufl(lds, u, f, r, numWG, lowMe) takes r because a caller may
have done only part of an fft_RADIX step, and the 16- and 8-byte paths use
it:

    lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)]

The 4-byte path instead hard-wires RADIX in place of r:

    lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)]

which is the same expression only when r == RADIX.  The 32-bit sibling at
the bottom of the file honours r, so the two implementations disagree and
one of them has to be wrong.

The one caller that passes r != RADIX is the SIZE=256/RADIX=8 width FFT
(fft_common's "WG == 32 && NW == 8" branch, which does fft8_4 then
shufl(..., 1, 4, ...)).  Reaching it needs nW() to return 8 at width 256,
which it does not today, so this is dormant -- but nW() has been changed
before, and the failure is a silently wrong FFT rather than anything
noisy.

Use the general index.  For r == RADIX it is arithmetically identical --
i / 1 is i, i % 1 is 0, and (lowMe & ~mask) * r is (lowMe & ~mask) * RADIX
-- so nothing reachable today changes.

Verified with nW() forced to return 8, which makes width 256 take that
branch, on an Intel iGPU, -fft 256:2:256 -block 200 -iters 400.  Note the
branch also needs the sub-group barrier fix (the other PR) to work at all
there, because G_W is then 32, which is the wavefront size:

  master                         8-byte: EE      4-byte: EE
  master + barrier fix           8-byte: OK      4-byte: EE   <- this bug, alone
  master + barrier fix + this    8-byte: OK      4-byte: OK

where OK is the expected residue 0d42972a9d02005c at iteration 400.
Unforced, that residue is unchanged on the iGPU and on POCL with the
default shufl width and with SHUFL_BYTES_W/H=4, as expected since r equals
RADIX everywhere reachable.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/shufl.cl | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0f16c2f7..8548a2bd 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -421,20 +421,24 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // code generated is not pretty).  This might not be true for nVidia or future ROCm optimizers.
     local int* lds = (local int*)LDSsharing_ptr(lds2, numWG);
 
+    // Use the same write index as the 8- and 16-byte paths: it honours r, which is smaller than RADIX when
+    // the caller has done only a partial fft_RADIX step (fft8_4 on the SIZE=256/RADIX=8 path).  For r == RADIX
+    // this is identical to the i * f + (lowMe & ~mask) * RADIX + (lowMe & mask) it replaces.
+
     LDStx_start(lds2, numWG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).x; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = as_int4(u[i]).x; }
     LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.x = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     LDSbar(numWG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).y; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = as_int4(u[i]).y; }
     LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.y = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     LDSbar(numWG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).z; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = as_int4(u[i]).z; }
     LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.z = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     LDSbar(numWG);
-    for (u32 i = 0; i < RADIX; ++i) { lds[i * f + (lowMe & ~mask) * RADIX + (lowMe & mask)] = as_int4(u[i]).w; }
+    for (u32 i = 0; i < RADIX; ++i) { lds[i / (RADIX / r) * f + i % (RADIX / r) * WG * r + (lowMe & ~mask) * r + (lowMe & mask)] = as_int4(u[i]).w; }
     LDSbar(numWG);
     for (u32 i = 0; i < RADIX; ++i) { int4 tmp = as_int4(u[i]); tmp.w = lds[i * WG + lowMe]; u[i] = as_T2_GF61(tmp); }
     LDStx_end(lds2, numWG);

From dc56c31d77cfee5ed7ab0c5aabcf413dddf5217e Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 15:46:43 -0600
Subject: [PATCH 197/214] shufl: fix the LDSSWIZ read index for workgroups
 other than 64

The "second RADIX == 8" case of the 16-byte swizzled shufl writes to the
natural slot and reads back from a permuted one:

    lds[i * WG + lowMe] = u[i];
    ...
    u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)];

That read is the inverse of the write only when WG is 64.  The 64 in it is
really WG, and the 8 that multiplies i is really WG / 8, so at WG == 128,
256 or 512 threads collect each other's values: enumerating the mapping
against the generic (non-swizzled) shufl gives 1008 of 1024 elements wrong
at WG 128 and 4032 of 4096 at WG 512.

The case is reached by -use LDSSWIZ_W=1,SHUFL_BYTES_W=16, and WG == 512
is fft_common's "WG == 512 && RADIX == 8 && VARIANT == 2" branch, i.e. a
width of 4096.  On a POCL CPU device, -prp 20000047 -fft 4K:2:256
-block 200 -iters 400:

    no swizzle                          OK 400 dc61d68c2b5a6155
    LDSSWIZ_W=1,SHUFL_BYTES_W=16        EE 400 c02f878d4ddb764b   (before)
    LDSSWIZ_W=1,SHUFL_BYTES_W=16        OK 400 dc61d68c2b5a6155   (after)

Write the index so it inverts the write for any WG.  At WG == 64 it is the
same expression as before, so the only configuration that worked before
still produces the same residue -- checked on an Intel iGPU at widths 512
and 1024 and at height 512 with the swizzle on, and with the default
settings.

The other three swizzled cases (the two RADIX == 4 ones and the first
RADIX == 8) already invert correctly at every WG; only this one hard-wired
the workgroup size.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/shufl.cl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0f16c2f7..b28624ef 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -119,12 +119,14 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Output to LDS in the order we expect to read.  In the example:  lds[0..63] = 0, 64, ... 448, 8, 72...   lds[64..127] = +1
     // No swizzle of LDS blocks is needed to eliminate bank conflicts.  The first 8 threads written to LDS (multiples of 64) and
     // the first 8 threads read from LDS (multiples of 64) are already in separate LDS banks.
+    // The read index must be the inverse of the natural write for every WG, not just WG == 64; at WG == 64 it
+    // reduces to lowMe / 8 * 64 + i * 8 + (lowMe & 7).
     // We can however save a bar() by writing to same locations that previous shufl wrote to.
     if (f == 8 && r == 8 && RADIX == 8) {
       LDStx_start(lds2, numWG);             //GRRR.... LDStx_start will do the bar we are trying to save
       for (u32 i = 0; i < RADIX; ++i) { lds[i * WG + lowMe] = u[i]; }
       LDSbar(numWG);
-      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[lowMe / 8 * 64 + i * 8 + (lowMe & 7)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[((lowMe / 8) & 7) * WG + i * (WG / 8) + (lowMe / 64) * 8 + (lowMe & 7)]; }
       LDStx_end(lds2, numWG);
       return;
     }

From e41a3e1201d1ac83799ef5a8d4012b20f20fadb4 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 15:52:09 -0600
Subject: [PATCH 198/214] Disabling MULTI_Q under -time must reach the kernels
 too

clDefines() copies args.flags into its local "config" map at the top, and
config is what the kernels are compiled from.  The guard that turns
MULTI_Q off when profiling writes only args.flags, which by then is no
longer what anyone downstream reads:

  - the kernels keep -DMULTI_Q=1 and go on believing there is a second
    queue splitting the width, which changes which stripes fftMiddleIn and
    fftMiddleOut treat specially;
  - the L2_STRIPING limit a few lines below reads args.value("MULTI_Q"),
    now 0, so it allows WIDTH/64 -- double what the comment there says is
    allowed with MULTI_Q, WIDTH/128.

The result is a kernel set that is internally inconsistent, and adding
-time to a working command line then breaks the run outright:

  -use MULTI_Q=1,INPLACE=1,L2_STRIPING=4            OK 200 0b944634573d637e
  -time -use MULTI_Q=1,INPLACE=1,L2_STRIPING=4      EE 0 on-load:
                                                    001a940000006003 vs.
                                                    0000000000000003
                                                    Exception "Error on load"

(-fft 256:2:256 on an Intel iGPU.  Without -time the host caps L2_STRIPING
at WIDTH/128 = 2 because MULTI_Q is on, and all is well.)

Set config["MULTI_Q"] as well.  After that, -time gives the kernels
MULTI_Q=0 and L2_STRIPING=4, the same residue as every other combination,
and runs without -time are untouched.  The GRAPHS guard below does not need
this: GRAPHS is not used by any kernel.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/Gpu.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 3464d75a..2ad5e6ae 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -338,6 +338,10 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
   // MULTI_Q is not allowed when profiling with -time
   if (args.profile && args.value("MULTI_Q", 0)) {
     args.flags["MULTI_Q"] = to_string(0);
+    // config was copied out of args.flags above, so it needs the same treatment: it is what the kernels are
+    // compiled from, and the L2_STRIPING limit a few lines below reads args.  Leaving config alone builds
+    // kernels that still believe in the second queue, with an L2_STRIPING allowed only without it.
+    config["MULTI_Q"] = to_string(0);
     log("MULTI_Q is disabled when profiling with -time.\n");
   }
   // GRAPHS are not allowed when profiling with -time.  GRAPH replays the four bottom-half

From f05075ef921ce8589d2a8ef67abd111871d83fd5 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 15:54:50 -0600
Subject: [PATCH 199/214] TrigBufCache: give each key field its own bits
 instead of adding them

Every field of the small/middle trig cache key is a number type's "in use"
flag plus that type's TAIL_TRIGS setting, added together into two bits:

    ((b)+(tt)) << 2) + (b31)+(tt31) ...

Adding them throws away the distinction.  FP64 in use with TAIL_TRIGS=1
and FP64 unused with TAIL_TRIGS=2 both give 2, so they produce the same
key; the same holds for the GF31, FP32 and GF61 fields.  A TAIL_TRIGS of 3
or more also carries out of its two bits into the neighbouring field.

The consequence is a Gpu handing another Gpu's table back: the cache is
per process and shared by all workers, so with two -workers whose tasks
pick different number types at the same width and nW -- say one FP64 and
one M31, with -use TAIL_TRIGS=1,TAIL_TRIGS31=1 -- one of them can be given
the twiddles generated for the other.  Nothing checks the contents, so it
shows up as a Gerbicz failure every block, if it is noticed at all.

Pack each field as one bit for the flag and three for TAIL_TRIGS.
Enumerating the whole domain (both flag values and TAIL_TRIGS 0..3 for all
four types, times tail_single_wide) gives 8192 configurations: the old key
maps them onto 682 distinct values, the new one onto 8192.  The key is
internal to the cache lookup, so nothing else changes; residues are
unchanged with the default settings and with -use TAIL_TRIGS=1 and
-use TAIL_TRIGS=0,TAIL_TRIGS31=1.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/TrigBufCache.cpp | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/TrigBufCache.cpp b/src/TrigBufCache.cpp
index f9e532c5..85586786 100644
--- a/src/TrigBufCache.cpp
+++ b/src/TrigBufCache.cpp
@@ -1046,7 +1046,14 @@ static vector<double2> genMiddleTrig(FFTConfig fft, u32 smallH, u32 middle, u32
 /*        Code to manage a cache of trigBuffers         */
 /********************************************************/
 
-#define make_key_part(b,tt,b31,tt31,b32,tt32,b61,tt61,tk) ((((((((((b)+(tt)) << 2) + (b31)+(tt31)) << 2) + (b32)+(tt32)) << 2) + (b61)+(tt61)) << 2) + (tk))
+// Each field of the key is one "is this number type in use" flag and that type's TAIL_TRIGS setting.  They
+// need separate bits: added together, as they used to be, a type in use with TAIL_TRIGS=n is indistinguishable
+// from that type unused with TAIL_TRIGS=n+1, and a TAIL_TRIGS of 3 or more carries into the neighbouring
+// field.  Two Gpus in one process can then share a cached table generated for the other one's number type,
+// which is silently wrong twiddles -- caught, if at all, only by the Gerbicz check.
+#define make_key_field(b, tt) (((((b) != 0) << 3) | ((tt) & 7)))
+#define make_key_part(b,tt,b31,tt31,b32,tt32,b61,tt61,tk) \
+  ((((((((make_key_field(b, tt) << 4) | make_key_field(b31, tt31)) << 4) | make_key_field(b32, tt32)) << 4) | make_key_field(b61, tt61)) << 1) | ((tk) != 0))
 
 TrigBufCache::~TrigBufCache() = default;
 

From 1186c6f2bf864b6cff41e8afb379a7d7ea255327 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 16:01:39 -0600
Subject: [PATCH 200/214] LDSbar: drop the lock-step early return, as bar(WG)
 and barsync() did

The LDS-sharing variant of LDSbar still starts with

    if (WG <= WAVEFRONT) return;

which is the assumption 0e67b41 removed from bar(WG) and barsync(): that a
group no larger than a wavefront needs no barrier because the hardware
runs it in lock-step.  Returning here bypasses both of the routines that
now decide this properly, so on nVidia Volta and later the warp is neither
reconverged nor its LDS traffic ordered before the caller reads what the
other lanes wrote.

Delete the early return.  bar(WG) and barsync() already handle WG <=
WAVEFRONT by what the hardware guarantees: AMD returns immediately as
before, sm_60 and later do sync() plus a local fence, and barsync() is the
one used when the LDS area is shared, where substituting a barrier over
all threads would not be allowed.

Only the LDSMUL > 1 definition of LDSbar has this; the default one is just
bar(WG) and is untouched, so nothing changes unless LDS sharing is asked
for.  Residues are unchanged on an Intel iGPU and on POCL with the default
settings.

I could not exercise the changed path: LDSbar's sharing variant calls
barsync(), which exists only where HAS_PTX >= 200, so LDSMUL > 1 does not
compile on anything but nVidia -- on an Intel device -use LDSMUL_W=2 fails
with "implicit declaration of function 'barsync'" whether or not this
patch is applied.  Worth knowing on its own, since SHARING_LDS's
"NVIDIAGPU || WG <= WAVEFRONT" reads as though non-nVidia hardware with a
small workgroup were meant to be able to share.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/fftbase.cl | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 2c55164a..65aae0c6 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -87,7 +87,9 @@ local void * OVERLOAD LDSsharing_ptr(local void *lds, const u32 numWG) {
 // NOTE: A "workgroup" is an independent group of threads doing FFT work (see WMUL in carryFused or TAIL_KERNELS=2).
 void OVERLOAD LDSbar(const u32 numWG) {
 
-  if (WG <= WAVEFRONT) return;
+  // No early return for WG <= WAVEFRONT here: bar(WG) and barsync() below both decide that for themselves,
+  // by what the hardware guarantees rather than by size alone, and returning early would skip the warp
+  // reconvergence and LDS fence they do on hardware that is not in lock-step.
 
   // If were not using semaphores to share LDS access, perform a standard bar.  The standard bar is free to implement a full bar across
   // all threads if that is more efficient than a bar across a subset of threads.

From 703359898d7281e950208ea368d49f1b4e60e50f Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 16:21:47 -0600
Subject: [PATCH 201/214] KernelCompiler: print the linked program's build log,
 not the compiled one's

After clLinkProgram, compile() asks p1 for its build log again -- the same
program whose log was already printed a few lines above, right after
clCompileProgram.  So the linker's own diagnostics are never shown, and a
link failure reports only

    Linking 'carryfused.cl' error LINK_PROGRAM_FAILURE (-17) (args )

with nothing about why.  That is not hypothetical: it is exactly what an
aarch64 POCL device printed while the kernels were being brought up there,
and the reason had to be found by other means.

The same line also repeats every compile warning.  With a #warning
injected into transpose.cl, an Intel iGPU run prints it 8 times before
this change and 4 after.

Ask p2 instead, guarded, since a failed clLinkProgram may return no
program at all and then there is nothing to query.

Residues unchanged on an Intel iGPU and on POCL.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/KernelCompiler.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/KernelCompiler.cpp b/src/KernelCompiler.cpp
index d384a6f1..33337762 100644
--- a/src/KernelCompiler.cpp
+++ b/src/KernelCompiler.cpp
@@ -107,7 +107,10 @@ Program KernelCompiler::compile(const string& fileName, const string& extraArgs)
   
   Program p2{clLinkProgram(context, 1, &deviceId, linkArgs.c_str(),
                            1, (cl_program *) &p1, nullptr, nullptr, &err)};
-  if (string const mes = getBuildLog(p1.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); }
+  // The linker's diagnostics live on the linked program.  Asking p1 again instead says nothing about the link
+  // -- and repeats the compile log that was already printed above.  A failed clLinkProgram may hand back no
+  // program at all, and then there is nothing to query.
+  if (p2) { if (string const mes = getBuildLog(p2.get(), deviceId); !mes.empty()) { log("%s\n", mes.c_str()); } }
   if (err != CL_SUCCESS) {
     log("Linking '%s' error %s (args %s)\n", fileName.c_str(), errMes(err).c_str(), linkArgs.c_str());
   }

From 1a1f8e7dc5b1d9296d5a9bc42c6920194c0f7d68 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 16:26:14 -0600
Subject: [PATCH 202/214] Refuse OLD_FENCE=0 where no wavefront runs in
 lock-step

carryFused's !OLD_FENCE carry hand-off has one lane per wavefront publish
the ready flag on behalf of its wavefront, and one lane per wavefront spin
on it, with sync() as the only thing ordering the other lanes around it.
That works on AMD, where a wavefront advances in lock-step and sync() can
be free, and on nVidia, where sync() is bar.warp.sync.  On anything else
sync() compiles to nothing, the hand-off races, and the answer is silently
wrong -- on an Intel iGPU, -use OLD_FENCE=0 returns

    EE 400 8f64862427ff0b6f

where every other configuration of the same run returns
0d42972a9d02005c.

A barrier is not a substitute: the sync() at carryfused.cl:224 sits inside
"if (gr < H / WMUL && me >= (WMUL-1) * G_W)", which the whole workgroup
does not enter, so a workgroup barrier deadlocks there -- tried, and the
run dies with OUT_OF_RESOURCES on kCarryFused.  The protocol wants a
wavefront-scoped primitive, and off AMD and nVidia there is not one.

base.cl already defaults OLD_FENCE to 1 when not AMDGPU.  Make that hold
when it is set explicitly as well, the same way MULTI_Q and GRAPHS are
overridden under -time.  After this, -use OLD_FENCE=0 on an Intel iGPU
logs a line and returns the right residue.

Found by sweeping every -use knob against the invariant that none of them
may change the residue.  It was the only knob that did.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/Gpu.cpp | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 3464d75a..04a21af6 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -340,6 +340,19 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
     args.flags["MULTI_Q"] = to_string(0);
     log("MULTI_Q is disabled when profiling with -time.\n");
   }
+  // The !OLD_FENCE carry hand-off in carryFused coordinates the lanes of a wavefront with sync() and nothing
+  // else, from inside a divergent branch, so a workgroup barrier is not a substitute.  sync() is bar.warp.sync
+  // on nVidia and free on AMD, where a wavefront really does advance in lock-step.  Anywhere else it compiles
+  // to nothing, the hand-off races, and the result is silently wrong: on an Intel iGPU -use OLD_FENCE=0
+  // returns a wrong residue inside 400 iterations.  base.cl already defaults OLD_FENCE to 1 off AMD; make
+  // that hold when it is asked for explicitly too.
+  if (!isAmdGpu(id) && !isNvidiaGpu(id)) {
+    if (auto it = config.find("OLD_FENCE"); it != config.end() && atoi(it->second.c_str()) == 0) {
+      it->second = to_string(1);
+      log("OLD_FENCE=0 needs an AMD or nVidia device; using OLD_FENCE=1.\n");
+    }
+  }
+
   // GRAPHS are not allowed when profiling with -time.  GRAPH replays the four bottom-half
   // kernels without per-kernel events, and the events recorded while capturing the graph never execute, so the
   // profile would show those kernels -- most of an iteration -- as one call of ~0 ns.

From 0776fee8bf55619157b9f976b4b3714ee0602146 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 16:51:48 -0600
Subject: [PATCH 203/214] CI: require the residue to be the same under several
 -use settings

The kernel smoke job runs one configuration, so it can only catch a kernel
that is broken everywhere.  The failures this code actually has are the
other kind: correct in the shipped configuration and wrong in another one,
silently, because nothing ever runs that path.

There is a cheap invariant for exactly that.  A -use knob is a performance
setting, so it must not change the answer: after a fixed number of
iterations the residue depends only on the exponent.  Run the same check
under a few knobs and require one residue.

TAIL_KERNELS=0 swaps the double-wide tail kernels for single-wide ones and
WMUL=1 changes how carryFused partitions its workgroup, so between them
the three runs cover rather more of the kernel set than one did.  Each run
starts from scratch, since otherwise prpll resumes from the previous run's
savefile and the second and third runs would have nothing to do.

Verified on a POCL CPU device: the three configurations agree on
0d42972a9d02005c, and adding a knob that does change the residue
(OLD_FENCE=0, which races where no wavefront is in lock-step) makes the
step exit 1 with the two residues in the message.

Costs two more runs of about 20 s each on a warm cache.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 .github/workflows/ci.yml | 42 +++++++++++++++++++++++++++++-----------
 1 file changed, 31 insertions(+), 11 deletions(-)

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 0a082ad3..5efe77ba 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -59,20 +59,40 @@ jobs:
       run: make DEBUG=1 -O -j "$(nproc)"
     - name: Compile the kernels and pass a Gerbicz check
       # Step-level bound (not job-level, so a slow apt mirror cannot fail the job): a correct run takes
-      # well under a minute.  prpll ignores SIGTERM while inside an OpenCL compile, hence -s KILL.
-      timeout-minutes: 12
+      # well under a minute each.  prpll ignores SIGTERM while inside an OpenCL compile, hence -s KILL.
+      #
+      # The same check runs under a few -use settings and the residues must all agree.  A -use knob is a
+      # performance setting, so it cannot change the answer: after a fixed number of iterations the residue
+      # depends only on the exponent.  That makes a one-line invariant out of the failure this code is most
+      # prone to -- a kernel that is correct in the shipped configuration and computes the wrong thing in
+      # another -- which a single-configuration run cannot see at all.  TAIL_KERNELS=0 swaps the double-wide
+      # tail kernels for single-wide ones, and WMUL=1 changes how carryFused partitions its workgroup.
+      timeout-minutes: 25
       run: |
         cd build-debug
         ./prpll -h
-        # Dump the log whatever happened, so a timeout or crash still shows how far the kernels got.
-        # Steps run under "bash -e", so the run has to be guarded: unguarded, a failing run ends the step
-        # right there and the dump never happens.  prpll's own stdout is block-buffered into the runner's
-        # pipe and is lost when it is killed, so the log file is the only record.
-        rc=0
-        timeout -s KILL 10m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400 || rc=$?
-        cat gpuowl-0.log || true
-        test "$rc" -eq 0
-        grep -q "OK  *400 " gpuowl-0.log
+        want=""
+        for cfg in "" "-use TAIL_KERNELS=0" "-use WMUL=1"; do
+          # Start each run from scratch: left alone, prpll would resume from the previous run's savefile.
+          rm -rf gpuowl-0.log 5000011
+          # Dump the log whatever happened, so a timeout or crash still shows how far the kernels got.
+          # Steps run under "bash -e", so the run has to be guarded: unguarded, a failing run ends the step
+          # right there and the dump never happens.  prpll's own stdout is block-buffered into the runner's
+          # pipe and is lost when it is killed, so the log file is the only record.
+          rc=0
+          timeout -s KILL 6m ./prpll -device 0 -prp 5000011 -fft 256:2:256 -block 200 -iters 400 $cfg || rc=$?
+          cat gpuowl-0.log || true
+          test "$rc" -eq 0
+          res=$(grep -aoE 'OK +400 +[0-9a-f]{16}' gpuowl-0.log | grep -oE '[0-9a-f]{16}$')
+          test -n "$res"
+          echo "residue with '${cfg:-defaults}': $res"
+          if [ -z "$want" ]; then
+            want=$res
+          elif [ "$res" != "$want" ]; then
+            echo "::error::-use changed the residue: '$cfg' gives $res, defaults give $want"
+            exit 1
+          fi
+        done
 
   Linux-OpenCL:
     name: Linux OpenCL

From 515a27aa8d1af8d732bf21de832165dfc2b6bde9 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 17:46:14 -0600
Subject: [PATCH 204/214] tailMul: read the "low" line with the half-workgroup
 lane, not get_local_id

The double-wide tailMul kernels run G_H*2 threads over two lines and work
out lowMe = me % G_H for the lane within a line.  Every access uses lowMe
except the MUL_LOW read, which calls

    read(G_H, NH, p, a, memline * SMALL_HEIGHT);

and read() indexes with get_local_id(0) -- which in these kernels runs
0..2*G_H-1.  The second half-workgroup therefore reads the line shifted by
one i step, and at i == NH-1 it reads into the next memline, past the end
of the buffer for the last one.  The single-wide kernels are fine: there
me == lowMe.

This breaks proof generation outright, and only proof generation, because
tailMulLow is reached only from Gpu::exponentiate via Proof.  A PRP run and
its Gerbicz check never touch it, so everything looks healthy.  On a 7900
XTX, a complete PRP of 786433 on current master:

    786433 proof: invalid (316d17434d034dc2 expected 0abb7aeca5890b24)
    786433 Proof 'proof-tmp/786433-10.proof' verification FAILED
    786433 Proof generation failed; reporting the result without a proof

at every proof power from 10 down to 4.  With -use TAIL_KERNELS=0 or 1
(single-wide) the same run verifies OK, which puts it on the double-wide
path; with this fix the default verifies OK for FFT types 0, 3 and 4, and
the PRP residue is bfb6553c004222ba either way, since only the proof path
is affected.

Add an overload of read() that takes the lane explicitly and use it at the
four sites, one per number type.

A failed -verify used to exit 0, so nothing but the log could tell a good
proof from a bad one.  VERIFY tasks come only from the command line, so
that is always a one-shot job: throw, which the existing handling in main()
turns into exit 1.

Add a CI step that would have caught the kernel bug: verify a known-good
proof once per FFT type.  Verification runs tailSquare and tailMulLow for a
few thousand iterations, and the six types are the ones allShapes()
enumerates, so every number type and hybrid is covered.  A proof is just a
list of residues, so one file serves all six.  On a POCL CPU device the
whole step takes about two minutes, and on an unpatched tree it fails.

test/786433-10.proof is 1.0 MB: 11 residues of a 786433-bit exponent, the
smallest an FP64 FFT can do at its 3.0 bits-per-word minimum.  Proof power
10 keeps verification short (the final exponentiation is E/1024 squarings).
It was generated on a 7900 XTX and verifies on POCL and an Intel iGPU too.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 .github/workflows/ci.yml |  21 +++++++++++++++++++++
 src/Task.cpp             |   4 ++++
 src/cl/middle.cl         |   7 +++++++
 src/cl/tailmul.cl        |   8 ++++----
 test/786433-10.proof     | Bin 0 -> 1081411 bytes
 5 files changed, 36 insertions(+), 4 deletions(-)
 create mode 100644 test/786433-10.proof

diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 0a082ad3..fcd43126 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -74,6 +74,27 @@ jobs:
         test "$rc" -eq 0
         grep -q "OK  *400 " gpuowl-0.log
 
+    - name: Verify a proof under every FFT type
+      # The Gerbicz check above never reaches tailMulLow: that kernel is used only when a proof is built,
+      # so it can be wrong while everything above stays green.  That is not hypothetical -- the double-wide
+      # tailMul read a whole line with the wrong lane and no test here noticed, because a PRP run and its
+      # Gerbicz check are both perfectly happy without it.
+      #
+      # Verifying a known-good proof closes that hole cheaply: it runs tailSquare and tailMulLow for a few
+      # thousand iterations, once per FFT type, and the six here are the ones allShapes() enumerates, so
+      # every number type (FP64, FP32, GF31, GF61) and every hybrid of them gets exercised.  The proof is
+      # type-agnostic: it is a list of residues, so one file checks all six.
+      timeout-minutes: 30
+      run: |
+        cd build-debug
+        for t in 0 1 2 3 4 51; do
+          rm -rf gpuowl-0.log 786433
+          rc=0
+          timeout -s KILL 10m ./prpll -device 0 -verify ../test/786433-10.proof -fft "$t:256:2:256" || rc=$?
+          cat gpuowl-0.log || true
+          test "$rc" -eq 0
+        done
+
   Linux-OpenCL:
     name: Linux OpenCL
 
diff --git a/src/Task.cpp b/src/Task.cpp
index 7ec35f23..8c1726e6 100644
--- a/src/Task.cpp
+++ b/src/Task.cpp
@@ -251,6 +251,10 @@ void Task::execute(GpuCommon shared, u32 instance) {
     assert(proof.E == exponent);
     bool const ok = proof.verify(gpu.get());
     log("proof '%s' %s\n", verifyPath.c_str(), ok ? "verified" : "failed");
+    // -verify is a one-shot job (VERIFY tasks come only from the command line), so a proof that does not
+    // check out is a failed run and has to be visible as one: without this the process exits 0 and a
+    // caller cannot tell a good proof from a bad one except by reading the log.
+    if (!ok) { throw "proof verification failed"; }
 
   } else if (kind == PRP || kind == LL) {
     bool isPrime;
diff --git a/src/cl/middle.cl b/src/cl/middle.cl
index 90951dc5..b52cea27 100644
--- a/src/cl/middle.cl
+++ b/src/cl/middle.cl
@@ -42,6 +42,13 @@ void OVERLOAD read(u32 WG_SZ, u32 N, T2_F2_GF31_GF61 *u, const global T2_F2_GF31
   for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG_SZ]); }
 }
 
+// Same, but for a kernel whose workgroup spans more than one line: get_local_id(0) is then not the lane
+// within the line, and the caller has to say which lane it means.
+void OVERLOAD read(u32 WG_SZ, u32 N, T2_F2_GF31_GF61 *u, const global T2_F2_GF31_GF61 *in, u32 base, u32 lane) {
+  in += base + lane;
+  for (u32 i = 0; i < N; ++i) { u[i] = FFTLOAD(&in[i * WG_SZ]); }
+}
+
 void OVERLOAD write(u32 WG_SZ, u32 N, T2_F2_GF31_GF61 *u, global T2_F2_GF31_GF61 *out, u32 base) {
   out += base + (u32) get_local_id(0);
   for (u32 i = 0; i < N; ++i) { FFTSTORE(&out[i * WG_SZ], u[i]); }
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index facd6273..761c9046 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -270,7 +270,7 @@ KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
 #endif
 
 #if MUL_LOW
-  read(G_H, NH, p, a, memline * SMALL_HEIGHT);
+  read(G_H, NH, p, a, memline * SMALL_HEIGHT, lowMe);
   fft_HEIGHT1(lds, u, smallTrig, w, 2, lowMe);
 #else
   readTailFusedLine(a, p, line, lowMe);
@@ -530,7 +530,7 @@ KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig
   readTailFusedLine(inF2, u, line, lowMe);
 
 #if MUL_LOW
-  read(G_H, NH, p, aF2, memline * SMALL_HEIGHT);
+  read(G_H, NH, p, aF2, memline * SMALL_HEIGHT, lowMe);
   fft_HEIGHT1(lds, u, smallTrigF2, 2, lowMe);
 #else
   readTailFusedLine(aF2, p, line, lowMe);
@@ -814,7 +814,7 @@ KERNEL(G_H * 2) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig small
   readTailFusedLine(in31, u, line, lowMe);
 
 #if MUL_LOW
-  read(G_H, NH, p, a31, memline * SMALL_HEIGHT);
+  read(G_H, NH, p, a31, memline * SMALL_HEIGHT, lowMe);
   fft_HEIGHT1(lds, u, smallTrig31, 2, lowMe);
 #else
   readTailFusedLine(a31, p, line, lowMe);
@@ -1109,7 +1109,7 @@ KERNEL(G_H * 2) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig small
   readTailFusedLine(in61, u, line, lowMe);
 
 #if MUL_LOW
-  read(G_H, NH, p, a61, memline * SMALL_HEIGHT);
+  read(G_H, NH, p, a61, memline * SMALL_HEIGHT, lowMe);
   fft_HEIGHT1(lds, u, smallTrig61, 2, lowMe);
 #else
   readTailFusedLine(a61, p, line, lowMe);
diff --git a/test/786433-10.proof b/test/786433-10.proof
new file mode 100644
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From 3d0449fa93624e95e22da035ff6019abca7f3aa8 Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 18:13:32 -0600
Subject: [PATCH 205/214] updateStats: barrier the roundoff reduction by
 hardware, not by size

The LDS reduction in updateStats guards its barriers with

    if (num_threads > WAVEFRONT) bar();

which is the assumption 0e67b41 removed from bar(WG) and barsync(): that a
group no wider than a wavefront advances in lock-step and so needs neither
an execution barrier nor a fence.  True on AMD GCN; not true on nVidia
Volta and later; not true at all on an Intel GPU or a CPU device.

With G_W == 64 and a 32-lane wavefront the loop runs at num_threads = 64,
32 and 16, so two of its three steps write and read LDS with no barrier
and no fence between them.  Threads then miss values written by the upper
half and the reduction returns something smaller than the real maximum.

Use bar(num_threads), which now decides that by what the hardware
guarantees: AMD returns immediately exactly as before, sm_60 and later
reconverge the warp and fence LDS, anything else takes a real barrier.
num_threads is a compile-time workgroup size (G_W and friends), so every
thread makes the same number of passes and reaches both calls.

Measured, -fft 256:2:256 -block 200 -iters 1200:

    POCL CPU device   master  ROEmax 0.117, ROEavg 0.091
                      patched ROEmax 0.127, ROEavg 0.095
    Intel iGPU        master  ROEmax 0.127, ROEavg 0.094
                      patched ROEmax 0.127, ROEavg 0.095

0.127 is the true figure: the iGPU reaches it either way, and the patched
CPU run now agrees with it, while master on the CPU device loses the
maximum entirely.  Residues are identical throughout (0d42972a9d02005c at
400, b39c99fbd03b3454 at 1200) -- only the statistic was wrong.

That statistic is not only cosmetic: the comments in fftbpw.h say the
bits-per-word tables were computed "by targeting maxROE of ~0.35 over 1000
iterations", and one entry records lowering a limit after a run failed at
ROEmax 0.294.  A maximum that reads low makes an FFT size look safer than
it is.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/carryutil.cl | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/cl/carryutil.cl b/src/cl/carryutil.cl
index 9d8dda6b..c9c88a76 100644
--- a/src/cl/carryutil.cl
+++ b/src/cl/carryutil.cl
@@ -145,9 +145,14 @@ void updateStats(local u32 *lds, u32 num_threads, u32 num_blocks, global uint *b
   // (see https://github.com/mahmoudmaftah/MaxReduction-Cuda/blob/main/code/reduction_benchmarks.cu)
   while (num_threads > 8) {
     // Write roundMax for high half of threads to local memory.  Ignore threads not participating in the reduction.
-    if (num_threads > WAVEFRONT) bar();
+    // bar(num_threads) rather than a hand-rolled "only if it is wider than a wavefront": that test assumes a
+    // wavefront advances in lock-step, which holds on AMD but not on nVidia Volta and later, and nowhere else
+    // at all.  bar() decides that by what the hardware guarantees, and with G_W == 64 and a 32-lane wavefront
+    // two of the three reduction steps here were running with no barrier and no fence.  num_threads is a
+    // compile-time workgroup size, so every thread makes the same number of passes and reaches both calls.
+    bar(num_threads);
     if (me >= num_threads / 2 && me < num_threads) lds[me - num_threads / 2] = u32RoundMax;
-    if (num_threads > WAVEFRONT) bar();
+    bar(num_threads);
     // Low half of threads do a max
     if (me < num_threads / 2) {
       u32 highHalfMax = lds[me];

From 9d8f3935ccc274c8690dc8db706bf2361a39730b Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 18:24:46 -0600
Subject: [PATCH 206/214] LDS sharing: fix the region and semaphore arithmetic,
 and refuse what cannot work

Four problems in the LDSMUL > 1 path, all reachable only by opting in, and
none of them reported by anything today.  Every change here is the identity
when SBMUL == 1, which is every configuration that does not opt in --
checked by enumerating 180 combinations of numWG, SHUFL_BYTES, WG, RADIX
and LDSPAD.

1. SBMUL need not divide numWG.  The workgroups are partitioned into groups
   of SBMUL sharing one region and one semaphore, so the partition needs
   ceil(numWG/SBMUL) groups spanning ceil(numWG/SBMUL)*SBMUL regions, but
   LDS_BYTES allocated numWG of them and LDSinit initialised numWG/SBMUL
   semaphores while the highest index in use is (numWG-1)/SBMUL.  With
   WG=64, RADIX=4, SHUFL_BYTES=8 and -use WMUL=3,LDSMUL_W=2 that is 2144
   bytes of LDS written past the end of the array, and semaphore 1 read
   uninitialised -- which either hangs on a stale 1, or slips through the
   spin loop without the lock.

2. The spin loop tested the wrong thing.  atomic_cmpxchg returns the old
   value, so only 0 means the lock was taken; "== 1" let any other value
   out of the loop unlocked, after which LDStx_end cleared a semaphore this
   workgroup never held.  Now "!= 0".

3. The "4 semaphores" assert was the wrong invariant and compiled to
   nothing without -use DEBUG.  The space is now sized from the group count
   instead of hardwired, so there is nothing left to assert: -use
   WMUL=10,LDSMUL_W=2 wrote 5 semaphores into room for 4.

4. Two combinations cannot work and now fail to build rather than quietly
   misbehave:
     - variant 2 with LDSMUL > 1.  partial_tabMul4/8 read and write the
       shared region outside the LDStx lock with only a bar(WG), which does
       not cover the other workgroups sharing that memory.  This is what the
       "partitioned_LDS is a nightmare" note was about; refusing it also puts
       LDSptr's truncating divide out of reach, since variant 2 is its only
       caller and the truncation only occurs when sharing leaves
       LDS_SHUFL_BYTES off a 16-byte boundary.
     - LDSMUL >= 3 with SHUFL_BYTES == 4, where SBMUL*SHUFL_BYTES is 12 and
       shufl's >= 16 / == 8 / == 4 chain has no branch: it would return with
       the data unexchanged and no diagnostic.

I have no nVidia hardware, and LDS sharing calls barsync(), which exists
only where HAS_PTX >= 200, so none of this can run on an AMD, Intel or CPU
device here.  What I could check: the arithmetic, enumerated above; that
the sharing path still compiles, with clang -fsyntax-only for an
nvptx64 target across LDSMUL 1/2/4 and SHUFL_BYTES 4/8/16; that the two
guards fire for exactly the two rejected combinations and nothing else; and
that residues are unchanged on an Intel iGPU and POCL, with defaults and
with -use TAIL_KERNELS=2,WMUL=4.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/fftbase.cl | 47 +++++++++++++++++++++++++++++++++++++----------
 1 file changed, 37 insertions(+), 10 deletions(-)

diff --git a/src/cl/fftbase.cl b/src/cl/fftbase.cl
index 2c55164a..708c343d 100644
--- a/src/cl/fftbase.cl
+++ b/src/cl/fftbase.cl
@@ -51,21 +51,45 @@ void OVERLOAD LDStx_end(local void *lds, const u32 numWG) {
 #define LDSPAD_COUNT(numWG)       (!LDSPAD ? 0 : RADIX == 4 ? 12 : SBMUL(numWG) * SHUFL_BYTES >= 16 ? 7 : 56)
 // LDS_SHUFL_BYTES is the number of LDS bytes *allocated* for each workgroup (SBMUL > 1 means the workgroup can *access* some multiple of LDS_SHUFL_BYTES)
 #define LDS_SHUFL_BYTES(numWG)    ((WG * RADIX + LDSPAD_COUNT(numWG)) * SHUFL_BYTES)
-// The total number of LDS_BYTES allocated by a kernel includes space for 4 semaphores to control workgroup access
-#define LDS_BYTES(numWG)          (numWG * LDS_SHUFL_BYTES(numWG) + (SHARING_LDS(numWG) ? 16 : 0))
+// The workgroups are partitioned into groups of SBMUL that share one LDS region and one semaphore.
+// SBMUL need not divide numWG, so round up: the last group is short but still spans SBMUL regions and
+// owns a semaphore of its own.  Allocating only numWG regions, and only ever four semaphores, is not
+// enough then -- LDSsharing_ptr hands out a region past the end of the array and LDSinit leaves the
+// last semaphore uninitialised.  With SBMUL == 1, which is every configuration that does not opt into
+// sharing, all of this is numWG regions and no semaphores, exactly as before.
+#define LDS_GROUPS(numWG)         ((numWG + SBMUL(numWG) - 1) / SBMUL(numWG))
+#define LDS_REGIONS(numWG)        (LDS_GROUPS(numWG) * SBMUL(numWG))
+#define LDS_SEM_OFFSET(numWG)     (LDS_REGIONS(numWG) * LDS_SHUFL_BYTES(numWG))
+#define LDS_BYTES(numWG)          (LDS_SEM_OFFSET(numWG) + (SHARING_LDS(numWG) ? LDS_GROUPS(numWG) * 4 : 0))
+
+// Variant 2 keeps its own pointer into the shared region (partitioned_lds) and both reads and writes it
+// in partial_tabMul4/8 outside the LDStx lock, with only a bar(WG) that does not cover the other
+// workgroups sharing that memory.  That is what the "partitioned_LDS is a nightmare" note was about, so
+// refuse the combination rather than corrupt quietly.  This also keeps LDSptr's truncating divide out of
+// reach: it is only inexact when sharing rounds LDS_SHUFL_BYTES off a 16-byte boundary, and variant 2 is
+// its only caller.
+#if VARIANT == 2
+#error LDSMUL > 1 is not supported with FFT variant 2 (partial_tabMul touches the shared LDS region outside the lock)
+#endif
 
-////   BUG BUG BUG
-///variant 2 partitioned_LDS is a nightmare  -- require variant 2 to be LDSMUL=1 until we can figure it out?
+// shufl dispatches on SBMUL * SHUFL_BYTES with branches for >= 16, == 8 and == 4 and no fallback, so a
+// product of 12 would return with the data unexchanged and no diagnostic.  Only SBMUL == 3 can produce
+// it.  Rejecting on LDSMUL is slightly stronger than necessary -- a call with numWG < 3 would have come
+// out at SBMUL < 3 -- but numWG is a runtime argument, and a build error beats silently wrong results.
+#if LDSMUL >= 3 && SHUFL_BYTES == 4
+#error LDSMUL >= 3 with SHUFL_BYTES == 4 gives SBMUL * SHUFL_BYTES == 12, which no shufl branch handles
+#endif
 
 // Initialize access to LDS memory.  It may be advantageous to have independent workgroups share access to LDS memory via a lock controlling a critical section.
 // This may let a kernel use less LDS memory, or have each workgroup use more LDS memory to perform fewer passes of writing and reading LDS memory.
 void OVERLOAD LDSinit(void local *lds, const u32 numWG) {
   // Init semaphores to unlocked state
   if (SHARING_LDS(numWG)) {
-    assert(numWG / SBMUL(numWG) <= 4);  // LDS_BYTES is hardwired to allocate 4 semaphores
     if (get_local_id(0) == 0) {
-      volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
-      for (u32 i = 0; i < numWG / SBMUL(numWG); i++) semaphores[i] = 0;
+      volatile local int *semaphores = (volatile local int *)(((local char *) lds) + LDS_SEM_OFFSET(numWG));
+      // One per sharing group, and every group that exists: the highest index in use is
+      // (numWG - 1) / SBMUL, which the old numWG / SBMUL bound missed whenever SBMUL did not divide numWG.
+      for (u32 i = 0; i < LDS_GROUPS(numWG); i++) semaphores[i] = 0;
     }
     bar();
   }
@@ -117,10 +141,13 @@ void OVERLOAD LDStx_start(local void *lds, const u32 numWG) {
   }
   // Have first thread in a workgroup lock the semaphore controlling access to LDS memory
   if (get_local_id(0) % WG == 0) {
-    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
+    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + LDS_SEM_OFFSET(numWG));
 
     // Lock semaphore (set to one) to gain access to critical section
-    while (atomic_cmpxchg(&semaphores[get_local_id(0) / WG / SBMUL(numWG)], 0, 1) == 1);
+    // Spin until the semaphore was observed unlocked: cmpxchg returns the old value, so anything other
+    // than 0 means the lock was not taken.  Testing for 1 alone would let any other value through here
+    // without the lock, and LDStx_end would then clear a semaphore this workgroup never owned.
+    while (atomic_cmpxchg(&semaphores[get_local_id(0) / WG / SBMUL(numWG)], 0, 1) != 0);
   }
   LDSbar(numWG);
 }
@@ -135,7 +162,7 @@ void OVERLOAD LDStx_end(local void *lds, const u32 numWG) {
   LDSbar(numWG);
   // Unlock the semaphore
   if (get_local_id(0) % WG == 0) {
-    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + numWG * LDS_SHUFL_BYTES(numWG));
+    volatile local int *semaphores = (volatile local int *)(((local char *) lds) + LDS_SEM_OFFSET(numWG));
     semaphores[get_local_id(0) / WG / SBMUL(numWG)] = 0;
   }
 }

From 128c0aa95879f6a18901c40f5f74e12d64f97b4b Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 18:35:35 -0600
Subject: [PATCH 207/214] shufl: make the FP32/GF31 "second RADIX == 8" index
 workgroup-general

The LDSPAD "second RADIX == 8" case of the 32-bit shufl, in both the
8-byte and the 4-byte paths, picks between two index expressions on
WG == 64.  The else arm lays the data out as exactly eight padded rows,
which only inverts when WG/64 == 8, and reads a row of 64 regardless of
WG.  Enumerating the resulting permutation against the generic shufl:

    WG =  64      0 of  512 wrong
    WG = 128    896 of 1024 wrong   (48 reads of slots never written)
    WG = 256   1792 of 2048 wrong   (32 reads of slots never written)
    WG = 512      0 of 4096 wrong

So it happens to be right at exactly the two sizes that reach it today --
512 (WG 64) and 4096 (WG 512) -- and wrong at everything between.  Not a
bug now: FP32 and GF31 route width/height 1024 through shufl_and_fft2
rather than plain shufl(f=8), so WG 128 never gets here, and no RADIX-8
shape produces WG 256.  It goes live the moment a new shape or a different
1K dispatch does.

The 64-bit sibling a few hundred lines above solves the same problem with
an expression that is general in WG, and at WG == 64 its two arms are the
same expression, so one form serves every size:

    write  lds[i * (WG + 8) + lowMe]
    read   lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]

Enumerated at WG 64, 128, 256 and 512: a bijection every time, agreeing
with the generic shufl element for element, no unwritten slot read, and
the highest index one below the allocation ((WG*RADIX + 56), which these
paths use) in all four cases.  The WG == 64 branch goes away with it --
that branch is what the whole family of these bugs is made of.

The same shape is in the LDSPAD RADIX == 4 reads, whose else arm balances
only at WG == 256.  Those are correct at both workgroup sizes RADIX 4 can
have today (WG 64 from a 256-wide shape, WG 256 from a 1024 one should the
commented-out clause in nW()/nH() be re-enabled), and generalising them
measured as no faster and no slower while adding 16 instructions to
fftw.cl, so they are left as they are and guarded instead: a RADIX-4
workgroup of any other size now fails to build, with a message saying what
to do about it, rather than silently reading slots nothing wrote.  The
guard fires for exactly that case -- WG 64 and 256 at RADIX 4 still build,
as does every RADIX 8 size.

The LDSSWIZ masks have the same character one size lower: enumerating all
eight swizzle cases, five of them fold rows together at WG 32 and return
64 to 192 wrong elements of 256, while every one is exact from WG 64 up.
Nothing reaches them at WG 32 either (that branch of fft_common asks for
f=1,r=4 at RADIX 8, and f=4,r=8, which no swizzle case matches), so they
get a guard too rather than a rewrite: LDSSWIZ now requires WG >= 64.

Residues unchanged on an Intel iGPU and on POCL at 256:2:256, 512:2:256
and 1K:2:256, and with -use SHUFL_BYTES_W=4 and SHUFL_BYTES_H=4.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/cl/shufl.cl | 52 +++++++++++++++++++++++++++++++++++++------------
 1 file changed, 40 insertions(+), 12 deletions(-)

diff --git a/src/cl/shufl.cl b/src/cl/shufl.cl
index 0f16c2f7..ca81c57a 100644
--- a/src/cl/shufl.cl
+++ b/src/cl/shufl.cl
@@ -1,6 +1,28 @@
 // Copyright (C) Mihai Preda
 
 
+// The LDSSWIZ swizzle masks below are sized for a workgroup of at least 64: at WG 32 the XOR patterns
+// (lowMe & 7), (lowMe & 15), ((lowMe / 8) & 15) and friends fold several rows onto each other, and five
+// of the cases then return the wrong data -- 64 to 192 elements of 256, depending on the case.  No
+// dispatch reaches them there today (the WG == 32 branch of fft_common asks for f=1,r=4 at RADIX 8 and
+// f=4,r=8, and no swizzle case matches either), so like the padded cases above this is a constraint to
+// record rather than code to rewrite.
+#if LDSSWIZ && WG < 64
+#error LDSSWIZ needs a workgroup of at least 64: its swizzle masks fold rows together below that
+#endif
+
+// The LDSPAD RADIX == 4 reads in this file choose between a WG == 64 form and an else arm whose
+// i * 64 and (lowMe / 64) * 16 terms only balance at WG == 256.  Both workgroup sizes RADIX 4 can
+// have today are therefore handled -- a 256-wide/high shape gives WG 64, and a 1024 one would give
+// WG 256 if the commented-out clause in FFTConfig::nW()/nH() were re-enabled -- so the code is
+// correct as it stands, and generalising it would add index arithmetic for no present benefit.
+// Any other WG would read slots that were never written, silently and with the wrong residue as the
+// only symptom, so refuse to build it instead.  Generalising is easy when it is needed: i * (WG / 4)
+// in place of i * 64 is index-identical at both 64 and 256.
+#if LDSPAD && RADIX == 4 && WG != 64 && WG != 256
+#error RADIX == 4 with this workgroup size needs the LDSPAD reads in shufl.cl generalised first (they assume WG is 64 or 256)
+#endif
+
 // Strongly typed versions of LDSptr and LDSsharing_ptr.  On TitanV, CUDA 12.9, this is 1% faster.
 local T_F_Z31_Z61 * OVERLOAD LDSptr(local T_F_Z31_Z61 *lds, const u32 numWG) {
   return lds + ((u32)get_local_id(0) / WG) * LDS_SHUFL_BYTES(numWG) / sizeof(T_F_Z31_Z61);
@@ -196,6 +218,10 @@ void OVERLOAD shufl(local T2_GF61 *lds2, T2_GF61 *u, u32 f, u32 r, u32 numWG, u3
     // Read from LDS in output order.  In the example:  u[0] = 0, 64, ... 448, 8, 72...   u[1] = +1
     if (f == 8 && r == 8 && RADIX == 8) {
       LDStx_start(lds2, numWG);
+    // One expression for every WG.  The old pair of arms laid the data out as exactly eight padded rows,
+    // which only inverts when WG/64 == 8, and read a row of 64 regardless of WG: correct at WG 64 and 512,
+    // wrong everywhere between (896 of 1024 elements at WG 128, 1792 of 2048 at WG 256, some of them
+    // reading slots nothing had written).  This is the form the 64-bit sibling above already uses.
       for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
       LDSbar(numWG);
       if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8                    +  (lowMe / 8)      * (WG + 8) + (lowMe & 7)]; }
@@ -620,11 +646,13 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Pad 8 values after every 64 values to eliminate bank conflicts.
     if (1 && f == 8 && r == 8 && RADIX == 8) {
       LDStx_start(lds2, numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i]; }
+    // One expression for every WG.  The old pair of arms laid the data out as exactly eight padded rows,
+    // which only inverts when WG/64 == 8, and read a row of 64 regardless of WG: correct at WG 64 and 512,
+    // wrong everywhere between (896 of 1024 elements at WG 128, 1792 of 2048 at WG 256, some of them
+    // reading slots nothing had written).  This is the form the 64-bit sibling above already uses.
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i]; }
       LDSbar(numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i] = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
       LDStx_end(lds2, numWG);
       return;
     }
@@ -785,17 +813,17 @@ void OVERLOAD shufl(local F2_GF31 *lds2, F2_GF31 *u, u32 f, u32 r, u32 numWG, u3
     // Pad 8 values after every 64 values to eliminate bank conflicts.
     if (f == 8 && r == 8 && RADIX == 8) {
       LDStx_start(lds2, numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].x; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].x; }
+    // One expression for every WG.  The old pair of arms laid the data out as exactly eight padded rows,
+    // which only inverts when WG/64 == 8, and read a row of 64 regardless of WG: correct at WG 64 and 512,
+    // wrong everywhere between (896 of 1024 elements at WG 128, 1792 of 2048 at WG 256, some of them
+    // reading slots nothing had written).  This is the form the 64-bit sibling above already uses.
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].x; }
       LDSbar(numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].x = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
       LDSbar(numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { lds[ (lowMe / 8)      * (WG + 8)                     + i * 8 + (lowMe & 7)] = u[i].y; }
-      else          for (u32 i = 0; i < RADIX; ++i) { lds[((lowMe / 8) & 7) * (WG + 8) + (lowMe / 64) * 64 + i * 8 + (lowMe & 7)] = u[i].y; }
+      for (u32 i = 0; i < RADIX; ++i) { lds[i * (WG + 8) + lowMe] = u[i].y; }
       LDSbar(numWG);
-      if (WG == 64) for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG + 8) + lowMe]; }
-      else          for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * 64 + lowMe / 64 * (WG + 8) + (lowMe & 63)]; }
+      for (u32 i = 0; i < RADIX; ++i) { u[i].y = lds[i * (WG / 64) * 8 + (lowMe / 64) * 8 + ((lowMe / 8) & 7) * (WG + 8) + (lowMe & 7)]; }
       LDStx_end(lds2, numWG);
       return;
     }

From 76863a33a7e2cc8ea696bd4efdaf0eef0d7fd59c Mon Sep 17 00:00:00 2001
From: Mark Rose <markrose@markrose.ca>
Date: Sun, 20 Sep 2026 18:58:28 -0600
Subject: [PATCH 208/214] -use TAIL_KERNELS governs tailMul as well now

Since ae8aa0c added the double-wide and split-kernel variants to tailMul,
TAIL_KERNELS selects the shape of both tail kernels, not just tailSquare.
The help text still described it as tailSquare only.

The TAIL_TRIGS line just below is left as it is: it says tailSquare, and
for FP64 and FP32 that remains exactly right, because tailMul has no
TAIL_TRIGS branches -- it always computes the trig values from scratch.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
---
 src/Args.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/Args.cpp b/src/Args.cpp
index cec0ef76..bb6bbe54 100644
--- a/src/Args.cpp
+++ b/src/Args.cpp
@@ -174,7 +174,7 @@ named "config.txt" in the prpll run directory.
                      may not work on Nvidia GPUs or on RDNA AMD GPUs where it produces errors
                      (which are nevertheless detected).
   -use NO_ASM      : do not use __asm() blocks (inline assembly)
-  -use TAIL_KERNELS=<val> : change how tailSquare operates according to <val>:
+  -use TAIL_KERNELS=<val> : change how tailSquare and tailMul operate according to <val>:
                      0 = single wide, single kernel
                      1 = single wide, two kernels
                      2 = double wide, single kernel

From 784e712e80c21605b82218d580b100634672c472 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 01:57:25 +0000
Subject: [PATCH 209/214] Make restrict on the trig/weight table pointers
 optional: -use ENABLE_RESTRICT=1

Commit 65d5f08 marked the Trig* and BigTab* typedefs restrict. On nVidia that turns
the table loads into ld.global.nc and lets the compiler batch them early, which raised
the register need (FP64 carryFused 72 -> 96, tailSquare 80 -> 118). The default
carryFused register cap (80) then spilled to local memory, about 12% slower on a TITAN V.

Restrict is now off by default and enabled with the (undocumented) -use ENABLE_RESTRICT=1.
Measured: default carryFused fits with no spill and matches the Sep 1 build; restrict plus
REGCF64=96 is about 1% faster on a TITAN V; no measurable effect on Radeon VII / MI50 or on
the 1:512:8:512:202 NTT.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp    |  1 +
 src/cl/base.cl | 47 +++++++++++++++++++++++++++++------------------
 2 files changed, 30 insertions(+), 18 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 2a9e5c36..7b6bc2dd 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -295,6 +295,7 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
                               "MODM31",
                               "LOADS","STORES",
                               "NOREG",                  // CUDA - experimental
+                              "ENABLE_RESTRICT",        // Experimental - restrict on the trig and weight table pointers
                               "WMUL",
                               "MULTI_Q",
                               "GRAPHS",
diff --git a/src/cl/base.cl b/src/cl/base.cl
index c2e18547..5fb5ac8c 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -300,34 +300,45 @@ ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2)
 
 #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
 
+// ENABLE_RESTRICT=1 marks the trig and weight table pointers below as restrict.  That lets the compiler hoist their loads (on nVidia they become ld.global.nc),
+// which is sometimes faster but can cost many more registers.  Off by default.
+#ifndef ENABLE_RESTRICT
+#define ENABLE_RESTRICT 0
+#endif
+#if ENABLE_RESTRICT
+#define TABLE_RESTRICT restrict
+#else
+#define TABLE_RESTRICT
+#endif
+
 // For reasons unknown, loading trig values into nVidia's constant cache has terrible performance
 #if AMDGPU
-typedef constant const T2* restrict Trig;
-typedef constant const T* restrict TrigSingle;
-typedef constant const F2* restrict TrigFP32;
-typedef constant const F* restrict TrigSingleFP32;
-typedef constant const GF31* restrict TrigGF31;
-typedef constant const GF61* restrict TrigGF61;
+typedef constant const T2* TABLE_RESTRICT Trig;
+typedef constant const T* TABLE_RESTRICT TrigSingle;
+typedef constant const F2* TABLE_RESTRICT TrigFP32;
+typedef constant const F* TABLE_RESTRICT TrigSingleFP32;
+typedef constant const GF31* TABLE_RESTRICT TrigGF31;
+typedef constant const GF61* TABLE_RESTRICT TrigGF61;
 #else
-typedef global const T2* restrict Trig;
-typedef global const T* restrict TrigSingle;
-typedef global const F2* restrict TrigFP32;
-typedef global const F* restrict TrigSingleFP32;
-typedef global const GF31* restrict TrigGF31;
-typedef global const GF61* restrict TrigGF61;
+typedef global const T2* TABLE_RESTRICT Trig;
+typedef global const T* TABLE_RESTRICT TrigSingle;
+typedef global const F2* TABLE_RESTRICT TrigFP32;
+typedef global const F* TABLE_RESTRICT TrigSingleFP32;
+typedef global const GF31* TABLE_RESTRICT TrigGF31;
+typedef global const GF61* TABLE_RESTRICT TrigGF61;
 #endif
 // However, caching weights in nVidia's constant cache improves performance.
 // Even better is to not pollute the constant cache with weights that are used only once.
 // This requires two typedefs depending on how we want to use the BigTab pointer.
 // For AMD we can declare BigTab as constant or global - it doesn't really matter.
-typedef constant const double2* restrict ConstBigTab;
-typedef constant const float2* restrict ConstBigTabFP32;
+typedef constant const double2* TABLE_RESTRICT ConstBigTab;
+typedef constant const float2* TABLE_RESTRICT ConstBigTabFP32;
 #if AMDGPU
-typedef constant const double2* restrict BigTab;
-typedef constant const float2* restrict BigTabFP32;
+typedef constant const double2* TABLE_RESTRICT BigTab;
+typedef constant const float2* TABLE_RESTRICT BigTabFP32;
 #else
-typedef global const double2* restrict BigTab;
-typedef global const float2* restrict BigTabFP32;
+typedef global const double2* TABLE_RESTRICT BigTab;
+typedef global const float2* TABLE_RESTRICT BigTabFP32;
 #endif
 
 //

From 928e0b60b24875011108d8c6f0ffa3f04f6f308f Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 02:02:24 +0000
Subject: [PATCH 210/214] Don't list ENABLE_RESTRICT among the supported -use
 keys

The known-keys list in Gpu.cpp is the set of officially supported -use settings, i.e. the
ones users are encouraged to try. ENABLE_RESTRICT is dangerous without intimate knowledge
of its register implications, so like REGCF64 it stays an undocumented setting. It still
works; it just draws the "unrecognized -use key" warning.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 7b6bc2dd..2a9e5c36 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -295,7 +295,6 @@ string clDefines(Args& args, cl_device_id id, FFTConfig fft, const vector<KeyVal
                               "MODM31",
                               "LOADS","STORES",
                               "NOREG",                  // CUDA - experimental
-                              "ENABLE_RESTRICT",        // Experimental - restrict on the trig and weight table pointers
                               "WMUL",
                               "MULTI_Q",
                               "GRAPHS",

From 95119d2ea24a60a386488ebef69cf3a688100024 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 17:23:24 +0000
Subject: [PATCH 211/214] AMD: optional per-kernel waves-per-SIMD cap; default
 2 for the in-place middle kernels on Vega

The in-place fftMiddleIn / fftMiddleOut kernels compile to 133 / 134 VGPRs on gfx906.  Above 128 VGPRs a SIMD holds
only one wave, and with 256-thread workgroups that leaves one workgroup per CU, so every barrier of the 16x16 LDS
transpose stalls the CU.  This, not the memory layout, is why INPLACE=1 was slower on AMD.

Add an AMD analog of the CUDA register cap: Gpu::amdWavesPerEu() passes -DAMD_WAVES_PER_EU=n to a kernel and the new
KERNEL_CAP macro turns it into amdgpu_waves_per_eu(n).  It is applied to the fftMiddleIn/Out, tailSquare/Mul and
carryFused kernels.  The default is 2 waves per SIMD for the middle kernels when the transform is in place on Vega class
GPUs (gfx900/902/904/906/909/90c); everything else is unchanged.  Overrides (undocumented, like REGCF64):
-use WPE_MIDIN=n, WPE_MIDOUT=n, WPE_TAIL=n, WPE_CARRY=n, where 0 means the compiler default.

Measured at 512:16:512:202, workers=1, INPLACE=1: Radeon VII 1232 -> 1080 us/iter, MI50 1020 -> 924 us/iter (out of place:
994 and 906, unchanged).  The cap costs 2 spilled VGPRs in fftMiddleIn.  Capping to 3 or more waves, or capping tailSquare
or carryFused, was slower, so those are not defaulted.  CUDA PTX is identical for all kernels.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp            | 30 ++++++++++++++++++++++++++++--
 src/Gpu.h              |  1 +
 src/cl/base.cl         |  8 ++++++++
 src/cl/carryfused.cl   | 18 +++++++++---------
 src/cl/fftmiddlein.cl  | 16 ++++++++--------
 src/cl/fftmiddleout.cl | 16 ++++++++--------
 src/cl/tailmul.cl      | 24 ++++++++++++------------
 src/cl/tailsquare.cl   | 24 ++++++++++++------------
 8 files changed, 86 insertions(+), 51 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 2a9e5c36..c7d724b4 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -643,7 +643,7 @@ Gpu::~Gpu() {
 
 // Part of GPU initialization is to compute the default number of registers each kernel should target during compilation.
 // Kernel register usage is critical for maximizing GPU occupancy.  The default values can be overrriden with command line arguments.
-// This feature currently only works for the CUDA compiler.
+// This feature currently only works for the CUDA compiler.  AMD GPUs have a similar (waves-per-SIMD) control, see amdWavesPerEu below.
 // Most kernels have occupancy limited by register usage.  For reference, the following guidelines dictate where an "uptick" in occupancy occurs.
 // If kernel threads=256, register crossovers are at 128, 80, 64, 48, 40
 // If kernel threads=128, register crossovers are at 128, 96, 80, 72, 64, 56, 48, 40
@@ -793,10 +793,36 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
   // Format an explicit register count setting
   return string("--maxrregcount=") + to_string(regs) + " ";
 #else
-  return string("");
+  return amdWavesPerEu(which_kernel);
 #endif
 }
 
+// AMD analog of the CUDA register cap: an optional minimum number of waves per SIMD for a kernel, which caps its VGPR usage.
+// On gfx9 (256 VGPRs per lane, allocated in units of 4) the occupancy crossovers are: 128 VGPRs for 2 waves, 84 for 3, 64 for 4, 48 for 5.
+// A kernel a few VGPRs above the 128 boundary runs with one wave per SIMD; capping it costs a few spills but doubles occupancy.
+// Only that one-wave cliff is worth a default: on a Radeon VII / MI50 the in-place fftMiddleIn / fftMiddleOut kernels use 133 VGPRs, and requiring
+// 2 waves per SIMD recovers most of their slowdown.  Capping to reach 3 or more waves, or capping tailSquare / carryFused, was measured slower.
+// The defaults can be overridden with -use WPE_MIDIN=n, WPE_MIDOUT=n, WPE_TAIL=n, WPE_CARRY=n (0 = compiler default).
+string Gpu::amdWavesPerEu([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
+  cl_device_id const id = shared.context->deviceId();
+  if (!isAmdGpu(id)) return string("");
+  const char *use_override = "";
+  bool is_middle = false;
+  switch (which_kernel) {
+  case CARRYFUSED:                                     use_override = "WPE_CARRY"; break;
+  case MIDIN:  case MIDIN31:  case MIDIN61:            use_override = "WPE_MIDIN";  is_middle = true; break;
+  case MIDOUT: case MIDOUT31: case MIDOUT61:           use_override = "WPE_MIDOUT"; is_middle = true; break;
+  case TAIL:   case TAIL31:   case TAIL61:             use_override = "WPE_TAIL"; break;
+  }
+  // Default: in-place middle kernels on Vega class GPUs (gfx900/902/904/906/909/90c: 256 VGPRs per lane, 64 KB LDS).  Other architectures are untested.
+  string const name = getDeviceName(id);
+  bool const vega = name.rfind("gfx90", 0) == 0 && name.size() > 5 && string("02469c").find(name[5]) != string::npos;
+  int waves = (in_place && is_middle && vega) ? 2 : 0;
+  int const override_waves = args.value(use_override, -1);   // -1 = not specified
+  if (override_waves >= 0) waves = override_waves;
+  return waves > 0 ? string("-DAMD_WAVES_PER_EU=") + to_string(waves) + " " : string("");
+}
+
 // Kernels are compiled one at a time, but OpenCL source files contain multiple kernels.  This routine set the #defines necessary so that only one kernel is compiled.
 // While not strictly necessary, startup speed will be a bit faster if we do less compilations.
 string Gpu::kernelDefines(enum WHICH_KERNEL_TYPE which_kernel) {
diff --git a/src/Gpu.h b/src/Gpu.h
index 15a44c85..c7f24dfd 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -359,6 +359,7 @@ class Gpu {
   void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
   enum WHICH_KERNEL {CARRYFUSED=0, MIDIN=1, MIDIN31=2, MIDIN61=3, TAIL=4, TAIL31=5, TAIL61=6, MIDOUT=7, MIDOUT31=8, MIDOUT61=9};
   string numCudaRegisters(enum WHICH_KERNEL which_kernel);
+  string amdWavesPerEu(enum WHICH_KERNEL which_kernel);
   enum WHICH_KERNEL_TYPE {KFP=0, K31=1, K61=2, KALL=3};
   string kernelDefines(enum WHICH_KERNEL_TYPE which_kernel);
 };
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 5fb5ac8c..105303cd 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -300,6 +300,14 @@ ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2)
 
 #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
 
+// AMD only: Gpu.cpp can pass -DAMD_WAVES_PER_EU=n to ask for at least n waves per SIMD, which caps the kernel's VGPR usage.
+// This avoids the one-wave-per-SIMD occupancy cliff (more than 128 VGPRs on gfx9).  See Gpu::amdWavesPerEu.
+#if AMDGPU && defined(AMD_WAVES_PER_EU)
+#define KERNEL_CAP(x) kernel __attribute__((reqd_work_group_size(x, 1, 1), amdgpu_waves_per_eu(AMD_WAVES_PER_EU))) void
+#else
+#define KERNEL_CAP(x) KERNEL(x)
+#endif
+
 // ENABLE_RESTRICT=1 marks the trig and weight table pointers below as restrict.  That lets the compiler hoist their loads (on nVidia they become ld.global.nc),
 // which is sometimes faster but can cost many more registers.  Off by default.
 #ifndef ENABLE_RESTRICT
diff --git a/src/cl/carryfused.cl b/src/cl/carryfused.cl
index 8d857586..1f949333 100644
--- a/src/cl/carryfused.cl
+++ b/src/cl/carryfused.cl
@@ -122,7 +122,7 @@ void OVERLOAD shufl_carries_up(local void *lds2, i32 *carry, u32 me, u32 lowMe)
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
   local T2 lds[LDS_BYTES(WMUL) / sizeof(T2)];
   LDSinit(lds, WMUL);
@@ -348,7 +348,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigFP32 smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
   local F2 lds[LDS_BYTES(WMUL) / sizeof(F2)];
   LDSinit(lds, WMUL);
@@ -577,7 +577,7 @@ KERNEL(G_W * WMUL) carryFused(P(F2) out, CP(F2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
+KERNEL_CAP(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF31 smallTrig, P(uint) bufROE) {
   local GF31 lds[LDS_BYTES(WMUL) / sizeof(GF31)];
   LDSinit(lds, WMUL);
 
@@ -813,7 +813,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF31) out, CP(GF31) in, u32 posROE, P(i64) carry
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
+KERNEL_CAP(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, TrigGF61 smallTrig, P(uint) bufROE) {
   local GF61 lds[LDS_BYTES(WMUL) / sizeof(GF61)];
   LDSinit(lds, WMUL);
 
@@ -1055,7 +1055,7 @@ KERNEL(G_W * WMUL) carryFused(P(GF61) out, CP(GF61) in, u32 posROE, P(i64) carry
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTab CONST_THREAD_WEIGHTS, BigTab THREAD_WEIGHTS, P(uint) bufROE) {
   local T2 lds[LDS_BYTES(WMUL) / sizeof(T2)];
   local GF31 *lds31 = (local GF31 *) lds;
@@ -1324,7 +1324,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
   local F2 ldsF2[LDS_BYTES(WMUL) / sizeof(F2)];
   local GF31 *lds31 = (local GF31 *) ldsF2;
@@ -1602,7 +1602,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
   local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
@@ -1882,7 +1882,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig, P(uint) bufROE) {
   local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local GF31 *lds31 = (local GF31 *) lds61;
   LDSinit(lds61, WMUL);
@@ -2158,7 +2158,7 @@ KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShut
 
 // The "carryFused" is equivalent to the sequence: fftW, carryA, carryB, fftPremul.
 // It uses "stairway forwarding" (forwarding carry data from one workgroup to the next)
-KERNEL(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
+KERNEL_CAP(G_W * WMUL) carryFused(P(T2) out, CP(T2) in, u32 posROE, P(i64) carryShuttle, P(u32) ready, Trig smallTrig,
                               ConstBigTabFP32 CONST_THREAD_WEIGHTS, BigTabFP32 THREAD_WEIGHTS, P(uint) bufROE) {
   local GF61 lds61[LDS_BYTES(WMUL) / sizeof(GF61)];
   local F2 *ldsF2 = (local F2 *) lds61;
diff --git a/src/cl/fftmiddlein.cl b/src/cl/fftmiddlein.cl
index 5c416917..aa5d28fe 100644
--- a/src/cl/fftmiddlein.cl
+++ b/src/cl/fftmiddlein.cl
@@ -10,7 +10,7 @@
 
 #if FFT_FP64
 
-KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   T2 u[MIDDLE];
 
   u32 SIZEY = IN_WG / IN_SIZEX;
@@ -67,7 +67,7 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   F2 u[MIDDLE];
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -128,7 +128,7 @@ KERNEL(IN_WG) fftMiddleIn(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF31 u[MIDDLE];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -189,7 +189,7 @@ KERNEL(IN_WG) fftMiddleInGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(IN_WG) fftMiddleInGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF61 u[MIDDLE];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -298,7 +298,7 @@ void map_striping_group_id(u32 base_lo, u32 g, u32 *startx, u32 *starty) {
 
 #if FFT_FP64
 
-KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   T2 u[MIDDLE];
 
@@ -353,7 +353,7 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   F2 u[MIDDLE];
 
@@ -412,7 +412,7 @@ KERNEL(256) fftMiddleIn(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleInGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF31 u[MIDDLE];
 
@@ -471,7 +471,7 @@ KERNEL(256) fftMiddleInGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(256) fftMiddleInGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleInGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF61 u[MIDDLE];
 
diff --git a/src/cl/fftmiddleout.cl b/src/cl/fftmiddleout.cl
index 234dadd5..78b589a3 100644
--- a/src/cl/fftmiddleout.cl
+++ b/src/cl/fftmiddleout.cl
@@ -10,7 +10,7 @@
 
 #if FFT_FP64
 
-KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   T2 u[MIDDLE];
 
   u32 SIZEY = OUT_WG / OUT_SIZEX;
@@ -75,7 +75,7 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   F2 u[MIDDLE];
 
   CP(F2) inF2 = (CP(F2)) in;
@@ -141,7 +141,7 @@ KERNEL(OUT_WG) fftMiddleOut(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF31 u[MIDDLE];
 
   CP(GF31) in31 = (CP(GF31)) (in + DISTGF31);
@@ -204,7 +204,7 @@ KERNEL(OUT_WG) fftMiddleOutGF31(P(T2) out, CP(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(OUT_WG) fftMiddleOutGF61(P(T2) out, CP(T2) in, u32 base, Trig trig) {
   GF61 u[MIDDLE];
 
   CP(GF61) in61 = (CP(GF61)) (in + DISTGF61);
@@ -305,7 +305,7 @@ void map_striping_group_id(u32 base_lo, u32 g, u32 *startx, u32 *starty) {
 
 #if FFT_FP64
 
-KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   T2 u[MIDDLE];
 
@@ -361,7 +361,7 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if FFT_FP32
 
-KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   F2 u[MIDDLE];
 
@@ -418,7 +418,7 @@ KERNEL(256) fftMiddleOut(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF31
 
-KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleOutGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF31 u[MIDDLE];
 
@@ -472,7 +472,7 @@ KERNEL(256) fftMiddleOutGF31(P(T2) out, P(T2) in, u32 base, Trig trig) {
 
 #if NTT_GF61
 
-KERNEL(256) fftMiddleOutGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
+KERNEL_CAP(256) fftMiddleOutGF61(P(T2) out, P(T2) in, u32 base, Trig trig) {
   assert(out == in);
   GF61 u[MIDDLE];
 
diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 761c9046..035f80b8 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -88,7 +88,7 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 #if !SINGLE_KERNEL
 // The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -139,7 +139,7 @@ KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -237,7 +237,7 @@ void OVERLOAD pairMul2_special(T2 *u, T2 *p, T2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES(2) / sizeof(T2)];
   LDSinit(lds, 2);
 
@@ -357,7 +357,7 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 #if !SINGLE_KERNEL
 // The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -405,7 +405,7 @@ KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -500,7 +500,7 @@ void OVERLOAD pairMul2_special(F2 *u, F2 *p, F2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailMul(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES(2) / sizeof(F2)];
   LDSinit(lds, 2);
 
@@ -616,7 +616,7 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 #if !SINGLE_KERNEL
 // The kernel tailMulZeroGF31 handles the special cases in tailMulGF31, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -681,7 +681,7 @@ KERNEL(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -784,7 +784,7 @@ void OVERLOAD pairMul2_special(GF31 *u, GF31 *p, GF31 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailMulGF31(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(2) / sizeof(GF31)];
   LDSinit(lds, 2);
 
@@ -911,7 +911,7 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 #if !SINGLE_KERNEL
 // The kernel tailMulZeroGF61 handles the special cases in tailMulGF61, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
 
@@ -976,7 +976,7 @@ KERNEL(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
 
@@ -1079,7 +1079,7 @@ void OVERLOAD pairMul2_special(GF61 *u, GF61 *p, GF61 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailMulGF61(P(T2) out, CP(T2) in, CP(T2) a, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(2) / sizeof(GF61)];
   LDSinit(lds, 2);
 
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index 4f1e396d..f9c73ce7 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -92,7 +92,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -133,7 +133,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -242,7 +242,7 @@ void OVERLOAD pairSq2_special(T2 *u, T2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local T2 lds[LDS_BYTES(2) / sizeof(T2)];
   LDSinit(lds, 2);
 
@@ -375,7 +375,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -412,7 +412,7 @@ KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -517,7 +517,7 @@ void OVERLOAD pairSq2_special(F2 *u, F2 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailSquare(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local F2 lds[LDS_BYTES(2) / sizeof(F2)];
   LDSinit(lds, 2);
 
@@ -650,7 +650,7 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -705,7 +705,7 @@ KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -805,7 +805,7 @@ void OVERLOAD pairSq2_special(GF31 *u, GF31 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailSquareGF31(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(2) / sizeof(GF31)];
   LDSinit(lds, 2);
 
@@ -992,7 +992,7 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
 
@@ -1047,7 +1047,7 @@ KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
 
 #if SINGLE_WIDE
 
-KERNEL(G_H) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
 
@@ -1147,7 +1147,7 @@ void OVERLOAD pairSq2_special(GF61 *u, GF61 base_squared) {
   }
 }
 
-KERNEL(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
+KERNEL_CAP(G_H * 2) tailSquareGF61(P(T2) out, CP(T2) in, u32 base, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(2) / sizeof(GF61)];
   LDSinit(lds, 2);
 

From 3121d9854849636d8899bf4c2c4762e400a76d3d Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 18:07:26 +0000
Subject: [PATCH 212/214] AMD register cap: use the existing
 REGMI64/REGMO64/REGTS64/REGCF64 (etc.) options instead of new WPE_* keys

numCudaRegisters() already selects the per-kernel, per-FFT-type option key (REGMI64, REGMO31, REGTS61, REGCF64, ...).  Let that selection
run on every backend and hand the option value to the new Gpu::amdRegisterOption(), which follows the CUDA conventions:
    0 = not specified (default),  -1 = compiler default (no cap),
    1..10 = minimum waves per SIMD (the AMD counterpart of CUDA launch bounds; 10 is the GCN maximum),
    more than 10 = explicit VGPR count (amdgpu_num_vgpr; rocm generates its usual code and then spills to fit).
The default is unchanged: 2 waves per SIMD for the in-place middle kernels on Vega class GPUs.  The WPE_* keys are gone.
KERNEL_CAP now understands both -DAMD_WAVES_PER_EU=n and -DAMD_NUM_VGPR=n.  The CUDA path is unchanged (identical -v register reports).

Radeon VII, INPLACE=1: default 1079 us/iter (128/127 VGPRs), REGMI64=-1,REGMO64=-1 1231 (133/134), REGMI64=3,REGMO64=3 1076 (84/84),
REGMI64=128,REGMO64=128 1080 (128/127).  MI50 default 922.  All residues match.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp    | 47 ++++++++++++++++++++++-------------------------
 src/Gpu.h      |  2 +-
 src/cl/base.cl |  8 +++++---
 3 files changed, 28 insertions(+), 29 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index c7d724b4..778b01fc 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -643,14 +643,13 @@ Gpu::~Gpu() {
 
 // Part of GPU initialization is to compute the default number of registers each kernel should target during compilation.
 // Kernel register usage is critical for maximizing GPU occupancy.  The default values can be overrriden with command line arguments.
-// This feature currently only works for the CUDA compiler.  AMD GPUs have a similar (waves-per-SIMD) control, see amdWavesPerEu below.
+// On CUDA this sets --maxrregcount (or launch bounds).  On AMD the same REGxxxx options select waves per SIMD or a VGPR count, see amdRegisterOption below.
 // Most kernels have occupancy limited by register usage.  For reference, the following guidelines dictate where an "uptick" in occupancy occurs.
 // If kernel threads=256, register crossovers are at 128, 80, 64, 48, 40
 // If kernel threads=128, register crossovers are at 128, 96, 80, 72, 64, 56, 48, 40
 // If kernel threads=64,  register crossovers are at 128, 112, 96, 88, 80, 72, 64, 56, 48, 40
-string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
-#if CUDA_BACKEND
-  int regs = 0;
+string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
+  [[maybe_unused]] int regs = 0;         // Default CUDA maximum register count (the AMD path only uses the override value)
   const char *use_override = "";
   // Allow command line to prefer the CUDA compiler's default number of registers
   if (args.value("NOREG", 0)) return string("");
@@ -784,6 +783,7 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
   }
   // Get the optional override register count
   int const override_regs = args.value(use_override, 0);
+#if CUDA_BACKEND
   // If a specified override is small, use the count as a CUDA launch_bounds rather than a maximum register count
   if (override_regs && (override_regs > 0 && override_regs <= 16)) return string("-DCUDA_MIN_BLOCKS=") + to_string(override_regs) + " ";
   // If specified, override the default maximum register count
@@ -793,34 +793,31 @@ string Gpu::numCudaRegisters([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
   // Format an explicit register count setting
   return string("--maxrregcount=") + to_string(regs) + " ";
 #else
-  return amdWavesPerEu(which_kernel);
+  return amdRegisterOption(which_kernel, override_regs);
 #endif
 }
 
-// AMD analog of the CUDA register cap: an optional minimum number of waves per SIMD for a kernel, which caps its VGPR usage.
-// On gfx9 (256 VGPRs per lane, allocated in units of 4) the occupancy crossovers are: 128 VGPRs for 2 waves, 84 for 3, 64 for 4, 48 for 5.
-// A kernel a few VGPRs above the 128 boundary runs with one wave per SIMD; capping it costs a few spills but doubles occupancy.
-// Only that one-wave cliff is worth a default: on a Radeon VII / MI50 the in-place fftMiddleIn / fftMiddleOut kernels use 133 VGPRs, and requiring
-// 2 waves per SIMD recovers most of their slowdown.  Capping to reach 3 or more waves, or capping tailSquare / carryFused, was measured slower.
-// The defaults can be overridden with -use WPE_MIDIN=n, WPE_MIDOUT=n, WPE_TAIL=n, WPE_CARRY=n (0 = compiler default).
-string Gpu::amdWavesPerEu([[maybe_unused]] enum WHICH_KERNEL which_kernel) {
+// AMD analog of the CUDA register cap, driven by the same REGxxxx options.  override_regs is the value of the kernel's option:
+//    0 = not specified (use the default below),  -1 = compiler default (no cap),
+//    1..10 = minimum waves per SIMD (like CUDA's launch bounds; 10 is the GCN maximum), more than 10 = explicit VGPR count.
+// A minimum-waves request caps VGPR usage.  On gfx9 (256 VGPRs per lane, allocated in units of 4) the occupancy crossovers are:
+// 128 VGPRs for 2 waves, 84 for 3, 64 for 4, 48 for 5.  A kernel a few VGPRs above the 128 boundary runs with one wave per SIMD;
+// capping it costs a few spills but doubles occupancy.  Only that one-wave cliff is worth a default: on a Radeon VII / MI50 the in-place
+// fftMiddleIn / fftMiddleOut kernels use 133 VGPRs, and requiring 2 waves per SIMD recovers most of their slowdown.  Capping to reach 3 or more
+// waves, or capping tailSquare / carryFused, was measured slower.  An explicit VGPR count makes rocm generate its usual code and then spill to fit.
+string Gpu::amdRegisterOption([[maybe_unused]] enum WHICH_KERNEL which_kernel, int override_regs) {
   cl_device_id const id = shared.context->deviceId();
   if (!isAmdGpu(id)) return string("");
-  const char *use_override = "";
-  bool is_middle = false;
-  switch (which_kernel) {
-  case CARRYFUSED:                                     use_override = "WPE_CARRY"; break;
-  case MIDIN:  case MIDIN31:  case MIDIN61:            use_override = "WPE_MIDIN";  is_middle = true; break;
-  case MIDOUT: case MIDOUT31: case MIDOUT61:           use_override = "WPE_MIDOUT"; is_middle = true; break;
-  case TAIL:   case TAIL31:   case TAIL61:             use_override = "WPE_TAIL"; break;
-  }
-  // Default: in-place middle kernels on Vega class GPUs (gfx900/902/904/906/909/90c: 256 VGPRs per lane, 64 KB LDS).  Other architectures are untested.
+  if (override_regs < 0) return string("");
+  if (override_regs > 10) return string("-DAMD_NUM_VGPR=") + to_string(override_regs) + " ";
+  if (override_regs > 0) return string("-DAMD_WAVES_PER_EU=") + to_string(override_regs) + " ";
+  // Default: 2 waves per SIMD for the in-place middle kernels on Vega class GPUs (gfx900/902/904/906/909/90c: 256 VGPRs per lane).
+  // Other architectures are untested.
+  bool const is_middle = which_kernel == MIDIN || which_kernel == MIDIN31 || which_kernel == MIDIN61 ||
+                         which_kernel == MIDOUT || which_kernel == MIDOUT31 || which_kernel == MIDOUT61;
   string const name = getDeviceName(id);
   bool const vega = name.rfind("gfx90", 0) == 0 && name.size() > 5 && string("02469c").find(name[5]) != string::npos;
-  int waves = (in_place && is_middle && vega) ? 2 : 0;
-  int const override_waves = args.value(use_override, -1);   // -1 = not specified
-  if (override_waves >= 0) waves = override_waves;
-  return waves > 0 ? string("-DAMD_WAVES_PER_EU=") + to_string(waves) + " " : string("");
+  return (in_place && is_middle && vega) ? string("-DAMD_WAVES_PER_EU=2 ") : string("");
 }
 
 // Kernels are compiled one at a time, but OpenCL source files contain multiple kernels.  This routine set the #defines necessary so that only one kernel is compiled.
diff --git a/src/Gpu.h b/src/Gpu.h
index c7f24dfd..06ae27d3 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -359,7 +359,7 @@ class Gpu {
   void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
   enum WHICH_KERNEL {CARRYFUSED=0, MIDIN=1, MIDIN31=2, MIDIN61=3, TAIL=4, TAIL31=5, TAIL61=6, MIDOUT=7, MIDOUT31=8, MIDOUT61=9};
   string numCudaRegisters(enum WHICH_KERNEL which_kernel);
-  string amdWavesPerEu(enum WHICH_KERNEL which_kernel);
+  string amdRegisterOption(enum WHICH_KERNEL which_kernel, int override_regs);
   enum WHICH_KERNEL_TYPE {KFP=0, K31=1, K61=2, KALL=3};
   string kernelDefines(enum WHICH_KERNEL_TYPE which_kernel);
 };
diff --git a/src/cl/base.cl b/src/cl/base.cl
index 105303cd..02ffceeb 100644
--- a/src/cl/base.cl
+++ b/src/cl/base.cl
@@ -300,9 +300,11 @@ ulong2 OVERLOAD U2(unsigned long long a, unsigned long long b) { return (ulong2)
 
 #define KERNEL(x) kernel __attribute__((reqd_work_group_size(x, 1, 1))) void
 
-// AMD only: Gpu.cpp can pass -DAMD_WAVES_PER_EU=n to ask for at least n waves per SIMD, which caps the kernel's VGPR usage.
-// This avoids the one-wave-per-SIMD occupancy cliff (more than 128 VGPRs on gfx9).  See Gpu::amdWavesPerEu.
-#if AMDGPU && defined(AMD_WAVES_PER_EU)
+// AMD only: Gpu.cpp can pass -DAMD_WAVES_PER_EU=n (ask for at least n waves per SIMD) or -DAMD_NUM_VGPR=n (explicit VGPR count), either of which caps
+// the kernel's VGPR usage.  Used to avoid the one-wave-per-SIMD occupancy cliff (more than 128 VGPRs on gfx9).  See Gpu::amdRegisterOption.
+#if AMDGPU && defined(AMD_NUM_VGPR)
+#define KERNEL_CAP(x) kernel __attribute__((reqd_work_group_size(x, 1, 1), amdgpu_num_vgpr(AMD_NUM_VGPR))) void
+#elif AMDGPU && defined(AMD_WAVES_PER_EU)
 #define KERNEL_CAP(x) kernel __attribute__((reqd_work_group_size(x, 1, 1), amdgpu_waves_per_eu(AMD_WAVES_PER_EU))) void
 #else
 #define KERNEL_CAP(x) KERNEL(x)

From ef3014a04b13f6c793f0a5159e77006376753571 Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 18:52:51 +0000
Subject: [PATCH 213/214] Rename numCudaRegisters to numRegisters (it now also
 serves AMD)

The function selects the per-kernel REGxxxx option for every backend: CUDA turns the value into --maxrregcount / launch bounds, AMD (amdRegisterOption)
into a waves-per-SIMD request or a VGPR count.  Rename it and update the comments accordingly.

The per-kernel switch has to stay compiled on non-CUDA backends: besides the CUDA default register counts it selects which REGxxxx option key applies to
the kernel.  Guarding it with #if CUDA_BACKEND left the key empty on AMD and silently disabled all the REG* overrides there (REGMI64=-1,REGMO64=-1 still
compiled the in-place middle kernels at 128/127 VGPRs instead of 133/134).  Only the CUDA formatting tail is guarded.

Verified: AMD default 128/127, REGMI64=-1 133/134, =3 84/84, =128 128/127; CUDA -v register reports identical to the previous build.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/Gpu.cpp | 36 +++++++++++++++++++-----------------
 src/Gpu.h   |  2 +-
 2 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/src/Gpu.cpp b/src/Gpu.cpp
index 778b01fc..62e01dbf 100644
--- a/src/Gpu.cpp
+++ b/src/Gpu.cpp
@@ -648,12 +648,14 @@ Gpu::~Gpu() {
 // If kernel threads=256, register crossovers are at 128, 80, 64, 48, 40
 // If kernel threads=128, register crossovers are at 128, 96, 80, 72, 64, 56, 48, 40
 // If kernel threads=64,  register crossovers are at 128, 112, 96, 88, 80, 72, 64, 56, 48, 40
-string Gpu::numCudaRegisters(enum WHICH_KERNEL which_kernel) {
+string Gpu::numRegisters(enum WHICH_KERNEL which_kernel) {
   [[maybe_unused]] int regs = 0;         // Default CUDA maximum register count (the AMD path only uses the override value)
   const char *use_override = "";
-  // Allow command line to prefer the CUDA compiler's default number of registers
+  // Allow command line to prefer the compiler's default number of registers
   if (args.value("NOREG", 0)) return string("");
-  // Determine a kernel specific default maximum number of GPU registers (values set to -1 have not been tuned for best default value)
+  // Determine a CUDA kernel specific default maximum number of GPU registers (values set to -1 have not been tuned for best default value).
+  // This switch also selects which REGxxxx option applies to the kernel, and that selection is needed on AMD too (see amdRegisterOption),
+  // so it must not be compiled out for non-CUDA backends.  The default register counts below are only used by CUDA.
   switch (which_kernel) {
   case CARRYFUSED:         // Register usage depends on NW, the FFT/NTT type, and perhaps the long carry setting
     switch (fft.shape.fft_type) {
@@ -875,14 +877,14 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
 
 #define K(name, ...) name(#name, &compiler, profile.make(#name), &queue, __VA_ARGS__)
 
-  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numCudaRegisters(MIDIN)),
+  K(kfftMidIn,             "fftmiddlein.cl",  "fftMiddleIn",  hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numRegisters(MIDIN)),
   K(kfftHin,               "ffthin.cl",  "fftHin",  hN / nH, kernelDefines(KFP)),
   K(ktailSquareZero,       "tailsquare.cl", "tailSquareZero", SMALL_H / nH * 2, kernelDefines(KFP)),
   K(ktailSquare,           "tailsquare.cl", "tailSquare",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(KFP) + numCudaRegisters(TAIL)),              // Single-wide tailSquare with one kernel
+                                               hN / nH / 2, kernelDefines(KFP) + numRegisters(TAIL)),              // Single-wide tailSquare with one kernel
   K(ktailMulZero,          "tailmul.cl", "tailMulZero", SMALL_H / nH * 2, kernelDefines(KFP)),
   K(ktailMulLowZero,       "tailmul.cl", "tailMulZero", SMALL_H / nH * 2, kernelDefines(KFP) + "-DMUL_LOW=1"),
   K(ktailMul,              "tailmul.cl", "tailMul",
@@ -895,17 +897,17 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
                                                hN / nH / 2, kernelDefines(KFP) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
-  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numCudaRegisters(MIDOUT)),
+  K(kfftMidOut,            "fftmiddleout.cl", "fftMiddleOut", hN / (BIG_H / SMALL_H), kernelDefines(KFP) + numRegisters(MIDOUT)),
   K(kfftW,                 "fftw.cl", "fftW", hN / nW, kernelDefines(KFP)),
 
-  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), kernelDefines(K31) + numCudaRegisters(MIDIN31)),
+  K(kfftMidInGF31,         "fftmiddlein.cl",  "fftMiddleInGF31",  hN / (BIG_H / SMALL_H), kernelDefines(K31) + numRegisters(MIDIN31)),
   K(kfftHinGF31,           "ffthin.cl",  "fftHinGF31",  hN / nH, kernelDefines(K31)),
   K(ktailSquareZeroGF31,   "tailsquare.cl", "tailSquareZeroGF31", SMALL_H / nH * 2, kernelDefines(K31)),
   K(ktailSquareGF31,       "tailsquare.cl", "tailSquareGF31",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(K31) + numCudaRegisters(TAIL31)),            // Single-wide tailSquare with one kernel
+                                               hN / nH / 2, kernelDefines(K31) + numRegisters(TAIL31)),            // Single-wide tailSquare with one kernel
   K(ktailMulZeroGF31,      "tailmul.cl", "tailMulZeroGF31", SMALL_H / nH * 2, kernelDefines(K31)),
   K(ktailMulLowZeroGF31,   "tailmul.cl", "tailMulZeroGF31", SMALL_H / nH * 2, kernelDefines(K31) + "-DMUL_LOW=1"),
   K(ktailMulGF31,          "tailmul.cl", "tailMulGF31",
@@ -918,17 +920,17 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
                                                hN / nH / 2, kernelDefines(K31) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
-  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), kernelDefines(K31) + numCudaRegisters(MIDOUT31)),
+  K(kfftMidOutGF31,        "fftmiddleout.cl", "fftMiddleOutGF31", hN / (BIG_H / SMALL_H), kernelDefines(K31) + numRegisters(MIDOUT31)),
   K(kfftWGF31,             "fftw.cl", "fftWGF31", hN / nW, kernelDefines(K31)),
 
-  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), kernelDefines(K61) + numCudaRegisters(MIDIN61)),
+  K(kfftMidInGF61,         "fftmiddlein.cl",  "fftMiddleInGF61",  hN / (BIG_H / SMALL_H), kernelDefines(K61) + numRegisters(MIDIN61)),
   K(kfftHinGF61,           "ffthin.cl",  "fftHinGF61",  hN / nH, kernelDefines(K61)),
   K(ktailSquareZeroGF61,   "tailsquare.cl", "tailSquareZeroGF61", SMALL_H / nH * 2, kernelDefines(K61)),
   K(ktailSquareGF61,       "tailsquare.cl", "tailSquareGF61",
                                                !tail_single_wide && !tail_single_kernel ? hN / nH - SMALL_H / nH * 2 : // Double-wide tailSquare with two kernels
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailSquare with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailSquare with two kernels
-                                               hN / nH / 2, kernelDefines(K61) + numCudaRegisters(TAIL61)),            // Single-wide tailSquare with one kernel
+                                               hN / nH / 2, kernelDefines(K61) + numRegisters(TAIL61)),            // Single-wide tailSquare with one kernel
   K(ktailMulZeroGF61,      "tailmul.cl", "tailMulZeroGF61", SMALL_H / nH * 2, kernelDefines(K61)),
   K(ktailMulLowZeroGF61,   "tailmul.cl", "tailMulZeroGF61", SMALL_H / nH * 2, kernelDefines(K61) + "-DMUL_LOW=1"),
   K(ktailMulGF61,          "tailmul.cl", "tailMulGF61",
@@ -941,7 +943,7 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
                                                !tail_single_wide ? hN / nH :                                           // Double-wide tailMul with one kernel
                                                !tail_single_kernel ? hN / nH / 2 - SMALL_H / nH :                      // Single-wide tailMul with two kernels
                                                hN / nH / 2, kernelDefines(K61) + "-DMUL_LOW=1"),                       // Single-wide tailMul with one kernel
-  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), kernelDefines(K61) + numCudaRegisters(MIDOUT61)),
+  K(kfftMidOutGF61,        "fftmiddleout.cl", "fftMiddleOutGF61", hN / (BIG_H / SMALL_H), kernelDefines(K61) + numRegisters(MIDOUT61)),
   K(kfftWGF61,             "fftw.cl", "fftWGF61", hN / nW, kernelDefines(K61)),
 
   K(kfftP,                 "fftp.cl", "fftP", hN / nW, kernelDefines(KALL)),
@@ -950,11 +952,11 @@ Gpu::Gpu(GpuCommon s, FFTConfig fft, u64 E, const vector<KeyVal>& extraConf, boo
   K(kCarryM,               "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DMUL3=1"),
   K(kCarryMROE,            "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DMUL3=1 -DROE=1"),
   K(kCarryLL,              "carry.cl", "carry", hN / CARRY_LEN, kernelDefines(KALL) + "-DLL=1"),
-  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED)),
-  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DROE=1"),
-  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1"),
-  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1"),
-  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numCudaRegisters(CARRYFUSED) + "-DLL=1"),
+  K(kCarryFused,           "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numRegisters(CARRYFUSED)),
+  K(kCarryFusedROE,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numRegisters(CARRYFUSED) + "-DROE=1"),
+  K(kCarryFusedMul,        "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numRegisters(CARRYFUSED) + "-DMUL3=1"),
+  K(kCarryFusedMulROE,     "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numRegisters(CARRYFUSED) + "-DMUL3=1 -DROE=1"),
+  K(kCarryFusedLL,         "carryfused.cl", "carryFused", WIDTH * (BIG_H + wmul) / nW, kernelDefines(KALL) + numRegisters(CARRYFUSED) + "-DLL=1"),
 
   K(carryB,                "carryb.cl", "carryB",   hN / CARRY_LEN, kernelDefines(KALL)),
 
diff --git a/src/Gpu.h b/src/Gpu.h
index 06ae27d3..0427d871 100644
--- a/src/Gpu.h
+++ b/src/Gpu.h
@@ -358,7 +358,7 @@ class Gpu {
   u32 getProofPower(u64 k);
   void doBigLog(u64 k, u64 res, bool checkOK, float secsPerIt, u64 nIters, u32 nErrors);
   enum WHICH_KERNEL {CARRYFUSED=0, MIDIN=1, MIDIN31=2, MIDIN61=3, TAIL=4, TAIL31=5, TAIL61=6, MIDOUT=7, MIDOUT31=8, MIDOUT61=9};
-  string numCudaRegisters(enum WHICH_KERNEL which_kernel);
+  string numRegisters(enum WHICH_KERNEL which_kernel);
   string amdRegisterOption(enum WHICH_KERNEL which_kernel, int override_regs);
   enum WHICH_KERNEL_TYPE {KFP=0, K31=1, K61=2, KALL=3};
   string kernelDefines(enum WHICH_KERNEL_TYPE which_kernel);

From 3fb186b78f7c08d303f08c9913602a4e6240634c Mon Sep 17 00:00:00 2001
From: george <woltman@alum.mit.edu>
Date: Mon, 21 Sep 2026 19:08:01 +0000
Subject: [PATCH 214/214] AMD register cap: don't apply it to the
 tailSquareZero / tailMulZero kernels

The tailSquare (and tailMul) .cl file is compiled once per K() instance and its code object holds both the main kernel and the Zero kernel that
handles lines 0 and H/2.  A REGTS64 request therefore also capped the Zero kernel, which naturally needs 126 VGPRs (the main kernel needs 84-90), so a
3-wave request forced 72 spilled VGPRs into a kernel run by two workgroups.  Keep the Zero kernels on plain KERNEL(); the cap applies to the main kernels only.

With the cap confined to the main kernel, -use REGTS64=3 (3 waves per SIMD) is a small win where tailSquare sits just over the 84-VGPR boundary:
MI50 out of place 85 -> 84 VGPRs (5 spilled): 912 -> 891 us/iter (p6) and 998 -> 982 (p4); Radeon VII in place 90 -> 80: 1078 -> 1057.  Not made a default: it
depends on the kernel being within a few VGPRs of the boundary.  CUDA register reports are identical.

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
---
 src/cl/tailmul.cl    | 8 ++++----
 src/cl/tailsquare.cl | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/cl/tailmul.cl b/src/cl/tailmul.cl
index 035f80b8..12826691 100644
--- a/src/cl/tailmul.cl
+++ b/src/cl/tailmul.cl
@@ -88,7 +88,7 @@ void OVERLOAD pairMul(u32 N, T2 *u, T2 *v, T2 *p, T2 *q, T2 base_squared, bool s
 #if !SINGLE_KERNEL
 // The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -357,7 +357,7 @@ void OVERLOAD pairMul(u32 N, F2 *u, F2 *v, F2 *p, F2 *q, F2 base_squared, bool s
 #if !SINGLE_KERNEL
 // The kernel tailMulZero handles the special cases in tailMul, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulZero(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -616,7 +616,7 @@ void OVERLOAD pairMul(u32 N, GF31 *u, GF31 *v, GF31 *p, GF31 *q, GF31 base_squar
 #if !SINGLE_KERNEL
 // The kernel tailMulZeroGF31 handles the special cases in tailMulGF31, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulZeroGF31(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -911,7 +911,7 @@ void OVERLOAD pairMul(u32 N, GF61 *u, GF61 *v, GF61 *p, GF61 *q, GF61 base_squar
 #if !SINGLE_KERNEL
 // The kernel tailMulZeroGF61 handles the special cases in tailMulGF61, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
+KERNEL(G_H) tailMulZeroGF61(P(T2) out, CP(T2) in, CP(T2) a, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);
 
diff --git a/src/cl/tailsquare.cl b/src/cl/tailsquare.cl
index f9c73ce7..09ec76cf 100644
--- a/src/cl/tailsquare.cl
+++ b/src/cl/tailsquare.cl
@@ -92,7 +92,7 @@ void OVERLOAD pairSq(u32 N, T2 *u, T2 *v, T2 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local T2 lds[LDS_BYTES(1) / sizeof(T2)];
   LDSinit(lds, 1);
 
@@ -375,7 +375,7 @@ void OVERLOAD pairSq(u32 N, F2 *u, F2 *v, F2 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareZero(P(T2) out, CP(T2) in, Trig smallTrig) {
   local F2 lds[LDS_BYTES(1) / sizeof(F2)];
   LDSinit(lds, 1);
 
@@ -650,7 +650,7 @@ void OVERLOAD pairSq(u32 N, GF31 *u, GF31 *v, GF31 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareZeroGF31(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF31 lds[LDS_BYTES(1) / sizeof(GF31)];
   LDSinit(lds, 1);
 
@@ -992,7 +992,7 @@ void OVERLOAD pairSq(u32 N, GF61 *u, GF61 *v, GF61 base_squared, bool special) {
 #if !SINGLE_KERNEL
 // The kernel tailSquareZero handles the special cases in tailSquare, i.e. the lines 0 and H/2
 // This kernel is launched with 2 workgroups (handling line 0, resp. H/2)
-KERNEL_CAP(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
+KERNEL(G_H) tailSquareZeroGF61(P(T2) out, CP(T2) in, Trig smallTrig) {
   local GF61 lds[LDS_BYTES(1) / sizeof(GF61)];
   LDSinit(lds, 1);