From f7f05cdcc72fffd4908facd57baa044c76f244e4 Mon Sep 17 00:00:00 2001 From: Vishnu Saini Date: Mon, 7 Sep 2026 14:34:01 +0530 Subject: [PATCH 1/6] FROMLIST: dt-bindings: display: simple: Add boe,dv215fhm-r01 compatible Add BOE DV215FHM-R01 21.5" FHD (1920x1080) dual-channel LVDS panel compatible string to the panel-simple-lvds-dual-ports binding. Link: https://lore.kernel.org/all/20260903-b4-lvds-panel-doc-v4-1-861738a0d5de@oss.qualcomm.com/ Acked-by: Krzysztof Kozlowski Acked-by: Liu Ying Signed-off-by: Vishnu Saini --- .../bindings/display/panel/panel-simple-lvds-dual-ports.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml index 548f5ac14500a..c72f80e530263 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml @@ -42,6 +42,8 @@ properties: - auo,g190ean01 # BOE AV123Z7M-N17 12.3" (1920x720) LVDS TFT LCD panel - boe,av123z7m-n17 + # BOE DV215FHM-R01 21.5" FHD (1920x1080) dual-channel LVDS panel + - boe,dv215fhm-r01 # Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel - koe,tx26d202vm0bwa # Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200 From b81a2bc7a5bf4669f54448e936f5e32110c7ddc8 Mon Sep 17 00:00:00 2001 From: Vishnu Saini Date: Mon, 10 Aug 2026 19:45:44 +0530 Subject: [PATCH 2/6] FROMLIST: drm/panel: simple: Add BOE DV215FHM-R01 panel Add the BOE DV215FHM-R01 21.5" FHD (1920x1080) dual-channel LVDS panel. Link: https://lore.kernel.org/all/20260903-b4-lvds-panel-doc-v4-2-861738a0d5de@oss.qualcomm.com/ Reviewed-by: Neil Armstrong Signed-off-by: Vishnu Saini --- drivers/gpu/drm/panel/panel-simple.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index ef1c4b9299ee4..2b3e41a29cd52 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1538,6 +1538,31 @@ static const struct panel_desc boe_bp101wx1_100 = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct display_timing boe_dv215fhm_r01_timing = { + .pixelclock = { 148500000, 148500000, 148500000 }, + .hactive = { 1920, 1920, 1920 }, + .hfront_porch = { 88, 88, 88 }, + .hback_porch = { 148, 148, 148 }, + .hsync_len = { 44, 44, 44 }, + .vactive = { 1080, 1080, 1080 }, + .vfront_porch = { 4, 4, 4 }, + .vback_porch = { 36, 36, 36 }, + .vsync_len = { 5, 5, 5 }, + .flags = DISPLAY_FLAGS_DE_HIGH, +}; + +static const struct panel_desc boe_dv215fhm_r01 = { + .timings = &boe_dv215fhm_r01_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 476, + .height = 268, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct display_timing boe_ev121wxm_n10_1850_timing = { .pixelclock = { 69922000, 71000000, 72293000 }, .hactive = { 1280, 1280, 1280 }, @@ -5049,6 +5074,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "boe,bp101wx1-100", .data = &boe_bp101wx1_100, + }, { + .compatible = "boe,dv215fhm-r01", + .data = &boe_dv215fhm_r01, }, { .compatible = "boe,ev121wxm-n10-1850", .data = &boe_ev121wxm_n10_1850, From 5737013b90c9e69ad365550269b63c73ab8ed9fc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 7 Apr 2026 22:31:03 +0200 Subject: [PATCH 3/6] BACKPORT: dt-bindings: display: bridge: lt9211: Require data-lanes on DSI input ports The Lontium LT9211 is capable of 1..4 DSI lanes per input DSI port, describe the lane count for each input port in the schema. For example Linux kernel driver does already use that information and fails to probe if it is missing. Signed-off-by: Marek Vasut Reviewed-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260407203109.34302-1-marex@nabladev.com Signed-off-by: Dmitry Baryshkov Signed-off-by: Vishnu Saini --- .../display/bridge/lontium,lt9211.yaml | 43 ++++++++++++++++++- 1 file changed, 41 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml index 98079df61cbb3..4b2d8ad242ccf 100644 --- a/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml @@ -37,18 +37,56 @@ properties: properties: port@0: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Primary MIPI DSI port-1 for MIPI input or LVDS port-1 for LVDS input or DPI input. + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: array of physical DSI data lane indexes. + minItems: 1 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + port@1: - $ref: /schemas/graph.yaml#/properties/port + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Additional MIPI port-2 for MIPI input or LVDS port-2 for LVDS input. Used in combination with primary port-1 to drive higher resolution displays + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + description: array of physical DSI data lane indexes. + minItems: 1 + items: + - const: 1 + - const: 2 + - const: 3 + - const: 4 + + required: + - data-lanes + port@2: $ref: /schemas/graph.yaml#/properties/port description: @@ -100,6 +138,7 @@ examples: reg = <0>; endpoint { + data-lanes = <1 2 3 4>; remote-endpoint = <&dsi0_out>; }; }; From 67ac0ca9281e40920b03500f567b293d2d06fed6 Mon Sep 17 00:00:00 2001 From: Vishnu Saini Date: Tue, 8 Sep 2026 11:52:21 +0530 Subject: [PATCH 4/6] FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2: Add LVDS display overlay The QCS6490 RB3 Gen2 industrial mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge as an alternative to the default HDMI output via the LT9611UXC bridge. Add a DTBO overlay, qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso, that disables HDMI (hdmi-connector and lt9611_codec) and wires up the LT9211C bridge on I2C1 (address 0x29) with reset on GPIO117. The overlay adds a dual-channel panel-lvds node for the boe,dv215fhm-r01 panel, matched against the panel-simple-lvds-dual-ports binding which supplies the panel's size and timing internally. The overlay is built as a composite DTB combining the base qcs6490-rb3gen2.dtb, the industrial mezzanine overlay, and this LVDS overlay. Link: https://lore.kernel.org/all/20260905-lvds-support-v3-3-b40a1b03f63c@oss.qualcomm.com/ Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 5 + ...trial-mezzanine-lvds-boe,dv215fhm-r01.dtso | 106 ++++++++++++++++++ 2 files changed, 111 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 6577a1c826bc5..bf4de8fd62dde 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -204,6 +204,11 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine.dtbo qcs6490-rb3gen2-industrial-mezzanine-el2-dtbs := qcs6490-rb3gen2-industrial-mezzanine.dtb kodiak-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine-el2.dtb +qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01-dtbs := \ + qcs6490-rb3gen2.dtb qcs6490-rb3gen2-industrial-mezzanine.dtbo \ + qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-industrial-mezzanine-bt-uart.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtbo diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 0000000000000..5501ea09f43ba --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "Qualcomm Technologies, Inc. Industrial RB3gen2 LVDS"; + + hdmi-connector { + status = "disabled"; + }; + + panel_lvds: panel-lvds { + compatible = "boe,dv215fhm-r01"; + power-supply = <&lcd_disp_bias>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint = <<9211c_out_odd>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint = <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible = "regulator-fixed"; + regulator-name = "lcd_disp_bias"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + vin-supply = <&vreg_l18b_1p8>; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + lvds_bridge: lvds-bridge@29 { + compatible = "lontium,lt9211c"; + reg = <0x29>; + reset-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>; + vccio-supply = <&vreg_l18b_1p8>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9211c_in: endpoint { + data-lanes = <1 2 3 4>; + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9211c_out_odd: endpoint { + remote-endpoint = <&panel_in_lvds_odd>; + }; + }; + + port@3 { + reg = <3>; + + lt9211c_out_even: endpoint { + remote-endpoint = <&panel_in_lvds_even>; + }; + }; + }; + }; +}; + +<9611_codec { + status = "disabled"; +}; + +&mdss_dsi0_out { + remote-endpoint = <<9211c_in>; +}; + From 2f5e8ef615f49b2334150391c982c045f71cc24d Mon Sep 17 00:00:00 2001 From: Vishnu Saini Date: Tue, 8 Sep 2026 11:54:46 +0530 Subject: [PATCH 5/6] FROMLIST: arm64: dts: qcom: monaco-evk: Add LVDS display overlay The Monaco-EVK mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge. The bridge is connected to the DSI0 output and drives a dual-channel 1920x1080 LVDS panel in VESA-24 mapping. Add a DTBO overlay, monaco-evk-lvds-boe,dv215fhm-r01.dtso, that wires up the LT9211C bridge on I2C8 (address 0x2d) with reset on GPIO66, a panel-lvds node for the boe,dv215fhm-r01 panel (matched against the panel-simple-lvds-dual-ports binding, which supplies the panel's size and timing internally), and an LCD display bias regulator supplied through the GPIO expander. DSI power is provided by vreg_l5a. The overlay is built as a composite DTB combining the base monaco-evk.dtb, the IFP mezzanine overlay, and this LVDS overlay. Link: https://lore.kernel.org/all/20260905-lvds-support-v3-2-b40a1b03f63c@oss.qualcomm.com/ Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 3 + .../monaco-evk-lvds-boe,dv215fhm-r01.dtso | 114 ++++++++++++++++++ 2 files changed, 117 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index bf4de8fd62dde..9732292264ee1 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -81,6 +81,9 @@ monaco-evk-ifp-mezzanine-dtbs := monaco-evk.dtb monaco-evk-ifp-mezzanine.dtbo dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-ifp-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-ifp-mezzanine.dtbo +monaco-evk-lvds-boe,dv215fhm-r01-dtbs := monaco-evk.dtb monaco-evk-ifp-mezzanine.dtbo monaco-evk-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-lvds-boe,dv215fhm-r01.dtb + monaco-evk-sd-card-dtbs := monaco-evk.dtb monaco-evk-sd-card.dtbo dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-sd-card.dtb diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 0000000000000..b796df28037bf --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,114 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "Qualcomm Technologies, Inc. Monaco EVK LVDS"; + + panel_lvds: panel-lvds { + compatible = "boe,dv215fhm-r01"; + power-supply = <&lcd_disp_bias>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint = <<9211c_out_odd>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint = <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible = "regulator-fixed"; + regulator-name = "lcd_disp_bias"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + gpio = <&expander3 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&i2c8 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c8_data_clk>; + + status = "okay"; + + lt9211c_codec: lvds-bridge@2d { + compatible = "lontium,lt9211c"; + reg = <0x2d>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + vccio-supply = <&vreg_l5a>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9211c_in: endpoint { + data-lanes = <1 2 3 4>; + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9211c_out_odd: endpoint { + remote-endpoint = <&panel_in_lvds_odd>; + }; + }; + + port@3 { + reg = <3>; + + lt9211c_out_even: endpoint { + remote-endpoint = <&panel_in_lvds_even>; + }; + }; + }; + }; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <<9211c_in>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l4a>; + + status = "okay"; +}; + From caf9fee4f6cf9125e231501c553d4731b5e5e3f4 Mon Sep 17 00:00:00 2001 From: Vishnu Saini Date: Tue, 8 Sep 2026 11:59:59 +0530 Subject: [PATCH 6/6] FROMLIST: arm64: dts: qcom: lemans-evk: Add LVDS display overlay The Lemans EVK IFP mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge. The bridge is connected to the DSI0 output and drives a dual-channel 1920x1080 LVDS panel in VESA-24 mapping. Add a DTBO overlay, lemans-evk-lvds-boe,dv215fhm-r01.dtso, that wires up the LT9211C bridge on I2C1 (address 0x2d) with reset on GPIO37, a panel-lvds node for the boe,dv215fhm-r01 panel (matched against the panel-simple-lvds-dual-ports binding, which supplies the panel's size and timing internally), and an LCD display bias regulator supplied through the GPIO expander. DSI power is provided by vreg_s4a. The overlay is built as a composite DTB combining the base lemans-evk.dtb, the IFP mezzanine overlay, and this LVDS overlay. Link: https://lore.kernel.org/all/20260905-lvds-support-v3-1-b40a1b03f63c@oss.qualcomm.com/ Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 3 + .../lemans-evk-lvds-boe,dv215fhm-r01.dtso | 113 ++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 9732292264ee1..86790b131e0b0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -60,6 +60,9 @@ dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-el2.dtb lemans-evk-ifp-mezzanine-dtbs := lemans-evk.dtb lemans-evk-ifp-mezzanine.dtbo +lemans-evk-lvds-boe,dv215fhm-r01-dtbs := lemans-evk.dtb lemans-evk-ifp-mezzanine.dtbo lemans-evk-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-lvds-boe,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-ifp-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += lemans-evk-ifp-mezzanine.dtbo dtb-$(CONFIG_ARCH_QCOM) += monaco-ac-evk.dtb diff --git a/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso b/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 0000000000000..bd3e13c46a1e7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/lemans-evk-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "Qualcomm Technologies, Inc. Lemans EVK LVDS"; + + panel_lvds: panel-lvds { + compatible = "boe,dv215fhm-r01"; + power-supply = <&lcd_disp_bias>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + + panel_in_lvds_odd: endpoint { + remote-endpoint = <<9211c_out_odd>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + + panel_in_lvds_even: endpoint { + remote-endpoint = <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible = "regulator-fixed"; + regulator-name = "lcd_disp_bias"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + gpio = <&expander3 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c1_default>; + + status = "okay"; + + lt9211c_codec: lvds-bridge@2d { + compatible = "lontium,lt9211c"; + reg = <0x2d>; + reset-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + vccio-supply = <&vreg_s4a>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lt9211c_in: endpoint { + data-lanes = <1 2 3 4>; + remote-endpoint = <&mdss0_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + + lt9211c_out_odd: endpoint { + remote-endpoint = <&panel_in_lvds_odd>; + }; + }; + + port@3 { + reg = <3>; + + lt9211c_out_even: endpoint { + remote-endpoint = <&panel_in_lvds_even>; + }; + }; + }; + }; +}; + +&mdss0_dsi0 { + vdda-supply = <&vreg_l1c>; + + status = "okay"; +}; + +&mdss0_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <<9211c_in>; +}; + +&mdss0_dsi0_phy { + vdds-supply = <&vreg_l4a>; + + status = "okay"; +};