diff --git a/CURRICULUM.md b/CURRICULUM.md index a9773c6..977c24c 100644 --- a/CURRICULUM.md +++ b/CURRICULUM.md @@ -68,6 +68,11 @@ Flag numbers identify the weak dimension(s): 1=Concept Focus, 2=Starter Calibrat |---|---|---|---|---|---| | `sv/wide-readmem` | Wide Four-State Memory Loading | ✅ | — | `sv/always-ff` | `$readmemh`, address ranges, and non-power-of-two four-state packed words | +### Chapter: Coverage Option Text (October 2026) +| Slug | Title | Status | Score | Prereqs | Teaches | +|---|---|---|---|---|---| +| `sv/coverage-option-text` | Coverage Option Text | ✅ | — | `sv/covergroup-basics` | default and procedural assignment of a covergroup instance's `option.comment` | + ### Chapter: Introduction | Slug | Title | Status | Score | Prereqs | Teaches | |---|---|---|---|---|---| diff --git a/artifacts/tutorial/SUMMARY.md b/artifacts/tutorial/SUMMARY.md index 096587f..8a6bfb8 100644 --- a/artifacts/tutorial/SUMMARY.md +++ b/artifacts/tutorial/SUMMARY.md @@ -90,7 +90,7 @@ One commit per issue, each with the test that fails before it and passes after: ### Landed capability chapters -Added seven one-lesson chapters for user-facing SystemVerilog capabilities +Added eight one-lesson chapters for user-facing SystemVerilog capabilities landed in Mox between September 22 and October 1, 2026. The UDP chapter tracks landing tip `36b040f6190c`, and the virtual-provider chapter tracks `3bc88e77921e`; the pinned browser WASM remains unchanged. @@ -104,6 +104,7 @@ tracks landing tip `36b040f6190c`, and the virtual-provider chapter tracks | `sv/sequential-udp-init` | §§29.3.2, 29.6, 29.7 | starter FAIL; solution PASS in interpreter and compile modes | starter both_fail; solution PASS; output equal | `artifacts/tutorial/capability-receipts/*sequential-udp-init*` | | `sv/virtual-provider-closure` | §§8.20, 8.22 | starter FAIL; solution PASS in interpreter and compile modes | starter both_fail; solution both_pass; output equal | `artifacts/tutorial/virtual-provider-closure/*` | | `sv/wide-readmem` | §§21.4, 21.4.1 | starter FAIL; solution PASS in interpreter and compile modes | starter both_fail; solution both_pass; output equal | `artifacts/tutorial/wide-readmem/*` | +| `sv/coverage-option-text` | §19.7, Table 19-1 | starter FAIL; solution PASS in interpreter and compile modes | starter both_fail; solution both_pass; output equal | `artifacts/tutorial/coverage-option-text/*` | The capability receipt summaries are in `artifacts/tutorial/capability-receipts/{summary,final-summary}.tsv`. @@ -113,7 +114,7 @@ receipt are recorded in ## Receipt coverage on origin/main -The 80 registered lesson slugs are now accounted for by either the original +The 84 registered lesson slugs are now accounted for by either the original generic receipts, a capability-specific bundle, or the missing-matrix bundle at `artifacts/tutorial/receipts/20261001-missing/`. That matrix records the 18 previously uncovered slugs: native Mox passes for both RTL lessons and all @@ -173,6 +174,20 @@ The focused browser run is 1/1 through the pinned interpreter-backed WASM fallback, not native AOT. Receipts and the Mox landing provenance are under `artifacts/tutorial/wide-readmem/`. +### Coverage option text chapter + +`sv/coverage-option-text` teaches the empty default for a covergroup instance's +`option.comment` and its procedural assignment under IEEE 1800-2023 §19.7 and +Table 19-1. The starter deliberately rejects the empty default; the solution +passes native interpreter and compile modes. Xcelium and Mox agree on the +starter `both_fail` and solution `both_pass` receipts. The focused browser run +is an explicit expected failure for the pinned WASM's unlinked coverage runtime +host-allocation call and is interpreter-only until a WASM rebuild; native AOT is +not claimed. The corrected refdiff receipts retain separate source hashes and +cache keys even when `reference_cached` is true. Receipts and the b481 landing +provenance are under +`artifacts/tutorial/coverage-option-text/`. + ## WASM rebuild (done locally, NOT published; release `mox-wasm` is unchanged) Built with emsdk 4.0.21 from Mox main `9c5418532b9` (and landing `ea0fcd2`): mox-verilog, mox-sim, mox-bmc and mox-lec. Mox has no wasm target for mox-run (GAPS TUT-WASM-MOXRUN), so two more commits went in: diff --git a/artifacts/tutorial/content-census.md b/artifacts/tutorial/content-census.md index 886deb3..268b4a6 100644 --- a/artifacts/tutorial/content-census.md +++ b/artifacts/tutorial/content-census.md @@ -20,7 +20,7 @@ tutorial's runnable coverage for the landed readmem behavior. ## New landed-capability chapters -These nine short chapters correspond to the user-facing Mox capabilities present +These ten short chapters correspond to the user-facing Mox capabilities present on the current `origin/main` by October 1, 2026. The compile-mode status page is listed separately below because it reports qualification status rather than teaching a new language capability. Every solution passes Mox in both @@ -39,14 +39,14 @@ attempts decryption without a key. | `sv/clocking-sampler-retention` | `3b1760ff2030378cfde16ca319e2c1b806ab9d31`, `test/Tools/mox-sim/mq93-m2-clock-sampler.sv` | §§14.3, 14.13: default `1step` samples before the clock event; explicit `#0` samples in Observed and retains the sample through same-slot re-entry. | solution PASS; starter FAIL | solution PASS; starter FAIL | both PASS / both FAIL, output equal | added an explicit-`#0` sampler-retention exercise | | `sv/protected-envelope-boundary` | `c3799f427f1e51abcd389dcf15771150223cae75`, `test/Conversion/ImportVerilog/protected-comment-callback.sv` | §§34.2, 34.3, 34.4, 34.5.3–34.5.4: protected text is transformed before analysis and delimiters close the envelope; this lesson does not claim decryption. | solution PASS; starter FAIL | solution PASS; starter FAIL | `reference_only_fail` for solution; Xcelium attempts unkeyed decryption | added same-buffer opaque callback-boundary exercise | | `sv/wide-readmem` | `e7da9630dcd`, `test/Tools/mox-sim/aot-readmem-wide-fourstate.sv` | §§21.4, 21.4.1: `$readmemh` accepts optional address bounds and loads packed elements of an unpacked memory, preserving four-state digits. | solution PASS; starter FAIL | solution PASS; starter FAIL | starter `both_fail`; solution `both_pass`, output equal | added a width-calibration readmem exercise | +| `sv/coverage-option-text` | `b481355f9fe`, `test/Tools/mox-sim/coverage-covergroup-option-comment-assignment.sv` | §19.7 and Table 19-1: an instance-specific covergroup `comment` defaults to `""` and may be assigned procedurally after instantiation. | solution PASS; starter FAIL | solution PASS; starter FAIL | starter `both_fail`; solution `both_pass`, output equal | added a default-and-assignment coverage-option exercise | The remaining current-main capability commits are queued for their own short -chapters and are not silently folded into an existing lesson: coverage-option -string preservation (`b481355f9fe`), VPI system-function argument marshalling -(`d83c4b1dde8`), and interface-method `%m` receiver scope plus parenthesized +chapters and are not silently folded into an existing lesson: VPI system-function +argument marshalling (`d83c4b1dde8`), and interface-method `%m` receiver scope plus parenthesized virtual-interface receivers (`ed441eb5b58`). -This census covers every lesson in `src/lessons/` (meta.js, 73 lessons) and CURRICULUM.md, checked against +This census covers every lesson in `src/lessons/` (meta.js, 84 lessons) and CURRICULUM.md, checked against IEEE 1800-2023 (`spec/ieee-1800-2023.txt`) and IEEE 1800.2-2020 (UVM). Each row gives: lesson | claim/example | what is wrong | IEEE clause | evidence | proposed fix | severity. diff --git a/artifacts/tutorial/coverage-option-text/README.md b/artifacts/tutorial/coverage-option-text/README.md new file mode 100644 index 0000000..8d2cd5f --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/README.md @@ -0,0 +1,69 @@ +# Coverage option text receipt + +This receipt supports `sv/coverage-option-text`. The lesson teaches the +instance-specific `option.comment` default and a procedural assignment on a +covergroup instance. The starter deliberately rejects the standard empty +default; the solution accepts it, assigns the runtime comment, samples one +value, and prints `PASS`. + +## Standard and landing basis + +IEEE 1800-2023 §19.7 and Table 19-1 define instance-specific coverage +options. The `comment` option defaults to `""`, is associated with the +covergroup instance, and may be assigned procedurally after instantiation. +The lesson does not claim that a simulator's coverage-report formatting is +portable. + +The native capability landed in Mox commit `b481355f9fe` +(`b481355f9fe63237a9a5f6307accb8a0133e1e77`), recorded by +`/var/tmp/thomas-ahle/fleet/artifacts/landing/push-b481355f9fe.md`. The exact- +tip qualification established the nine named Chapter-19 controls at 9/9. +The native receipt uses `/var/tmp/thomas-ahle/wt/landing/build-dev-fast` at +`35ec19ea7f9398d76cf704252703ae731dad04d5`, which contains b481 as an +ancestor. No Mox worktree was modified. + +## Native runs + +The native runs use CPUs `0-79` and a 30-second wall guard. The logs use +`mox-verilog` plus `mox-sim`; the build also has no `mox-run` binary. + +| variant | mode | exit | first result line | +|---|---:|---:|---| +| starter | interpret | 0 | `FAIL: starter rejected the empty default comment` | +| starter | compile | 0 | `FAIL: starter rejected the empty default comment` | +| solution | interpret | 0 | `PASS` | +| solution | compile | 0 | `PASS` | + +Both compile logs report `AOT interpreter invocations total: 0`. The committed +logs are the six `*-{import,interpret,compile}.log` files in this directory. + +## Differential runs + +`refdiff` was run on each committed fixture against the same native build: + +```text +/var/tmp/thomas-ahle/fleet/bin/refdiff src/lessons/sv/coverage-option-text/coverage_option_text.sv --build-dir /var/tmp/thomas-ahle/wt/landing/build-dev-fast +/var/tmp/thomas-ahle/fleet/bin/refdiff src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv --build-dir /var/tmp/thomas-ahle/wt/landing/build-dev-fast +``` + +- `starter-refdiff.json`: `both_fail`; both engines reject the deliberate + wrong expectation of a nonempty default. +- `solution-refdiff.json`: `both_pass`; normalized outputs are equivalent. +- The committed refdiff JSON `sha256` field is the exact committed source + hash; `refdiff_cache_key` is the separate 64-hex receipt cache identity. + The receipts were regenerated from the committed fixtures with the commands + above. `starter-source.sha256` and `solution-source.sha256` independently + repeat the source binding. Both corrected receipts record + `reference_cached: true`; the cache key preserves provenance but does not + claim a fresh independent Xcelium run. Standing ruling — `general: refdiff + cache identity is receipt provenance, not a runtime performance cache`. + +## Browser qualification + +The browser result is recorded in `browser-qa.md`. It is an expected pinned-WASM +failure caused by the unlinked coverage runtime host-allocation call +`__mox_sim_register_host_allocation`; the explicit `test.fail` remains until a +WASM rebuild. Native Mox passes. Browser qualification is interpreter-only +until that linkage is rebuilt, and does not qualify native AOT. Standing ruling +— `general: pinned interpreter fallback is an explicitly scoped browser +compatibility path`. diff --git a/artifacts/tutorial/coverage-option-text/browser-qa.md b/artifacts/tutorial/coverage-option-text/browser-qa.md new file mode 100644 index 0000000..b0d1276 --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/browser-qa.md @@ -0,0 +1,15 @@ +# Browser QA receipt + +Command: + +```text +npx playwright test e2e/qa-all-lessons.spec.js --grep 'Coverage Option Text' --reporter=line +``` + +Result: `1 passed` as an expected failure (`e2e/qa-all-lessons.spec.js:67:5`, +lesson `[32]`, `run`), wall time `33.6s`. + +The pinned browser WASM route fails with the known unlinked coverage runtime +host-allocation call (`__mox_sim_register_host_allocation`); native Mox passes. +The entry is an explicit `test.fail` for a WASM rebuild, not a tutorial-source +failure and not native AOT qualification. diff --git a/artifacts/tutorial/coverage-option-text/solution-compile.log b/artifacts/tutorial/coverage-option-text/solution-compile.log new file mode 100644 index 0000000..1c60325 --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/solution-compile.log @@ -0,0 +1,195 @@ +[mox-sim] Auto-enabling --skip-passes for module marked mox.sim.preprocessed +[mox-sim] Stage: passes (prev: 0ms, total: 0ms) +[mox-sim] aot-publication/v2 domain=module-loader-functions expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] aot-publication/v2 domain=module-loader-processes expected=1 accounted=1 positive=1 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:dbece0947e8df29c3d674a06bb85a08e2b7bd4a0382cd6522ab2c5fa69007e8e +[mox-sim] aot-publication/v2 domain=module-loader-address-bound-globals expected=12 accounted=12 positive=12 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:7a2ec44b3ffd00e87dafe9cdbdadf8c4ba94b0aeafa5e2f6e25ddaee5959eadc +[mox-sim] aot-publication/v2 domain=module-loader-entry-table expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] Loaded compiled module '/tmp/mox-scratch/a8e5ccd3bff512bd85be743cbbba161ae06504793c695db14b39d861ac39713b/session-45b85851b8818f1de266d15452d6e5c3f72988b6ec91a83f27add5e74dce2809/mox-sim-autocompile-ccc9a4.so': 0 functions, 1 processes, 12 address-bound globals (build: mox-sim-abi-v19-x86_64-unknown-linux-gnu-5ae2fd22915b44df5ad63c6b65aaa0ca) +[mox-sim] Address-bound global ownership: role=main, module='/tmp/mox-scratch/a8e5ccd3bff512bd85be743cbbba161ae06504793c695db14b39d861ac39713b/session-45b85851b8818f1de266d15452d6e5c3f72988b6ec91a83f27add5e74dce2809/mox-sim-autocompile-ccc9a4.so', descriptor-declared=12, retained=12 +[mox-sim] M3 loaded callable union: artifacts=1 raw-rows=0 demand-rows=0 distinct-demand-keys=0 slot-rows=0 provider-rows=0 checked-keys=0 missing=0 duplicate=0 malformed=0 unresolved=0 dropped=0 digest=sha256:82d3d9e63f8a381ca2dc71c2bd50f90e20ec0ed93dca667f86ab52919a8533b2 status=ok +[mox-sim] Stage: init (prev: 123ms, total: 123ms) +[mox-sim] Pre-aliased 12 address-bound globals to .so storage +[mox-sim] Unmapped native func.call policy: default deny runtime bridges and pointer-typed get_/set_/create_/m_initialize* (allow others) +[mox-sim] Loaded 0 compiled functions: 0 native-dispatched, 0 not-native-dispatched, 0 intercepted +[mox-sim] aot-publication/v2 domain=compiled-function-dispatch expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] Address-bound final-LLVM-global probes: 12/12 rows, 66/66 bytes bidirectional, owner-generation=1 +[mox-sim] Compiled process dispatch: 1/1 processes wired +[mox-sim] aot-publication/v2 domain=process-dispatch expected=1 accounted=1 positive=1 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:979054643387faf73ad0f08f4cac05733060ee3d4ac3b9ff2b77a69eefd36c41 +[mox-sim] aot-publication/v2 domain=process-dispatch identity='tb.process_0' outcome=wired polarity=positive reason='' +[mox-sim] Stage: load-compiled (prev: 3ms, total: 126ms) +[mox-sim] Found 1 LLHD processes, 0 LLHD finals, 0 seq.initial blocks, and 0 hw.instance ops (out of 90 total ops) in module +[mox-sim] Registered 1 LLHD signals and 1 LLHD processes/initial blocks +[mox-sim] Receipt: INIT_COMPLETE_OK execution_failure=0 process_dispatches=0 +[mox-sim] Stage: run (prev: 0ms, total: 126ms) +[mox-sim] Starting simulation +PASS +[mox-sim] Simulation terminated at time 0 fs (success=true, verbose=true) +[mox-sim] Main loop exit: shouldContinue()=false at time 0 fs, iter=1, deltas=1 +[mox-sim] Simulation finished at time 0 fs +[mox-sim] Simulation completed at time 0 fs +[mox-sim] === AOT Statistics === +[mox-sim] parse_ms: 0 +[mox-sim] passes_ms: 0 +[mox-sim] init_ms: 125 +[mox-sim] so_load_ms: 1 +[mox-sim] snapshot_restore_ms: 0 +[mox-sim] run_ms: 0 +[mox-sim] total_ms: 126 +[mox-sim] arena_globals: 0 +[mox-sim] arena_size_bytes: 0 +[mox-sim] global_patch_count: 0 +[mox-sim] global_patch_bytes: 0 +[mox-sim] mutable_globals_total: 0 +[mox-sim] mutable_globals_arena: 0 +[mox-sim] mutable_globals_patch: 0 +[mox-sim] mutable_bytes_total: 0 +[mox-sim] mutable_bytes_arena: 0 +[mox-sim] mutable_bytes_patch: 0 +[mox-sim] static_aot_reachability_functions_total: 14 +[mox-sim] static_aot_reachability_functions_native: 0 +[mox-sim] static_aot_reachability_functions_native_root: 0 +[mox-sim] static_aot_reachability_functions_native_closure: 0 +[mox-sim] static_aot_reachability_functions_interp_only: 0 +[mox-sim] static_aot_reachability_functions_unattributed: 14 +[mox-sim] static_aot_reachability_functions_unknown: 0 +[mox-sim] static_aot_reachability_processes_total: 1 +[mox-sim] static_aot_reachability_processes_native: 0 +[mox-sim] static_aot_reachability_processes_native_root: 0 +[mox-sim] static_aot_reachability_processes_native_closure: 0 +[mox-sim] static_aot_reachability_processes_interp_only: 0 +[mox-sim] static_aot_reachability_processes_unattributed: 1 +[mox-sim] static_aot_reachability_processes_unknown: 0 +[mox-sim] dynamic_aot_process_invocations_total: 1 +[mox-sim] dynamic_aot_process_invocations_native: 1 +[mox-sim] dynamic_aot_process_invocations_interpreted: 0 +[mox-sim] dynamic_aot_process_native_pct: 100.00 +[mox-sim] dynamic_aot_callable_invocations_total: 0 +[mox-sim] dynamic_aot_callable_invocations_native: 0 +[mox-sim] dynamic_aot_callable_invocations_interpreted: 0 +[mox-sim] dynamic_aot_callable_native_pct: n/a +[mox-sim] simulated_time_fs: 0 +[mox-sim] process_activations_total: 1 +[mox-sim] delta_cycles_total: 1 +[mox-sim] event_activations_total: 1 +[mox-sim] events_total: 1 +[mox-sim] signal_updates_total: 1 +[mox-sim] edges_detected_total: 1 +[mox-sim] signal_dispatches_total: 0 +[mox-sim] signal_fanout_dispatches_total: 0 +[mox-sim] signal_fanout_candidates_checked_total: 0 +[mox-sim] priority_clocking_sampler_pre_scan_candidates_total: 0 +[mox-sim] process_activations_per_s: 3368 +[mox-sim] delta_cycles_per_s: 3368 +[mox-sim] event_activations_per_s: 3368 +[mox-sim] events_per_s: 3368 +[mox-sim] signal_updates_per_s: 3368 +[mox-sim] edges_detected_per_s: 3368 +[mox-sim] simulated_fs_per_s: 0 +[mox-sim] simulated_ns_per_s: 0 +[mox-sim] Compiled process activations: 1 +[mox-sim] Compiled callback invocations: 1 +[mox-sim] Compiled frame-suspend invocations: 0 +[mox-sim] Compiled coroutine activations: 0 +[mox-sim] Deferred initial compiled process handoffs: 0 +[mox-sim] Init-phase interpreter activations: 0 +[mox-sim] Static-init interpreter activations: 0 +[mox-sim] Static-init one-shot discounts: 0 +[mox-sim] Static-init excess activations: 0 +[mox-sim] Interpreter process invocations: 0 +[mox-sim] Interpreter combinational invocations: 0 +[mox-sim] BEGIN interpreter-edge/v1 +[mox-sim] edge=interpreter-combinational-execution +[mox-sim] operation=llhd.combinational +[mox-sim] status=PRESENT +[mox-sim] event_binding_status=NOT-PROVEN +[mox-sim] event_binding_opened=0 +[mox-sim] event_binding_missing=0 +[mox-sim] event_binding_mismatch=0 +[mox-sim] event_binding_count_mismatch=0 +[mox-sim] event_binding_reason=producer-absent +[mox-sim] calibration=NOT-REQUESTED +[mox-sim] END interpreter-edge/v1 +[mox-sim] Interpreter continuous assignment invocations: 0 +[mox-sim] Initializer interpreter operations: 0 +[mox-sim] Filtered initializer interpreter operations: 0 +[mox-sim] AOT interpreter invocations total: 0 +[mox-sim] native pause ($stop) invocations: 0 +[mox-sim] Compiled function calls: 0 +[mox-sim] AOT reentry trampoline calls: 0 +[mox-sim] Trampoline calls: 0 +[mox-sim] Entry-table native calls: 0 +[mox-sim] Entry-table skipped (depth): 0 +[mox-sim] Entry-table skipped (yield): 0 +[mox-sim] Entry MAY_YIELD skip (non-native-default): 0 +[mox-sim] Entry MAY_YIELD skip (trampoline-default): 0 +[mox-sim] Entry MAY_YIELD skip (native-default): 0 +[mox-sim] Entry MAY_YIELD skip (optin-no-proc): 0 +[mox-sim] Entry MAY_YIELD skip (optin-non-coro): 0 +[mox-sim] Max AOT depth: 0 +[mox-sim] func.call skipped (depth): 0 +[mox-sim] func.call skipped (yield): 0 +[mox-sim] func.call MAY_YIELD skip (default): 0 +[mox-sim] func.call MAY_YIELD skip (optin-no-proc): 0 +[mox-sim] func.call MAY_YIELD skip (optin-non-coro): 0 +[mox-sim] indirect_calls_total: 0 +[mox-sim] indirect_calls_native: 0 +[mox-sim] function_identity_vtable_symbol_dispatches: 0 +[mox-sim] function_identity_vtable_legacy_fallbacks: 0 +[mox-sim] function_identity_vtable_missing_sidecar_fallbacks: 0 +[mox-sim] function_identity_vtable_mismatch_fallbacks: 0 +[mox-sim] function_identity_vtable_dropped_sidecar_rows: 0 +[mox-sim] function_identity_vtable_slot_pointer_rows: 0 +[mox-sim] function_identity_slot_pointer_key_lookups: 0 +[mox-sim] native_dispatch_abi_demotions: 0 +[mox-sim] native_dispatch_tagged_arm: 0 +[mox-sim] native_dispatch_slot_arm: 0 +[mox-sim] direct_calls_native: 0 +[mox-sim] aotDepth_max: 0 +[mox-sim] entry_calls_total: 0 +[mox-sim] entry_calls_native: 0 +[mox-sim] entry_skipped_yield_non_native_default: 0 +[mox-sim] entry_skipped_yield_trampoline_default: 0 +[mox-sim] entry_skipped_yield_native_default: 0 +[mox-sim] entry_skipped_yield_optin_no_proc: 0 +[mox-sim] entry_skipped_yield_optin_non_coro: 0 +[mox-sim] direct_skipped_yield_default: 0 +[mox-sim] direct_skipped_yield_optin_no_proc: 0 +[mox-sim] direct_skipped_yield_optin_non_coro: 0 +[mox-sim] wait_event_count: 0 +[mox-sim] wait_count: 0 +[mox-sim] fork_count: 0 +[mox-sim] join_count: 0 +[mox-sim] yield_count_total: 0 +[mox-sim] Hot native FuncIds (top 50): +[mox-sim] (none) +[mox-sim] Hot uncompiled FuncIds (top 50): +[mox-sim] (none) +[mox-sim] Hot entry-table MAY_YIELD skips (top 50): +[mox-sim] (none) +[mox-sim] Hot func.call MAY_YIELD skips (top 50): +[mox-sim] (none) +[mox-sim] Deferred-initial pre-wait interpreted operations: 0 +[mox-sim] BEGIN interpreter-edge/v1 +[mox-sim] edge=deferred-initial-prewait-operation +[mox-sim] status=PRESENT +[mox-sim] count=0 +[mox-sim] event_binding_status=PROVEN +[mox-sim] event_binding_opened=0 +[mox-sim] event_binding_missing=0 +[mox-sim] event_binding_mismatch=0 +[mox-sim] event_binding_count_mismatch=0 +[mox-sim] event_binding_reason=none +[mox-sim] END interpreter-edge/v1 +[mox-sim] whole-design AOT zero-interpreter gate satisfied: counted process=0 combinational=0 initializer-operation=0 direct-call=0 ABI-demotion=0 deferred-initial-prewait-operation=0 deferred-initial-prewait-binding=PROVEN dpi-export-function-binding=NOT-REQUIRED; residual-compiled-process=false interpreted-continuous-assignment=0 initializer-operation-filtered=0; instrumented-classes=interpreted-process,interpreted-callable,interpreted-continuous-assignment,module-initializer-operation,deferred-initial-prewait-operation measured-classes=interpreted-process,interpreted-callable,interpreted-continuous-assignment,module-initializer-operation,deferred-initial-prewait-operation unavailable-classes=NONE operation-level-other=UNMEASURED + +================================================= + Coverage Report +================================================= + +Covergroup: coverage_model + Overall coverage: 25.00% + Coverpoints: 1 + - cp_value: 1 hits, 25.00% coverage [range: 2..2, 1 unique values] + +================================================= +[mox-sim] Simulation completed diff --git a/artifacts/tutorial/coverage-option-text/solution-import.log b/artifacts/tutorial/coverage-option-text/solution-import.log new file mode 100644 index 0000000..e69de29 diff --git a/artifacts/tutorial/coverage-option-text/solution-interpret.log b/artifacts/tutorial/coverage-option-text/solution-interpret.log new file mode 100644 index 0000000..58f5470 --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/solution-interpret.log @@ -0,0 +1,26 @@ +[mox-sim] Auto-enabling --skip-passes for module marked mox.sim.preprocessed +[mox-sim] Stage: passes (prev: 0ms, total: 0ms) +[mox-sim] Stage: init (prev: 0ms, total: 0ms) +[mox-sim] Found 1 LLHD processes, 0 LLHD finals, 0 seq.initial blocks, and 0 hw.instance ops (out of 90 total ops) in module +[mox-sim] Registered 1 LLHD signals and 1 LLHD processes/initial blocks +[mox-sim] Receipt: INIT_COMPLETE_OK execution_failure=0 process_dispatches=0 +[mox-sim] Stage: run (prev: 2ms, total: 2ms) +[mox-sim] Starting simulation +PASS +[mox-sim] sim.terminate triggered in process ID 1 at loc("/tmp/sv-tutorial-coverage-option.nQfn4Y/solution.mlir":130:7) +[mox-sim] Simulation terminated at time 0 fs (success=true, verbose=true) +[mox-sim] Main loop exit: shouldContinue()=false at time 0 fs, iter=1, deltas=1 +[mox-sim] Simulation finished at time 0 fs +[mox-sim] Simulation completed at time 0 fs + +================================================= + Coverage Report +================================================= + +Covergroup: coverage_model + Overall coverage: 25.00% + Coverpoints: 1 + - cp_value: 1 hits, 25.00% coverage [range: 2..2, 1 unique values] + +================================================= +[mox-sim] Simulation completed diff --git a/artifacts/tutorial/coverage-option-text/solution-refdiff.json b/artifacts/tutorial/coverage-option-text/solution-refdiff.json new file mode 100644 index 0000000..4fad9cf --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/solution-refdiff.json @@ -0,0 +1,24 @@ +{ + "source": "/var/tmp/thomas-ahle/sv-tutorial/src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv", + "sha256": "e8f09f6b823eb8b5a0c7f81a383e3046bc4b42b3a87a2c5ae9d491b67ff9dcdc", + "reference_cached": true, + "reference": { + "verdict": "PASS", + "exit": 0, + "final_status": "completed" + }, + "mox": { + "verdict": "PASS", + "exit": 0, + "phase": "simulate", + "final_status": "completed" + }, + "category": "both_pass", + "output_equal": true, + "equivalent": true, + "metadata": { + "_has_pass": true + }, + "build_dir": "/var/tmp/thomas-ahle/wt/landing/build-dev-fast", + "refdiff_cache_key": "52e83d7b0c460ceae29866c77c50c41bae6a53ccad3f73762ac3586c556baa8c" +} diff --git a/artifacts/tutorial/coverage-option-text/solution-refdiff.log b/artifacts/tutorial/coverage-option-text/solution-refdiff.log new file mode 100644 index 0000000..53eee4c --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/solution-refdiff.log @@ -0,0 +1 @@ +{"source":"/var/tmp/thomas-ahle/sv-tutorial/src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv","sha256":"e8f09f6b823eb8b5a0c7f81a383e3046bc4b42b3a87a2c5ae9d491b67ff9dcdc","reference_cached":true,"reference":{"verdict":"PASS","exit":0,"final_status":"completed"},"mox":{"verdict":"PASS","exit":0,"phase":"simulate","final_status":"completed"},"category":"both_pass","output_equal":true,"equivalent":true,"metadata":{"_has_pass":true},"build_dir":"/var/tmp/thomas-ahle/wt/landing/build-dev-fast","artifacts":"/var/tmp/thomas-ahle/fleet/artifacts/tutorial/coverage-option-text/recheck-20261001-r3/solution","refdiff_cache_key":"52e83d7b0c460ceae29866c77c50c41bae6a53ccad3f73762ac3586c556baa8c"} diff --git a/artifacts/tutorial/coverage-option-text/solution-source.sha256 b/artifacts/tutorial/coverage-option-text/solution-source.sha256 new file mode 100644 index 0000000..46c16c7 --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/solution-source.sha256 @@ -0,0 +1 @@ +e8f09f6b823eb8b5a0c7f81a383e3046bc4b42b3a87a2c5ae9d491b67ff9dcdc diff --git a/artifacts/tutorial/coverage-option-text/starter-compile.log b/artifacts/tutorial/coverage-option-text/starter-compile.log new file mode 100644 index 0000000..1c2ffff --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/starter-compile.log @@ -0,0 +1,195 @@ +[mox-sim] Auto-enabling --skip-passes for module marked mox.sim.preprocessed +[mox-sim] Stage: passes (prev: 0ms, total: 0ms) +[mox-sim] aot-publication/v2 domain=module-loader-functions expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] aot-publication/v2 domain=module-loader-processes expected=1 accounted=1 positive=1 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:dbece0947e8df29c3d674a06bb85a08e2b7bd4a0382cd6522ab2c5fa69007e8e +[mox-sim] aot-publication/v2 domain=module-loader-address-bound-globals expected=12 accounted=12 positive=12 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:7a2ec44b3ffd00e87dafe9cdbdadf8c4ba94b0aeafa5e2f6e25ddaee5959eadc +[mox-sim] aot-publication/v2 domain=module-loader-entry-table expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] Loaded compiled module '/tmp/mox-scratch/a8e5ccd3bff512bd85be743cbbba161ae06504793c695db14b39d861ac39713b/session-86c1acf952916bb4e880fc2cdd48b4f0b35258071cc3bad161cd2f83b8134994/mox-sim-autocompile-6d9a20.so': 0 functions, 1 processes, 12 address-bound globals (build: mox-sim-abi-v19-x86_64-unknown-linux-gnu-ad2c1e7c1d3e485b1c78a8afbd4fb17a) +[mox-sim] Address-bound global ownership: role=main, module='/tmp/mox-scratch/a8e5ccd3bff512bd85be743cbbba161ae06504793c695db14b39d861ac39713b/session-86c1acf952916bb4e880fc2cdd48b4f0b35258071cc3bad161cd2f83b8134994/mox-sim-autocompile-6d9a20.so', descriptor-declared=12, retained=12 +[mox-sim] M3 loaded callable union: artifacts=1 raw-rows=0 demand-rows=0 distinct-demand-keys=0 slot-rows=0 provider-rows=0 checked-keys=0 missing=0 duplicate=0 malformed=0 unresolved=0 dropped=0 digest=sha256:828ce4b8ae7317f1fb249596fd3af1cad68d4e5f81bc454856723af0d5634050 status=ok +[mox-sim] Stage: init (prev: 123ms, total: 123ms) +[mox-sim] Pre-aliased 12 address-bound globals to .so storage +[mox-sim] Unmapped native func.call policy: default deny runtime bridges and pointer-typed get_/set_/create_/m_initialize* (allow others) +[mox-sim] Loaded 0 compiled functions: 0 native-dispatched, 0 not-native-dispatched, 0 intercepted +[mox-sim] aot-publication/v2 domain=compiled-function-dispatch expected=0 accounted=0 positive=0 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:14a1ea4827eceb6099f752ac175f21d9feeed50ece269718c7050338ed779cdd +[mox-sim] Address-bound final-LLVM-global probes: 12/12 rows, 66/66 bytes bidirectional, owner-generation=1 +[mox-sim] Compiled process dispatch: 1/1 processes wired +[mox-sim] aot-publication/v2 domain=process-dispatch expected=1 accounted=1 positive=1 negative=0 missing=0 duplicate=0 unexpected=0 malformed=0 status=ok digest=sha256:979054643387faf73ad0f08f4cac05733060ee3d4ac3b9ff2b77a69eefd36c41 +[mox-sim] aot-publication/v2 domain=process-dispatch identity='tb.process_0' outcome=wired polarity=positive reason='' +[mox-sim] Stage: load-compiled (prev: 2ms, total: 126ms) +[mox-sim] Found 1 LLHD processes, 0 LLHD finals, 0 seq.initial blocks, and 0 hw.instance ops (out of 117 total ops) in module +[mox-sim] Registered 1 LLHD signals and 1 LLHD processes/initial blocks +[mox-sim] Receipt: INIT_COMPLETE_OK execution_failure=0 process_dispatches=0 +[mox-sim] Stage: run (prev: 0ms, total: 126ms) +[mox-sim] Starting simulation +FAIL: starter rejected the empty default comment +[mox-sim] Simulation terminated at time 0 fs (success=true, verbose=true) +[mox-sim] Main loop exit: shouldContinue()=false at time 0 fs, iter=1, deltas=1 +[mox-sim] Simulation finished at time 0 fs +[mox-sim] Simulation completed at time 0 fs +[mox-sim] === AOT Statistics === +[mox-sim] parse_ms: 0 +[mox-sim] passes_ms: 0 +[mox-sim] init_ms: 125 +[mox-sim] so_load_ms: 1 +[mox-sim] snapshot_restore_ms: 0 +[mox-sim] run_ms: 0 +[mox-sim] total_ms: 126 +[mox-sim] arena_globals: 0 +[mox-sim] arena_size_bytes: 0 +[mox-sim] global_patch_count: 0 +[mox-sim] global_patch_bytes: 0 +[mox-sim] mutable_globals_total: 0 +[mox-sim] mutable_globals_arena: 0 +[mox-sim] mutable_globals_patch: 0 +[mox-sim] mutable_bytes_total: 0 +[mox-sim] mutable_bytes_arena: 0 +[mox-sim] mutable_bytes_patch: 0 +[mox-sim] static_aot_reachability_functions_total: 14 +[mox-sim] static_aot_reachability_functions_native: 0 +[mox-sim] static_aot_reachability_functions_native_root: 0 +[mox-sim] static_aot_reachability_functions_native_closure: 0 +[mox-sim] static_aot_reachability_functions_interp_only: 0 +[mox-sim] static_aot_reachability_functions_unattributed: 14 +[mox-sim] static_aot_reachability_functions_unknown: 0 +[mox-sim] static_aot_reachability_processes_total: 1 +[mox-sim] static_aot_reachability_processes_native: 0 +[mox-sim] static_aot_reachability_processes_native_root: 0 +[mox-sim] static_aot_reachability_processes_native_closure: 0 +[mox-sim] static_aot_reachability_processes_interp_only: 0 +[mox-sim] static_aot_reachability_processes_unattributed: 1 +[mox-sim] static_aot_reachability_processes_unknown: 0 +[mox-sim] dynamic_aot_process_invocations_total: 1 +[mox-sim] dynamic_aot_process_invocations_native: 1 +[mox-sim] dynamic_aot_process_invocations_interpreted: 0 +[mox-sim] dynamic_aot_process_native_pct: 100.00 +[mox-sim] dynamic_aot_callable_invocations_total: 0 +[mox-sim] dynamic_aot_callable_invocations_native: 0 +[mox-sim] dynamic_aot_callable_invocations_interpreted: 0 +[mox-sim] dynamic_aot_callable_native_pct: n/a +[mox-sim] simulated_time_fs: 0 +[mox-sim] process_activations_total: 1 +[mox-sim] delta_cycles_total: 1 +[mox-sim] event_activations_total: 1 +[mox-sim] events_total: 1 +[mox-sim] signal_updates_total: 0 +[mox-sim] edges_detected_total: 0 +[mox-sim] signal_dispatches_total: 0 +[mox-sim] signal_fanout_dispatches_total: 0 +[mox-sim] signal_fanout_candidates_checked_total: 0 +[mox-sim] priority_clocking_sampler_pre_scan_candidates_total: 0 +[mox-sim] process_activations_per_s: 4556 +[mox-sim] delta_cycles_per_s: 4556 +[mox-sim] event_activations_per_s: 4556 +[mox-sim] events_per_s: 4556 +[mox-sim] signal_updates_per_s: 0 +[mox-sim] edges_detected_per_s: 0 +[mox-sim] simulated_fs_per_s: 0 +[mox-sim] simulated_ns_per_s: 0 +[mox-sim] Compiled process activations: 1 +[mox-sim] Compiled callback invocations: 1 +[mox-sim] Compiled frame-suspend invocations: 0 +[mox-sim] Compiled coroutine activations: 0 +[mox-sim] Deferred initial compiled process handoffs: 0 +[mox-sim] Init-phase interpreter activations: 0 +[mox-sim] Static-init interpreter activations: 0 +[mox-sim] Static-init one-shot discounts: 0 +[mox-sim] Static-init excess activations: 0 +[mox-sim] Interpreter process invocations: 0 +[mox-sim] Interpreter combinational invocations: 0 +[mox-sim] BEGIN interpreter-edge/v1 +[mox-sim] edge=interpreter-combinational-execution +[mox-sim] operation=llhd.combinational +[mox-sim] status=PRESENT +[mox-sim] event_binding_status=NOT-PROVEN +[mox-sim] event_binding_opened=0 +[mox-sim] event_binding_missing=0 +[mox-sim] event_binding_mismatch=0 +[mox-sim] event_binding_count_mismatch=0 +[mox-sim] event_binding_reason=producer-absent +[mox-sim] calibration=NOT-REQUESTED +[mox-sim] END interpreter-edge/v1 +[mox-sim] Interpreter continuous assignment invocations: 0 +[mox-sim] Initializer interpreter operations: 0 +[mox-sim] Filtered initializer interpreter operations: 0 +[mox-sim] AOT interpreter invocations total: 0 +[mox-sim] native pause ($stop) invocations: 0 +[mox-sim] Compiled function calls: 0 +[mox-sim] AOT reentry trampoline calls: 0 +[mox-sim] Trampoline calls: 0 +[mox-sim] Entry-table native calls: 0 +[mox-sim] Entry-table skipped (depth): 0 +[mox-sim] Entry-table skipped (yield): 0 +[mox-sim] Entry MAY_YIELD skip (non-native-default): 0 +[mox-sim] Entry MAY_YIELD skip (trampoline-default): 0 +[mox-sim] Entry MAY_YIELD skip (native-default): 0 +[mox-sim] Entry MAY_YIELD skip (optin-no-proc): 0 +[mox-sim] Entry MAY_YIELD skip (optin-non-coro): 0 +[mox-sim] Max AOT depth: 0 +[mox-sim] func.call skipped (depth): 0 +[mox-sim] func.call skipped (yield): 0 +[mox-sim] func.call MAY_YIELD skip (default): 0 +[mox-sim] func.call MAY_YIELD skip (optin-no-proc): 0 +[mox-sim] func.call MAY_YIELD skip (optin-non-coro): 0 +[mox-sim] indirect_calls_total: 0 +[mox-sim] indirect_calls_native: 0 +[mox-sim] function_identity_vtable_symbol_dispatches: 0 +[mox-sim] function_identity_vtable_legacy_fallbacks: 0 +[mox-sim] function_identity_vtable_missing_sidecar_fallbacks: 0 +[mox-sim] function_identity_vtable_mismatch_fallbacks: 0 +[mox-sim] function_identity_vtable_dropped_sidecar_rows: 0 +[mox-sim] function_identity_vtable_slot_pointer_rows: 0 +[mox-sim] function_identity_slot_pointer_key_lookups: 0 +[mox-sim] native_dispatch_abi_demotions: 0 +[mox-sim] native_dispatch_tagged_arm: 0 +[mox-sim] native_dispatch_slot_arm: 0 +[mox-sim] direct_calls_native: 0 +[mox-sim] aotDepth_max: 0 +[mox-sim] entry_calls_total: 0 +[mox-sim] entry_calls_native: 0 +[mox-sim] entry_skipped_yield_non_native_default: 0 +[mox-sim] entry_skipped_yield_trampoline_default: 0 +[mox-sim] entry_skipped_yield_native_default: 0 +[mox-sim] entry_skipped_yield_optin_no_proc: 0 +[mox-sim] entry_skipped_yield_optin_non_coro: 0 +[mox-sim] direct_skipped_yield_default: 0 +[mox-sim] direct_skipped_yield_optin_no_proc: 0 +[mox-sim] direct_skipped_yield_optin_non_coro: 0 +[mox-sim] wait_event_count: 0 +[mox-sim] wait_count: 0 +[mox-sim] fork_count: 0 +[mox-sim] join_count: 0 +[mox-sim] yield_count_total: 0 +[mox-sim] Hot native FuncIds (top 50): +[mox-sim] (none) +[mox-sim] Hot uncompiled FuncIds (top 50): +[mox-sim] (none) +[mox-sim] Hot entry-table MAY_YIELD skips (top 50): +[mox-sim] (none) +[mox-sim] Hot func.call MAY_YIELD skips (top 50): +[mox-sim] (none) +[mox-sim] Deferred-initial pre-wait interpreted operations: 0 +[mox-sim] BEGIN interpreter-edge/v1 +[mox-sim] edge=deferred-initial-prewait-operation +[mox-sim] status=PRESENT +[mox-sim] count=0 +[mox-sim] event_binding_status=PROVEN +[mox-sim] event_binding_opened=0 +[mox-sim] event_binding_missing=0 +[mox-sim] event_binding_mismatch=0 +[mox-sim] event_binding_count_mismatch=0 +[mox-sim] event_binding_reason=none +[mox-sim] END interpreter-edge/v1 +[mox-sim] whole-design AOT zero-interpreter gate satisfied: counted process=0 combinational=0 initializer-operation=0 direct-call=0 ABI-demotion=0 deferred-initial-prewait-operation=0 deferred-initial-prewait-binding=PROVEN dpi-export-function-binding=NOT-REQUIRED; residual-compiled-process=false interpreted-continuous-assignment=0 initializer-operation-filtered=0; instrumented-classes=interpreted-process,interpreted-callable,interpreted-continuous-assignment,module-initializer-operation,deferred-initial-prewait-operation measured-classes=interpreted-process,interpreted-callable,interpreted-continuous-assignment,module-initializer-operation,deferred-initial-prewait-operation unavailable-classes=NONE operation-level-other=UNMEASURED + +================================================= + Coverage Report +================================================= + +Covergroup: coverage_model + Overall coverage: 0.00% + Coverpoints: 1 + - cp_value: 0 hits, 0.00% coverage + +================================================= +[mox-sim] Simulation completed diff --git a/artifacts/tutorial/coverage-option-text/starter-import.log b/artifacts/tutorial/coverage-option-text/starter-import.log new file mode 100644 index 0000000..e69de29 diff --git a/artifacts/tutorial/coverage-option-text/starter-interpret.log b/artifacts/tutorial/coverage-option-text/starter-interpret.log new file mode 100644 index 0000000..fda7f0c --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/starter-interpret.log @@ -0,0 +1,26 @@ +[mox-sim] Auto-enabling --skip-passes for module marked mox.sim.preprocessed +[mox-sim] Stage: passes (prev: 0ms, total: 0ms) +[mox-sim] Stage: init (prev: 0ms, total: 0ms) +[mox-sim] Found 1 LLHD processes, 0 LLHD finals, 0 seq.initial blocks, and 0 hw.instance ops (out of 117 total ops) in module +[mox-sim] Registered 1 LLHD signals and 1 LLHD processes/initial blocks +[mox-sim] Receipt: INIT_COMPLETE_OK execution_failure=0 process_dispatches=0 +[mox-sim] Stage: run (prev: 1ms, total: 1ms) +[mox-sim] Starting simulation +FAIL: starter rejected the empty default comment +[mox-sim] sim.terminate triggered in process ID 1 at loc("/tmp/sv-tutorial-coverage-option.nQfn4Y/starter.mlir":76:7) +[mox-sim] Simulation terminated at time 0 fs (success=true, verbose=true) +[mox-sim] Main loop exit: shouldContinue()=false at time 0 fs, iter=1, deltas=1 +[mox-sim] Simulation finished at time 0 fs +[mox-sim] Simulation completed at time 0 fs + +================================================= + Coverage Report +================================================= + +Covergroup: coverage_model + Overall coverage: 0.00% + Coverpoints: 1 + - cp_value: 0 hits, 0.00% coverage + +================================================= +[mox-sim] Simulation completed diff --git a/artifacts/tutorial/coverage-option-text/starter-refdiff.json b/artifacts/tutorial/coverage-option-text/starter-refdiff.json new file mode 100644 index 0000000..d02f81c --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/starter-refdiff.json @@ -0,0 +1,24 @@ +{ + "source": "/var/tmp/thomas-ahle/sv-tutorial/src/lessons/sv/coverage-option-text/coverage_option_text.sv", + "sha256": "0543da1a385b488b541da08f6372bf2140c9af4ab43fc8b062caf0291c91a500", + "reference_cached": true, + "reference": { + "verdict": "FAIL", + "exit": 0, + "final_status": "fail" + }, + "mox": { + "verdict": "FAIL", + "exit": 0, + "phase": "simulate", + "final_status": "fail" + }, + "category": "both_fail", + "output_equal": true, + "equivalent": false, + "metadata": { + "_has_pass": true + }, + "build_dir": "/var/tmp/thomas-ahle/wt/landing/build-dev-fast", + "refdiff_cache_key": "9da24355c81ed516036622d8268244eacfddfd6d1d9535b6b2cb39d9c2168743" +} diff --git a/artifacts/tutorial/coverage-option-text/starter-refdiff.log b/artifacts/tutorial/coverage-option-text/starter-refdiff.log new file mode 100644 index 0000000..a1cc16a --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/starter-refdiff.log @@ -0,0 +1 @@ +{"source":"/var/tmp/thomas-ahle/sv-tutorial/src/lessons/sv/coverage-option-text/coverage_option_text.sv","sha256":"0543da1a385b488b541da08f6372bf2140c9af4ab43fc8b062caf0291c91a500","reference_cached":true,"reference":{"verdict":"FAIL","exit":0,"final_status":"fail"},"mox":{"verdict":"FAIL","exit":0,"phase":"simulate","final_status":"fail"},"category":"both_fail","output_equal":true,"equivalent":false,"metadata":{"_has_pass":true},"build_dir":"/var/tmp/thomas-ahle/wt/landing/build-dev-fast","artifacts":"/var/tmp/thomas-ahle/fleet/artifacts/tutorial/coverage-option-text/recheck-20261001-r3/starter","refdiff_cache_key":"9da24355c81ed516036622d8268244eacfddfd6d1d9535b6b2cb39d9c2168743"} diff --git a/artifacts/tutorial/coverage-option-text/starter-source.sha256 b/artifacts/tutorial/coverage-option-text/starter-source.sha256 new file mode 100644 index 0000000..3a7ddda --- /dev/null +++ b/artifacts/tutorial/coverage-option-text/starter-source.sha256 @@ -0,0 +1 @@ +0543da1a385b488b541da08f6372bf2140c9af4ab43fc8b062caf0291c91a500 diff --git a/e2e/qa-all-lessons.spec.js b/e2e/qa-all-lessons.spec.js index 1d47613..ca39d8b 100644 --- a/e2e/qa-all-lessons.spec.js +++ b/e2e/qa-all-lessons.spec.js @@ -19,6 +19,7 @@ const KNOWN_FAILURES = { 'sv/tasks-functions run': `mox-run "memory access out of bounds": ${WASM_REBUILD}`, 'sv/fsm run': `false "mem driven by always_ff" error on sram.sv: ${WASM_REBUILD}`, 'sv/protected-envelope-boundary run': `comment-form protected envelope support is not in the pinned WASM; native Mox passes: ${WASM_REBUILD}`, + 'sv/coverage-option-text run': 'pinned browser WASM lacks the coverage runtime host-allocation linkage; native Mox passes — needs a WASM rebuild', 'sva/sequence-basics verify': 'Mox BMC crashes on an assert with a pass action (llhd.process handoff)', 'sva/formal-assume run': 'Mox evaluates an initial assume property at every clock edge, not once (§16.14.6)', 'cocotb/first-test run': `mox-sim-vpi aborts when the simulation starts: ${WASM_REBUILD}`, diff --git a/src/lessons/index.js b/src/lessons/index.js index c3c11a6..fe6af29 100644 --- a/src/lessons/index.js +++ b/src/lessons/index.js @@ -93,6 +93,7 @@ export const parts = [ { title: 'Protected Envelope Boundary', lessons: [L('sv/protected-envelope-boundary')] }, { title: 'Virtual Method Provider Closure', lessons: [L('sv/virtual-provider-closure')] }, { title: 'Wide Four-State Memory Loading', lessons: [L('sv/wide-readmem')] }, + { title: 'Coverage Option Text', lessons: [L('sv/coverage-option-text')] }, ], }, { diff --git a/src/lessons/landed-capabilities.test.js b/src/lessons/landed-capabilities.test.js index a4fe9fe..2ca92a0 100644 --- a/src/lessons/landed-capabilities.test.js +++ b/src/lessons/landed-capabilities.test.js @@ -11,7 +11,8 @@ const capabilities = [ ['sv/indexed-part-select', 'indexed_part_select'], ['sv/nested-child-input', 'nested_child_input'], ['sv/sequential-udp-init', 'sequential_udp'], - ['sv/wide-readmem', 'wide_readmem'] + ['sv/wide-readmem', 'wide_readmem'], + ['sv/coverage-option-text', 'coverage_option_text'] ]; function receiptSourceMatches(receiptSource, sourcePath) { @@ -278,4 +279,40 @@ describe('landed Mox capability lessons and status pages', () => { expect(receipt.refdiff_cache_key).toMatch(/^[0-9a-f]{64}$/); } }); + + it('registers the coverage option text chapter and its landed behavior', () => { + const slug = 'sv/coverage-option-text'; + const dir = path.join(root, slug); + const starter = readFileSync(path.join(dir, 'coverage_option_text.sv'), 'utf8'); + const solution = readFileSync(path.join(dir, 'coverage_option_text.sol.sv'), 'utf8'); + const description = readFileSync(path.join(dir, 'description.html'), 'utf8'); + expect(meta[slug]?.runner ?? 'sim').toBe('sim'); + expect(meta[slug]?.focus).toBe('/src/coverage_option_text.sv'); + expect(starter).toContain('FAIL: starter rejected the empty default comment'); + expect(solution).toContain('coverage.option.comment = "runtime coverage comment"'); + expect(description).toContain('§19.7'); + expect(description).toContain('b481355f9fe'); + expect(solution).toContain('$display("PASS")'); + + for (const [variant, filename] of [ + ['starter', 'coverage_option_text.sv'], + ['solution', 'coverage_option_text.sol.sv'] + ]) { + const sourcePath = path.join(dir, filename); + const sourceHash = createHash('sha256') + .update(readFileSync(sourcePath)) + .digest('hex'); + const receipt = JSON.parse(readFileSync( + path.resolve(process.cwd(), `artifacts/tutorial/coverage-option-text/${variant}-refdiff.json`), + 'utf8' + )); + expect(receiptSourceMatches(receipt.source, sourcePath)).toBe(true); + expect(receipt.sha256).toBe(sourceHash); + expect(receipt.refdiff_cache_key).toMatch(/^[0-9a-f]{64}$/); + expect(readFileSync( + path.resolve(process.cwd(), `artifacts/tutorial/coverage-option-text/${variant}-source.sha256`), + 'utf8' + ).trim()).toBe(sourceHash); + } + }); }); diff --git a/src/lessons/meta.js b/src/lessons/meta.js index 262909f..ab67868 100644 --- a/src/lessons/meta.js +++ b/src/lessons/meta.js @@ -34,6 +34,7 @@ export default { 'sv/protected-envelope-boundary': { title: 'Protected Envelope Boundary', focus: '/src/protected_envelope.sv', top: 'tb' }, 'sv/virtual-provider-closure': { title: 'Virtual Method Provider Closure', focus: '/src/virtual_provider.sv', top: 'tb' }, 'sv/wide-readmem': { title: 'Wide Four-State Memory Loading', focus: '/src/wide_readmem.sv', top: 'tb' }, + 'sv/coverage-option-text': { title: 'Coverage Option Text', focus: '/src/coverage_option_text.sv', top: 'tb' }, // ── SystemVerilog Assertions ─────────────────────────────────────────────── 'sva/concurrent-sim': { title: 'Concurrent Assertions in Simulation', focus: '/src/monitor.sv', runner: null }, diff --git a/src/lessons/receipt-matrix.test.js b/src/lessons/receipt-matrix.test.js index ea12a15..4f96b75 100644 --- a/src/lessons/receipt-matrix.test.js +++ b/src/lessons/receipt-matrix.test.js @@ -26,7 +26,8 @@ describe('tutorial receipt coverage', () => { 'sv/protected-envelope-boundary', 'sv/struct-field-refs', 'sv/virtual-provider-closure', - 'sv/wide-readmem' + 'sv/wide-readmem', + 'sv/coverage-option-text' ]; const covered = new Set([ ...genericReceiptSlugs(), diff --git a/src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv b/src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv new file mode 100644 index 0000000..ea48e64 --- /dev/null +++ b/src/lessons/sv/coverage-option-text/coverage_option_text.sol.sv @@ -0,0 +1,25 @@ +module tb; + logic [1:0] value = 0; + + covergroup coverage_model; + cp_value: coverpoint value { + bins values[] = {[0:3]}; + } + endgroup + + coverage_model coverage = new; + + initial begin + if (coverage.option.comment != "") begin + $display("FAIL: default comment=%s", coverage.option.comment); + $finish; + end + + coverage.option.comment = "runtime coverage comment"; + value = 2; + coverage.sample(); + + $display("PASS"); + $finish; + end +endmodule diff --git a/src/lessons/sv/coverage-option-text/coverage_option_text.sv b/src/lessons/sv/coverage-option-text/coverage_option_text.sv new file mode 100644 index 0000000..a71918c --- /dev/null +++ b/src/lessons/sv/coverage-option-text/coverage_option_text.sv @@ -0,0 +1,28 @@ +module tb; + logic [1:0] value = 0; + + covergroup coverage_model; + cp_value: coverpoint value { + bins values[] = {[0:3]}; + } + endgroup + + coverage_model coverage = new; + + initial begin + if (coverage.option.comment == "") begin + $display("FAIL: starter rejected the empty default comment"); + $finish; + end + + coverage.option.comment = "runtime coverage comment"; + value = 2; + coverage.sample(); + + if (coverage.option.comment == "runtime coverage comment") + $display("PASS: comment=%s", coverage.option.comment); + else + $display("FAIL: comment=%s", coverage.option.comment); + $finish; + end +endmodule diff --git a/src/lessons/sv/coverage-option-text/description.html b/src/lessons/sv/coverage-option-text/description.html new file mode 100644 index 0000000..902be17 --- /dev/null +++ b/src/lessons/sv/coverage-option-text/description.html @@ -0,0 +1,14 @@ +

A covergroup instance has instance-specific options. The comment option defaults to the empty string, and a procedural assignment can replace it for that instance.

+ +

Template

+
covergroup coverage_model;
+  cp_value: coverpoint value;
+endgroup
+coverage_model coverage = new;
+coverage.option.comment = "runtime coverage comment";
+ +

Complete the starter so it accepts the default empty comment and then assigns the requested runtime comment. The test samples one value before printing the result; the assignment is intentionally not checked by parsing simulator-specific coverage-report text.

+ +

IEEE 1800-2023 §19.7 and Table 19-1 define instance-specific coverage options. The comment option defaults to "", is saved with the covergroup instance, and may be assigned procedurally after instantiation.

+ +

The example is qualified against Mox landing commit b481355f9fe, which preserves valid unset coverage option strings before converting them to runtime strings. The pinned browser WASM is not treated as native AOT evidence.