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alextmagro
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Hi Aristotle, working on a review of the main loop now but a few integration comments to start.
| return (K, M), (N, K) | ||
| if layout == "NT": # A not transposed, B transposed | ||
| return (K, M), (K, N) | ||
| if layout == "TT": # both transposed |
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Do we need TT for anything? My understanding is that it is more efficient to swap the operands and do B@A and run a TT GEMM as an NN, then you get a row-major C instead.
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Thanks for pointing this out. No, I don't actually think we need TT for anything here, so I dropped it in 126f1dd
| def create_mxfp4_tensors(M, K, N, layout): | ||
| """Create MXFP4 inputs and references dequantized from the buffers ``layout`` consumes. | ||
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| MXFP4 rowwise and columnwise data are quantized separately (columnwise is the |
| buffer the GEMM reads: rowwise for a transposed operand, columnwise otherwise. | ||
| """ | ||
| # the MXFP4 quantizer takes BF16 input | ||
| A_bf16, B_bf16 = create_regular_tensors(M, K, N, layout, dtype=torch.bfloat16) |
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Are we limited to bf16 input? I think supporting fp32 and fp16 is important as well, especially since the test outputs all 3.
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It seems the bf16 requirement is a hard-coded constraint.
Extending support would probably fit better with a follow up PR perhaps?
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| def _select_mxfp4_storage_for_layout(A, transa, B, transb): | ||
| """Select TE MXFP4 data and scales for a layout. |
| B_words = as_words(B, N, k_words) | ||
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| # physical chunks of this lane's logical chunks khalf and khalf + 2 (same for all its rows) | ||
| swz = (l16 // 4) % SWZ_CHUNKS |
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116 is ambiguous here, can we use a const var name?
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Ah it is "L"16, that is a bit hard to read.
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Yeah you're right, this isn't obvious, so I renamed it to lane_mod16 in 126f1dd
Description
Adds MXFP4 dense GEMM support for gfx1250 as part of the FlyDSL GEMM backend for training. Preliminary support does not have activation/bias, which is intended for a follow-up PR.
The GEMM backend requires plain scales and data, and performs scale shuffles and swizzles internally. The scales are shuffled into iteration-major order. The operand matrices are pre-swizzled at the scale-block level before the GEMM to work with TDM loads.
Fixes AMD-ROCm-Internal/frameworks-internal#394
Pipeline structure
All operands stream through LDS with no K-dependent allocation; total LDS use is a constant 144 KB.
Performance
https://github.com/AMD-ROCm-Internal/frameworks-internal/issues/394#issuecomment-6525965976
Type of change
Changes
Please list the changes introduced in this PR:
Checklist: