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11 workflow runs

Allo AIE (XDNA1) Weekly Test
cancelled:
Allo AIE (XDNA1) Weekly Test#4:Scheduled
main
Oct 25, 20261d 0h 0m 1s
Allo FPGA Weekly Test
cancelled:
Allo FPGA Weekly Test#5:Scheduled
main
Oct 25, 20261d 0h 0m 2s
Allo AIE (XDNA1) Weekly Test
cancelled:
Allo AIE (XDNA1) Weekly Test#3:Scheduled
main
Oct 18, 20261d 0h 0m 2s
Allo FPGA Weekly Test
cancelled:
Allo FPGA Weekly Test#4:Scheduled
main
Oct 18, 20261d 0h 0m 9s
Allo AIE (XDNA1) Weekly Test
cancelled:
Allo AIE (XDNA1) Weekly Test#2:Scheduled
main
Oct 11, 20261d 0h 0m 1s
Allo FPGA Weekly Test
cancelled:
Allo FPGA Weekly Test#3:Scheduled
main
Oct 11, 20261d 0h 0m 2s
Allo AIE (XDNA1) Weekly Test
cancelled:
Allo AIE (XDNA1) Weekly Test#1:Scheduled
main
Oct 4, 20261d 0h 0m 2s
Allo FPGA Weekly Test
cancelled:
Allo FPGA Weekly Test#2:Scheduled
main
Oct 4, 20261d 0h 0m 2s
merge two pr into one
failed:
Allo FPGA Weekly Test#1:Commit328e0e9pushedbyRuizeYu05
two_fa
Sep 30, 2026Failure
[Bugfix][IR][HLS] Preserve unsigned bit-slice types during HLS codege…
cancelled:
Allo Test#1:Commit094ab41pushedbyRuizeYu05
main
Sep 30, 20261d 0h 0m 2s
[Bugfix][IR][HLS] Preserve unsigned bit-slice types during HLS codege…
cancelled:
Build documentation#1:Commit094ab41pushedbyRuizeYu05
main
Sep 30, 20261d 0h 0m 2s