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Vela is a lightweight, scalar-controlled vector coprocessor for VexRiscv, built in SpinalHDL as a foundation for composable tensor acceleration.

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Vela

Vela is a lightweight, scalar-controlled vector coprocessor for VexRiscv, built in SpinalHDL as a foundation for composable tensor acceleration.

Current Status

Vela is still experimental. It is a working hardware lab, not a finished product platform.

  • Vela v1 already has a documented ISA baseline in vela-isa-spec-v1
  • Vela v1 also has a documented microarchitecture baseline in vela-uarch-spec-v1
  • The current RTL generation entry point is sbt "runMain vela.GenVela"
  • Vela is built around a lightweight vector ISA inspired by RVV, but full RVV compatibility is not the goal

Quick Start

This repo is based on Spinal Template Sbt

Generate the current Vela RTL:

sbt "runMain vela.GenVela"

Project Structure

vela
├── build.sbt
├── docs
├── hw
│   ├── gen
│   └── spinal
│       ├── vela
│       └── vexriscv
├── README.md
├── scripts
└── verif

License

MIT. See LICENSE

About

Vela is a lightweight, scalar-controlled vector coprocessor for VexRiscv, built in SpinalHDL as a foundation for composable tensor acceleration.

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