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feat(neuron): Wan2.1/Qwen-Image gaps, LTX-2 port, shared neuron app base and bf16 weight store (replaces #92, #83)
#105minyu-yottalabs opened Oct 20, 2026Collaborator4 of 5 tasks
CUDA F3c Wan: difflet serve for Wan 2.2 measured; Wan on the 400 GB volume, the CLI matrix from it
#104asherliu opened Oct 19, 2026
CUDA F8b: the pod order as one call (create --prefer-first-for: us-east-3 on the volume, then eu) and pod_setup.sh --no-xet for eu pods
#103asherliu opened Oct 19, 2026
CUDA F3c: difflet serve for FLUX.1-dev (measured: served PNGs byte-identical to difflet run) and Wan 2.2 (/v1/videos → MP4) on CUDA; serving observability
#102asherliu opened Oct 19, 2026
CUDA F9c: the Flux e2e over seeds against diffusers' noise floor — measured on 8 seeds (gate A 36.79 dB eager / 38.31 compiled vs 32.40), run_gates.sh flux green; the pod tool attaches the volume (v1 API)
#101asherliu opened Oct 19, 2026
CUDA F4f: --torch-compile for Wan and Flux (32.8 s vs diffusers 43.2; 7.1 s vs 8.3); the Flux single block's proj_out as one gemm; the Flux e2e gate relative to its noise floor
#100asherliu opened Oct 19, 2026
CUDA F4e: the CUDA backend's RMSNorm as one fused kernel — Flux 311.9 → 303.0 ms vs diffusers 292.0, e2e 41.58 dB
#99asherliu opened Oct 19, 2026
CUDA F4c/F4d measured: the Flux DiT gap located; attention_heads tried, no effect, reverted
#98asherliu opened Oct 19, 2026
CUDA F4c: Flux DiT bench vs diffusers on identical inputs (GPU run pending)
#97asherliu opened Oct 19, 2026
CUDA F5c: Flux e2e timings and Flux under --dp on one card (evidence only)
#96asherliu opened Oct 18, 2026
CUDA F2c: the DP router starts every --requests run from an empty queue
#95asherliu opened Oct 18, 2026
CUDA F2b/F4b: serving on two GPUs (--dp-degree), the Wan DiT bench and the fused q/k norm
#94asherliu opened Oct 18, 2026
CUDA F9b: the Wan e2e gate stated relative to the measured noise floor
#93asherliu opened Oct 18, 2026
CUDA backend: Wan e2e noise floor over seeds and the three-model CLI matrix on one pod (F9, stacked on #90)
#91asherliu opened Oct 18, 20262 of 3 tasks
CUDA backend: difflet-cuda-verify skill, Yottalabs pod tooling and the Release 1 → F2 evidence report (F8, stacked on #89)
#90asherliu opened Oct 18, 20263 of 4 tasks
CUDA backend: second card — data-parallel replicas and Wan CFG-parallel under torchrun/NCCL (F2, stacked on #88)
#89asherliu opened Oct 18, 20262 of 3 tasks
CUDA backend: fp32 timestep for Wan, measured — DiT parity gain, e2e hypothesis not supported (F1b, stacked on #87)
#88asherliu opened Oct 18, 20262 of 3 tasks
CUDA backend: Wan 2.2 (T2V-A14B) at tp=1 — both experts resident, true CFG (F1, stacked on #86)
#87asherliu opened Oct 18, 20262 of 3 tasks
CUDA backend: difflet serve for Qwen-Image at tp=1 (F3b, stacked on #85)
#86asherliu opened Oct 18, 20263 tasks done
CUDA backend: Flux (FLUX.1-dev) at tp=1 — neutral Flux modeling + CUDA port (stacked on #84)
#85asherliu opened Oct 18, 2026
CUDA backend: Qwen-Image on one RTX PRO 6000 (Release 1, difflet run, performance)
#84asherliu opened Oct 18, 2026
Fix Wan Neuron video decoding and attention LNC launches
#76dongjiezou-arch opened Oct 11, 2026
TPU: v5e vs trn2 benchmarks on one protocol; README TPU column; ignore artifact media
#65shiyang-opensource opened Sep 12, 2026Collaborator2 of 3 tasks
TPU: port FLUX.1-dev; first cross-device v5e rows
#64shiyang-opensource opened Sep 12, 2026Collaborator2 of 3 tasks
TPU: port LTX-2
#63shiyang-opensource opened Sep 12, 2026Collaborator2 of 3 tasks

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