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1. Design-and-Testing-of-Pipelined-and-Unpipelined-MAC-Unit Design-and-Testing-of-Pipelined-and-Unpipelined-MAC-Unit Public

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2. Design-Verification Design-Verification Public

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3. fp_mac_miniproject1 fp_mac_miniproject1 Public

   Design and Testing of Pipelined and Unpipelined MAC Unit

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4. Logic-Verification-with-UVM Logic-Verification-with-UVM Public

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5. Design-Synthesize-and-Test-Array-Multiplier Design-Synthesize-and-Test-Array-Multiplier Public

   this project aims to create a highly parallel, scalable, and efficient multiplier design suitable for deployment on FPGA platforms

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6. Elevator_Project_Verilog_Design Elevator_Project_Verilog_Design Public