USB4/Thunderbolt imported prerequisites

Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml

@@ -62,6 +62,12 @@ patternProperties:
     type: object
     $ref: /schemas/power/apple,pmgr-pwrstate.yaml#
 
+  "reset-controller@[0-9a-f]+$":
+    description:
+      Reset controller for the CIO (USB4/Thunderbolt) blocks
+    type: object
+    $ref: /schemas/reset/apple,t8103-cio-reset.yaml#
+
 required:
   - compatible
   - reg

Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml

@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/apple,t8103-cio-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple SoC CIO (USB4/Thunderbolt) block reset controller
+
+maintainers:
+  - Sven Peter <sven@kernel.org>
+
+description: |
+  The CIO (Converged I/O) blocks on Apple Silicon SoCs have a reset
+  inside the power manager (PMGR) that has to be deasserted before
+  their co-processor can be booted. On t8103 each port comes with a
+  dedicated register page, represented as a standalone node. On t600x a
+  single register shared by all ports of a die with one request bit per
+  port is used instead. Since this register is located in the middle of
+  the PMGR MMIO region it is represented as a sub-node of the PMGR
+  syscon with reg used as an offset into it.
+
+  In both cases the reset id is the CIO port index on the die.
+
+properties:
+  compatible:
+    oneOf:
+      - enum:
+          - apple,t8103-cio-reset
+          - apple,t6000-cio-reset
+      - items:
+          - const: apple,t8112-cio-reset
+          - const: apple,t8103-cio-reset
+      - items:
+          - const: apple,t6020-cio-reset
+          - const: apple,t6000-cio-reset
+
+  reg:
+    maxItems: 1
+
+  '#reset-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        reset-controller@23b784000 {
+            compatible = "apple,t8103-cio-reset";
+            reg = <0x2 0x3b784000 0x0 0x8000>;
+            #reset-cells = <1>;
+        };
+    };
+  - |
+    power-management@28e080000 {
+        compatible = "apple,t6000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+        reg = <0x8e080000 0x1c000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        reset-controller@1a034 {
+            compatible = "apple,t6000-cio-reset";
+            reg = <0x1a034 0x4>;
+            #reset-cells = <1>;
+        };
+    };

Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml

@@ -0,0 +1,218 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/thunderbolt/apple,t8103-usb4-acio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple Silicon USB4/Thunderbolt Host Router (ACIO)
+
+maintainers:
+  - Sven Peter <sven@kernel.org>
+
+description: |
+  Each Type-C port with USB4/Thunderbolt support on Apple Silicon SoCs has a
+  host router complex called ACIO (Apple Converged I/O). It contains a
+  Cortex-M3 co-processor, the hardware blocks implementing the USB4 router
+  and its PCIe, USB3 and DisplayPort adapters.
+
+  The co-processor exposes the Native Host Interface (NHI) and its DART IOMMU
+  to the main SoC bus once it is running. They are therefore represented as
+  child nodes. All child registers are located in a single 16 MiB MMIO window
+  and use addresses relative to this window.
+
+  ACIO can only be powered on after the Type-C PHY has been switched to
+  USB4/Thunderbolt mode. Before the connection to the remote device can be
+  established the Type-C PD controller has to pass the cable information
+  through the thunderbolt-switch connection.
+
+properties:
+  compatible:
+    oneOf:
+      - const: apple,t8103-usb4-acio
+      - items:
+          - enum:
+              - apple,t6000-usb4-acio
+              - apple,t6020-usb4-acio
+              - apple,t6030-usb4-acio
+              - apple,t6031-usb4-acio
+              - apple,t8112-usb4-acio
+              - apple,t8122-usb4-acio
+          - const: apple,t8103-usb4-acio
+
+  reg:
+    items:
+      - description: Root complex and co-processor control registers
+      - description: SRAM used for communication with the co-processor
+
+  reg-names:
+    items:
+      - const: rc
+      - const: sram
+
+  mboxes:
+    maxItems: 1
+    description: Mailbox used for RTKit communication with the co-processor
+
+  resets:
+    maxItems: 1
+    description: Reset used to start the ACIO block before booting the
+      co-processor
+
+  power-domains:
+    minItems: 3
+    maxItems: 3
+
+  thunderbolt-switch: true
+
+  apple,tunable-rc:
+    $ref: /schemas/types.yaml#/definitions/uint32-matrix
+    items:
+      items:
+        - description: Register offset
+        - description: Mask of bits to clear
+        - description: Bits to set
+    description: |
+      List of (register offset, mask, value) tuples copied from Apple's Device
+      Tree, converted by the bootloader and used to configure the root complex
+      after the co-processor has booted.
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+  ranges:
+    maxItems: 1
+    description: Single 16 MiB MMIO window containing all child registers
+
+  nonposted-mmio: true
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+    description:
+      OF graph ports for the USB4 router. The port numbers correspond to the
+      USB4 router adapter numbers.
+    properties:
+      port@1:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: USB4 port connected to the USB Type-C connector
+
+      # port@2 is the second, unused USB4 port of the host router
+
+      port@3:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: PCIe adapter
+
+      port@4:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: USB3 adapter
+
+      port@5:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: First DP IN adapter
+
+      port@6:
+        $ref: /schemas/graph.yaml#/properties/port
+        description: Second DP IN adapter
+
+    required:
+      - port@1
+
+  iommu@a80000:
+    $ref: /schemas/iommu/apple,dart.yaml#
+    description: DART IOMMU exposed by ACIO and used for DMA from the NHI
+
+  nhi@f00000:
+    $ref: /schemas/thunderbolt/apple,t8103-usb4-nhi.yaml#
+    description: Native Host Interface exposed by ACIO
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - mboxes
+  - power-domains
+  - resets
+  - thunderbolt-switch
+  - '#address-cells'
+  - '#size-cells'
+  - ranges
+  - nonposted-mmio
+  - ports
+  - iommu@a80000
+  - nhi@f00000
+
+allOf:
+  - $ref: /schemas/usb/usb-switch.yaml#
+
+additionalProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        cio@501ac0000 {
+            compatible = "apple,t8103-usb4-acio";
+            reg = <0x5 0x01ac0000 0x0 0xc000>,
+                  <0x5 0x01080000 0x0 0x20000>;
+            reg-names = "rc", "sram";
+            mboxes = <&usb4_1_mbox>;
+            power-domains = <&ps_atc1_cio>,
+                            <&ps_atc1_cio_pcie>,
+                            <&ps_atc1_cio_usb>;
+            resets = <&cio_reset 1>;
+            thunderbolt-switch;
+            pinctrl-0 = <&acio1_pins>;
+            pinctrl-names = "default";
+            #address-cells = <1>;
+            #size-cells = <1>;
+            ranges = <0x0 0x5 0x01000000 0x1000000>;
+            nonposted-mmio;
+
+            ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@1 {
+                    reg = <1>;
+                    endpoint {
+                        remote-endpoint = <&typec1_con_tbt>;
+                    };
+                };
+            };
+
+            usb4_1_dart: iommu@a80000 {
+                compatible = "apple,t8103-dart";
+                reg = <0xa80000 0x4000>;
+                interrupt-parent = <&aic>;
+                interrupts = <1 890 4>;
+                #iommu-cells = <1>;
+            };
+
+            nhi@f00000 {
+                compatible = "apple,t8103-usb4-nhi";
+                reg = <0xf00000 0x100000>,
+                      <0xdb0000 0x30004>;
+                reg-names = "nhi", "pdf";
+                interrupt-parent = <&aic>;
+                interrupts = <1 863 4>, <1 864 4>, <1 865 4>, <1 866 4>,
+                             <1 867 4>, <1 868 4>, <1 869 4>, <1 870 4>,
+                             <1 871 4>, <1 872 4>, <1 873 4>, <1 874 4>,
+                             <1 875 4>, <1 876 4>, <1 877 4>, <1 878 4>,
+                             <1 879 4>, <1 880 4>, <1 881 4>, <1 882 4>,
+                             <1 883 4>, <1 884 4>, <1 885 4>, <1 886 4>;
+                interrupt-names = "txring0", "txring1", "txring2", "txring3",
+                                  "txring4", "txring5", "txring6", "txring7",
+                                  "txring8", "txring9", "txring10", "txring11",
+                                  "rxring0", "rxring1", "rxring2", "rxring3",
+                                  "rxring4", "rxring5", "rxring6", "rxring7",
+                                  "rxring8", "rxring9", "rxring10", "rxring11";
+                iommus = <&usb4_1_dart 1>;
+                /* To be filled by the loader */
+                apple,thunderbolt-drom = [00];
+            };
+        };
+    };