Company website · Contact: jeff.hong@cadmen.com
將高頻模擬轉化為工程自動化。
I build practical HFSS, SIwave, and PyAEDT tools for PCB signal-integrity analysis and electromagnetic engineering workflows.
我使用 HFSS、SIwave 與 PyAEDT，為 PCB 訊號完整性分析及高頻電磁工程流程打造實用的自動化工具。
- Ansys HFSS and SIwave workflows
- PyAEDT / EDB automation
- PCB signal integrity analysis
- S-parameter and Eye Diagram analysis
- Engineering GUI and workflow automation
A visual engineering toolkit for PCB layout inspection, 3D visualization, signal-net selection, port preparation, and S-parameter analysis workflows.
| Project | Focus |
|---|---|
| via-optimization-wizard | Four-step wizard for Ansys optiSLang multi-objective PCB via optimization (PyAEDT + PyEDB + PyOptiSLang) |
| edb-q2d-cross-section-toolkit | EDB to Q2D cross-section extraction: draw a cut line on the layout, rebuild the real cross-section for characteristic impedance |
| hfss-funnel-via-toolkit | Funnel-via structure generation and analysis for HFSS 3D Layout |
| pcb-simplifier-toolkit | Net-based PCB layout simplification with 2D/3D preview |
| metasurface-toolkit-web | Metasurface reflectarray design automation built on Ansys HFSS + PyAEDT |
- HFSS / SIwave automation
- PCB signal-integrity tools
- Engineering GUI and workflow development
Professional simulation services and technical engagements are conducted through Taiwan Auto-Design Co. (TADC), using company-provided Ansys resources and licenses.
模擬服務與技術合作將透過虎門科技進行，並使用公司提供的 Ansys 資源與授權。
This is Jeff Hong's personal technical portfolio. It is not an official account of Taiwan Auto-Design Co. (TADC). Ansys is a trademark of Ansys, Inc.; this portfolio is not officially affiliated with Ansys, Inc.
本頁為 Jeff Hong 個人技術作品集，非 Taiwan Auto-Design Co. (TADC) 官方帳號。Ansys 為 Ansys, Inc. 的商標；本作品集與 Ansys, Inc. 沒有官方隸屬關係。
Source code and visual assets are provided for demonstration purposes only. Commercial use, redistribution, and derivative works require permission.