This code makes use of timers in wave generation mode to create VSYNC, HSYNC and DCLK@12MHz to drive NHD-4.3-480272EF-ASXN display. Due to lack of computation speed, the project was moved from Atmel SAMC21 to SAMV71 able to support full resolution and required IO.
This repository was archived by the owner on Nov 7, 2018. It is now read-only.