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x86: do not use TSC as cycle count #88

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x86: do not use TSC as cycle count #88

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6 changes: 0 additions & 6 deletions apps/sel4bench/src/plat/pc99/plat.c
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Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,4 @@

void plat_setup(env_t *env)
{
if (config_set(CONFIG_ARCH_X86_64)) {
/* check if the cpu supports rdtscp */
int edx = 0;
asm volatile("cpuid":"=d"(edx):"a"(0x80000001):"ecx");
ZF_LOGF_IF((edx & (BIT(27))) == 0, "CPU does not support rdtscp instruction");
}
}
27 changes: 2 additions & 25 deletions libsel4benchsupport/sel4_arch_include/x86_64/sel4_arch/ipc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -162,31 +162,8 @@
} while (0)
#endif /* CONFIG_KERNEL_MCS */

#define READ_COUNTER_BEFORE(var) do { \
uint32_t low, high; \
asm volatile( \
"cpuid \n" \
"rdtsc \n" \
"movl %%edx, %0 \n" \
"movl %%eax, %1 \n" \
: "=r"(high), "=r"(low) \
: \
: "%rax", "%rbx", "%rcx", "%rdx"); \
(var) = (((uint64_t)high) << 32ull) | ((uint64_t)low); \
} while (0)

#define READ_COUNTER_AFTER(var) do { \
uint32_t low, high; \
asm volatile( \
"rdtscp \n" \
"movl %%edx, %0 \n" \
"movl %%eax, %1 \n" \
"cpuid \n" \
: "=r"(high), "=r"(low) \
: \
: "%rax", "rbx", "%rcx", "%rdx"); \
(var) = (((uint64_t)high) << 32ull) | ((uint64_t)low); \
} while (0)
#define READ_COUNTER_BEFORE SEL4BENCH_READ_CCNT
#define READ_COUNTER_AFTER SEL4BENCH_READ_CCNT

#define DO_REAL_CALL(ep, tag) DO_CALL(ep, tag, "syscall")
#define DO_NOP_CALL(ep, tag) DO_CALL(ep, tag, ".byte 0x66\n.byte 0x90")
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