target-arm: AArch32 VFP arithmetic and conversions

[tamnd]

The second AArch32 slice: the VFP data processing instructions of QEMU's translate-vfp.c.

• vfp.decode and vfp-uncond.decode decode the VFP space. The dispatch follows QEMU: A32 unconditional space tries disas_vfp_uncond, conditional space tries disas_vfp, and T32 tries both (the conditional decoder only for 0xe in the top nibble).
• The VFP translator moves out of translate_a32.rs into translate_a32/fp.rs, which adds the half, single and double precision arithmetic (VADD to VDIV, VMLA, VMLS, VNMLA, VNMLS, VNMUL), the fused forms, VABS, VNEG, VSQRT, VCMP and VCMPE, VMOV immediate and register, VRINTR/Z/X, all the VCVT forms (integer, fixed point, f16 and precision), the half precision loads, stores and moves, and the v8 unconditional VSEL, VMAXNM, VMINNM, VRINT{A,N,P,M}, VCVT{A,N,P,M}, VMOVX and VINS.
• The arithmetic runs in one helper, a32_vfp in tcg/a32_vfp.rs, which takes the operation, element size, rounding mode and immediate in a descriptor. It uses the A64 float status pair, so FPSCR rounding, FZ, DN, AHP and the cumulative flags behave as in QEMU.

Still UNDEF: Neon, the BF16 VCVT, VJCVT and the VFP short vectors.

Tested with a static armhf program that runs every arithmetic, fused, compare, rounding and conversion form over 19 special values (zeros, denormals, infinities, NaNs, rounding boundaries) and checks results and FPSCR flags under each rounding mode, FZ, DN and AHP. Its output matches QEMU 11.1's qemu-arm exactly. The static hello still runs. Workspace clippy (native and x86_64 Linux), fmt, the xtask checks, the Windows check, and the target-arm, machine-arm and linux-user tests pass.

Part of #8.