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Simulate a flattened netlist of the component - #67

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Rn86222 merged 6 commits into
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netlist-simulation
Nov 14, 2026
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Rn86222 merged 6 commits into
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netlist-simulation

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@Rn86222 Rn86222 commented Oct 31, 2026 •

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Rework the simulation so that a circuit can contain a feedback loop through a flip-flop, including one that runs through a user-defined component.

The first three commits are taken from the WIP commit 788b5c9 on wip-simulation-netlist by @chelproc, split by concern. The change that disables pin property editing outside edit mode is left there.

  • Flatten the component hierarchy into intrinsic node instances and nets, sort them by dependency and evaluate them time step by time step (src/store/netlist.ts). The netlist is cached against a new store revision counter.
  • Report a loop without a flip-flop (SimulationCombinationalLoopError) and an unconnected input pin (SimulationUnconnectedPinError) instead of hanging, and show the error in the editor, falling back to edit mode.
  • Make the evaluation of intrinsic components pure functions. evaluate and isSequential are replaced with a behavior that is either combinational (from the current inputs) or sequential (from the inputs of the previous time step, without access to the current ones). Input and Output have no behavior, as they are resolved away while flattening.

Testing

  • Unit tests for the simulation (src/store/simulation.test.ts) and the evaluation of each intrinsic (src/store/intrinsics/definitions.test.ts); tsc and the tests pass on every commit.

🤖 Generated with Claude Code

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@Rn86222
Rn86222 force-pushed the netlist-simulation branch 2 times, most recently from b4ee612 to 83b396a Compare November 14, 2026 01:49
@Rn86222 Rn86222 changed the title Simulate a flattened netlist and keep connections consistent with bit widths Simulate a flattened netlist of the component Nov 14, 2026
chelproc and others added 6 commits November 14, 2026 10:50
Add a revision counter to CCStore that increases on every change to the
circuit (components, component pins, node registration and config,
node pins, connections). Moving a node does not change the circuit, so
it does not count. Anything derived from the circuit can be cached
against this number.

Extracted from 788b5c9 (WIP: netlist-based simulation).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Replace the recursive per-component evaluation with a netlist built from
the store: the component hierarchy is flattened into intrinsic node
instances, pins carrying the same value are grouped into nets, and the
instances are sorted so that each one is evaluated after its drivers.

Intrinsic components can now be marked as sequential. A sequential
instance (the FlipFlop) derives its outputs from the previous time step,
so it does not wait for its inputs, which lets a circuit contain a
feedback loop through it, including one that runs through a
user-defined component. A loop without one is reported as a
SimulationCombinationalLoopError instead of hanging, and an unconnected
input pin as a SimulationUnconnectedPinError.

The netlist is cached against the store revision, and the editor keys
its frame cache on the revision and the input values only.

Extracted from 788b5c9 (WIP: netlist-based simulation).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
When the circuit cannot be simulated, for example because a loop has no
flip-flop to break it or an input pin is unconnected, keep the error
message in the editor store, switch back to edit mode and show the
message in a snackbar. A failed circuit is not simulated again until it
or its input values change, or the editor mode is switched.

Extracted from 788b5c9 (WIP: netlist-based simulation).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
The evaluation functions of the intrinsic components were still written
against the per-component frames of the old simulation, so the netlist
simulation wrapped every instance in a frame holding that one node,
let the function write its outputs into it and read them back.

Replace `evaluate` and `isSequential` with a `behavior` that is either
combinational, computing the outputs from the current inputs, or
sequential, computing them from the inputs of the previous time step.
A sequential behavior cannot see the current inputs at all, since it
is evaluated before they are known. Input and Output have no behavior,
as they are resolved away while flattening.

The simulation now hands the input values grouped by pin key to the
function and writes the returned values to the nets. Errors thrown
while evaluating are rethrown with the instance they come from.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Now that the evaluation functions are pure, cover each intrinsic on its
own: the bitwise operators, the constants, Aggregate/Decompose/Broadcast,
the AndN/OrN reductions, the initial value of the FlipFlop, and which
intrinsics are sequential or have no behavior at all.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Follow #63 in the netlist module, which was added after the rest of the
codebase had been migrated.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
@Rn86222
Rn86222 merged commit af1e597 into main Nov 14, 2026
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