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LightX2VRun — GFX1201 timing entries

The active LightX2V branch is hvat-gfx1201-R9600. The unified default build and runtime image is lightx2v-rocm:hvat-gfx1201-R9600. Rebuild this unified image whenever the integration changes so that the source, dependencies, and model entrypoints remain aligned. This repository and the HVAT adaptations define the LTX2.3, LTX2.5, Wan2.1, Wan2.2, and MiniMax-H3 model/weight contracts.

For the AMD handoff, start with the MiniMax-H3 full BF16 Ref2AV reproducibility guide. The AITER commits visible under the yangecool GitHub account are not the latest HVAT internal enterprise source used for the release image. Code merging is in progress; the embedded wheel is the current executable contract, and HVAT will provide the corresponding source patch after the merge completes.

The active interface contains the numbered timing tasks below plus explicit model production entries for MiniMax-H3 and LTX-2.3. Every entry freezes its workload in a model-specific launcher and emits rank-critical evidence.

No. Entry Workload Default GPU counts
01 scripts/run_01_wan21_720p_81f_16fps_1gpu.sh Wan2.1, 720P, 81f, 16 FPS 1
02 scripts/run_02_wan21_720p_81f_16fps_scale.sh Wan2.1, 720P, 81f, 16 FPS 1/2/4/8/16
04 scripts/run_04_wan22_480p_81f_16fps_scale.sh Wan2.2, 480P, 81f, 16 FPS 2/4/8/16
05 scripts/run_05_wan22_480p_121f_24fps_scale.sh Wan2.2, 480P, 121f, 24 FPS 2/4/8/16
06 scripts/run_06_wan22_720p_81f_16fps_scale.sh Wan2.2, 720P, 81f, 16 FPS 2/4/8/16
07 scripts/run_07_wan22_720p_121f_24fps_scale.sh Wan2.2, 720P, 121f, 24 FPS 2/4/8/16
08 scripts/run_08_minimax_h3_768p_124f_24fps_scale.sh MiniMax-H3, 1344x768, 124f, 24 FPS 2/4/8/16
09 scripts/run_09_minimax_h3_480p_124f_24fps_scale.sh MiniMax-H3, 832x480, 124f, 24 FPS 2/4/8/16
10 scripts/run_10_minimax_h3_bf16_ref2v.sh H3 full BF16 Ref2AV, no LoRA, 1344x768, 15 seconds default 2; supports 1/2/4/8/16
10 scripts/run_10_ltx25_c1_704x1280_121f_24fps_scale.sh LTX-2.5 C1, 1280x704, 121f, 24 FPS 2/4/8/16
11 scripts/run_11_minimax_h3_bf16_ref2v_768p_15s_scale.sh H3 full BF16 Ref2AV scale, no LoRA, 1344x768, 15 seconds 2/4/8/16
12 scripts/run_12_minimax_h3_ref2av_8step_768p_15s.sh H3 Ref2AV Turbo 8-step dynamic LoRA, 1344x768, 15 seconds default 4; supports 1/2/4/8/16

LTX-2.3 Distilled FP8 B0

The LTX-2.3 B0 entry is fixed at two gfx1201 GPUs, 704x1280 final output, 352x640 Stage 1, 121 frames at 24 FPS, and the official 8+3-step two-stage schedule. It uses Torch Ulysses SP2, torch._scaled_mm for static-scalar FP8, Torch SDPA, and Torch norm/RoPE/modulate. Gemma, DiT, and VAE residency is phase-serialized because Ulysses SP2 does not pool the two cards into one 64 GiB address space. There is no FPS selector.

Expected host assets:

/disk/ssd/difumodels-Dis/LTX-2.3-fp8/
├── ltx-2.3-22b-distilled-fp8.safetensors
├── ltx-2.3-spatial-upscaler-x2-1.1.safetensors
└── gemma-3-12b-it-qat-q4_0-unquantized/
    ├── model-00001-of-00005.safetensors ... model-00005-of-00005.safetensors
    ├── model.safetensors.index.json
    ├── config.json
    ├── tokenizer.model
    └── preprocessor_config.json

Run the strict host/image/RCCL/exact-shape preflight first:

bash scripts/run_ltx23_fp8_b0_704x1280_5s.sh \
  --image IMAGE \
  --gpus 0,1 \
  --preflight-only

Remove --preflight-only for the full T2AV run. Collector is enabled by default and writes both rank-local schema-2 reports, host before/after snapshots, memory JSONL, ffprobe data, and a strict summary.json. --no-collect disables observers but never disables the safety preflight. The output must be 1280x704, 121 frames at 24 FPS, with video and audio streams.

LTX-2.5 CollectorUltra

LTX25-CollectorUltra.sh is the single host entry that prepares exact input contracts for the isolated C1 MegaOlympics. It runs the frozen two-GPU 704x1280, 121-frame, 24 FPS, 8+3-step reference route in the standard ROCm container and additionally requires all of the following before it emits CONTRACT_ULTRA_COMPLETE:

  • projected L1 Q/K/V tensor contracts at the functional attention boundary;
  • RoPE cos/sin frequency tensor contracts;
  • GroupNorm num_groups and channel parameters;
  • Ulysses all-to-all input/output payload metadata and group size.

Run it on the Docker host:

bash scripts/collector/LTX25-CollectorUltra.sh \
  --image IMAGE \
  --gpus 0,1

The launcher follows the same source-direct pattern as the Aiter tuning entries: it fetches hvat-gfx1201-R9600 from the LightX2V origin into a managed cache, checks out the resolved commit, records its SHA, and mounts that exact tree read-only for direct execution. This avoids an image rebuild and does not require a source-path argument. LTX25_LIGHTX2V_GIT_URL, LTX25_LIGHTX2V_REF, and LTX25_LIGHTX2V_GIT_DIR override the managed source only when needed. Git submodules are deliberately left uninitialized because the LTX-2.5 runtime does not use the ROS simulator dependencies.

The collector observes metadata only, does not synchronize the accelerator, does not retain tensor payloads, does not select a C1 backend, and does not change the numerical route. The current executable Video VAE is still conv_diagnostic; official DiffVAE is recorded as not_executed, and the known black video is never accepted as a quality baseline or selector promotion gate.

LTX-2.5 C1 runtime and scale

The C1 model entry stays in this run repository; offline GEMM cache crafting and Conv3D HotXX selection stay in aiter-tune-gfx1201/tune. Run the existing SP2 model check from the Docker host with:

bash scripts/run_ltx25_c1_704x1280_5s.sh \
  --image IMAGE \
  --gpus 0,1

Run the 2/4/8/16 scale sweep with one rebuilt image:

bash scripts/run_10_ltx25_c1_704x1280_121f_24fps_scale.sh \
  --image IMAGE

Number 10 is the canonical LTX-2.5 scale entry and runs 2/4/8/16 GPUs in sequence by default. To select the result directory and run only SP2:

TIMING_RESULT_DIR=/disk/ssd/lightx2v-runtime/ltx25-scale-sp2-001 \
bash scripts/run_10_ltx25_c1_704x1280_121f_24fps_scale.sh \
  --image IMAGE \
  --gpu-count 2

The default sweep is --counts 2,4,8,16. Use --gpu-count 2, 4, 8, or 16 for one arm. Every arm is a separate container run with its own video, runtime config, prompt cache, Conv3D route reports, log, and memory report.

All four supported sizes use pure Ulysses. LTX-2.5 has 32 video heads, so the post-A2A native Sage cores have H16/H8/H4/H2 at SP2/SP4/SP8/SP16. LightX2V's generic Ulysses path checks head divisibility, pads and shards sequence tokens, and gathers the result; Aiter's B1/D128 shape-family selector remains responsible for choosing its aligned/tail schedule. Neither repository carries an exact LTX scale-shape allowlist.

The integrated image contains one verified SP2/4/8/16 GEMM union cache at both rank-local TunableOp filenames: 44 selected workloads produced 34 concrete identities and read-only replay had zero misses. SP4/SP8/SP16 materialize the same cache into ephemeral rank-local paths; runtime tuning and untuned recording stay disabled. --tunableop-cache FILE remains available as a read-only host override. --lightx2v-source DIR likewise remains available for source iteration, but is not part of the normal image run.

The video_self role uses the shared native gfx1201 SageAttention2 adapter. The SP2 focused race and SP4/8/16 scale race cover H16/H8/H4/H2. All six new scale contracts passed all 16 numeric replicas; Sage was at least 1.7448x faster than public MHA. LightX2V selects Sage by semantic role and does not carry an exact-shape table; Aiter remains the sole schedule selector.

ltx25-scale-collector-008 completed the image E2E sweep at SP4/SP8/SP16. All three arms completed 8+3 steps, saved MP4 files, activated native Sage, TunableOp replay, strict RoPE, distributed Video VAE, and the prebuilt Aiter CK Conv3D module, with no runtime error or CK-unavailable/Torch-fallback warning:

SP DiT 11 steps VAE Decoder RUN pipeline Total
4 62.894 s 9.523 s 78.627 s 78.631 s
8 89.235 s 7.597 s 103.167 s 103.169 s
16 150.443 s 7.585 s 164.015 s 164.017 s

This small 11-step workload is communication-bound beyond SP4: SP8 and SP16 take 1.312x and 2.086x the SP4 total time. Distributed VAE improves by about 20.2% at SP8 and then plateaus. The maximum physical per-GPU usage is about 17.41 GiB in every arm, below the approximately 31.86 GiB physical capacity, and no swap activity was observed. SP4 is therefore the latency recommendation; SP8/SP16 remain validated capacity/execution options.

An Aiter internal AOT generic/catalog/Hot selector result is a valid CK route, not a Torch fallback, and is permitted for new tile shapes without an exact-shape gate. The attached evidence did not include the output videos for visual seam or quality review, and the route is still conv_diagnostic; these runs are runtime evidence, not official DiffVAE or model-quality acceptance.

The normal image contains the merged Conv3D CSV and Hot29--Hot31 AOT aliases. For a later experimental selector artifact, override it with:

  --conv3d-csv /path/to/conv3d_v1_tuned.csv

LTX Conv3D replays an exact tuned-CSV Hot when present. New contracts remain inside Aiter and use its AOT generic/catalog/Hot selector; Torch is only the last-resort path when the CK public operator cannot execute the contract.

SP4/SP8/SP16 distribute the official Video VAE over the same torchrun world: each rank decodes one overlapping spatial tile, rank 0 receives tiles through RCCL point-to-point operations and blends them in BF16 before uint8 conversion. SP2 keeps the previously validated rank-0 tiled decode as the comparison arm.

MiniMax-H3 gfx1201 is a production entry. Its default FL2V first and last frames are read-only host inputs at /disk/ssd/lightx2v-runtime/inputs/STRAT_FL2V.png and /disk/ssd/lightx2v-runtime/inputs/END_FL2V.png, so only the image and GPU ids are required:

bash scripts/run_minimax_h3_fl2av_4step_768p.sh \
  --image IMAGE \
  --preflight-only

Remove --preflight-only to run inference. The default run requests 1344x768 output at 24 FPS for 124 frames (about 5.17 seconds); --smoke keeps the same duration and uses 480x480. The default bird-stable prompt follows MiniMax's FL2VA Context-IR structure and is tailored to the published blue-bird first/last frames. It uses one continuous takeoff shot, explicit keyframe timing, identity constraints, and synchronized natural sound. The launcher renders the final keyframe mark as 5.17 seconds for every H3 test.

H3 preflight treats a ROCm version other than the validated 7.2 baseline and missing source/PatchEmbed metadata as warnings for ordinary test runs. Hardware, weights, required kernels, and parallel topology are still checked; SP16-specific Ring/LSE APIs are required only for SP16. --collect still requires compatible collector metadata. Numbered timing sweeps clear inherited smoke/preflight flags and preserve image-baked source revisions.

The gfx1201 production overlay routes H3 Core Attention through Aiter SageAttention2 (aiter_fav3_sage_bf16_attn / sage_attn_v2_gfx1201), H1/Refiner and H4 Video Attention through canonical aiter_triton_mha, H3 Core Q/K normalization through minimax_h3_aiter_triton_qk, and H3 Core RoPE through strict/no-FMA minimax_h3_triton_strict_rope. Core Dense GEMM and FL2AV's dynamic rank-128 LoRA remain on the measured torch.mm path using PyTorch's default ROCm BLAS heuristic (hipBLASLt on the collected hot shapes). Ref2AV Turbo 8-step uses the same dynamic path, while its rank and exact M/K/N contracts are recorded from the real checkpoint by the first collector E2E. The H3 launcher explicitly disables TunableOp and does not load a tuning cache: its weighted gain was only 1.035x and QKV LoRA-up regressed. Preflight executes only static/runtime contracts during a normal inference start; --preflight-only additionally executes both Attention kernels and the real distributed-to-Sage adapter.

The native Sage schedule selector lives in Aiter. LightX2V deliberately passes only {"backend":"sage_attn_v2_gfx1201"} so Aiter can route from the actual BSHD:

automatic B1/D128 with a key tail -> p8kv_res8_peel
automatic B1/D128 without a tail  -> tuned no-tail schedule
explicit tuning mappings          -> caller-selected schedule

The exact H3 Ulysses shapes [1,42196,28,128], [1,42196,14,128], and [1,42196,7,128] are used by SP2/SP4/SP8. CP2xU8 SP16 uses seven heads per U8 shard; its dominant square calls are [1,21096,7,128] and [1,21100,7,128], both on p8kv_res8_peel. The two-row rectangular auxiliary remains on its explicit cross-attention route.

Run the production 2/4/8/16-card timing sweep and write the same CSV/Markdown table used by Wan2.2:

bash scripts/run_08_minimax_h3_768p_124f_24fps_scale.sh \
  --image IMAGE

SP2/SP4/SP8 use Ulysses and SP16 uses CP2xU8. The workload is frozen at 1344x768, 124 frames, 24 FPS, and approximately 5.17 seconds.

Runtime status uses one stable LightX2V format:

[Runtime] kind=route    model=minimax_h3 stage=H3-Core component=dit.core.rope status=configured backend=minimax_h3_triton_strict_rope rank=0/2
[Runtime] kind=dispatch model=minimax_h3 stage=H3-Core component=dit.core.rope status=active backend=minimax_h3_triton_strict_rope rank=0/2 ...
[Runtime] kind=stage    model=minimax_h3 stage=H4 component=video_vae.decode status=start rank=0/2

route is the resolved plan, dispatch confirms the first real tensor hit (or reports status=fallback), and stage tracks lifecycle progress. Route and stage events are rank-0-only; dispatch evidence is emitted once per process rank. The same lightx2v_platform.base.BackendLogger can be instantiated or subclassed by other models and backends. Run summaries retain all normalized events under runtime_events while still accepting historical [H3Stage] logs.

Two additional prompts support controlled comparisons without editing shell variables:

# More camera and takeoff motion
bash scripts/run_minimax_h3_fl2av_4step_768p.sh \
  --image IMAGE --prompt-preset bird-dynamic

# Stronger synchronized sound design and non-diegetic music
bash scripts/run_minimax_h3_fl2av_4step_768p.sh \
  --image IMAGE --prompt-preset bird-audio

--prompt-file FILE accepts another complete H3 prompt, while PROMPT remains the highest-priority override. The selected prompt and source are stored in run_manifest.json. Prompt presets live in prompts/minimax_h3/ and are read through the mounted LightX2VRun checkout, so prompt-only updates do not require an image rebuild.

Pass both --first-frame and --last-frame only when overriding the default host images. The default GPU set is 0,1,2,3, using pure Ulysses SP4 plus VAE tile parallelism; TP and Qwen text-encoder TP remain disabled. --gpus 0 and --gpus 0,1 remain available.

Use --collect for one H3 backend-selection run:

bash scripts/run_minimax_h3_fl2av_4step_768p.sh \
  --image IMAGE --gpus 0,1 --collect

For Sage shape collection only, do not use --collect. The Sage adapter already emits one normalized first-real-dispatch event per rank. The dedicated Run sweep runs the frozen 1344x768, 124-frame workload sequentially at Ulysses SP4, Ulysses SP8, and CP2xU8 SP16, checks every rank, reconstructs the 2D path's exact internal kernel contracts, and writes sage_shapes.json:

cd /path/to/LightX2VRun

bash scripts/collector/run_minimax_h3_sage_shape_sweep.sh \
  --image IMAGE

The default GPU pool is 0..15; override it with --gpus when needed. The expected Ulysses contracts are [1,42196,14,128] for SP4 and [1,42196,7,128] for SP8. CP2xU8 SP16 reports [1,21098,7,128] for its first local query; the collector combines that with the global sequence to emit the two-row non-final rectangular auxiliary, [1,21096,7,128] main square, and final combined-square contracts. Values come from real runtime dispatches and the sweep fails on missing ranks, route/head mismatches, or cross-rank disagreement.

The schema-2 collector is MiniMax-H3-only and disabled by default. Each rank writes h3_runcollector.rankNNN.json; the launcher also writes h3_t1_summary.json. In addition to H0-H6 and exact operator contracts, T1 records every H3 block's compute/H2D lifecycle, exposed versus overlapped H2D, dynamic LoRA child time, Ulysses communication/layout residual, Refiner and Pre/Core/Post timings, and the remaining elementwise bucket. For each step the cross-rank summary selects the slowest whole rank instead of adding maxima from different ranks. GPU events, Python hooks, and final report materialization add profiling overhead, so a --collect run is not a production performance baseline. The generic result bundle uploader includes these JSON files automatically.

For the system-wide SP8 investigation, use the dedicated SuperCollect entry. It runs only the frozen 1344x768, 124-frame, 24 FPS production workload and keeps BF16 DiT, dynamic LoRA, Ulysses SP8, lazy B1's two CPU/two GPU block buffers, default ROCm BLAS, and the tuned kernels unchanged:

bash scripts/collector/run_minimax_h3_sp8_supercollect.sh \
  --image IMAGE \
  --gpus 0,1,2,3,4,5,6,7

In addition to the normal video, log, manifest, memory JSONL, per-rank schema-2 collectors, and h3_t1_summary.json, the result directory contains read-only before/after host snapshots. Runtime samples include rank page faults, process I/O, CPU/run-queue counters, NUMA placement, host VM/PSI counters, and block device activity. host_prefetch_wait_wall_ms measures blocking on the existing safetensors/page-cache-to-pinned-CPU fill and remains separate from additive GPU metrics. SuperCollect is diagnostic and its latency is not a production timing baseline.

For one observer-only full-stack communication investigation, run MegaDiscovery. It defaults to CP2xU8 SP16 and also accepts exactly eight GPUs for an SP8/Ulysses capture:

bash scripts/collector/run_minimax_h3_megadiscovery.sh \
  --image IMAGE \
  --gpus 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15

MegaDiscovery first runs the unchanged production workload, then starts a short isolated communication process with the exact BF16 production payloads. SP16 evidence covers the two disjoint U8 A2As, eight CP2 single-hop K/V exchanges, both auxiliary gathers, the complete current 2D block transport, and synthetic QKV/KV-fused comparisons. SP8 covers one A2A, the current four-A2A-plus-gather block contract, and a synthetic QKV-fused comparison. Synthetic probes are discovery evidence only; they do not enable fusion or modify production configuration.

The probes normally take one to three minutes and have a default 300-second hard timeout. The probe atomically checkpoints every completed measurement. A probe timeout therefore preserves both the completed production run and any finished transport evidence, then emits a partial diagnosis instead of blocking indefinitely. The result directory adds megadiscovery_collectives.json, megadiscovery_collectives.log, per-process RCCL logs, KFD/PCIe/NUMA before/after snapshots, and megadiscovery.{json,md}. The unified report correlates transport measurements with the schema-2 sequence parallel envelope, exposed H2D, rank spread, current local-rank-to-physical-GPU mapping, subgroup placement, host counters, and memory headroom. Collector latency and isolated 2D transport ceilings remain non-additive diagnostics, not a new production timing baseline.

Package and upload any result directory

scripts/upload_result_bundle.py recursively packages a complete result directory into a deterministic .tar.gz, uploads it to S3/MinIO, and verifies the remote size, SHA256 metadata, and file-count metadata with head_object. It includes hidden files, empty files, and empty directories. Symbolic links and special files are rejected so a result bundle cannot accidentally capture content outside the requested directory.

The default endpoint is http://compiler.hvat-ai.com:9000, the default bucket is aitertunecollection, and the default object prefix is lightx2v/results. MINIO_ACCESS_KEY/MINIO_SECRET_KEY and the standard AWS credential environment variables are both supported. Upload requires boto3; --package-only does not.

Upload the current MiniMax-H3 production result and print a one-day download URL:

export MINIO_ACCESS_KEY=...
export MINIO_SECRET_KEY=...

python3 scripts/upload_result_bundle.py \
  /disk/ssd/lightx2v-runtime/outputs/minimax_h3_fl2av_4step_768p_20260820_180000 \
  --prefix minimax-h3/production \
  --presign-seconds 86400

The default local archive is written beside the source directory as <result-dir>.tar.gz. A caller can choose an exact destination, build without uploading, or replace an explicit local archive:

python3 scripts/upload_result_bundle.py /path/to/results \
  --object-key experiments/run-001.tar.gz

python3 scripts/upload_result_bundle.py /path/to/results --package-only

python3 scripts/upload_result_bundle.py /path/to/results \
  --archive /path/to/bundle.tar.gz --overwrite --package-only

Run every configured GPU count:

bash scripts/run_07_wan22_720p_121f_24fps_scale.sh

Run the MiniMax-H3 832x480 scale with the rebuilt production image. Task 09 uses FL2V_START_480P.jpg and FL2V_END_480P.jpg from the runtime input directory and keeps the existing bird-stable prompt:

bash scripts/run_09_minimax_h3_480p_124f_24fps_scale.sh --image IMAGE

Run only one scale point (both forms are supported):

bash scripts/run_07_wan22_720p_121f_24fps_scale.sh --gpu-count 2
bash scripts/run_07_wan22_720p_121f_24fps_scale.sh 2

Run an explicit subset:

bash scripts/run_07_wan22_720p_121f_24fps_scale.sh --counts 2,8

Numbered tasks intentionally ignore an inherited IMAGE environment variable so a stale shell export cannot replace the intended image. Wan entries retain their production default; MiniMax-H3 requires an explicit --image IMAGE.

Default physical groups are task-specific. All numbered scale tasks preserve the original Wan timing thermal rotation: 1,2 for SP2, 15,14,13,12 for SP4, 0..7 for SP8, then 0..15 for SP16. Wan2.1 task 02 uses GPU 0 for its single-card arm. This lets the previously active partial group cool during the next arm instead of continuously heating GPUs 0 and 1. The selected groups are recorded in run_manifest.json. Override all groups in the task's supported-count order when the allocation is different:

TIMING_GPU_GROUPS='14,15;12,13,14,15;8,9,10,11,12,13,14,15;0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15' \
  bash scripts/run_07_wan22_720p_121f_24fps_scale.sh

Each run writes <count>gpu.mp4, <count>gpu.log, <count>gpu_memory.jsonl, <count>gpu_memory.jsonl.summary.json, run_manifest.json, timings.csv, and timings.md under /disk/ssd/lightx2v-runtime/outputs/<run-tag>/. The final table keeps the previous metrics: Image Encoder, VAE Encoder, Text Encoder, Encoders total, four-step DiT, mean DiT step, VAE Decoder, RUN pipeline, and Total Cost.

The shared launcher enables a read-only host memory monitor by default. It samples selected-rank RSS/PSS/private memory, the container cgroup, host memory, and physical VRAM for only the GPUs assigned to that scale point. Full samples are written to JSONL every 2 seconds, while the terminal prints only phase changes, a 30-second heartbeat, one warning per threshold, and the final peak summary. The monitor does not call rocm-smi or change GPU state.

# Disable collection for a pure timing-only repeat.
MEMORY_MONITOR=0 bash scripts/run_07_wan22_720p_121f_24fps_scale.sh --counts 8,16

# Keep 2-second samples but print terminal heartbeats only every 60 seconds.
MEMORY_MONITOR_INTERVAL=2 MEMORY_MONITOR_PRINT_INTERVAL=60 \
  bash scripts/run_07_wan22_720p_121f_24fps_scale.sh --gpu-count 16

# Print only phase transitions and the final peak summary.
MEMORY_MONITOR_PRINT_INTERVAL=0 \
  bash scripts/run_07_wan22_720p_121f_24fps_scale.sh --gpu-count 16

Total Cost keeps the original LightX2V internal definition: it starts before init_runner(config) and ends after runner.run_pipeline(input_info) returns. Baseline and B1 use exactly the same boundary. Lazy B1 may move work from eager runner initialization into RUN pipeline, so a higher pipeline time together with a lower Total Cost is valid redistribution rather than missing time.

Wan2.2 uses full lazy block offload. Its default schedule request is auto:

  • 2/4 GPUs resolve to baseline;
  • 8/16 GPUs resolve to b1;
  • LIGHTX2V_WAN_BLOCK_OFFLOAD_SCHEDULE=b1 force-enables B1;
  • LIGHTX2V_WAN_BLOCK_OFFLOAD_SCHEDULE=baseline force-disables B1.

Shared implementation lives in scripts/lib/; it is not a user-facing task. Historical launchers are under scripts/deprecated/ and are not called by the numbered entries or covered by the active production contract.

Historical documentation (deprecated)

Previous LightX2VRun documentation

Docker launchers for the AMD ROCm GFX1201 LightX2V image. Scaled FP8 inference supports 1, 2, 4, 8, and 16 GPUs without enabling classifier-free guidance. The LoRA-FP8 launchers can merge the Wan2.2 high/low distill LoRAs into the official DiT weights, quantize both models to scaled E4M3 FP8, and immediately start inference.

Both the prebuilt scaled-FP8 and merged LoRA-FP8 launchers report synchronized DiT progress. Each completed step uses the slowest rank's profiler duration, which represents the distributed critical path. The final line reports DiT total time, average s/it, and throughput in it/s; model loading, T5, and VAE time are intentionally excluded. Upstream Wan warmup is disabled by default for every Distill/LoRA 1/2/4/8/16-GPU launcher. Set LIGHTX2V_WARMUP=1 to run the high- and low-noise warmup before measured inference, or LIGHTX2V_DIT_PROGRESS=0 to restore raw torchrun output without the progress report.

GFX1201 images can bundle a committed fallback snapshot of these launchers at /opt/LightX2VRun. The two in-image compatibility entries (Distill and LoRA, both two-GPU) prefer the host checkout mounted at /workspace/LightX2VRun and warn before falling back to the bundled snapshot. The bind mount used by lightx2vModelrun therefore makes launcher-only updates available without an image rebuild.

Model layout

The default model root is /disk/ssd/difumodels-Dis:

/disk/ssd/difumodels-Dis/
|-- Encoders/
|-- Wan2.2-Distill-Loras/
|-- Wan2.2-Distill-Models/
`-- Wan2.2-I2V-A14B/
    |-- high_noise_model/*.safetensors
    `-- low_noise_model/*.safetensors

lightx2vModelrun maps this host layout to the paths expected by the LightX2V GFX1201 BF16 and FP8 configurations.

The LoRA-FP8 path requires the original official safetensors shards under both noise-model directories. A directory containing only config.json is enough for prebuilt scaled-FP8 inference, but it cannot be used for LoRA merging.

Run

# One GPU
GPU_DEVICES=0 ./lightx2vModelrun --infer-fp8

# Scaled FP8 4-step I2V on GPUs 0 and 1
./lightx2vModelrun --infer-fp8

# Four GPUs (Ulysses SP=4)
GPU_DEVICES=0,1,2,3 ./lightx2vModelrun --infer-fp8

# Eight GPUs (Ulysses SP=8)
GPU_DEVICES=0,1,2,3,4,5,6,7 ./lightx2vModelrun --infer-fp8

# Sixteen GPUs (Ring SP=16)
GPU_DEVICES=0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 \
  ./lightx2vModelrun --infer-fp8

# Native SageAttention2; the same topology rule selects Ring on 16 GPUs
GPU_DEVICES=0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 \
  ./lightx2vModelrun --infer-sage-fp8

# Wan2.1 720p/81-frame/4-step Sage inference on two GPUs
GPU_DEVICES=0,1 ./lightx2vModelrun --infer-wan21-sage-fp8

# Single-GPU Wan2.1 release with the image-built CK Conv3d v1 VAE
GPU_DEVICES=0 ./lightx2vModelrun --wan21-ckconv3d-v1-release

# BF16 4-step I2V
./lightx2vModelrun --infer-bf16

# Interactive container shell
./lightx2vModelrun

Wan2.1 two-GPU inference

The production Wan2.1 entry uses two ranks with Ulysses SP=2, CFG disabled, native gfx1201 SageAttention2 for self-attention, and fused Q/K RoPE. It reuses the same 720p, 81-frame, four-step FP8 checkpoint layout as the single-GPU comparison launcher. Warmup remains disabled unless LIGHTX2V_WARMUP=1 is set. FP8 GEMMs retain the LightX2V default scaled-mm path and its automatic Aiter fallback.

GPU_DEVICES=0,1 ./lightx2vModelrun --infer-wan21-sage-fp8

Wan2.1 CK Conv3d v1 single-GPU release

This release entry keeps the Wan2.1 DiT block offload, T5/CLIP CPU offload, SageAttention2, and fused Q/K RoPE configuration. The Wan VAE is single-GPU, GPU-resident, and untiled; both encode and decode route supported Conv3d calls through the image-built Aiter_CK_Conv3d_v1 module while MIOpen remains off. The launcher accepts 1, 2, 4, 8, or 16 GPUs and selects the CK AOT image by default.

GPU_DEVICES=0 ./lightx2vModelrun --wan21-ckconv3d-v1-release

Wan2.2 CK Conv3d v1 shape sweep

The Wan2.2 shape sweep collects resident, untiled VAE Conv3d contracts. Its existing 720p and 480p workloads use 81 frames at 16 fps. The additional 480p121f workload uses 480x832, 121 frames, and 24 fps. Each represents five seconds under Wan's 4n+1 VAE frame contract. Workloads run on 2, 4, 8, and 16 GPUs with separate profile tags and logs.

# Default: only 480P/121f/24fps on 2,4,8,16 GPUs.
bash scripts/run_wan22_ckconv3d_v1_scale_sweep.sh

# Collect only 480P/121f/24fps; do not repeat either existing 81f workload.
SWEEP_WORKLOADS=480p121f SWEEP_COUNTS=2,4,8,16 \
  bash scripts/run_wan22_ckconv3d_v1_scale_sweep.sh

# Collect the new 720P/121f/24fps workload only.
bash scripts/run_wan22_ckconv3d_v1_720p_5s_shape_sweep.sh

SWEEP_WORKLOADS accepts unique values from 720p,480p,480p121f,720p121f; its default is 480p121f so an ordinary run cannot repeat the completed 81f profiles. The dedicated run_wan22_ckconv3d_v1_720p_5s_shape_sweep.sh wrapper selects only 720p121f, namely 720x1280, 121 frames, and 24 fps.

The unified 720P five-second entry exposes an explicit mode switch. shape is the default and collects Conv3D contracts; timing runs the same 720x1280, 121-frame, 24-FPS workload through the release path with shape collection disabled:

bash scripts/run_wan22_ckconv3d_v1_720p_5s_sweep.sh --mode shape
bash scripts/run_wan22_ckconv3d_v1_720p_5s_sweep.sh --mode timing

SWEEP_MODE=timing is equivalent to --mode timing. Shape and timing use separate SWEEP_* and TIMING_* output overrides, so their results cannot accidentally overwrite each other. SWEEP_COUNTS selects from 2,4,8,16. Use SWEEP_RESULT_DIR and SWEEP_SUMMARY_DIR for explicit output overrides; generic RESULT_DIR and SUMMARY_DIR values left by another task are ignored. The summary records workload metadata in its manifest and route CSV. For hot kernel prioritization it keeps the rank-critical maximum across GPU scale points of one workload, then adds the critical counts of distinct workloads.

Upload a Wan2.2 memory diagnostic bundle

The memory uploader accepts the sweep result directory; no manual tar command is needed. It collects every *_memory.jsonl, its .summary.json, and the matching inference .log, builds a deterministic archive, uploads it with boto3, and verifies the remote size and SHA256 metadata with head_object.

export MINIO_ACCESS_KEY=...
export MINIO_SECRET_KEY=...

python3 scripts/upload_wan22_memory_bundle.py \
  /disk/ssd/lightx2v-runtime/outputs/wan22_memdiag_hot28_20260812_081324

The default target is s3://aitertunecollection/wan22/memory-diagnostics/<run>/<run>_memory_diagnostics.tar.gz through http://compiler.hvat-ai.com:9000. Standard AWS_ACCESS_KEY_ID/AWS_SECRET_ACCESS_KEY credentials are also supported. Use --package-only to create and verify the local archive without uploading.

The Experiment-A launcher enables automatic upload by default. After inference it runs the summarizer, then packages the inference log, raw and summarized memory diagnostics, all per-rank runtune reports, the summarizer log, and the final Experiment-A summary when available. The upload is still attempted when the summarizer fails, so the failure bundle is available for debugging.

export MINIO_ACCESS_KEY=...
export MINIO_SECRET_KEY=...

WAN22_CACHE_STATE=warm \
IMAGE=<instrumented-image> \
bash scripts/run_wan22_lazy_16gpu_experiment_a.sh

The default Experiment-A target is s3://aitertunecollection/wan22/experiment-a/<run>/<run>_experiment_a.tar.gz. Set WAN22_UPLOAD=0 to disable automatic packaging/upload, or WAN22_UPLOAD_PREFIX to change the object-key prefix.

Wan2.2 CK Conv3d v1 timing sweep

The Wan2.2 timing sweep runs the same resident, untiled CK-v1 VAE workload used for the 720P shape collection row, but explicitly disables the CK Conv3d profile directory. It runs 2, 4, 8, and 16 GPUs sequentially and uses the Wan2.1 scale sweep's rank-critical-path calculation for encoder, four-step DiT, decoder, pipeline, and total timings. Results are written as timings.csv and timings.md beside the four raw logs. Task-specific overrides use TIMING_SWEEP_TAG, TIMING_RESULT_DIR, TIMING_SWEEP_COUNTS, and TIMING_GPU_GROUPS; generic SWEEP_TAG and RESULT_DIR values left by shape/tuning tasks are ignored. Wan2.2 sets use_image_encoder=false, so its standalone Wan2.1-style CLIP Image Encoder timing is reported as N/A (disabled) rather than as a measured zero; image conditioning is measured by VAE Encoder.

bash scripts/run_wan22_ckconv3d_v1_timing_sweep.sh \
  --image compiler.hvat-ai.com:8001/lightx2vrocm/lightx2v-rocm:gfx1201-R9600-FP8-260812-CKConv3dV1-Hot28-AOTFinal

480P five-second, two-frame-rate timing sweep

The 480P five-second launcher runs two explicit workloads so FPS and frame count cannot be confused:

workload resolution FPS frames duration formula
480p_16fps_81f 480×832 16 81 (81 - 1) / 16 = 5s
480p_24fps_121f 480×832 24 121 (121 - 1) / 24 = 5s

Each workload runs sequentially on 2, 4, 8, and 16 GPUs. Its raw logs, CSV, and Markdown table are kept in a workload-named subdirectory. The final timings.md contains two separately titled tables, and workloads.csv records the resolution, FPS, frame count, and duration metadata.

bash scripts/run_wan22_ckconv3d_v1_480p_5s_timing_sweep.sh \
  --image compiler.hvat-ai.com:8001/lightx2vrocm/lightx2v-rocm:gfx1201-R9600-FP8-260812-CKConv3dV1-Hot28-AOTFinal

Use the existing TIMING_SWEEP_COUNTS, TIMING_GPU_GROUPS, TIMING_SWEEP_TAG, and TIMING_RESULT_DIR overrides when needed.

Reproduce the RTX 4090 171-second workload

The upstream 171s result is a single RTX 4090 running Wan2.1 I2V 14B at 720p for 81 frames with the 4-step distilled model and CFG disabled. The published benchmark script uses img_2.jpg, the cooking prompt, block-level CPU offload, FP8 DiT weights, and profiling output; the 720p table specifies seed 1234. It is not a Wan2.2 MoE result.

The historical JSON kept 480p defaults with 720/1280 comments, so using the current configs/bench/lightx2v_6_distill.json unchanged does not reproduce the 720p row. This launcher creates an explicit 720p runtime config and substitutes the ROCm attention/GEMM backends while preserving the benchmark workload:

GPU_DEVICES=0 ./lightx2vModelrun --benchmark-wan21-4090

Test native gfx1201 SageAttention2 with the identical one-GPU Wan2.1 720P/81-frame/4-step workload:

GPU_DEVICES=0 IMAGE=<image-containing-Aiter-ca4804815> \
  ./lightx2vModelrun --benchmark-wan21-4090-sage

This entry changes only self-attention from FlyDSL BF16 to aiter_fav3_sage_bf16_attn. Cross-attention, FP8 DiT weights, seed, offload ratio, and source image remain identical to the 4090 comparison entry.

Run FlyDSL BF16 and Sage V2 in sequence and collect per-step decomposition from the real Wan2.1 model. With two GPU IDs, FlyDSL uses the first and Sage uses the second. The two arms still run sequentially to avoid CPU-offload, PCIe, and storage contention in the A/B comparison:

GPU_DEVICES=0,1 IMAGE=<image-containing-current-LightX2V-runtune-instrumentation> \
  ./lightx2vModelrun --runtune-wan21

With one GPU ID, both arms run sequentially on the same device. RunTune selects triton_fused_qk_rope for both FlyDSL and Sage so the attention A/B uses the same RoPE contract. The terminal and summary.json record the actual backend. A valid fused model run also emits Using fused gfx1201 Q/K RoPE once. Without that event, the runtime contract fell back and the result is not a fused sample.

For an isolated fused Q/K RoPE result, run adjacent Sage-only A/B arms on the same GPU and image:

GPU_DEVICES=0 RUNTUNE_BACKENDS=sage \
  RUNTUNE_ROPE_TYPE=torch_real_rope \
  RUNTUNE_NAME=wan21_sage_rope_torch_<name> \
  IMAGE=<image-containing-production-fused-RoPE> \
  ./lightx2vModelrun --runtune-wan21

GPU_DEVICES=0 RUNTUNE_BACKENDS=sage \
  RUNTUNE_ROPE_TYPE=triton_fused_qk_rope \
  RUNTUNE_NAME=wan21_sage_rope_fused_<name> \
  IMAGE=<same-image> \
  ./lightx2vModelrun --runtune-wan21

Single-backend mode still writes raw JSON, summary.json, summary.csv, and details.csv; the absent A/B backend is shown as n/a. One-time Sage prepare/core instrumentation was removed to avoid perturbing performance with per-layer timing events. The regular self-attention, phase, FP8 GEMM/quant, and offload metrics remain.

The default workload remains 720P, 81 frames, 4 steps, seed 1234, full block offload, and no warmup. Results under /disk/ssd/lightx2v-runtime/outputs/wan21_runtune_<timestamp>/ contain raw JSON/log/video for both backends, the A/B summary.json and summary.csv, and Q/K/V plus M/N/K shape detail in details.csv. The report includes all four steps and steady state excluding the first. Self/cross/FFN, attention, FP8 GEMM, and offload copy/wait are nested intervals and must not be summed as step time.

To inspect both container commands and environment forwarding without starting the model:

GPU_DEVICES=0,1 OUTPUT_DIR=/tmp/lightx2v-runtune DRY_RUN=1 \
  ./lightx2vModelrun --runtune-wan21

Wan2.1 VAE T0 four-card runtune

The VAE-only T0 launcher assigns one isolated combination to each card and runs the exact Wan2.1 720p/81-frame encoder and decoder shapes. It records synchronized wall time, PyTorch peak allocated/reserved VRAM, host peak RSS, output hashes, and element-wise comparisons against the legacy arm. T5, CLIP, DiT, channels-last, and VAE parallelism are deliberately excluded so they cannot contaminate the MIOpen/tiling/residency result.

GPU_DEVICES=0,1,2,3 ./lightx2vModelrun --runtune-wan21-vae

The default mapping is:

GPU Arm MIOpen Spatial tiling VAE CPU offload
0 legacy 0 1 1
1 miopen 1 1 1
2 miopen_untiled 1 0 1
3 optimized 1 0 0

This focused runner explicitly applies the requested PyTorch MIOpen switch after platform initialization, so the existing T1 image can run the experiment without a rebuild. Results and a .tar.gz archive are written under OUTPUT_DIR. Because the four arms use different cards, use T0_ROTATION=1 for a second run that shifts every arm to the next card when the first result is close enough for card bias to matter. T0_ROUNDS=2 records a cold and warm-cache sample in one process. All arms start encode together, then advance independently; a slow first-use MIOpen search on one card therefore cannot time out the other cards before decode.

Logging does not depend on a successful run or on the container filesystem. The host result directory always retains launcher.log, each arm's gpuN/run.log and failure.json/result.json, plus the remaining container /tmp contents under gpuN/container_tmp/ after the --rm containers exit. The launcher closes its live log before creating the archive, preventing a successful benchmark from being marked failed by tar's file changed as we read it check.

Each GPU directory also contains pipeline_status.txt with the Docker, tee, and awk exit codes. A ROCm process can occasionally return nonzero during interpreter teardown after atomically committing a complete result. The launcher validates the experiment, arm, and round count in result.json; a valid committed result remains successful while the teardown status is retained as a warning.

Wan2.1 CK Conv3d v1 two-card runtune

This A/B assigns one complete VAE workload to each card. The baseline preserves the original T1 VAE policy: backend=pytorch, MIOpen disabled, VAE_CPU_OFFLOAD=1, and tiling enabled. The candidate uses backend=Aiter_CK_Conv3d_v1, MIOpen disabled, VAE_CPU_OFFLOAD=0, and tiling disabled. Both encode and decode are measured. A single Conv3d is never split across cards; the reported speedup compares the complete T1 VAE strategy with the complete CK-v1 resident VAE strategy.

The CK extension must already exist in the image as aiter.jit.module_ck_vae_conv3d. The launcher checks the wheel extension and will not compile CK at runtime. Its default image is ccr.ccs.tencentyun.com/lightx2vrocm/lightx2v-rocm:gfx1201-R9600-FP8-260806-CKConv3dV1-Hot9-AOT4.

GPU_DEVICES=0,1 ./lightx2vModelrun --runtune-wan21-ck-conv3d-v1

The run machine does not need a LightX2V checkout. The complete host launcher and Python measurement runner live in LightX2VRun; the launcher mounts only the runner into each container. LightX2V application code always comes from the selected image at /workspace/LightX2V, and both its LightX2V and Aiter revisions are checked before either GPU starts.

Set ROTATION=1 for the second run to exchange the two physical cards. The launcher uses Docker host networking and forwards the default http://192.168.2.3:10808 proxy; set PROXY_URL= to disable it. It never calls rocm-smi or changes frequency and power settings.

The standalone Sage benchmark still chunks FP32 torch_real_rope at 8,192 sequence positions by default, avoiding an approximately 1.42-GiB FP32 temporary for complete 720P Q/K RoPE. RunTune defaults to triton_fused_qk_rope; when the gfx1201 contract matches, the chunk wrapper passes through to one fused kernel without the FP32 temporary or chunk-output copy. Otherwise it retains the 8,192-row Torch fallback. Set ROPE_CHUNK_SIZE=4096 to reduce fallback peak size or ROPE_CHUNK_SIZE=0 to disable chunking.

The default OFFLOAD_RATIO=1.0 streams all 40 DiT blocks. This matches the historical benchmark config's annotated 720p setting; its 0.8 value was the 480p setting. To test more residency, reduce it gradually; OFFLOAD_RATIO=0 keeps all 40 blocks resident and is not expected to fit this 720p workload:

GPU_DEVICES=0 OFFLOAD_RATIO=1.0 ./lightx2vModelrun --benchmark-wan21-4090

Expected host model layout:

/disk/ssd/difumodels-Dis/
`-- Wan2.1-I2V-14B-720P-StepDistill-CfgDistill-Lightx2v/
    `-- distill_fp8/
        |-- google/umt5-xxl/*
        |-- block_0.safetensors ... block_39.safetensors
        |-- non_block.safetensors
        |-- diffusion_pytorch_model.safetensors.index.json
        |-- config.json
        |-- models_t5_umt5-xxl-enc-fp8.pth
        |-- clip-fp8.pth
        `-- Wan2.1_VAE.pth

The benchmark table links the ordinary lightx2v/Wan2.1-I2V-14B-720P-Lightx2v base repository, but the historical run_lightx2v_6_distill.sh explicitly uses the 4-step lightx2v/Wan2.1-I2V-14B-720P-StepDistill-CfgDistill-Lightx2v repository. Only its distill_fp8/ subtree is required. Those tensors use the same per-channel FP8 weight layout required by fp8-sgl; the launcher changes the runtime kernel from the CUDA-only Q8F implementation to GFX1201 Aiter rowwise GEMM without requantizing the checkpoint.

The 2025 benchmark config annotated offload_ratio=1 for its 720p variant, so the GFX1201 launcher fully streams all 40 blocks while retaining the ROCm Aiter GEMM and attention backends.

Download just that subtree with ModelScope:

modelscope download \
  --model 'lightx2v/Wan2.1-I2V-14B-720P-StepDistill-CfgDistill-Lightx2v' \
  --include \
    'distill_fp8/*.safetensors' \
    'distill_fp8/*.json' \
    'distill_fp8/*.pth' \
    'distill_fp8/google/umt5-xxl/*' \
    'distill_fp8/xlm-roberta-large/*' \
  --local_dir './Wan2.1-I2V-14B-720P-StepDistill-CfgDistill-Lightx2v'

The progress reporter compares DiT denoising time, excluding warmup, model loading, encoders, VAE decoding, and video saving. The upstream number divided by four is 42.75s/it. Do not compare it with the earlier local 42.49s/it measurement: that was a four-GPU Wan2.2 run, not this single-GPU Wan2.1 workload. CUDA SageAttention versus ROCm Aiter, host offload bandwidth, and software versions also prevent this from being a strict hardware-only comparison.

Merge LoRA, quantize, and infer

The first command performs the high-noise conversion and then the low-noise conversion before inference. Conversion defaults to CPU because the converter does not shard a 14B model across GPUs and a 32 GB card is likely to run out of memory. Later runs validate and reuse the generated checkpoints.

# One GPU
GPU_DEVICES=0 ./lightx2vModelrun --infer-lora-fp8

# Two GPUs
GPU_DEVICES=0,1 ./lightx2vModelrun --infer-lora-fp8

# Four GPUs
GPU_DEVICES=0,1,2,3 ./lightx2vModelrun --infer-lora-fp8

# Eight GPUs
GPU_DEVICES=0,1,2,3,4,5,6,7 ./lightx2vModelrun --infer-lora-fp8

# Sixteen GPUs
GPU_DEVICES=0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 \
  ./lightx2vModelrun --infer-lora-fp8

By default the LoRAs are read from:

/disk/ssd/difumodels-Dis/Wan2.2-Distill-Loras

The merged checkpoints and their provenance metadata are written to:

/disk/ssd/difumodels-Dis/Wan2.2-Distill-Models/lora-fp8-strength1

If the LoRA directory contains more than one high/low version, select the pair explicitly by file name:

HIGH_NOISE_LORA_FILENAME=wan2.2_i2v_A14b_high_noise_lora_rank64_lightx2v_4step_1022.safetensors \
LOW_NOISE_LORA_FILENAME=wan2.2_i2v_A14b_low_noise_lora_rank64_lightx2v_4step_1022.safetensors \
GPU_DEVICES=0,1 \
  ./lightx2vModelrun --infer-lora-fp8

The *_1217.safetensors files in the documented model layout are named wan2.2_t2v_*; they are T2V LoRAs, not newer revisions of the I2V 1022 pair, and must not be merged into the Wan2.2 I2V base.

Useful conversion controls:

# Build both checkpoints without starting inference
LORA_CONVERT_ONLY=1 GPU_DEVICES=0 ./lightx2vModelrun --infer-lora-fp8

# Rebuild an existing matching output
FORCE_LORA_CONVERT=1 GPU_DEVICES=0,1 ./lightx2vModelrun --infer-lora-fp8

# Different strength: use a different output directory to keep provenance clear
LORA_STRENGTH=0.8 \
LORA_FP8_OUTPUT_DIR=/disk/ssd/difumodels-Dis/Wan2.2-Distill-Models/lora-fp8-strength0.8 \
GPU_DEVICES=0,1 \
  ./lightx2vModelrun --infer-lora-fp8

Each conversion is accepted only when every adjustment applicable to the official Wan2.2 I2V base was applied and the output contains E4M3 tensors with matching scale tensors. The 1022 LoRAs also contain adjustments for a legacy CLIP image-attention branch that is absent from the official latent-conditioned I2V base and disabled by the runtime configuration; only those precisely matched keys may be skipped. Any other missing key still stops conversion. LoRA merging does not change GEMM shapes, so the GFX1201 hipBLASLt scaled-mm route and its Aiter rowwise CK fallback remain applicable.

The default image is ccr.ccs.tencentyun.com/lightx2vrocm/lightx2v-rocm:gfx1201-R9600-FP8-260804-SageUtimateWithMM-T1. Generated videos are written to /disk/ssd/lightx2v-runtime/outputs.

lightx2vModelrun mounts this checkout read-only at /workspace/LightX2VRun and runs the matching script from scripts/. Changes to prompts, runtime JSON overrides, or the 2/4/8/16 GPU launch scripts therefore do not require an image rebuild. The image remains the fallback owner of the LightX2V Python package and kernels.

The BF16-attention 16-GPU Ring path requires an image built from the LightX2V ROCm branch with Aiter Triton apply_with_lse() support. The opt-in --infer-sage-fp8 path additionally requires Aiter revision 189d95fdd964c64b010e43aefeaf13779ccfd41e, whose native gfx1201 SageAttention2 retains the corrected natural-log LSE/T1 contract and adds the finite D128 schedule dispatch plus static key-tail peeling, and LightX2V revision b157de187316fef56c0c2f84c29785e1c995bbb7, where the ROCm adapter exposes that LSE to Ring, uses direct-output activation quantization with self-attention Q/K/V reuse, includes the tuned gfx1201 fused Q/K RoPE implementation, routes eligible FP8 GEMMs through hipBLASLt scaled-mm, and records the T1 integration contract. The launcher checks both image labels before starting any rank. Those Aiter and LightX2V updates require one image rebuild; launcher-only changes remain bind-mounted afterward.

The FP8 topology is:

1 GPU:   Ulysses SP=1
2 GPUs:  Ulysses SP=2
4 GPUs:  Ulysses SP=4
8 GPUs:  Ulysses SP=8
16 GPUs: Ring SP=16
CFG:     disabled for every topology

Wan2.2 A14B has 40 attention heads. SP=1 keeps the same Ulysses configuration without splitting the sequence; Ulysses also works for SP=2/4/8, but not SP=16 because 40 is not divisible by 16. The 16-GPU launcher uses LightX2V Ring attention instead and does not create a second CFG replica group.

--infer-fp8 remains the BF16 attention baseline. --infer-sage-fp8 keeps text/image cross-attention on the tuned Aiter Triton BF16 kernel and changes only self-attention to aiter_fav3_sage_bf16_attn; on SP16, each Ring step gets native Sage output plus natural-log LSE and merges all 16 K/V shards with logaddexp weights.

The launcher fixes AITER dispatch to GPU_ARCHS=gfx1201 and CU_NUM=24. Eligible FP8 GEMMs use hipBLASLt scaled-mm by default; the rowwise CK tuning CSV embedded in the image remains the explicit and automatic fallback.

Use environment variables to override the defaults when needed:

GPU_DEVICES=2,3 IMAGE=custom-lightx2v:latest ./lightx2vModelrun --infer-fp8

# Use a custom input from INPUT_DIR and generate 121 frames at 720p
GPU_DEVICES=0,1,2,3 \
IMAGE_PATH=/inputs/source.png \
TARGET_VIDEO_LENGTH=121 \
TARGET_HEIGHT=720 TARGET_WIDTH=1280 \
./lightx2vModelrun --infer-fp8

Run ./lightx2vModelrun --help for all supported overrides.

For MiniMax-H3 full BF16 Ref2AV—no LoRA, default SP2, 768P/15 seconds, and the built-in two-image rooftop material—see the run notes and the complete AMD reproducibility guide. Prompt and reference-image locations, profile selection, ordering, and Docker mount routing are covered in the dedicated prompt/image profile guide.

The H3 BF16 Ref2AV 4/8/16-GPU entry is scripts/run_11_minimax_h3_bf16_ref2v_768p_15s_scale.sh; it reuses the FL2AV sweep framework. See the scale and operator review.

The H3 Ref2AV Turbo 8-step LoRA entry is scripts/run_12_minimax_h3_ref2av_8step_768p_15s.sh. It uses the complete Ref2AV BF16 base, dynamically applies minimax_h3_ref2v_turbo_8step_v1.0_768p_bf16.safetensors, and defaults to four GPUs with collection enabled. See the 8-step integration for sampling, shape collection, and end-to-end acceptance.

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