feat(gpio): prove GPIO42 rising-edge detect - #77
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Drive a fail-closed GPREN1/GPEDS1 rising edge on the ACT LED pin after GENET, restoring leftover detect enable without touching UART mux or claiming PWM output. Metal: gpio4 ok=1 version=140 pin=42 rise=1 restore=1 kernel8.img sha256 962880dbb4c2c12aa1b54d422423acf276846827de43a12fa496a792f47f8dc7 Co-authored-by: Cursor <cursoragent@cursor.com>
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Hi @infektyd - this PR hasn't had any activity in over 7 days. Please update it or close it if it's no longer needed. (No merge conflicts detected.) |
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Summary
7eb3ac54d6103c56047ffa6c8956285ead64ea0f(feat(gpio): prove GPIO42 rising-edge detect) onto PR feat(pwm): prove GPIO12 ALT0 pin-mux #76 tippr/pwm3-v139@ff8e6a79a6ddffce43874ce31359f70496f91ea8.kernel8.imgsha256962880dbb4c2c12aa1b54d422423acf276846827de43a12fa496a792f47f8dc7; serialgpio4 ok=1 version=140 pin=42 rise=1 restore=1(verified from last-boot/live soak capture/tmp/aether-v140-serial.logthis session; live soak probe is valid proof; iterate AND-gate miss is not a kernel miss).Test plan
gh pr view 76still tipsff8e6a79a6ddffce43874ce31359f70496f91ea8and this PR bases onpr/pwm3-v139.gpio4 ok=1 version=140 pin=42 rise=1 restore=1.tests/test_runtime_gpio4_v140_contract.pyis in the diff and Toolsets are not.Made with Cursor