feat(auxspi1): prove AUX SPI1 enable - #80
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Fail-closed AUXENB SPI1 bit after GENET on a new unused block, with leftover restore. BSC0 MMIO after GENET hung AXI — do not retry. Co-authored-by: Cursor <cursoragent@cursor.com>
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Hi @infektyd - this PR hasn't had any activity in over 7 days. Please update it or close it if it's no longer needed. (No merge conflicts detected.) |
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Summary
47d6e39ca537eae52e0a315e40e5e60c007563eb(feat(auxspi1): prove AUX SPI1 enable) onto PR feat(pcm): prove PCM/I2S clock enable #79 tippr/pcm-v142@0d3690a8c266c68ba5cb02c09457e06c2f222937.kernel8.imgsha2562de65298b57f9099fe871decd1d1e8967f4ad8293bd218d0487841c7aedf3061; serialauxspi1 ok=1 version=143 en=1 restore=1(verified this session from last-boot capture/tmp/aether-v143-auxspi1-verify.bin; TFTP image at~/aether-tftp/aether/kernel8.imgmatches the same sha256; live soak / last-boot serial is valid proof; iterate AND-gate miss is not a kernel miss).Test plan
gh pr view 79still tips0d3690a8c266c68ba5cb02c09457e06c2f222937and this PR bases onpr/pcm-v142.auxspi1 ok=1 version=143 en=1 restore=1.tests/test_runtime_auxspi1_v143_contract.pyis in the diff and Toolsets are not.Made with Cursor