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Research doke's brain and silicon direction with sourced chip profiles - #4
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This was referenced Oct 15, 2026
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Inside a brain, inside a chip
doke needs an interactive hardware direction anchored in its existing brain explorer. This proposal makes a user's input traceable through CPU/GPU/tensor computation or packet-switch queues, then places the original human atlas alongside it for a carefully scoped comparison.
This PR establishes the research and data foundation. The review stack now includes executable Rust models and the actual 3D interface: models #5, silicon explorer #6, and brain comparison #7. Nothing from #1–#3 is included, and no PR is approved for merging.
The proposed interactions are change memory locality, follow work across GPU lanes, watch actual multiply–accumulate flow, and unblock a packet's destination. Longer-term ideas include a byte's biography, reducing traffic while preserving output, tiny attention, measured trace import, original RTL, and licensed recorded neural trials.
Three agents researched CPU/GPU architectures, Cisco/tensor/LLM mechanisms, and neuroscience/comparison methods. The catalog received an independent source review, including variant distinctions and GB/GiB/bandwidth units. NVIDIA white-paper diagrams were visually reviewed under the PDF workflow. No external code, artwork, weights, SDK or RTL was copied.
Validation:
node tests/hardware-catalog.mjspasses, checking all profile citations, evidence references and anatomy IDs;git diff --checkand Gitleaks passed. Added a CI source/model check. The current application remains unchanged in this PR.Working visual prototypes
These are captures of the implemented explorer, not generated concept art. See #6 and #7 for interaction instructions and browser validation.